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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4define void @masked_scatter_nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %masks) nounwind {5; CHECK-LABEL: masked_scatter_nxv2i8:6; CHECK: // %bb.0:7; CHECK-NEXT: st1b { z0.d }, p0, [z1.d]8; CHECK-NEXT: ret9 call void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)10 ret void11}12 13define void @masked_scatter_nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %masks) nounwind {14; CHECK-LABEL: masked_scatter_nxv2i16:15; CHECK: // %bb.0:16; CHECK-NEXT: st1h { z0.d }, p0, [z1.d]17; CHECK-NEXT: ret18 call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)19 ret void20}21 22define void @masked_scatter_nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %masks) nounwind {23; CHECK-LABEL: masked_scatter_nxv2i32:24; CHECK: // %bb.0:25; CHECK-NEXT: st1w { z0.d }, p0, [z1.d]26; CHECK-NEXT: ret27 call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)28 ret void29}30 31define void @masked_scatter_nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %masks) nounwind {32; CHECK-LABEL: masked_scatter_nxv2i64:33; CHECK: // %bb.0:34; CHECK-NEXT: st1d { z0.d }, p0, [z1.d]35; CHECK-NEXT: ret36 call void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)37 ret void38}39 40define void @masked_scatter_nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %masks) nounwind {41; CHECK-LABEL: masked_scatter_nxv2f16:42; CHECK: // %bb.0:43; CHECK-NEXT: st1h { z0.d }, p0, [z1.d]44; CHECK-NEXT: ret45 call void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)46 ret void47}48 49define void @masked_scatter_nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %masks) nounwind #0 {50; CHECK-LABEL: masked_scatter_nxv2bf16:51; CHECK: // %bb.0:52; CHECK-NEXT: st1h { z0.d }, p0, [z1.d]53; CHECK-NEXT: ret54 call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)55 ret void56}57 58define void @masked_scatter_nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %masks) nounwind {59; CHECK-LABEL: masked_scatter_nxv2f32:60; CHECK: // %bb.0:61; CHECK-NEXT: st1w { z0.d }, p0, [z1.d]62; CHECK-NEXT: ret63 call void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)64 ret void65}66 67define void @masked_scatter_nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %masks) nounwind {68; CHECK-LABEL: masked_scatter_nxv2f64:69; CHECK: // %bb.0:70; CHECK-NEXT: st1d { z0.d }, p0, [z1.d]71; CHECK-NEXT: ret72 call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)73 ret void74}75 76define void @masked_scatter_splat_constant_pointer (<vscale x 4 x i1> %pg) {77; CHECK-LABEL: masked_scatter_splat_constant_pointer:78; CHECK: // %bb.0: // %vector.body79; CHECK-NEXT: movi v0.2d, #000000000000000080; CHECK-NEXT: punpklo p1.h, p0.b81; CHECK-NEXT: punpkhi p0.h, p0.b82; CHECK-NEXT: st1w { z0.d }, p1, [z0.d]83; CHECK-NEXT: st1w { z0.d }, p0, [z0.d]84; CHECK-NEXT: ret85vector.body:86 call void @llvm.masked.scatter.nxv4i32.nxv4p0(<vscale x 4 x i32> undef, <vscale x 4 x ptr> zeroinitializer, i32 4, <vscale x 4 x i1> %pg)87 ret void88}89 90%i64_x3 = type { i64, i64, i64 }91define void @masked_scatter_non_power_of_two_based_scaling(<vscale x 2 x double> %data, ptr %base, <vscale x 2 x i64> %offsets, <vscale x 2 x i1> %mask) {92; CHECK-LABEL: masked_scatter_non_power_of_two_based_scaling:93; CHECK: // %bb.0:94; CHECK-NEXT: mul z1.d, z1.d, #2495; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d]96; CHECK-NEXT: ret97 %ptrs = getelementptr inbounds %i64_x3, ptr %base, <vscale x 2 x i64> %offsets98 call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %ptrs, i32 8, <vscale x 2 x i1> %mask)99 ret void100}101 102%i64_x4 = type { i64, i64, i64, i64}103define void @masked_scatter_non_element_type_based_scaling(<vscale x 2 x double> %data, ptr %base, <vscale x 2 x i64> %offsets, <vscale x 2 x i1> %mask) {104; CHECK-LABEL: masked_scatter_non_element_type_based_scaling:105; CHECK: // %bb.0:106; CHECK-NEXT: lsl z1.d, z1.d, #5107; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d]108; CHECK-NEXT: ret109 %ptrs = getelementptr inbounds %i64_x4, ptr %base, <vscale x 2 x i64> %offsets110 call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %ptrs, i32 8, <vscale x 2 x i1> %mask)111 ret void112}113 114declare void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)115declare void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)116declare void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)117declare void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)118declare void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)119declare void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)120declare void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)121declare void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)122declare void @llvm.masked.scatter.nxv4i32.nxv4p0(<vscale x 4 x i32>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)123attributes #0 = { "target-features"="+sve,+bf16" }124