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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mattr=+sve,+bf16 < %s | FileCheck %s3; RUN: llc -mattr=+sme2 -force-streaming < %s | FileCheck %s4 5target triple = "aarch64-unknown-linux-gnu"6 7define <vscale x 16 x i8> @abs_nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {8; CHECK-LABEL: abs_nxv16i8:9; CHECK: // %bb.0:10; CHECK-NEXT: abs z0.b, p0/m, z1.b11; CHECK-NEXT: ret12 %b.op = call <vscale x 16 x i8> @llvm.abs.nxv16i8(<vscale x 16 x i8> %b, i1 0)13 %res = select <vscale x 16 x i1> %pg, <vscale x 16 x i8> %b.op, <vscale x 16 x i8> %a14 ret <vscale x 16 x i8> %res15}16 17define <vscale x 8 x i16> @abs_nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {18; CHECK-LABEL: abs_nxv8i16:19; CHECK: // %bb.0:20; CHECK-NEXT: abs z0.h, p0/m, z1.h21; CHECK-NEXT: ret22 %b.op = call <vscale x 8 x i16> @llvm.abs.nxv8i16(<vscale x 8 x i16> %b, i1 0)23 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x i16> %b.op, <vscale x 8 x i16> %a24 ret <vscale x 8 x i16> %res25}26 27define <vscale x 4 x i32> @abs_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {28; CHECK-LABEL: abs_nxv4i32:29; CHECK: // %bb.0:30; CHECK-NEXT: abs z0.s, p0/m, z1.s31; CHECK-NEXT: ret32 %b.op = call <vscale x 4 x i32> @llvm.abs.nxv4i32(<vscale x 4 x i32> %b, i1 0)33 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a34 ret <vscale x 4 x i32> %res35}36 37define <vscale x 2 x i64> @abs_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {38; CHECK-LABEL: abs_nxv2i64:39; CHECK: // %bb.0:40; CHECK-NEXT: abs z0.d, p0/m, z1.d41; CHECK-NEXT: ret42 %b.op = call <vscale x 2 x i64> @llvm.abs.nxv2i64(<vscale x 2 x i64> %b, i1 0)43 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a44 ret <vscale x 2 x i64> %res45}46 47define <vscale x 16 x i8> @clz_nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {48; CHECK-LABEL: clz_nxv16i8:49; CHECK: // %bb.0:50; CHECK-NEXT: clz z0.b, p0/m, z1.b51; CHECK-NEXT: ret52 %b.op = call <vscale x 16 x i8> @llvm.ctlz.nxv16i8(<vscale x 16 x i8> %b)53 %res = select <vscale x 16 x i1> %pg, <vscale x 16 x i8> %b.op, <vscale x 16 x i8> %a54 ret <vscale x 16 x i8> %res55}56 57define <vscale x 8 x i16> @clz_nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {58; CHECK-LABEL: clz_nxv8i16:59; CHECK: // %bb.0:60; CHECK-NEXT: clz z0.h, p0/m, z1.h61; CHECK-NEXT: ret62 %b.op = call <vscale x 8 x i16> @llvm.ctlz.nxv8i16(<vscale x 8 x i16> %b)63 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x i16> %b.op, <vscale x 8 x i16> %a64 ret <vscale x 8 x i16> %res65}66 67define <vscale x 4 x i32> @clz_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {68; CHECK-LABEL: clz_nxv4i32:69; CHECK: // %bb.0:70; CHECK-NEXT: clz z0.s, p0/m, z1.s71; CHECK-NEXT: ret72 %b.op = call <vscale x 4 x i32> @llvm.ctlz.nxv4i32(<vscale x 4 x i32> %b)73 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a74 ret <vscale x 4 x i32> %res75}76 77define <vscale x 2 x i64> @clz_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {78; CHECK-LABEL: clz_nxv2i64:79; CHECK: // %bb.0:80; CHECK-NEXT: clz z0.d, p0/m, z1.d81; CHECK-NEXT: ret82 %b.op = call <vscale x 2 x i64> @llvm.ctlz.nxv2i64(<vscale x 2 x i64> %b)83 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a84 ret <vscale x 2 x i64> %res85}86 87define <vscale x 16 x i8> @cnt_nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {88; CHECK-LABEL: cnt_nxv16i8:89; CHECK: // %bb.0:90; CHECK-NEXT: cnt z0.b, p0/m, z1.b91; CHECK-NEXT: ret92 %b.op = call <vscale x 16 x i8> @llvm.ctpop.nxv16i8(<vscale x 16 x i8> %b)93 %res = select <vscale x 16 x i1> %pg, <vscale x 16 x i8> %b.op, <vscale x 16 x i8> %a94 ret <vscale x 16 x i8> %res95}96 97define <vscale x 8 x i16> @cnt_nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {98; CHECK-LABEL: cnt_nxv8i16:99; CHECK: // %bb.0:100; CHECK-NEXT: cnt z0.h, p0/m, z1.h101; CHECK-NEXT: ret102 %b.op = call <vscale x 8 x i16> @llvm.ctpop.nxv8i16(<vscale x 8 x i16> %b)103 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x i16> %b.op, <vscale x 8 x i16> %a104 ret <vscale x 8 x i16> %res105}106 107define <vscale x 4 x i32> @cnt_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {108; CHECK-LABEL: cnt_nxv4i32:109; CHECK: // %bb.0:110; CHECK-NEXT: cnt z0.s, p0/m, z1.s111; CHECK-NEXT: ret112 %b.op = call <vscale x 4 x i32> @llvm.ctpop.nxv4i32(<vscale x 4 x i32> %b)113 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a114 ret <vscale x 4 x i32> %res115}116 117define <vscale x 2 x i64> @cnt_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {118; CHECK-LABEL: cnt_nxv2i64:119; CHECK: // %bb.0:120; CHECK-NEXT: cnt z0.d, p0/m, z1.d121; CHECK-NEXT: ret122 %b.op = call <vscale x 2 x i64> @llvm.ctpop.nxv2i64(<vscale x 2 x i64> %b)123 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a124 ret <vscale x 2 x i64> %res125}126 127define <vscale x 2 x half> @fabs_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {128; CHECK-LABEL: fabs_nxv2f16:129; CHECK: // %bb.0:130; CHECK-NEXT: fabs z0.h, p0/m, z1.h131; CHECK-NEXT: ret132 %b.op = call <vscale x 2 x half> @llvm.fabs.nxv2f16(<vscale x 2 x half> %b)133 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a134 ret <vscale x 2 x half> %res135}136 137define <vscale x 4 x half> @fabs_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {138; CHECK-LABEL: fabs_nxv4f16:139; CHECK: // %bb.0:140; CHECK-NEXT: fabs z0.h, p0/m, z1.h141; CHECK-NEXT: ret142 %b.op = call <vscale x 4 x half> @llvm.fabs.nxv4f16(<vscale x 4 x half> %b)143 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a144 ret <vscale x 4 x half> %res145}146 147define <vscale x 8 x half> @fabs_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {148; CHECK-LABEL: fabs_nxv8f16:149; CHECK: // %bb.0:150; CHECK-NEXT: fabs z0.h, p0/m, z1.h151; CHECK-NEXT: ret152 %b.op = call <vscale x 8 x half> @llvm.fabs.nxv8f16(<vscale x 8 x half> %b)153 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a154 ret <vscale x 8 x half> %res155}156 157define <vscale x 2 x float> @fabs_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {158; CHECK-LABEL: fabs_nxv2f32:159; CHECK: // %bb.0:160; CHECK-NEXT: fabs z0.s, p0/m, z1.s161; CHECK-NEXT: ret162 %b.op = call <vscale x 2 x float> @llvm.fabs.nxv2f32(<vscale x 2 x float> %b)163 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a164 ret <vscale x 2 x float> %res165}166 167define <vscale x 4 x float> @fabs_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {168; CHECK-LABEL: fabs_nxv4f32:169; CHECK: // %bb.0:170; CHECK-NEXT: fabs z0.s, p0/m, z1.s171; CHECK-NEXT: ret172 %b.op = call <vscale x 4 x float> @llvm.fabs.nxv4f32(<vscale x 4 x float> %b)173 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a174 ret <vscale x 4 x float> %res175}176 177define <vscale x 2 x double> @fabs_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {178; CHECK-LABEL: fabs_nxv2f64:179; CHECK: // %bb.0:180; CHECK-NEXT: fabs z0.d, p0/m, z1.d181; CHECK-NEXT: ret182 %b.op = call <vscale x 2 x double> @llvm.fabs.nxv2f64(<vscale x 2 x double> %b)183 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a184 ret <vscale x 2 x double> %res185}186 187define <vscale x 2 x bfloat> @fabs_nxv2bf16(<vscale x 2 x i1> %pg, <vscale x 2 x bfloat> %a, <vscale x 2 x bfloat> %b) {188; CHECK-LABEL: fabs_nxv2bf16:189; CHECK: // %bb.0:190; CHECK-NEXT: fabs z0.h, p0/m, z1.h191; CHECK-NEXT: ret192 %b.op = call <vscale x 2 x bfloat> @llvm.fabs.nxv2bf16(<vscale x 2 x bfloat> %b)193 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x bfloat> %b.op, <vscale x 2 x bfloat> %a194 ret <vscale x 2 x bfloat> %res195}196 197define <vscale x 4 x bfloat> @fabs_nxv4bf16(<vscale x 4 x i1> %pg, <vscale x 4 x bfloat> %a, <vscale x 4 x bfloat> %b) {198; CHECK-LABEL: fabs_nxv4bf16:199; CHECK: // %bb.0:200; CHECK-NEXT: fabs z0.h, p0/m, z1.h201; CHECK-NEXT: ret202 %b.op = call <vscale x 4 x bfloat> @llvm.fabs.nxv4bf16(<vscale x 4 x bfloat> %b)203 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x bfloat> %b.op, <vscale x 4 x bfloat> %a204 ret <vscale x 4 x bfloat> %res205}206 207define <vscale x 8 x bfloat> @fabs_nxv8bf16(<vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b) {208; CHECK-LABEL: fabs_nxv8bf16:209; CHECK: // %bb.0:210; CHECK-NEXT: fabs z0.h, p0/m, z1.h211; CHECK-NEXT: ret212 %b.op = call <vscale x 8 x bfloat> @llvm.fabs.nxv8bf16(<vscale x 8 x bfloat> %b)213 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %b.op, <vscale x 8 x bfloat> %a214 ret <vscale x 8 x bfloat> %res215}216 217define <vscale x 2 x float> @fcvt_nxv2f16_to_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x half> %b) {218; CHECK-LABEL: fcvt_nxv2f16_to_nxv2f32:219; CHECK: // %bb.0:220; CHECK-NEXT: fcvt z0.s, p0/m, z1.h221; CHECK-NEXT: ret222 %b.op = fpext <vscale x 2 x half> %b to <vscale x 2 x float>223 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a224 ret <vscale x 2 x float> %res225}226 227define <vscale x 2 x double> @fcvt_nxv2f16_to_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x half> %b) {228; CHECK-LABEL: fcvt_nxv2f16_to_nxv2f64:229; CHECK: // %bb.0:230; CHECK-NEXT: fcvt z0.d, p0/m, z1.h231; CHECK-NEXT: ret232 %b.op = fpext <vscale x 2 x half> %b to <vscale x 2 x double>233 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a234 ret <vscale x 2 x double> %res235}236 237define <vscale x 4 x float> @fcvt_nxv4f16_to_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x half> %b) {238; CHECK-LABEL: fcvt_nxv4f16_to_nxv4f32:239; CHECK: // %bb.0:240; CHECK-NEXT: fcvt z0.s, p0/m, z1.h241; CHECK-NEXT: ret242 %b.op = fpext <vscale x 4 x half> %b to <vscale x 4 x float>243 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a244 ret <vscale x 4 x float> %res245}246 247define <vscale x 2 x half> @fcvt_nxv2f32_to_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x float> %b) {248; CHECK-LABEL: fcvt_nxv2f32_to_nxv2f16:249; CHECK: // %bb.0:250; CHECK-NEXT: fcvt z0.h, p0/m, z1.s251; CHECK-NEXT: ret252 %b.op = fptrunc <vscale x 2 x float> %b to <vscale x 2 x half>253 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a254 ret <vscale x 2 x half> %res255}256 257define <vscale x 2 x double> @fcvt_nxv2f32_to_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x float> %b) {258; CHECK-LABEL: fcvt_nxv2f32_to_nxv2f64:259; CHECK: // %bb.0:260; CHECK-NEXT: fcvt z0.d, p0/m, z1.s261; CHECK-NEXT: ret262 %b.op = fpext <vscale x 2 x float> %b to <vscale x 2 x double>263 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a264 ret <vscale x 2 x double> %res265}266 267define <vscale x 2 x bfloat> @fcvt_nxv2f32_to_nxv2bf16(<vscale x 2 x i1> %pg, <vscale x 2 x bfloat> %a, <vscale x 2 x float> %b) {268; CHECK-LABEL: fcvt_nxv2f32_to_nxv2bf16:269; CHECK: // %bb.0:270; CHECK-NEXT: bfcvt z0.h, p0/m, z1.s271; CHECK-NEXT: ret272 %b.op = fptrunc <vscale x 2 x float> %b to <vscale x 2 x bfloat>273 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x bfloat> %b.op, <vscale x 2 x bfloat> %a274 ret <vscale x 2 x bfloat> %res275}276 277define <vscale x 4 x half> @fcvt_nxv4f32_to_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x float> %b) {278; CHECK-LABEL: fcvt_nxv4f32_to_nxv4f16:279; CHECK: // %bb.0:280; CHECK-NEXT: fcvt z0.h, p0/m, z1.s281; CHECK-NEXT: ret282 %b.op = fptrunc <vscale x 4 x float> %b to <vscale x 4 x half>283 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a284 ret <vscale x 4 x half> %res285}286 287define <vscale x 4 x bfloat> @fcvt_nxv4f32_to_nxv4bf16(<vscale x 4 x i1> %pg, <vscale x 4 x bfloat> %a, <vscale x 4 x float> %b) {288; CHECK-LABEL: fcvt_nxv4f32_to_nxv4bf16:289; CHECK: // %bb.0:290; CHECK-NEXT: bfcvt z0.h, p0/m, z1.s291; CHECK-NEXT: ret292 %b.op = fptrunc <vscale x 4 x float> %b to <vscale x 4 x bfloat>293 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x bfloat> %b.op, <vscale x 4 x bfloat> %a294 ret <vscale x 4 x bfloat> %res295}296 297define <vscale x 2 x half> @fcvt_nxv2f64_to_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x double> %b) {298; CHECK-LABEL: fcvt_nxv2f64_to_nxv2f16:299; CHECK: // %bb.0:300; CHECK-NEXT: fcvt z0.h, p0/m, z1.d301; CHECK-NEXT: ret302 %b.op = fptrunc <vscale x 2 x double> %b to <vscale x 2 x half>303 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a304 ret <vscale x 2 x half> %res305}306 307define <vscale x 2 x half> @fcvt_nxv2f64_to_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x float> %b) {308; CHECK-LABEL: fcvt_nxv2f64_to_nxv2f32:309; CHECK: // %bb.0:310; CHECK-NEXT: fcvt z0.h, p0/m, z1.s311; CHECK-NEXT: ret312 %b.op = fptrunc <vscale x 2 x float> %b to <vscale x 2 x half>313 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a314 ret <vscale x 2 x half> %res315}316 317define <vscale x 2 x bfloat> @fcvt_nxv2f64_to_nxv2bf16(<vscale x 2 x i1> %pg, <vscale x 2 x bfloat> %a, <vscale x 2 x double> %b) "target-features"="+sve2" {318; CHECK-LABEL: fcvt_nxv2f64_to_nxv2bf16:319; CHECK: // %bb.0:320; CHECK-NEXT: ptrue p1.d321; CHECK-NEXT: fcvtx z1.s, p1/m, z1.d322; CHECK-NEXT: bfcvt z0.h, p0/m, z1.s323; CHECK-NEXT: ret324 %b.op = fptrunc <vscale x 2 x double> %b to <vscale x 2 x bfloat>325 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x bfloat> %b.op, <vscale x 2 x bfloat> %a326 ret <vscale x 2 x bfloat> %res327}328 329define <vscale x 2 x float> @fcvt_nxv2bf16_to_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x bfloat> %b) {330; CHECK-LABEL: fcvt_nxv2bf16_to_nxv2f32:331; CHECK: // %bb.0:332; CHECK-NEXT: lsl z1.s, z1.s, #16333; CHECK-NEXT: mov z0.d, p0/m, z1.d334; CHECK-NEXT: ret335 %b.op = fpext <vscale x 2 x bfloat> %b to <vscale x 2 x float>336 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a337 ret <vscale x 2 x float> %res338}339 340define <vscale x 2 x double> @fcvt_nxv2bf16_to_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x bfloat> %b) {341; CHECK-LABEL: fcvt_nxv2bf16_to_nxv2f64:342; CHECK: // %bb.0:343; CHECK-NEXT: lsl z1.s, z1.s, #16344; CHECK-NEXT: fcvt z0.d, p0/m, z1.s345; CHECK-NEXT: ret346 %b.op = fpext <vscale x 2 x bfloat> %b to <vscale x 2 x double>347 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a348 ret <vscale x 2 x double> %res349}350 351define <vscale x 4 x float> @fcvt_nxv4bf16_to_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x bfloat> %b) {352; CHECK-LABEL: fcvt_nxv4bf16_to_nxv4f32:353; CHECK: // %bb.0:354; CHECK-NEXT: lsl z1.s, z1.s, #16355; CHECK-NEXT: mov z0.s, p0/m, z1.s356; CHECK-NEXT: ret357 %b.op = fpext <vscale x 4 x bfloat> %b to <vscale x 4 x float>358 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a359 ret <vscale x 4 x float> %res360}361 362define <vscale x 2 x i64> @fcvtsu_nxv2f16_to_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x half> %b) {363; CHECK-LABEL: fcvtsu_nxv2f16_to_nxv2i64:364; CHECK: // %bb.0:365; CHECK-NEXT: fcvtzs z0.d, p0/m, z1.h366; CHECK-NEXT: ret367 %b.op = fptosi <vscale x 2 x half> %b to <vscale x 2 x i64>368 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a369 ret <vscale x 2 x i64> %res370}371 372define <vscale x 4 x i32> @fcvtsu_nxv4f16_to_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x half> %b) {373; CHECK-LABEL: fcvtsu_nxv4f16_to_nxv4i32:374; CHECK: // %bb.0:375; CHECK-NEXT: fcvtzs z0.s, p0/m, z1.h376; CHECK-NEXT: ret377 %b.op = fptosi <vscale x 4 x half> %b to <vscale x 4 x i32>378 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a379 ret <vscale x 4 x i32> %res380}381 382define <vscale x 8 x i16> @fcvtsu_nxv8f16_to_nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 8 x half> %b) {383; CHECK-LABEL: fcvtsu_nxv8f16_to_nxv8i16:384; CHECK: // %bb.0:385; CHECK-NEXT: fcvtzs z0.h, p0/m, z1.h386; CHECK-NEXT: ret387 %b.op = fptosi <vscale x 8 x half> %b to <vscale x 8 x i16>388 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x i16> %b.op, <vscale x 8 x i16> %a389 ret <vscale x 8 x i16> %res390}391 392define <vscale x 2 x i64> @fcvtsu_nxv2f32_to_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x float> %b) {393; CHECK-LABEL: fcvtsu_nxv2f32_to_nxv2i64:394; CHECK: // %bb.0:395; CHECK-NEXT: fcvtzs z0.d, p0/m, z1.s396; CHECK-NEXT: ret397 %b.op = fptosi <vscale x 2 x float> %b to <vscale x 2 x i64>398 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a399 ret <vscale x 2 x i64> %res400}401 402define <vscale x 4 x i32> @fcvtsu_nxv4f32_to_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x float> %b) {403; CHECK-LABEL: fcvtsu_nxv4f32_to_nxv4i32:404; CHECK: // %bb.0:405; CHECK-NEXT: fcvtzs z0.s, p0/m, z1.s406; CHECK-NEXT: ret407 %b.op = fptosi <vscale x 4 x float> %b to <vscale x 4 x i32>408 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a409 ret <vscale x 4 x i32> %res410}411 412define <vscale x 2 x i64> @fcvtsu_nxv2f64_to_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x double> %b) {413; CHECK-LABEL: fcvtsu_nxv2f64_to_nxv2i64:414; CHECK: // %bb.0:415; CHECK-NEXT: fcvtzs z0.d, p0/m, z1.d416; CHECK-NEXT: ret417 %b.op = fptosi <vscale x 2 x double> %b to <vscale x 2 x i64>418 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a419 ret <vscale x 2 x i64> %res420}421 422define <vscale x 2 x i64> @fcvtzu_nxv2f16_to_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x half> %b) {423; CHECK-LABEL: fcvtzu_nxv2f16_to_nxv2i64:424; CHECK: // %bb.0:425; CHECK-NEXT: fcvtzu z0.d, p0/m, z1.h426; CHECK-NEXT: ret427 %b.op = fptoui <vscale x 2 x half> %b to <vscale x 2 x i64>428 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a429 ret <vscale x 2 x i64> %res430}431 432define <vscale x 4 x i32> @fcvtzu_nxv4f16_to_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x half> %b) {433; CHECK-LABEL: fcvtzu_nxv4f16_to_nxv4i32:434; CHECK: // %bb.0:435; CHECK-NEXT: fcvtzu z0.s, p0/m, z1.h436; CHECK-NEXT: ret437 %b.op = fptoui <vscale x 4 x half> %b to <vscale x 4 x i32>438 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a439 ret <vscale x 4 x i32> %res440}441 442define <vscale x 8 x i16> @fcvtzu_nxv8f16_to_nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 8 x half> %b) {443; CHECK-LABEL: fcvtzu_nxv8f16_to_nxv8i16:444; CHECK: // %bb.0:445; CHECK-NEXT: fcvtzu z0.h, p0/m, z1.h446; CHECK-NEXT: ret447 %b.op = fptoui <vscale x 8 x half> %b to <vscale x 8 x i16>448 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x i16> %b.op, <vscale x 8 x i16> %a449 ret <vscale x 8 x i16> %res450}451 452define <vscale x 2 x i64> @fcvtzu_nxv2f32_to_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x float> %b) {453; CHECK-LABEL: fcvtzu_nxv2f32_to_nxv2i64:454; CHECK: // %bb.0:455; CHECK-NEXT: fcvtzu z0.d, p0/m, z1.s456; CHECK-NEXT: ret457 %b.op = fptoui <vscale x 2 x float> %b to <vscale x 2 x i64>458 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a459 ret <vscale x 2 x i64> %res460}461 462define <vscale x 4 x i32> @fcvtzu_nxv4f32_to_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x float> %b) {463; CHECK-LABEL: fcvtzu_nxv4f32_to_nxv4i32:464; CHECK: // %bb.0:465; CHECK-NEXT: fcvtzu z0.s, p0/m, z1.s466; CHECK-NEXT: ret467 %b.op = fptoui <vscale x 4 x float> %b to <vscale x 4 x i32>468 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a469 ret <vscale x 4 x i32> %res470}471 472define <vscale x 2 x i64> @fcvtzu_nxv2f64_to_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x double> %b) {473; CHECK-LABEL: fcvtzu_nxv2f64_to_nxv2i64:474; CHECK: // %bb.0:475; CHECK-NEXT: fcvtzu z0.d, p0/m, z1.d476; CHECK-NEXT: ret477 %b.op = fptoui <vscale x 2 x double> %b to <vscale x 2 x i64>478 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a479 ret <vscale x 2 x i64> %res480}481 482define <vscale x 2 x half> @fneg_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {483; CHECK-LABEL: fneg_nxv2f16:484; CHECK: // %bb.0:485; CHECK-NEXT: fneg z0.h, p0/m, z1.h486; CHECK-NEXT: ret487 %b.op = fneg <vscale x 2 x half> %b488 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a489 ret <vscale x 2 x half> %res490}491 492define <vscale x 4 x half> @fneg_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {493; CHECK-LABEL: fneg_nxv4f16:494; CHECK: // %bb.0:495; CHECK-NEXT: fneg z0.h, p0/m, z1.h496; CHECK-NEXT: ret497 %b.op = fneg <vscale x 4 x half> %b498 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a499 ret <vscale x 4 x half> %res500}501 502define <vscale x 8 x half> @fneg_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {503; CHECK-LABEL: fneg_nxv8f16:504; CHECK: // %bb.0:505; CHECK-NEXT: fneg z0.h, p0/m, z1.h506; CHECK-NEXT: ret507 %b.op = fneg <vscale x 8 x half> %b508 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a509 ret <vscale x 8 x half> %res510}511 512define <vscale x 2 x float> @fneg_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {513; CHECK-LABEL: fneg_nxv2f32:514; CHECK: // %bb.0:515; CHECK-NEXT: fneg z0.s, p0/m, z1.s516; CHECK-NEXT: ret517 %b.op = fneg <vscale x 2 x float> %b518 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a519 ret <vscale x 2 x float> %res520}521 522define <vscale x 4 x float> @fneg_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {523; CHECK-LABEL: fneg_nxv4f32:524; CHECK: // %bb.0:525; CHECK-NEXT: fneg z0.s, p0/m, z1.s526; CHECK-NEXT: ret527 %b.op = fneg <vscale x 4 x float> %b528 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a529 ret <vscale x 4 x float> %res530}531 532define <vscale x 2 x double> @fneg_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {533; CHECK-LABEL: fneg_nxv2f64:534; CHECK: // %bb.0:535; CHECK-NEXT: fneg z0.d, p0/m, z1.d536; CHECK-NEXT: ret537 %b.op = fneg <vscale x 2 x double> %b538 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a539 ret <vscale x 2 x double> %res540}541 542define <vscale x 2 x bfloat> @fneg_nxv2bf16(<vscale x 2 x i1> %pg, <vscale x 2 x bfloat> %a, <vscale x 2 x bfloat> %b) {543; CHECK-LABEL: fneg_nxv2bf16:544; CHECK: // %bb.0:545; CHECK-NEXT: fneg z0.h, p0/m, z1.h546; CHECK-NEXT: ret547 %b.op = fneg <vscale x 2 x bfloat> %b548 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x bfloat> %b.op, <vscale x 2 x bfloat> %a549 ret <vscale x 2 x bfloat> %res550}551 552define <vscale x 4 x bfloat> @fneg_nxv4bf16(<vscale x 4 x i1> %pg, <vscale x 4 x bfloat> %a, <vscale x 4 x bfloat> %b) {553; CHECK-LABEL: fneg_nxv4bf16:554; CHECK: // %bb.0:555; CHECK-NEXT: fneg z0.h, p0/m, z1.h556; CHECK-NEXT: ret557 %b.op = fneg <vscale x 4 x bfloat> %b558 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x bfloat> %b.op, <vscale x 4 x bfloat> %a559 ret <vscale x 4 x bfloat> %res560}561 562define <vscale x 8 x bfloat> @fneg_nxv8bf16(<vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b) {563; CHECK-LABEL: fneg_nxv8bf16:564; CHECK: // %bb.0:565; CHECK-NEXT: fneg z0.h, p0/m, z1.h566; CHECK-NEXT: ret567 %b.op = fneg <vscale x 8 x bfloat> %b568 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %b.op, <vscale x 8 x bfloat> %a569 ret <vscale x 8 x bfloat> %res570}571 572define <vscale x 2 x half> @frinta_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {573; CHECK-LABEL: frinta_nxv2f16:574; CHECK: // %bb.0:575; CHECK-NEXT: frinta z0.h, p0/m, z1.h576; CHECK-NEXT: ret577 %b.op = call <vscale x 2 x half> @llvm.round.nxv2f16(<vscale x 2 x half> %b)578 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a579 ret <vscale x 2 x half> %res580}581 582define <vscale x 4 x half> @frinta_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {583; CHECK-LABEL: frinta_nxv4f16:584; CHECK: // %bb.0:585; CHECK-NEXT: frinta z0.h, p0/m, z1.h586; CHECK-NEXT: ret587 %b.op = call <vscale x 4 x half> @llvm.round.nxv4f16(<vscale x 4 x half> %b)588 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a589 ret <vscale x 4 x half> %res590}591 592define <vscale x 8 x half> @frinta_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {593; CHECK-LABEL: frinta_nxv8f16:594; CHECK: // %bb.0:595; CHECK-NEXT: frinta z0.h, p0/m, z1.h596; CHECK-NEXT: ret597 %b.op = call <vscale x 8 x half> @llvm.round.nxv8f16(<vscale x 8 x half> %b)598 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a599 ret <vscale x 8 x half> %res600}601 602define <vscale x 2 x float> @frinta_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {603; CHECK-LABEL: frinta_nxv2f32:604; CHECK: // %bb.0:605; CHECK-NEXT: frinta z0.s, p0/m, z1.s606; CHECK-NEXT: ret607 %b.op = call <vscale x 2 x float> @llvm.round.nxv2f32(<vscale x 2 x float> %b)608 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a609 ret <vscale x 2 x float> %res610}611 612define <vscale x 4 x float> @frinta_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {613; CHECK-LABEL: frinta_nxv4f32:614; CHECK: // %bb.0:615; CHECK-NEXT: frinta z0.s, p0/m, z1.s616; CHECK-NEXT: ret617 %b.op = call <vscale x 4 x float> @llvm.round.nxv4f32(<vscale x 4 x float> %b)618 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a619 ret <vscale x 4 x float> %res620}621 622define <vscale x 2 x double> @frinta_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {623; CHECK-LABEL: frinta_nxv2f64:624; CHECK: // %bb.0:625; CHECK-NEXT: frinta z0.d, p0/m, z1.d626; CHECK-NEXT: ret627 %b.op = call <vscale x 2 x double> @llvm.round.nxv2f64(<vscale x 2 x double> %b)628 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a629 ret <vscale x 2 x double> %res630}631 632define <vscale x 2 x half> @frinti_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {633; CHECK-LABEL: frinti_nxv2f16:634; CHECK: // %bb.0:635; CHECK-NEXT: frinti z0.h, p0/m, z1.h636; CHECK-NEXT: ret637 %b.op = call <vscale x 2 x half> @llvm.nearbyint.nxv2f16(<vscale x 2 x half> %b)638 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a639 ret <vscale x 2 x half> %res640}641 642define <vscale x 4 x half> @frinti_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {643; CHECK-LABEL: frinti_nxv4f16:644; CHECK: // %bb.0:645; CHECK-NEXT: frinti z0.h, p0/m, z1.h646; CHECK-NEXT: ret647 %b.op = call <vscale x 4 x half> @llvm.nearbyint.nxv4f16(<vscale x 4 x half> %b)648 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a649 ret <vscale x 4 x half> %res650}651 652define <vscale x 8 x half> @frinti_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {653; CHECK-LABEL: frinti_nxv8f16:654; CHECK: // %bb.0:655; CHECK-NEXT: frinti z0.h, p0/m, z1.h656; CHECK-NEXT: ret657 %b.op = call <vscale x 8 x half> @llvm.nearbyint.nxv8f16(<vscale x 8 x half> %b)658 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a659 ret <vscale x 8 x half> %res660}661 662define <vscale x 2 x float> @frinti_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {663; CHECK-LABEL: frinti_nxv2f32:664; CHECK: // %bb.0:665; CHECK-NEXT: frinti z0.s, p0/m, z1.s666; CHECK-NEXT: ret667 %b.op = call <vscale x 2 x float> @llvm.nearbyint.nxv2f32(<vscale x 2 x float> %b)668 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a669 ret <vscale x 2 x float> %res670}671 672define <vscale x 4 x float> @frinti_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {673; CHECK-LABEL: frinti_nxv4f32:674; CHECK: // %bb.0:675; CHECK-NEXT: frinti z0.s, p0/m, z1.s676; CHECK-NEXT: ret677 %b.op = call <vscale x 4 x float> @llvm.nearbyint.nxv4f32(<vscale x 4 x float> %b)678 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a679 ret <vscale x 4 x float> %res680}681 682define <vscale x 2 x double> @frinti_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {683; CHECK-LABEL: frinti_nxv2f64:684; CHECK: // %bb.0:685; CHECK-NEXT: frinti z0.d, p0/m, z1.d686; CHECK-NEXT: ret687 %b.op = call <vscale x 2 x double> @llvm.nearbyint.nxv2f64(<vscale x 2 x double> %b)688 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a689 ret <vscale x 2 x double> %res690}691 692define <vscale x 2 x half> @frintm_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {693; CHECK-LABEL: frintm_nxv2f16:694; CHECK: // %bb.0:695; CHECK-NEXT: frintm z0.h, p0/m, z1.h696; CHECK-NEXT: ret697 %b.op = call <vscale x 2 x half> @llvm.floor.nxv2f16(<vscale x 2 x half> %b)698 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a699 ret <vscale x 2 x half> %res700}701 702define <vscale x 4 x half> @frintm_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {703; CHECK-LABEL: frintm_nxv4f16:704; CHECK: // %bb.0:705; CHECK-NEXT: frintm z0.h, p0/m, z1.h706; CHECK-NEXT: ret707 %b.op = call <vscale x 4 x half> @llvm.floor.nxv4f16(<vscale x 4 x half> %b)708 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a709 ret <vscale x 4 x half> %res710}711 712define <vscale x 8 x half> @frintm_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {713; CHECK-LABEL: frintm_nxv8f16:714; CHECK: // %bb.0:715; CHECK-NEXT: frintm z0.h, p0/m, z1.h716; CHECK-NEXT: ret717 %b.op = call <vscale x 8 x half> @llvm.floor.nxv8f16(<vscale x 8 x half> %b)718 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a719 ret <vscale x 8 x half> %res720}721 722define <vscale x 2 x float> @frintm_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {723; CHECK-LABEL: frintm_nxv2f32:724; CHECK: // %bb.0:725; CHECK-NEXT: frintm z0.s, p0/m, z1.s726; CHECK-NEXT: ret727 %b.op = call <vscale x 2 x float> @llvm.floor.nxv2f32(<vscale x 2 x float> %b)728 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a729 ret <vscale x 2 x float> %res730}731 732define <vscale x 4 x float> @frintm_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {733; CHECK-LABEL: frintm_nxv4f32:734; CHECK: // %bb.0:735; CHECK-NEXT: frintm z0.s, p0/m, z1.s736; CHECK-NEXT: ret737 %b.op = call <vscale x 4 x float> @llvm.floor.nxv4f32(<vscale x 4 x float> %b)738 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a739 ret <vscale x 4 x float> %res740}741 742define <vscale x 2 x double> @frintm_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {743; CHECK-LABEL: frintm_nxv2f64:744; CHECK: // %bb.0:745; CHECK-NEXT: frintm z0.d, p0/m, z1.d746; CHECK-NEXT: ret747 %b.op = call <vscale x 2 x double> @llvm.floor.nxv2f64(<vscale x 2 x double> %b)748 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a749 ret <vscale x 2 x double> %res750}751 752define <vscale x 2 x half> @frintn_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {753; CHECK-LABEL: frintn_nxv2f16:754; CHECK: // %bb.0:755; CHECK-NEXT: frintn z0.h, p0/m, z1.h756; CHECK-NEXT: ret757 %b.op = call <vscale x 2 x half> @llvm.roundeven.nxv2f16(<vscale x 2 x half> %b)758 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a759 ret <vscale x 2 x half> %res760}761 762define <vscale x 4 x half> @frintn_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {763; CHECK-LABEL: frintn_nxv4f16:764; CHECK: // %bb.0:765; CHECK-NEXT: frintn z0.h, p0/m, z1.h766; CHECK-NEXT: ret767 %b.op = call <vscale x 4 x half> @llvm.roundeven.nxv4f16(<vscale x 4 x half> %b)768 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a769 ret <vscale x 4 x half> %res770}771 772define <vscale x 8 x half> @frintn_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {773; CHECK-LABEL: frintn_nxv8f16:774; CHECK: // %bb.0:775; CHECK-NEXT: frintn z0.h, p0/m, z1.h776; CHECK-NEXT: ret777 %b.op = call <vscale x 8 x half> @llvm.roundeven.nxv8f16(<vscale x 8 x half> %b)778 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a779 ret <vscale x 8 x half> %res780}781 782define <vscale x 2 x float> @frintn_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {783; CHECK-LABEL: frintn_nxv2f32:784; CHECK: // %bb.0:785; CHECK-NEXT: frintn z0.s, p0/m, z1.s786; CHECK-NEXT: ret787 %b.op = call <vscale x 2 x float> @llvm.roundeven.nxv2f32(<vscale x 2 x float> %b)788 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a789 ret <vscale x 2 x float> %res790}791 792define <vscale x 4 x float> @frintn_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {793; CHECK-LABEL: frintn_nxv4f32:794; CHECK: // %bb.0:795; CHECK-NEXT: frintn z0.s, p0/m, z1.s796; CHECK-NEXT: ret797 %b.op = call <vscale x 4 x float> @llvm.roundeven.nxv4f32(<vscale x 4 x float> %b)798 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a799 ret <vscale x 4 x float> %res800}801 802define <vscale x 2 x double> @frintn_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {803; CHECK-LABEL: frintn_nxv2f64:804; CHECK: // %bb.0:805; CHECK-NEXT: frintn z0.d, p0/m, z1.d806; CHECK-NEXT: ret807 %b.op = call <vscale x 2 x double> @llvm.roundeven.nxv2f64(<vscale x 2 x double> %b)808 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a809 ret <vscale x 2 x double> %res810}811 812define <vscale x 2 x half> @frintp_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {813; CHECK-LABEL: frintp_nxv2f16:814; CHECK: // %bb.0:815; CHECK-NEXT: frintp z0.h, p0/m, z1.h816; CHECK-NEXT: ret817 %b.op = call <vscale x 2 x half> @llvm.ceil.nxv2f16(<vscale x 2 x half> %b)818 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a819 ret <vscale x 2 x half> %res820}821 822define <vscale x 4 x half> @frintp_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {823; CHECK-LABEL: frintp_nxv4f16:824; CHECK: // %bb.0:825; CHECK-NEXT: frintp z0.h, p0/m, z1.h826; CHECK-NEXT: ret827 %b.op = call <vscale x 4 x half> @llvm.ceil.nxv4f16(<vscale x 4 x half> %b)828 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a829 ret <vscale x 4 x half> %res830}831 832define <vscale x 8 x half> @frintp_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {833; CHECK-LABEL: frintp_nxv8f16:834; CHECK: // %bb.0:835; CHECK-NEXT: frintp z0.h, p0/m, z1.h836; CHECK-NEXT: ret837 %b.op = call <vscale x 8 x half> @llvm.ceil.nxv8f16(<vscale x 8 x half> %b)838 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a839 ret <vscale x 8 x half> %res840}841 842define <vscale x 2 x float> @frintp_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {843; CHECK-LABEL: frintp_nxv2f32:844; CHECK: // %bb.0:845; CHECK-NEXT: frintp z0.s, p0/m, z1.s846; CHECK-NEXT: ret847 %b.op = call <vscale x 2 x float> @llvm.ceil.nxv2f32(<vscale x 2 x float> %b)848 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a849 ret <vscale x 2 x float> %res850}851 852define <vscale x 4 x float> @frintp_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {853; CHECK-LABEL: frintp_nxv4f32:854; CHECK: // %bb.0:855; CHECK-NEXT: frintp z0.s, p0/m, z1.s856; CHECK-NEXT: ret857 %b.op = call <vscale x 4 x float> @llvm.ceil.nxv4f32(<vscale x 4 x float> %b)858 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a859 ret <vscale x 4 x float> %res860}861 862define <vscale x 2 x double> @frintp_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {863; CHECK-LABEL: frintp_nxv2f64:864; CHECK: // %bb.0:865; CHECK-NEXT: frintp z0.d, p0/m, z1.d866; CHECK-NEXT: ret867 %b.op = call <vscale x 2 x double> @llvm.ceil.nxv2f64(<vscale x 2 x double> %b)868 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a869 ret <vscale x 2 x double> %res870}871 872define <vscale x 2 x half> @frintx_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {873; CHECK-LABEL: frintx_nxv2f16:874; CHECK: // %bb.0:875; CHECK-NEXT: frintx z0.h, p0/m, z1.h876; CHECK-NEXT: ret877 %b.op = call <vscale x 2 x half> @llvm.rint.nxv2f16(<vscale x 2 x half> %b)878 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a879 ret <vscale x 2 x half> %res880}881 882define <vscale x 4 x half> @frintx_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {883; CHECK-LABEL: frintx_nxv4f16:884; CHECK: // %bb.0:885; CHECK-NEXT: frintx z0.h, p0/m, z1.h886; CHECK-NEXT: ret887 %b.op = call <vscale x 4 x half> @llvm.rint.nxv4f16(<vscale x 4 x half> %b)888 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a889 ret <vscale x 4 x half> %res890}891 892define <vscale x 8 x half> @frintx_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {893; CHECK-LABEL: frintx_nxv8f16:894; CHECK: // %bb.0:895; CHECK-NEXT: frintx z0.h, p0/m, z1.h896; CHECK-NEXT: ret897 %b.op = call <vscale x 8 x half> @llvm.rint.nxv8f16(<vscale x 8 x half> %b)898 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a899 ret <vscale x 8 x half> %res900}901 902define <vscale x 2 x float> @frintx_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {903; CHECK-LABEL: frintx_nxv2f32:904; CHECK: // %bb.0:905; CHECK-NEXT: frintx z0.s, p0/m, z1.s906; CHECK-NEXT: ret907 %b.op = call <vscale x 2 x float> @llvm.rint.nxv2f32(<vscale x 2 x float> %b)908 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a909 ret <vscale x 2 x float> %res910}911 912define <vscale x 4 x float> @frintx_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {913; CHECK-LABEL: frintx_nxv4f32:914; CHECK: // %bb.0:915; CHECK-NEXT: frintx z0.s, p0/m, z1.s916; CHECK-NEXT: ret917 %b.op = call <vscale x 4 x float> @llvm.rint.nxv4f32(<vscale x 4 x float> %b)918 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a919 ret <vscale x 4 x float> %res920}921 922define <vscale x 2 x double> @frintx_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {923; CHECK-LABEL: frintx_nxv2f64:924; CHECK: // %bb.0:925; CHECK-NEXT: frintx z0.d, p0/m, z1.d926; CHECK-NEXT: ret927 %b.op = call <vscale x 2 x double> @llvm.rint.nxv2f64(<vscale x 2 x double> %b)928 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a929 ret <vscale x 2 x double> %res930}931 932define <vscale x 2 x half> @frintz_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {933; CHECK-LABEL: frintz_nxv2f16:934; CHECK: // %bb.0:935; CHECK-NEXT: frintz z0.h, p0/m, z1.h936; CHECK-NEXT: ret937 %b.op = call <vscale x 2 x half> @llvm.trunc.nxv2f16(<vscale x 2 x half> %b)938 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a939 ret <vscale x 2 x half> %res940}941 942define <vscale x 4 x half> @frintz_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {943; CHECK-LABEL: frintz_nxv4f16:944; CHECK: // %bb.0:945; CHECK-NEXT: frintz z0.h, p0/m, z1.h946; CHECK-NEXT: ret947 %b.op = call <vscale x 4 x half> @llvm.trunc.nxv4f16(<vscale x 4 x half> %b)948 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a949 ret <vscale x 4 x half> %res950}951 952define <vscale x 8 x half> @frintz_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {953; CHECK-LABEL: frintz_nxv8f16:954; CHECK: // %bb.0:955; CHECK-NEXT: frintz z0.h, p0/m, z1.h956; CHECK-NEXT: ret957 %b.op = call <vscale x 8 x half> @llvm.trunc.nxv8f16(<vscale x 8 x half> %b)958 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a959 ret <vscale x 8 x half> %res960}961 962define <vscale x 2 x float> @frintz_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {963; CHECK-LABEL: frintz_nxv2f32:964; CHECK: // %bb.0:965; CHECK-NEXT: frintz z0.s, p0/m, z1.s966; CHECK-NEXT: ret967 %b.op = call <vscale x 2 x float> @llvm.trunc.nxv2f32(<vscale x 2 x float> %b)968 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a969 ret <vscale x 2 x float> %res970}971 972define <vscale x 4 x float> @frintz_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {973; CHECK-LABEL: frintz_nxv4f32:974; CHECK: // %bb.0:975; CHECK-NEXT: frintz z0.s, p0/m, z1.s976; CHECK-NEXT: ret977 %b.op = call <vscale x 4 x float> @llvm.trunc.nxv4f32(<vscale x 4 x float> %b)978 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a979 ret <vscale x 4 x float> %res980}981 982define <vscale x 2 x double> @frintz_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {983; CHECK-LABEL: frintz_nxv2f64:984; CHECK: // %bb.0:985; CHECK-NEXT: frintz z0.d, p0/m, z1.d986; CHECK-NEXT: ret987 %b.op = call <vscale x 2 x double> @llvm.trunc.nxv2f64(<vscale x 2 x double> %b)988 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a989 ret <vscale x 2 x double> %res990}991 992define <vscale x 2 x half> @fsqrt_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {993; CHECK-LABEL: fsqrt_nxv2f16:994; CHECK: // %bb.0:995; CHECK-NEXT: fsqrt z0.h, p0/m, z1.h996; CHECK-NEXT: ret997 %b.op = call <vscale x 2 x half> @llvm.sqrt.nxv2f16(<vscale x 2 x half> %b)998 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a999 ret <vscale x 2 x half> %res1000}1001 1002define <vscale x 4 x half> @fsqrt_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {1003; CHECK-LABEL: fsqrt_nxv4f16:1004; CHECK: // %bb.0:1005; CHECK-NEXT: fsqrt z0.h, p0/m, z1.h1006; CHECK-NEXT: ret1007 %b.op = call <vscale x 4 x half> @llvm.sqrt.nxv4f16(<vscale x 4 x half> %b)1008 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a1009 ret <vscale x 4 x half> %res1010}1011 1012define <vscale x 8 x half> @fsqrt_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {1013; CHECK-LABEL: fsqrt_nxv8f16:1014; CHECK: // %bb.0:1015; CHECK-NEXT: fsqrt z0.h, p0/m, z1.h1016; CHECK-NEXT: ret1017 %b.op = call <vscale x 8 x half> @llvm.sqrt.nxv8f16(<vscale x 8 x half> %b)1018 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a1019 ret <vscale x 8 x half> %res1020}1021 1022define <vscale x 2 x float> @fsqrt_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {1023; CHECK-LABEL: fsqrt_nxv2f32:1024; CHECK: // %bb.0:1025; CHECK-NEXT: fsqrt z0.s, p0/m, z1.s1026; CHECK-NEXT: ret1027 %b.op = call <vscale x 2 x float> @llvm.sqrt.nxv2f32(<vscale x 2 x float> %b)1028 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a1029 ret <vscale x 2 x float> %res1030}1031 1032define <vscale x 4 x float> @fsqrt_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {1033; CHECK-LABEL: fsqrt_nxv4f32:1034; CHECK: // %bb.0:1035; CHECK-NEXT: fsqrt z0.s, p0/m, z1.s1036; CHECK-NEXT: ret1037 %b.op = call <vscale x 4 x float> @llvm.sqrt.nxv4f32(<vscale x 4 x float> %b)1038 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a1039 ret <vscale x 4 x float> %res1040}1041 1042define <vscale x 2 x double> @fsqrt_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {1043; CHECK-LABEL: fsqrt_nxv2f64:1044; CHECK: // %bb.0:1045; CHECK-NEXT: fsqrt z0.d, p0/m, z1.d1046; CHECK-NEXT: ret1047 %b.op = call <vscale x 2 x double> @llvm.sqrt.nxv2f64(<vscale x 2 x double> %b)1048 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a1049 ret <vscale x 2 x double> %res1050}1051 1052define <vscale x 16 x i8> @neg_nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {1053; CHECK-LABEL: neg_nxv16i8:1054; CHECK: // %bb.0:1055; CHECK-NEXT: subr z1.b, z1.b, #0 // =0x01056; CHECK-NEXT: mov z0.b, p0/m, z1.b1057; CHECK-NEXT: ret1058 %b.op = sub <vscale x 16 x i8> zeroinitializer, %b1059 %res = select <vscale x 16 x i1> %pg, <vscale x 16 x i8> %b.op, <vscale x 16 x i8> %a1060 ret <vscale x 16 x i8> %res1061}1062 1063define <vscale x 8 x i16> @neg_nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {1064; CHECK-LABEL: neg_nxv8i16:1065; CHECK: // %bb.0:1066; CHECK-NEXT: subr z1.h, z1.h, #0 // =0x01067; CHECK-NEXT: mov z0.h, p0/m, z1.h1068; CHECK-NEXT: ret1069 %b.op = sub <vscale x 8 x i16> zeroinitializer, %b1070 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x i16> %b.op, <vscale x 8 x i16> %a1071 ret <vscale x 8 x i16> %res1072}1073 1074define <vscale x 4 x i32> @neg_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {1075; CHECK-LABEL: neg_nxv4i32:1076; CHECK: // %bb.0:1077; CHECK-NEXT: subr z1.s, z1.s, #0 // =0x01078; CHECK-NEXT: mov z0.s, p0/m, z1.s1079; CHECK-NEXT: ret1080 %b.op = sub <vscale x 4 x i32> zeroinitializer, %b1081 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a1082 ret <vscale x 4 x i32> %res1083}1084 1085define <vscale x 2 x i64> @neg_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {1086; CHECK-LABEL: neg_nxv2i64:1087; CHECK: // %bb.0:1088; CHECK-NEXT: subr z1.d, z1.d, #0 // =0x01089; CHECK-NEXT: mov z0.d, p0/m, z1.d1090; CHECK-NEXT: ret1091 %b.op = sub <vscale x 2 x i64> zeroinitializer, %b1092 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a1093 ret <vscale x 2 x i64> %res1094}1095 1096define <vscale x 16 x i8> @rbit_nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {1097; CHECK-LABEL: rbit_nxv16i8:1098; CHECK: // %bb.0:1099; CHECK-NEXT: rbit z0.b, p0/m, z1.b1100; CHECK-NEXT: ret1101 %b.op = call <vscale x 16 x i8> @llvm.bitreverse.nxv16i8(<vscale x 16 x i8> %b)1102 %res = select <vscale x 16 x i1> %pg, <vscale x 16 x i8> %b.op, <vscale x 16 x i8> %a1103 ret <vscale x 16 x i8> %res1104}1105 1106define <vscale x 8 x i16> @rbit_nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {1107; CHECK-LABEL: rbit_nxv8i16:1108; CHECK: // %bb.0:1109; CHECK-NEXT: rbit z0.h, p0/m, z1.h1110; CHECK-NEXT: ret1111 %b.op = call <vscale x 8 x i16> @llvm.bitreverse.nxv8i16(<vscale x 8 x i16> %b)1112 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x i16> %b.op, <vscale x 8 x i16> %a1113 ret <vscale x 8 x i16> %res1114}1115 1116define <vscale x 4 x i32> @rbit_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {1117; CHECK-LABEL: rbit_nxv4i32:1118; CHECK: // %bb.0:1119; CHECK-NEXT: rbit z0.s, p0/m, z1.s1120; CHECK-NEXT: ret1121 %b.op = call <vscale x 4 x i32> @llvm.bitreverse.nxv4i32(<vscale x 4 x i32> %b)1122 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a1123 ret <vscale x 4 x i32> %res1124}1125 1126define <vscale x 2 x i64> @rbit_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {1127; CHECK-LABEL: rbit_nxv2i64:1128; CHECK: // %bb.0:1129; CHECK-NEXT: rbit z0.d, p0/m, z1.d1130; CHECK-NEXT: ret1131 %b.op = call <vscale x 2 x i64> @llvm.bitreverse.nxv2i64(<vscale x 2 x i64> %b)1132 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a1133 ret <vscale x 2 x i64> %res1134}1135 1136define <vscale x 8 x i16> @revb_nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {1137; CHECK-LABEL: revb_nxv8i16:1138; CHECK: // %bb.0:1139; CHECK-NEXT: revb z0.h, p0/m, z1.h1140; CHECK-NEXT: ret1141 %b.op = call <vscale x 8 x i16> @llvm.bswap.nxv8i16(<vscale x 8 x i16> %b)1142 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x i16> %b.op, <vscale x 8 x i16> %a1143 ret <vscale x 8 x i16> %res1144}1145 1146define <vscale x 4 x i32> @revb_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {1147; CHECK-LABEL: revb_nxv4i32:1148; CHECK: // %bb.0:1149; CHECK-NEXT: revb z0.s, p0/m, z1.s1150; CHECK-NEXT: ret1151 %b.op = call <vscale x 4 x i32> @llvm.bswap.nxv4i32(<vscale x 4 x i32> %b)1152 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a1153 ret <vscale x 4 x i32> %res1154}1155 1156define <vscale x 2 x i64> @revb_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {1157; CHECK-LABEL: revb_nxv2i64:1158; CHECK: // %bb.0:1159; CHECK-NEXT: revb z0.d, p0/m, z1.d1160; CHECK-NEXT: ret1161 %b.op = call <vscale x 2 x i64> @llvm.bswap.nxv2i64(<vscale x 2 x i64> %b)1162 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a1163 ret <vscale x 2 x i64> %res1164}1165 1166define <vscale x 8 x half> @scvtf_nxv8i16_to_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x i16> %b) {1167; CHECK-LABEL: scvtf_nxv8i16_to_nxv8f16:1168; CHECK: // %bb.0:1169; CHECK-NEXT: scvtf z0.h, p0/m, z1.h1170; CHECK-NEXT: ret1171 %b.op = sitofp <vscale x 8 x i16> %b to <vscale x 8 x half>1172 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a1173 ret <vscale x 8 x half> %res1174}1175 1176define <vscale x 4 x half> @scvtf_nxv4i32_to_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x i32> %b) {1177; CHECK-LABEL: scvtf_nxv4i32_to_nxv4f16:1178; CHECK: // %bb.0:1179; CHECK-NEXT: scvtf z0.h, p0/m, z1.s1180; CHECK-NEXT: ret1181 %b.op = sitofp <vscale x 4 x i32> %b to <vscale x 4 x half>1182 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a1183 ret <vscale x 4 x half> %res1184}1185 1186define <vscale x 4 x float> @scvtf_nxv4i32_to_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x i32> %b) {1187; CHECK-LABEL: scvtf_nxv4i32_to_nxv4f32:1188; CHECK: // %bb.0:1189; CHECK-NEXT: scvtf z0.s, p0/m, z1.s1190; CHECK-NEXT: ret1191 %b.op = sitofp <vscale x 4 x i32> %b to <vscale x 4 x float>1192 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a1193 ret <vscale x 4 x float> %res1194}1195 1196define <vscale x 2 x half> @scvtf_nxv2i64_to_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x i64> %b) {1197; CHECK-LABEL: scvtf_nxv2i64_to_nxv2f16:1198; CHECK: // %bb.0:1199; CHECK-NEXT: scvtf z0.h, p0/m, z1.d1200; CHECK-NEXT: ret1201 %b.op = sitofp <vscale x 2 x i64> %b to <vscale x 2 x half>1202 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a1203 ret <vscale x 2 x half> %res1204}1205 1206define <vscale x 2 x float> @scvtf_nxv2i64_to_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x i64> %b) {1207; CHECK-LABEL: scvtf_nxv2i64_to_nxv2f32:1208; CHECK: // %bb.0:1209; CHECK-NEXT: scvtf z0.s, p0/m, z1.d1210; CHECK-NEXT: ret1211 %b.op = sitofp <vscale x 2 x i64> %b to <vscale x 2 x float>1212 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a1213 ret <vscale x 2 x float> %res1214}1215 1216define <vscale x 2 x double> @scvtf_nxv2i64_to_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x i64> %b) {1217; CHECK-LABEL: scvtf_nxv2i64_to_nxv2f64:1218; CHECK: // %bb.0:1219; CHECK-NEXT: scvtf z0.d, p0/m, z1.d1220; CHECK-NEXT: ret1221 %b.op = sitofp <vscale x 2 x i64> %b to <vscale x 2 x double>1222 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a1223 ret <vscale x 2 x double> %res1224}1225 1226define <vscale x 8 x i16> @sxtb_nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 8 x i8> %b) {1227; CHECK-LABEL: sxtb_nxv8i16:1228; CHECK: // %bb.0:1229; CHECK-NEXT: ptrue p1.h1230; CHECK-NEXT: sxtb z1.h, p1/m, z1.h1231; CHECK-NEXT: mov z0.h, p0/m, z1.h1232; CHECK-NEXT: ret1233 %b.op = sext <vscale x 8 x i8> %b to <vscale x 8 x i16>1234 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x i16> %b.op, <vscale x 8 x i16> %a1235 ret <vscale x 8 x i16> %res1236}1237 1238define <vscale x 4 x i32> @sxtb_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x i8> %b) {1239; CHECK-LABEL: sxtb_nxv4i32:1240; CHECK: // %bb.0:1241; CHECK-NEXT: ptrue p1.s1242; CHECK-NEXT: sxtb z1.s, p1/m, z1.s1243; CHECK-NEXT: mov z0.s, p0/m, z1.s1244; CHECK-NEXT: ret1245 %b.op = sext <vscale x 4 x i8> %b to <vscale x 4 x i32>1246 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a1247 ret <vscale x 4 x i32> %res1248}1249 1250define <vscale x 2 x i64> @sxtb_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i8> %b) {1251; CHECK-LABEL: sxtb_nxv2i64:1252; CHECK: // %bb.0:1253; CHECK-NEXT: ptrue p1.d1254; CHECK-NEXT: sxtb z1.d, p1/m, z1.d1255; CHECK-NEXT: mov z0.d, p0/m, z1.d1256; CHECK-NEXT: ret1257 %b.op = sext <vscale x 2 x i8> %b to <vscale x 2 x i64>1258 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a1259 ret <vscale x 2 x i64> %res1260}1261 1262define <vscale x 4 x i32> @sxth_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x i16> %b) {1263; CHECK-LABEL: sxth_nxv4i32:1264; CHECK: // %bb.0:1265; CHECK-NEXT: ptrue p1.s1266; CHECK-NEXT: sxth z1.s, p1/m, z1.s1267; CHECK-NEXT: mov z0.s, p0/m, z1.s1268; CHECK-NEXT: ret1269 %b.op = sext <vscale x 4 x i16> %b to <vscale x 4 x i32>1270 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a1271 ret <vscale x 4 x i32> %res1272}1273 1274define <vscale x 2 x i64> @sxth_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i16> %b) {1275; CHECK-LABEL: sxth_nxv2i64:1276; CHECK: // %bb.0:1277; CHECK-NEXT: ptrue p1.d1278; CHECK-NEXT: sxth z1.d, p1/m, z1.d1279; CHECK-NEXT: mov z0.d, p0/m, z1.d1280; CHECK-NEXT: ret1281 %b.op = sext <vscale x 2 x i16> %b to <vscale x 2 x i64>1282 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a1283 ret <vscale x 2 x i64> %res1284}1285 1286define <vscale x 2 x i64> @sxtw_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i32> %b) {1287; CHECK-LABEL: sxtw_nxv2i64:1288; CHECK: // %bb.0:1289; CHECK-NEXT: ptrue p1.d1290; CHECK-NEXT: sxtw z1.d, p1/m, z1.d1291; CHECK-NEXT: mov z0.d, p0/m, z1.d1292; CHECK-NEXT: ret1293 %b.op = sext <vscale x 2 x i32> %b to <vscale x 2 x i64>1294 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a1295 ret <vscale x 2 x i64> %res1296}1297 1298define <vscale x 8 x half> @ucvtf_nxv8i16_to_nxv8f16(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x i16> %b) {1299; CHECK-LABEL: ucvtf_nxv8i16_to_nxv8f16:1300; CHECK: // %bb.0:1301; CHECK-NEXT: ucvtf z0.h, p0/m, z1.h1302; CHECK-NEXT: ret1303 %b.op = uitofp <vscale x 8 x i16> %b to <vscale x 8 x half>1304 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %b.op, <vscale x 8 x half> %a1305 ret <vscale x 8 x half> %res1306}1307 1308define <vscale x 4 x half> @ucvtf_nxv4i32_to_nxv4f16(<vscale x 4 x i1> %pg, <vscale x 4 x half> %a, <vscale x 4 x i32> %b) {1309; CHECK-LABEL: ucvtf_nxv4i32_to_nxv4f16:1310; CHECK: // %bb.0:1311; CHECK-NEXT: ucvtf z0.h, p0/m, z1.s1312; CHECK-NEXT: ret1313 %b.op = uitofp <vscale x 4 x i32> %b to <vscale x 4 x half>1314 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x half> %b.op, <vscale x 4 x half> %a1315 ret <vscale x 4 x half> %res1316}1317 1318define <vscale x 4 x float> @ucvtf_nxv4i32_to_nxv4f32(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x i32> %b) {1319; CHECK-LABEL: ucvtf_nxv4i32_to_nxv4f32:1320; CHECK: // %bb.0:1321; CHECK-NEXT: ucvtf z0.s, p0/m, z1.s1322; CHECK-NEXT: ret1323 %b.op = uitofp <vscale x 4 x i32> %b to <vscale x 4 x float>1324 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %b.op, <vscale x 4 x float> %a1325 ret <vscale x 4 x float> %res1326}1327 1328define <vscale x 2 x half> @ucvtf_nxv2i64_to_nxv2f16(<vscale x 2 x i1> %pg, <vscale x 2 x half> %a, <vscale x 2 x i64> %b) {1329; CHECK-LABEL: ucvtf_nxv2i64_to_nxv2f16:1330; CHECK: // %bb.0:1331; CHECK-NEXT: ucvtf z0.h, p0/m, z1.d1332; CHECK-NEXT: ret1333 %b.op = uitofp <vscale x 2 x i64> %b to <vscale x 2 x half>1334 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x half> %b.op, <vscale x 2 x half> %a1335 ret <vscale x 2 x half> %res1336}1337 1338define <vscale x 2 x float> @ucvtf_nxv2i64_to_nxv2f32(<vscale x 2 x i1> %pg, <vscale x 2 x float> %a, <vscale x 2 x i64> %b) {1339; CHECK-LABEL: ucvtf_nxv2i64_to_nxv2f32:1340; CHECK: // %bb.0:1341; CHECK-NEXT: ucvtf z0.s, p0/m, z1.d1342; CHECK-NEXT: ret1343 %b.op = uitofp <vscale x 2 x i64> %b to <vscale x 2 x float>1344 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x float> %b.op, <vscale x 2 x float> %a1345 ret <vscale x 2 x float> %res1346}1347 1348define <vscale x 2 x double> @ucvtf_nxv2i64_to_nxv2f64(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x i64> %b) {1349; CHECK-LABEL: ucvtf_nxv2i64_to_nxv2f64:1350; CHECK: // %bb.0:1351; CHECK-NEXT: ucvtf z0.d, p0/m, z1.d1352; CHECK-NEXT: ret1353 %b.op = uitofp <vscale x 2 x i64> %b to <vscale x 2 x double>1354 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %b.op, <vscale x 2 x double> %a1355 ret <vscale x 2 x double> %res1356}1357 1358define <vscale x 8 x i16> @uxtb_nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 8 x i8> %b) {1359; CHECK-LABEL: uxtb_nxv8i16:1360; CHECK: // %bb.0:1361; CHECK-NEXT: and z1.h, z1.h, #0xff1362; CHECK-NEXT: mov z0.h, p0/m, z1.h1363; CHECK-NEXT: ret1364 %b.op = zext <vscale x 8 x i8> %b to <vscale x 8 x i16>1365 %res = select <vscale x 8 x i1> %pg, <vscale x 8 x i16> %b.op, <vscale x 8 x i16> %a1366 ret <vscale x 8 x i16> %res1367}1368 1369define <vscale x 4 x i32> @uxtb_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x i8> %b) {1370; CHECK-LABEL: uxtb_nxv4i32:1371; CHECK: // %bb.0:1372; CHECK-NEXT: and z1.s, z1.s, #0xff1373; CHECK-NEXT: mov z0.s, p0/m, z1.s1374; CHECK-NEXT: ret1375 %b.op = zext <vscale x 4 x i8> %b to <vscale x 4 x i32>1376 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a1377 ret <vscale x 4 x i32> %res1378}1379 1380define <vscale x 2 x i64> @uxtb_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i8> %b) {1381; CHECK-LABEL: uxtb_nxv2i64:1382; CHECK: // %bb.0:1383; CHECK-NEXT: and z1.d, z1.d, #0xff1384; CHECK-NEXT: mov z0.d, p0/m, z1.d1385; CHECK-NEXT: ret1386 %b.op = zext <vscale x 2 x i8> %b to <vscale x 2 x i64>1387 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a1388 ret <vscale x 2 x i64> %res1389}1390 1391define <vscale x 4 x i32> @uxth_nxv4i32(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 4 x i16> %b) {1392; CHECK-LABEL: uxth_nxv4i32:1393; CHECK: // %bb.0:1394; CHECK-NEXT: and z1.s, z1.s, #0xffff1395; CHECK-NEXT: mov z0.s, p0/m, z1.s1396; CHECK-NEXT: ret1397 %b.op = zext <vscale x 4 x i16> %b to <vscale x 4 x i32>1398 %res = select <vscale x 4 x i1> %pg, <vscale x 4 x i32> %b.op, <vscale x 4 x i32> %a1399 ret <vscale x 4 x i32> %res1400}1401 1402define <vscale x 2 x i64> @uxth_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i16> %b) {1403; CHECK-LABEL: uxth_nxv2i64:1404; CHECK: // %bb.0:1405; CHECK-NEXT: and z1.d, z1.d, #0xffff1406; CHECK-NEXT: mov z0.d, p0/m, z1.d1407; CHECK-NEXT: ret1408 %b.op = zext <vscale x 2 x i16> %b to <vscale x 2 x i64>1409 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a1410 ret <vscale x 2 x i64> %res1411}1412 1413define <vscale x 2 x i64> @uxtw_nxv2i64(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i32> %b) {1414; CHECK-LABEL: uxtw_nxv2i64:1415; CHECK: // %bb.0:1416; CHECK-NEXT: and z1.d, z1.d, #0xffffffff1417; CHECK-NEXT: mov z0.d, p0/m, z1.d1418; CHECK-NEXT: ret1419 %b.op = zext <vscale x 2 x i32> %b to <vscale x 2 x i64>1420 %res = select <vscale x 2 x i1> %pg, <vscale x 2 x i64> %b.op, <vscale x 2 x i64> %a1421 ret <vscale x 2 x i64> %res1422}1423 1424define <vscale x 16 x i8> @abs_nxv16i8_all_active_predicate(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {1425; CHECK-LABEL: abs_nxv16i8_all_active_predicate:1426; CHECK: // %bb.0:1427; CHECK-NEXT: abs z0.b, p0/m, z1.b1428; CHECK-NEXT: ret1429 %b.op = call <vscale x 16 x i8> @llvm.aarch64.sve.abs.nxv16i8(<vscale x 16 x i8> %c, <vscale x 16 x i1> splat(i1 true), <vscale x 16 x i8> %b)1430 %res = select <vscale x 16 x i1> %pg, <vscale x 16 x i8> %b.op, <vscale x 16 x i8> %a1431 ret <vscale x 16 x i8> %res1432}1433 1434define <vscale x 16 x i8> @abs_nxv16i8_same_predicate(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {1435; CHECK-LABEL: abs_nxv16i8_same_predicate:1436; CHECK: // %bb.0:1437; CHECK-NEXT: abs z0.b, p0/m, z1.b1438; CHECK-NEXT: ret1439 %b.op = call <vscale x 16 x i8> @llvm.aarch64.sve.abs.nxv16i8(<vscale x 16 x i8> %c, <vscale x 16 x i1> %pg, <vscale x 16 x i8> %b)1440 %res = select <vscale x 16 x i1> %pg, <vscale x 16 x i8> %b.op, <vscale x 16 x i8> %a1441 ret <vscale x 16 x i8> %res1442}1443 1444define <vscale x 16 x i8> @abs_nxv16i8_inactive_lanes_are_not_defined(<vscale x 16 x i1> %sel_pg, <vscale x 16 x i1> %op_pg, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {1445; CHECK-LABEL: abs_nxv16i8_inactive_lanes_are_not_defined:1446; CHECK: // %bb.0:1447; CHECK-NEXT: abs z0.b, p0/m, z1.b1448; CHECK-NEXT: ret1449 %b.op = call <vscale x 16 x i8> @llvm.aarch64.sve.abs.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i1> %op_pg, <vscale x 16 x i8> %b)1450 %res = select <vscale x 16 x i1> %sel_pg, <vscale x 16 x i8> %b.op, <vscale x 16 x i8> %a1451 ret <vscale x 16 x i8> %res1452}1453 1454; Merging op has multiple users.1455declare void @use(<vscale x 16 x i8>,<vscale x 16 x i8>)1456define void @abs_nxv16i8_multi_use(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {1457; CHECK-LABEL: abs_nxv16i8_multi_use:1458; CHECK: // %bb.0:1459; CHECK-NEXT: ptrue p1.b1460; CHECK-NEXT: abs z1.b, p1/m, z1.b1461; CHECK-NEXT: mov z0.b, p0/m, z1.b1462; CHECK-NEXT: b use1463 %b.op = tail call <vscale x 16 x i8> @llvm.abs.nxv16i8(<vscale x 16 x i8> %b, i1 0)1464 %res = select <vscale x 16 x i1> %pg, <vscale x 16 x i8> %b.op, <vscale x 16 x i8> %a1465 tail call void @use(<vscale x 16 x i8> %res, <vscale x 16 x i8> %b.op)1466 ret void1467}1468 1469; Inactive lanes of the merging op remain live after the select.1470define <vscale x 16 x i8> @abs_nxv16i8_predicate_mismatch(<vscale x 16 x i1> %sel_pg, <vscale x 16 x i1> %op_pg, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {1471; CHECK-LABEL: abs_nxv16i8_predicate_mismatch:1472; CHECK: // %bb.0:1473; CHECK-NEXT: abs z2.b, p1/m, z1.b1474; CHECK-NEXT: mov z0.b, p0/m, z2.b1475; CHECK-NEXT: ret1476 %b.op = call <vscale x 16 x i8> @llvm.aarch64.sve.abs.nxv16i8(<vscale x 16 x i8> %c, <vscale x 16 x i1> %op_pg, <vscale x 16 x i8> %b)1477 %res = select <vscale x 16 x i1> %sel_pg, <vscale x 16 x i8> %b.op, <vscale x 16 x i8> %a1478 ret <vscale x 16 x i8> %res1479}1480 1481declare <vscale x 16 x i8> @llvm.abs.nxv16i8(<vscale x 16 x i8>, i1)1482declare <vscale x 8 x i16> @llvm.abs.nxv8i16(<vscale x 8 x i16>, i1)1483declare <vscale x 4 x i32> @llvm.abs.nxv4i32(<vscale x 4 x i32>, i1)1484declare <vscale x 2 x i64> @llvm.abs.nxv2i64(<vscale x 2 x i64>, i1)1485 1486declare <vscale x 16 x i8> @llvm.bitreverse.nxv16i8(<vscale x 16 x i8>)1487declare <vscale x 8 x i16> @llvm.bitreverse.nxv8i16(<vscale x 8 x i16>)1488declare <vscale x 4 x i32> @llvm.bitreverse.nxv4i32(<vscale x 4 x i32>)1489declare <vscale x 2 x i64> @llvm.bitreverse.nxv2i64(<vscale x 2 x i64>)1490 1491declare <vscale x 8 x i16> @llvm.bswap.nxv8i16(<vscale x 8 x i16>)1492declare <vscale x 4 x i32> @llvm.bswap.nxv4i32(<vscale x 4 x i32>)1493declare <vscale x 2 x i64> @llvm.bswap.nxv2i64(<vscale x 2 x i64>)1494 1495declare <vscale x 2 x half> @llvm.ceil.nxv2f16(<vscale x 2 x half>)1496declare <vscale x 4 x half> @llvm.ceil.nxv4f16(<vscale x 4 x half>)1497declare <vscale x 8 x half> @llvm.ceil.nxv8f16(<vscale x 8 x half>)1498declare <vscale x 2 x float> @llvm.ceil.nxv2f32(<vscale x 2 x float>)1499declare <vscale x 4 x float> @llvm.ceil.nxv4f32(<vscale x 4 x float>)1500declare <vscale x 2 x double> @llvm.ceil.nxv2f64(<vscale x 2 x double>)1501 1502declare <vscale x 16 x i8> @llvm.ctlz.nxv16i8(<vscale x 16 x i8>)1503declare <vscale x 8 x i16> @llvm.ctlz.nxv8i16(<vscale x 8 x i16>)1504declare <vscale x 4 x i32> @llvm.ctlz.nxv4i32(<vscale x 4 x i32>)1505declare <vscale x 2 x i64> @llvm.ctlz.nxv2i64(<vscale x 2 x i64>)1506 1507declare <vscale x 16 x i8> @llvm.ctpop.nxv16i8(<vscale x 16 x i8>)1508declare <vscale x 8 x i16> @llvm.ctpop.nxv8i16(<vscale x 8 x i16>)1509declare <vscale x 4 x i32> @llvm.ctpop.nxv4i32(<vscale x 4 x i32>)1510declare <vscale x 2 x i64> @llvm.ctpop.nxv2i64(<vscale x 2 x i64>)1511 1512declare <vscale x 2 x half> @llvm.fabs.nxv2f16(<vscale x 2 x half>)1513declare <vscale x 4 x half> @llvm.fabs.nxv4f16(<vscale x 4 x half>)1514declare <vscale x 8 x half> @llvm.fabs.nxv8f16(<vscale x 8 x half>)1515declare <vscale x 2 x float> @llvm.fabs.nxv2f32(<vscale x 2 x float>)1516declare <vscale x 4 x float> @llvm.fabs.nxv4f32(<vscale x 4 x float>)1517declare <vscale x 2 x double> @llvm.fabs.nxv2f64(<vscale x 2 x double>)1518declare <vscale x 2 x bfloat> @llvm.fabs.nxv2bf16(<vscale x 2 x bfloat>)1519declare <vscale x 4 x bfloat> @llvm.fabs.nxv4bf16(<vscale x 4 x bfloat>)1520declare <vscale x 8 x bfloat> @llvm.fabs.nxv8bf16(<vscale x 8 x bfloat>)1521 1522declare <vscale x 2 x half> @llvm.floor.nxv2f16(<vscale x 2 x half>)1523declare <vscale x 4 x half> @llvm.floor.nxv4f16(<vscale x 4 x half>)1524declare <vscale x 8 x half> @llvm.floor.nxv8f16(<vscale x 8 x half>)1525declare <vscale x 2 x float> @llvm.floor.nxv2f32(<vscale x 2 x float>)1526declare <vscale x 4 x float> @llvm.floor.nxv4f32(<vscale x 4 x float>)1527declare <vscale x 2 x double> @llvm.floor.nxv2f64(<vscale x 2 x double>)1528 1529declare <vscale x 4 x half> @llvm.nearbyint.nxv4f16(<vscale x 4 x half>)1530declare <vscale x 8 x half> @llvm.nearbyint.nxv8f16(<vscale x 8 x half>)1531declare <vscale x 2 x float> @llvm.nearbyint.nxv2f32(<vscale x 2 x float>)1532declare <vscale x 4 x float> @llvm.nearbyint.nxv4f32(<vscale x 4 x float>)1533declare <vscale x 2 x double> @llvm.nearbyint.nxv2f64(<vscale x 2 x double>)1534 1535declare <vscale x 2 x half> @llvm.rint.nxv2f16(<vscale x 2 x half>)1536declare <vscale x 4 x half> @llvm.rint.nxv4f16(<vscale x 4 x half>)1537declare <vscale x 8 x half> @llvm.rint.nxv8f16(<vscale x 8 x half>)1538declare <vscale x 2 x float> @llvm.rint.nxv2f32(<vscale x 2 x float>)1539declare <vscale x 4 x float> @llvm.rint.nxv4f32(<vscale x 4 x float>)1540declare <vscale x 2 x double> @llvm.rint.nxv2f64(<vscale x 2 x double>)1541 1542declare <vscale x 2 x half> @llvm.round.nxv2f16(<vscale x 2 x half>)1543declare <vscale x 4 x half> @llvm.round.nxv4f16(<vscale x 4 x half>)1544declare <vscale x 8 x half> @llvm.round.nxv8f16(<vscale x 8 x half>)1545declare <vscale x 2 x float> @llvm.round.nxv2f32(<vscale x 2 x float>)1546declare <vscale x 4 x float> @llvm.round.nxv4f32(<vscale x 4 x float>)1547declare <vscale x 2 x double> @llvm.round.nxv2f64(<vscale x 2 x double>)1548declare <vscale x 2 x half> @llvm.nearbyint.nxv2f16(<vscale x 2 x half>)1549 1550declare <vscale x 2 x half> @llvm.roundeven.nxv2f16(<vscale x 2 x half>)1551declare <vscale x 4 x half> @llvm.roundeven.nxv4f16(<vscale x 4 x half>)1552declare <vscale x 8 x half> @llvm.roundeven.nxv8f16(<vscale x 8 x half>)1553declare <vscale x 2 x float> @llvm.roundeven.nxv2f32(<vscale x 2 x float>)1554declare <vscale x 4 x float> @llvm.roundeven.nxv4f32(<vscale x 4 x float>)1555declare <vscale x 2 x double> @llvm.roundeven.nxv2f64(<vscale x 2 x double>)1556 1557declare <vscale x 2 x half> @llvm.sqrt.nxv2f16(<vscale x 2 x half>)1558declare <vscale x 4 x half> @llvm.sqrt.nxv4f16(<vscale x 4 x half>)1559declare <vscale x 8 x half> @llvm.sqrt.nxv8f16(<vscale x 8 x half>)1560declare <vscale x 2 x float> @llvm.sqrt.nxv2f32(<vscale x 2 x float>)1561declare <vscale x 4 x float> @llvm.sqrt.nxv4f32(<vscale x 4 x float>)1562declare <vscale x 2 x double> @llvm.sqrt.nxv2f64(<vscale x 2 x double>)1563 1564declare <vscale x 2 x half> @llvm.trunc.nxv2f16(<vscale x 2 x half>)1565declare <vscale x 4 x half> @llvm.trunc.nxv4f16(<vscale x 4 x half>)1566declare <vscale x 8 x half> @llvm.trunc.nxv8f16(<vscale x 8 x half>)1567declare <vscale x 2 x float> @llvm.trunc.nxv2f32(<vscale x 2 x float>)1568declare <vscale x 4 x float> @llvm.trunc.nxv4f32(<vscale x 4 x float>)1569declare <vscale x 2 x double> @llvm.trunc.nxv2f64(<vscale x 2 x double>)1570