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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve -run-pass=peephole-opt -verify-machineinstrs %s -o - | FileCheck %s3 4# Test instruction sequences where PTEST is redundant and thus gets removed.5---6name: cmpeq_nxv16i87alignment: 28tracksRegLiveness: true9registers:10 - { id: 0, class: ppr_3b }11 - { id: 1, class: zpr }12 - { id: 2, class: zpr }13 - { id: 3, class: ppr }14 - { id: 4, class: gpr32 }15 - { id: 5, class: gpr32 }16liveins:17 - { reg: '$p0', virtual-reg: '%0' }18 - { reg: '$z0', virtual-reg: '%1' }19 - { reg: '$z1', virtual-reg: '%2' }20frameInfo:21 maxCallFrameSize: 022body: |23 bb.0:24 liveins: $p0, $z0, $z125 26 ; CHECK-LABEL: name: cmpeq_nxv16i827 ; CHECK: liveins: $p0, $z0, $z128 ; CHECK-NEXT: {{ $}}29 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z130 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z031 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr_3b = COPY $p032 ; CHECK-NEXT: [[CMPEQ_PPzZZ_B:%[0-9]+]]:ppr = CMPEQ_PPzZZ_B [[COPY2]], [[COPY1]], [[COPY]], implicit-def $nzcv33 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $wzr34 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY3]], $wzr, 0, implicit $nzcv35 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]36 ; CHECK-NEXT: RET_ReallyLR implicit $w037 %2:zpr = COPY $z138 %1:zpr = COPY $z039 %0:ppr_3b = COPY $p040 %3:ppr = CMPEQ_PPzZZ_B %0, %1, %2, implicit-def dead $nzcv41 PTEST_PP %0, killed %3, implicit-def $nzcv42 %4:gpr32 = COPY $wzr43 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv44 $w0 = COPY %545 RET_ReallyLR implicit $w046 47...48---49name: cmpeq_nxv8i1650alignment: 251tracksRegLiveness: true52registers:53 - { id: 0, class: ppr_3b }54 - { id: 1, class: zpr }55 - { id: 2, class: zpr }56 - { id: 3, class: ppr_3b }57 - { id: 4, class: ppr }58 - { id: 5, class: ppr }59 - { id: 6, class: gpr32 }60 - { id: 7, class: gpr32 }61liveins:62 - { reg: '$p0', virtual-reg: '%0' }63 - { reg: '$z0', virtual-reg: '%1' }64 - { reg: '$z1', virtual-reg: '%2' }65frameInfo:66 maxCallFrameSize: 067body: |68 bb.0:69 liveins: $p0, $z0, $z170 71 ; CHECK-LABEL: name: cmpeq_nxv8i1672 ; CHECK: liveins: $p0, $z0, $z173 ; CHECK-NEXT: {{ $}}74 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z175 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z076 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr_3b = COPY $p077 ; CHECK-NEXT: [[CMPEQ_PPzZZ_H:%[0-9]+]]:ppr = CMPEQ_PPzZZ_H [[COPY2]], [[COPY1]], [[COPY]], implicit-def dead $nzcv78 ; CHECK-NEXT: PTEST_PP [[COPY2]], [[CMPEQ_PPzZZ_H]], implicit-def $nzcv79 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $wzr80 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY3]], $wzr, 0, implicit $nzcv81 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]82 ; CHECK-NEXT: RET_ReallyLR implicit $w083 %2:zpr = COPY $z184 %1:zpr = COPY $z085 %0:ppr_3b = COPY $p086 %4:ppr = CMPEQ_PPzZZ_H %0, %1, %2, implicit-def dead $nzcv87 PTEST_PP %0, %4, implicit-def $nzcv88 %6:gpr32 = COPY $wzr89 %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv90 $w0 = COPY %791 RET_ReallyLR implicit $w092 93...94---95name: cmpeq_nxv4i3296alignment: 297tracksRegLiveness: true98registers:99 - { id: 0, class: ppr_3b }100 - { id: 1, class: zpr }101 - { id: 2, class: zpr }102 - { id: 3, class: ppr_3b }103 - { id: 4, class: ppr }104 - { id: 5, class: ppr }105 - { id: 6, class: gpr32 }106 - { id: 7, class: gpr32 }107liveins:108 - { reg: '$p0', virtual-reg: '%0' }109 - { reg: '$z0', virtual-reg: '%1' }110 - { reg: '$z1', virtual-reg: '%2' }111frameInfo:112 maxCallFrameSize: 0113body: |114 bb.0:115 liveins: $p0, $z0, $z1116 117 ; CHECK-LABEL: name: cmpeq_nxv4i32118 ; CHECK: liveins: $p0, $z0, $z1119 ; CHECK-NEXT: {{ $}}120 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z1121 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z0122 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr_3b = COPY $p0123 ; CHECK-NEXT: [[CMPEQ_PPzZZ_S:%[0-9]+]]:ppr = CMPEQ_PPzZZ_S [[COPY2]], [[COPY1]], [[COPY]], implicit-def dead $nzcv124 ; CHECK-NEXT: PTEST_PP [[COPY2]], [[CMPEQ_PPzZZ_S]], implicit-def $nzcv125 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $wzr126 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY3]], $wzr, 0, implicit $nzcv127 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]128 ; CHECK-NEXT: RET_ReallyLR implicit $w0129 %2:zpr = COPY $z1130 %1:zpr = COPY $z0131 %0:ppr_3b = COPY $p0132 %4:ppr = CMPEQ_PPzZZ_S %0, %1, %2, implicit-def dead $nzcv133 PTEST_PP %0, %4, implicit-def $nzcv134 %6:gpr32 = COPY $wzr135 %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv136 $w0 = COPY %7137 RET_ReallyLR implicit $w0138 139...140---141name: cmpeq_nxv2i64142alignment: 2143tracksRegLiveness: true144registers:145 - { id: 0, class: ppr_3b }146 - { id: 1, class: zpr }147 - { id: 2, class: zpr }148 - { id: 3, class: ppr_3b }149 - { id: 4, class: ppr }150 - { id: 5, class: ppr }151 - { id: 6, class: gpr32 }152 - { id: 7, class: gpr32 }153liveins:154 - { reg: '$p0', virtual-reg: '%0' }155 - { reg: '$z0', virtual-reg: '%1' }156 - { reg: '$z1', virtual-reg: '%2' }157frameInfo:158 maxCallFrameSize: 0159body: |160 bb.0:161 liveins: $p0, $z0, $z1162 163 ; CHECK-LABEL: name: cmpeq_nxv2i64164 ; CHECK: liveins: $p0, $z0, $z1165 ; CHECK-NEXT: {{ $}}166 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z1167 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z0168 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr_3b = COPY $p0169 ; CHECK-NEXT: [[CMPEQ_PPzZZ_D:%[0-9]+]]:ppr = CMPEQ_PPzZZ_D [[COPY2]], [[COPY1]], [[COPY]], implicit-def dead $nzcv170 ; CHECK-NEXT: PTEST_PP [[COPY2]], [[CMPEQ_PPzZZ_D]], implicit-def $nzcv171 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $wzr172 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY3]], $wzr, 0, implicit $nzcv173 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]174 ; CHECK-NEXT: RET_ReallyLR implicit $w0175 %2:zpr = COPY $z1176 %1:zpr = COPY $z0177 %0:ppr_3b = COPY $p0178 %4:ppr = CMPEQ_PPzZZ_D %0, %1, %2, implicit-def dead $nzcv179 PTEST_PP %0, %4, implicit-def $nzcv180 %6:gpr32 = COPY $wzr181 %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv182 $w0 = COPY %7183 RET_ReallyLR implicit $w0184 185...186---187name: cmpeq_imm_nxv16i8188alignment: 2189tracksRegLiveness: true190registers:191 - { id: 0, class: ppr_3b }192 - { id: 1, class: zpr }193 - { id: 2, class: ppr }194 - { id: 3, class: ppr }195 - { id: 4, class: gpr32 }196 - { id: 5, class: gpr32 }197liveins:198 - { reg: '$p0', virtual-reg: '%0' }199 - { reg: '$z0', virtual-reg: '%1' }200frameInfo:201 maxCallFrameSize: 0202body: |203 bb.0:204 liveins: $p0, $z0205 206 ; CHECK-LABEL: name: cmpeq_imm_nxv16i8207 ; CHECK: liveins: $p0, $z0208 ; CHECK-NEXT: {{ $}}209 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z0210 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:ppr_3b = COPY $p0211 ; CHECK-NEXT: [[CMPEQ_PPzZI_B:%[0-9]+]]:ppr = CMPEQ_PPzZI_B [[COPY1]], [[COPY]], 0, implicit-def dead $nzcv212 ; CHECK-NEXT: [[PTRUE_B:%[0-9]+]]:ppr = PTRUE_B 31, implicit $vg213 ; CHECK-NEXT: PTEST_PP killed [[PTRUE_B]], killed [[CMPEQ_PPzZI_B]], implicit-def $nzcv214 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr215 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv216 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]217 ; CHECK-NEXT: RET_ReallyLR implicit $w0218 %1:zpr = COPY $z0219 %0:ppr_3b = COPY $p0220 %2:ppr = CMPEQ_PPzZI_B %0, %1, 0, implicit-def dead $nzcv221 %3:ppr = PTRUE_B 31, implicit $vg222 PTEST_PP killed %3, killed %2, implicit-def $nzcv223 %4:gpr32 = COPY $wzr224 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv225 $w0 = COPY %5226 RET_ReallyLR implicit $w0227 228...229---230name: cmpeq_imm_nxv8i16231alignment: 2232tracksRegLiveness: true233registers:234 - { id: 0, class: ppr_3b }235 - { id: 1, class: zpr }236 - { id: 2, class: ppr }237 - { id: 3, class: ppr }238 - { id: 4, class: ppr }239 - { id: 5, class: gpr32 }240 - { id: 6, class: gpr32 }241liveins:242 - { reg: '$p0', virtual-reg: '%0' }243 - { reg: '$z0', virtual-reg: '%1' }244frameInfo:245 maxCallFrameSize: 0246body: |247 bb.0:248 liveins: $p0, $z0249 250 ; CHECK-LABEL: name: cmpeq_imm_nxv8i16251 ; CHECK: liveins: $p0, $z0252 ; CHECK-NEXT: {{ $}}253 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z0254 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:ppr_3b = COPY $p0255 ; CHECK-NEXT: [[CMPEQ_PPzZI_H:%[0-9]+]]:ppr = CMPEQ_PPzZI_H [[COPY1]], [[COPY]], 0, implicit-def dead $nzcv256 ; CHECK-NEXT: PTEST_PP [[COPY1]], [[CMPEQ_PPzZI_H]], implicit-def $nzcv257 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr258 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv259 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]260 ; CHECK-NEXT: RET_ReallyLR implicit $w0261 %1:zpr = COPY $z0262 %0:ppr_3b = COPY $p0263 %2:ppr = CMPEQ_PPzZI_H %0, %1, 0, implicit-def dead $nzcv264 PTEST_PP %0, %2, implicit-def $nzcv265 %5:gpr32 = COPY $wzr266 %6:gpr32 = CSINCWr %5, $wzr, 0, implicit $nzcv267 $w0 = COPY %6268 RET_ReallyLR implicit $w0269 270...271---272name: cmpeq_imm_nxv4i32273alignment: 2274tracksRegLiveness: true275registers:276 - { id: 0, class: ppr_3b }277 - { id: 1, class: zpr }278 - { id: 2, class: ppr }279 - { id: 3, class: ppr }280 - { id: 4, class: ppr }281 - { id: 5, class: gpr32 }282 - { id: 6, class: gpr32 }283liveins:284 - { reg: '$p0', virtual-reg: '%0' }285 - { reg: '$z0', virtual-reg: '%1' }286frameInfo:287 maxCallFrameSize: 0288body: |289 bb.0:290 liveins: $p0, $z0291 292 ; CHECK-LABEL: name: cmpeq_imm_nxv4i32293 ; CHECK: liveins: $p0, $z0294 ; CHECK-NEXT: {{ $}}295 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z0296 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:ppr_3b = COPY $p0297 ; CHECK-NEXT: [[CMPEQ_PPzZI_S:%[0-9]+]]:ppr = CMPEQ_PPzZI_S [[COPY1]], [[COPY]], 0, implicit-def dead $nzcv298 ; CHECK-NEXT: PTEST_PP [[COPY1]], [[CMPEQ_PPzZI_S]], implicit-def $nzcv299 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr300 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv301 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]302 ; CHECK-NEXT: RET_ReallyLR implicit $w0303 %1:zpr = COPY $z0304 %0:ppr_3b = COPY $p0305 %2:ppr = CMPEQ_PPzZI_S %0, %1, 0, implicit-def dead $nzcv306 PTEST_PP %0, %2, implicit-def $nzcv307 %5:gpr32 = COPY $wzr308 %6:gpr32 = CSINCWr %5, $wzr, 0, implicit $nzcv309 $w0 = COPY %6310 RET_ReallyLR implicit $w0311 312...313---314name: cmpeq_imm_nxv2i64315alignment: 2316tracksRegLiveness: true317registers:318 - { id: 0, class: ppr_3b }319 - { id: 1, class: zpr }320 - { id: 2, class: ppr }321 - { id: 3, class: ppr }322 - { id: 4, class: ppr }323 - { id: 5, class: gpr32 }324 - { id: 6, class: gpr32 }325liveins:326 - { reg: '$p0', virtual-reg: '%0' }327 - { reg: '$z0', virtual-reg: '%1' }328frameInfo:329 maxCallFrameSize: 0330body: |331 bb.0:332 liveins: $p0, $z0333 334 ; CHECK-LABEL: name: cmpeq_imm_nxv2i64335 ; CHECK: liveins: $p0, $z0336 ; CHECK-NEXT: {{ $}}337 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z0338 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:ppr_3b = COPY $p0339 ; CHECK-NEXT: [[CMPEQ_PPzZI_D:%[0-9]+]]:ppr = CMPEQ_PPzZI_D [[COPY1]], [[COPY]], 0, implicit-def dead $nzcv340 ; CHECK-NEXT: PTEST_PP [[COPY1]], [[CMPEQ_PPzZI_D]], implicit-def $nzcv341 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr342 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv343 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]344 ; CHECK-NEXT: RET_ReallyLR implicit $w0345 %1:zpr = COPY $z0346 %0:ppr_3b = COPY $p0347 %2:ppr = CMPEQ_PPzZI_D %0, %1, 0, implicit-def dead $nzcv348 PTEST_PP %0, %2, implicit-def $nzcv349 %5:gpr32 = COPY $wzr350 %6:gpr32 = CSINCWr %5, $wzr, 0, implicit $nzcv351 $w0 = COPY %6352 RET_ReallyLR implicit $w0353 354...355---356name: cmpeq_wide_nxv16i8357alignment: 2358tracksRegLiveness: true359registers:360 - { id: 0, class: ppr_3b }361 - { id: 1, class: zpr }362 - { id: 2, class: zpr }363 - { id: 3, class: ppr }364 - { id: 4, class: gpr32 }365 - { id: 5, class: gpr32 }366liveins:367 - { reg: '$p0', virtual-reg: '%0' }368 - { reg: '$z0', virtual-reg: '%1' }369 - { reg: '$z1', virtual-reg: '%2' }370frameInfo:371 maxCallFrameSize: 0372body: |373 bb.0:374 liveins: $p0, $z0, $z1375 376 ; CHECK-LABEL: name: cmpeq_wide_nxv16i8377 ; CHECK: liveins: $p0, $z0, $z1378 ; CHECK-NEXT: {{ $}}379 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z1380 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z0381 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr_3b = COPY $p0382 ; CHECK-NEXT: [[CMPEQ_WIDE_PPzZZ_B:%[0-9]+]]:ppr = CMPEQ_WIDE_PPzZZ_B [[COPY2]], [[COPY1]], [[COPY]], implicit-def $nzcv383 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $wzr384 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY3]], $wzr, 0, implicit $nzcv385 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]386 ; CHECK-NEXT: RET_ReallyLR implicit $w0387 %2:zpr = COPY $z1388 %1:zpr = COPY $z0389 %0:ppr_3b = COPY $p0390 %3:ppr = CMPEQ_WIDE_PPzZZ_B %0, %1, %2, implicit-def dead $nzcv391 PTEST_PP %0, killed %3, implicit-def $nzcv392 %4:gpr32 = COPY $wzr393 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv394 $w0 = COPY %5395 RET_ReallyLR implicit $w0396 397...398---399name: cmpeq_wide_nxv8i16400alignment: 2401tracksRegLiveness: true402registers:403 - { id: 0, class: ppr_3b }404 - { id: 1, class: zpr }405 - { id: 2, class: zpr }406 - { id: 3, class: ppr_3b }407 - { id: 4, class: ppr }408 - { id: 5, class: ppr }409 - { id: 6, class: gpr32 }410 - { id: 7, class: gpr32 }411liveins:412 - { reg: '$p0', virtual-reg: '%0' }413 - { reg: '$z0', virtual-reg: '%1' }414 - { reg: '$z1', virtual-reg: '%2' }415frameInfo:416 maxCallFrameSize: 0417body: |418 bb.0:419 liveins: $p0, $z0, $z1420 421 ; CHECK-LABEL: name: cmpeq_wide_nxv8i16422 ; CHECK: liveins: $p0, $z0, $z1423 ; CHECK-NEXT: {{ $}}424 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z1425 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z0426 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr_3b = COPY $p0427 ; CHECK-NEXT: [[CMPEQ_WIDE_PPzZZ_H:%[0-9]+]]:ppr = CMPEQ_WIDE_PPzZZ_H [[COPY2]], [[COPY1]], [[COPY]], implicit-def dead $nzcv428 ; CHECK-NEXT: PTEST_PP [[COPY2]], [[CMPEQ_WIDE_PPzZZ_H]], implicit-def $nzcv429 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $wzr430 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY3]], $wzr, 0, implicit $nzcv431 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]432 ; CHECK-NEXT: RET_ReallyLR implicit $w0433 %2:zpr = COPY $z1434 %1:zpr = COPY $z0435 %0:ppr_3b = COPY $p0436 %4:ppr = CMPEQ_WIDE_PPzZZ_H %0, %1, %2, implicit-def dead $nzcv437 PTEST_PP %0, %4, implicit-def $nzcv438 %6:gpr32 = COPY $wzr439 %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv440 $w0 = COPY %7441 RET_ReallyLR implicit $w0442 443...444---445name: cmpeq_wide_nxv4i32446alignment: 2447tracksRegLiveness: true448registers:449 - { id: 0, class: ppr_3b }450 - { id: 1, class: zpr }451 - { id: 2, class: zpr }452 - { id: 3, class: ppr_3b }453 - { id: 4, class: ppr }454 - { id: 5, class: ppr }455 - { id: 6, class: gpr32 }456 - { id: 7, class: gpr32 }457liveins:458 - { reg: '$p0', virtual-reg: '%0' }459 - { reg: '$z0', virtual-reg: '%1' }460 - { reg: '$z1', virtual-reg: '%2' }461frameInfo:462 maxCallFrameSize: 0463body: |464 bb.0:465 liveins: $p0, $z0, $z1466 467 ; CHECK-LABEL: name: cmpeq_wide_nxv4i32468 ; CHECK: liveins: $p0, $z0, $z1469 ; CHECK-NEXT: {{ $}}470 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z1471 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z0472 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr_3b = COPY $p0473 ; CHECK-NEXT: [[CMPEQ_WIDE_PPzZZ_S:%[0-9]+]]:ppr = CMPEQ_WIDE_PPzZZ_S [[COPY2]], [[COPY1]], [[COPY]], implicit-def dead $nzcv474 ; CHECK-NEXT: PTEST_PP [[COPY2]], [[CMPEQ_WIDE_PPzZZ_S]], implicit-def $nzcv475 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $wzr476 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY3]], $wzr, 0, implicit $nzcv477 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]478 ; CHECK-NEXT: RET_ReallyLR implicit $w0479 %2:zpr = COPY $z1480 %1:zpr = COPY $z0481 %0:ppr_3b = COPY $p0482 %4:ppr = CMPEQ_WIDE_PPzZZ_S %0, %1, %2, implicit-def dead $nzcv483 PTEST_PP %0, %4, implicit-def $nzcv484 %6:gpr32 = COPY $wzr485 %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv486 $w0 = COPY %7487 RET_ReallyLR implicit $w0488 489...490---491name: cmpeq_imm_nxv16i8_ptest_not_all_active492alignment: 2493tracksRegLiveness: true494registers:495 - { id: 0, class: ppr_3b }496 - { id: 1, class: zpr }497 - { id: 2, class: ppr }498 - { id: 3, class: ppr }499 - { id: 4, class: gpr32 }500 - { id: 5, class: gpr32 }501liveins:502 - { reg: '$p0', virtual-reg: '%0' }503 - { reg: '$z0', virtual-reg: '%1' }504frameInfo:505 maxCallFrameSize: 0506body: |507 bb.0:508 liveins: $p0, $z0509 510 ; CHECK-LABEL: name: cmpeq_imm_nxv16i8_ptest_not_all_active511 ; CHECK: liveins: $p0, $z0512 ; CHECK-NEXT: {{ $}}513 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z0514 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:ppr_3b = COPY $p0515 ; CHECK-NEXT: [[CMPEQ_PPzZI_B:%[0-9]+]]:ppr = CMPEQ_PPzZI_B [[COPY1]], [[COPY]], 0, implicit-def dead $nzcv516 ; CHECK-NEXT: [[PTRUE_B:%[0-9]+]]:ppr = PTRUE_B 0, implicit $vg517 ; CHECK-NEXT: PTEST_PP killed [[PTRUE_B]], killed [[CMPEQ_PPzZI_B]], implicit-def $nzcv518 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr519 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv520 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]521 ; CHECK-NEXT: RET_ReallyLR implicit $w0522 %1:zpr = COPY $z0523 %0:ppr_3b = COPY $p0524 %2:ppr = CMPEQ_PPzZI_B %0, %1, 0, implicit-def dead $nzcv525 %3:ppr = PTRUE_B 0, implicit $vg526 PTEST_PP killed %3, killed %2, implicit-def $nzcv527 %4:gpr32 = COPY $wzr528 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv529 $w0 = COPY %5530 RET_ReallyLR implicit $w0531 532...533---534name: cmpeq_imm_nxv16i8_ptest_of_halfs535alignment: 2536tracksRegLiveness: true537registers:538 - { id: 0, class: ppr_3b }539 - { id: 1, class: zpr }540 - { id: 2, class: ppr }541 - { id: 3, class: ppr }542 - { id: 4, class: gpr32 }543 - { id: 5, class: gpr32 }544liveins:545 - { reg: '$p0', virtual-reg: '%0' }546 - { reg: '$z0', virtual-reg: '%1' }547frameInfo:548 maxCallFrameSize: 0549body: |550 bb.0:551 liveins: $p0, $z0552 553 ; CHECK-LABEL: name: cmpeq_imm_nxv16i8_ptest_of_halfs554 ; CHECK: liveins: $p0, $z0555 ; CHECK-NEXT: {{ $}}556 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z0557 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:ppr_3b = COPY $p0558 ; CHECK-NEXT: [[CMPEQ_PPzZI_B:%[0-9]+]]:ppr = CMPEQ_PPzZI_B [[COPY1]], [[COPY]], 0, implicit-def dead $nzcv559 ; CHECK-NEXT: [[PTRUE_H:%[0-9]+]]:ppr = PTRUE_H 31, implicit $vg560 ; CHECK-NEXT: PTEST_PP killed [[PTRUE_H]], killed [[CMPEQ_PPzZI_B]], implicit-def $nzcv561 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr562 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv563 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]564 ; CHECK-NEXT: RET_ReallyLR implicit $w0565 %1:zpr = COPY $z0566 %0:ppr_3b = COPY $p0567 %2:ppr = CMPEQ_PPzZI_B %0, %1, 0, implicit-def dead $nzcv568 %3:ppr = PTRUE_H 31, implicit $vg569 PTEST_PP killed %3, killed %2, implicit-def $nzcv570 %4:gpr32 = COPY $wzr571 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv572 $w0 = COPY %5573 RET_ReallyLR implicit $w0574 575...576---577name: cmpeq_imm_nxv16i8_ptest_with_unique_pg578alignment: 2579tracksRegLiveness: true580registers:581 - { id: 0, class: ppr_3b }582 - { id: 1, class: zpr }583 - { id: 2, class: ppr }584 - { id: 3, class: ppr }585 - { id: 4, class: gpr32 }586 - { id: 5, class: gpr32 }587liveins:588 - { reg: '$p0', virtual-reg: '%0' }589 - { reg: '$p1', virtual-reg: '%3' }590 - { reg: '$z0', virtual-reg: '%1' }591frameInfo:592 maxCallFrameSize: 0593body: |594 bb.0:595 liveins: $p0, $p1, $z0596 597 ; CHECK-LABEL: name: cmpeq_imm_nxv16i8_ptest_with_unique_pg598 ; CHECK: liveins: $p0, $p1, $z0599 ; CHECK-NEXT: {{ $}}600 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z0601 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:ppr_3b = COPY $p0602 ; CHECK-NEXT: [[CMPEQ_PPzZI_B:%[0-9]+]]:ppr = CMPEQ_PPzZI_B [[COPY1]], [[COPY]], 0, implicit-def dead $nzcv603 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr = COPY $p1604 ; CHECK-NEXT: PTEST_PP killed [[COPY2]], killed [[CMPEQ_PPzZI_B]], implicit-def $nzcv605 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $wzr606 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY3]], $wzr, 0, implicit $nzcv607 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]608 ; CHECK-NEXT: RET_ReallyLR implicit $w0609 %1:zpr = COPY $z0610 %0:ppr_3b = COPY $p0611 %2:ppr = CMPEQ_PPzZI_B %0, %1, 0, implicit-def dead $nzcv612 %3:ppr = COPY $p1613 PTEST_PP killed %3, killed %2, implicit-def $nzcv614 %4:gpr32 = COPY $wzr615 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv616 $w0 = COPY %5617 RET_ReallyLR implicit $w0618 619...620---621name: cmpeq_nxv16i8_ptest_with_matching_operands622alignment: 2623tracksRegLiveness: true624registers:625 - { id: 0, class: ppr_3b }626 - { id: 1, class: zpr }627 - { id: 2, class: zpr }628 - { id: 3, class: ppr }629 - { id: 4, class: gpr32 }630 - { id: 5, class: gpr32 }631liveins:632 - { reg: '$p0', virtual-reg: '%0' }633 - { reg: '$z0', virtual-reg: '%1' }634 - { reg: '$z1', virtual-reg: '%2' }635frameInfo:636 maxCallFrameSize: 0637body: |638 bb.0:639 liveins: $p0, $z0, $z1640 641 ; CHECK-LABEL: name: cmpeq_nxv16i8_ptest_with_matching_operands642 ; CHECK: liveins: $p0, $z0, $z1643 ; CHECK-NEXT: {{ $}}644 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z1645 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z0646 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr_3b = COPY $p0647 ; CHECK-NEXT: [[CMPEQ_PPzZZ_B:%[0-9]+]]:ppr = CMPEQ_PPzZZ_B [[COPY2]], [[COPY1]], [[COPY]], implicit-def dead $nzcv648 ; CHECK-NEXT: PTEST_PP [[CMPEQ_PPzZZ_B]], killed [[CMPEQ_PPzZZ_B]], implicit-def $nzcv649 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $wzr650 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY3]], $wzr, 0, implicit $nzcv651 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]652 ; CHECK-NEXT: RET_ReallyLR implicit $w0653 %2:zpr = COPY $z1654 %1:zpr = COPY $z0655 %0:ppr_3b = COPY $p0656 %3:ppr = CMPEQ_PPzZZ_B %0, %1, %2, implicit-def dead $nzcv657 PTEST_PP %3, killed %3, implicit-def $nzcv658 %4:gpr32 = COPY $wzr659 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv660 $w0 = COPY %5661 RET_ReallyLR implicit $w0662 663...664---665name: cmpeq_nxv16i8_ptest_with_register_class_mismatch666alignment: 2667tracksRegLiveness: true668registers:669 - { id: 0, class: ppr }670 - { id: 1, class: zpr }671 - { id: 2, class: zpr }672 - { id: 3, class: ppr_3b }673 - { id: 4, class: ppr }674 - { id: 5, class: gpr32 }675 - { id: 6, class: gpr32 }676liveins:677 - { reg: '$z0', virtual-reg: '%1' }678 - { reg: '$z1', virtual-reg: '%2' }679frameInfo:680 maxCallFrameSize: 0681body: |682 bb.0:683 liveins: $z0, $z1684 685 ; CHECK-LABEL: name: cmpeq_nxv16i8_ptest_with_register_class_mismatch686 ; CHECK: liveins: $z0, $z1687 ; CHECK-NEXT: {{ $}}688 ; CHECK-NEXT: [[COPY:%[0-9]+]]:zpr = COPY $z0689 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z1690 ; CHECK-NEXT: [[PTRUE_B:%[0-9]+]]:ppr = PTRUE_B 31, implicit $vg691 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr_3b = COPY [[PTRUE_B]]692 ; CHECK-NEXT: [[CMPEQ_PPzZZ_B:%[0-9]+]]:ppr = CMPEQ_PPzZZ_B [[COPY2]], [[COPY]], [[COPY1]], implicit-def $nzcv693 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $wzr694 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY3]], $wzr, 0, implicit $nzcv695 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]696 ; CHECK-NEXT: RET_ReallyLR implicit $w0697 %1:zpr = COPY $z0698 %2:zpr = COPY $z1699 %0:ppr = PTRUE_B 31, implicit $vg700 %3:ppr_3b = COPY %0701 %4:ppr = CMPEQ_PPzZZ_B %3, %1, %2, implicit-def dead $nzcv702 PTEST_PP %0, killed %4, implicit-def $nzcv703 %5:gpr32 = COPY $wzr704 %6:gpr32 = CSINCWr %5, $wzr, 0, implicit $nzcv705 $w0 = COPY %6706 RET_ReallyLR implicit $w0707 708...709