23 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4define noundef i64 @svaddv_SVBool_SVInt64_t(<vscale x 16 x i1> %a, <vscale x 2 x i64> %b) {5; CHECK-LABEL: svaddv_SVBool_SVInt64_t:6; CHECK: // %bb.0: // %entry7; CHECK-NEXT: //APP8; CHECK-NEXT: //NO_APP9; CHECK-NEXT: uaddv d0, p0, z0.d10; CHECK-NEXT: fmov x0, d011; CHECK-NEXT: ret12entry:13 %0 = tail call { <vscale x 16 x i1>, <vscale x 2 x i64> } asm sideeffect "", "=@3Upa,=w,0,1"(<vscale x 16 x i1> %a, <vscale x 2 x i64> %b)14 %asmresult = extractvalue { <vscale x 16 x i1>, <vscale x 2 x i64> } %0, 015 %asmresult1 = extractvalue { <vscale x 16 x i1>, <vscale x 2 x i64> } %0, 116 %1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %asmresult)17 %2 = tail call i64 @llvm.aarch64.sve.saddv.nxv2i64(<vscale x 2 x i1> %1, <vscale x 2 x i64> %asmresult1)18 ret i64 %219}20 21declare <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1>)22declare i64 @llvm.aarch64.sve.saddv.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>)23