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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s | FileCheck %s3; RUN: llc -use-constant-int-for-scalable-splat < %s | FileCheck %s4 5target triple = "aarch64-unknown-linux-gnu"6 7define <vscale x 16 x i8> @sdiv_i8(<vscale x 16 x i8> %a) #0 {8; CHECK-LABEL: sdiv_i8:9; CHECK: // %bb.0:10; CHECK-NEXT: ptrue p0.b11; CHECK-NEXT: asrd z0.b, p0/m, z0.b, #412; CHECK-NEXT: ret13 %out = sdiv <vscale x 16 x i8> %a, splat (i8 16)14 ret <vscale x 16 x i8> %out15}16 17define <vscale x 16 x i8> @sdiv_i8_neg(<vscale x 16 x i8> %a) #0 {18; CHECK-LABEL: sdiv_i8_neg:19; CHECK: // %bb.0:20; CHECK-NEXT: ptrue p0.b21; CHECK-NEXT: asrd z0.b, p0/m, z0.b, #622; CHECK-NEXT: subr z0.b, z0.b, #0 // =0x023; CHECK-NEXT: ret24 %out = sdiv <vscale x 16 x i8> %a, splat (i8 -64)25 ret <vscale x 16 x i8> %out26}27 28define <vscale x 8 x i16> @sdiv_i16(<vscale x 8 x i16> %a) #0 {29; CHECK-LABEL: sdiv_i16:30; CHECK: // %bb.0:31; CHECK-NEXT: ptrue p0.h32; CHECK-NEXT: asrd z0.h, p0/m, z0.h, #1033; CHECK-NEXT: ret34 %out = sdiv <vscale x 8 x i16> %a, splat (i16 1024)35 ret <vscale x 8 x i16> %out36}37 38define <vscale x 8 x i16> @sdiv_i16_neg(<vscale x 8 x i16> %a) #0 {39; CHECK-LABEL: sdiv_i16_neg:40; CHECK: // %bb.0:41; CHECK-NEXT: ptrue p0.h42; CHECK-NEXT: asrd z0.h, p0/m, z0.h, #1243; CHECK-NEXT: subr z0.h, z0.h, #0 // =0x044; CHECK-NEXT: ret45 %out = sdiv <vscale x 8 x i16> %a, splat (i16 -4096)46 ret <vscale x 8 x i16> %out47}48 49define <vscale x 4 x i32> @sdiv_i32(<vscale x 4 x i32> %a) #0 {50; CHECK-LABEL: sdiv_i32:51; CHECK: // %bb.0:52; CHECK-NEXT: ptrue p0.s53; CHECK-NEXT: asrd z0.s, p0/m, z0.s, #2354; CHECK-NEXT: ret55 %out = sdiv <vscale x 4 x i32> %a, splat (i32 8388608)56 ret <vscale x 4 x i32> %out57}58 59define <vscale x 4 x i32> @sdiv_i32_neg(<vscale x 4 x i32> %a) #0 {60; CHECK-LABEL: sdiv_i32_neg:61; CHECK: // %bb.0:62; CHECK-NEXT: ptrue p0.s63; CHECK-NEXT: asrd z0.s, p0/m, z0.s, #2564; CHECK-NEXT: subr z0.s, z0.s, #0 // =0x065; CHECK-NEXT: ret66 %out = sdiv <vscale x 4 x i32> %a, splat (i32 -33554432)67 ret <vscale x 4 x i32> %out68}69 70define <vscale x 2 x i64> @sdiv_i64(<vscale x 2 x i64> %a) #0 {71; CHECK-LABEL: sdiv_i64:72; CHECK: // %bb.0:73; CHECK-NEXT: ptrue p0.d74; CHECK-NEXT: asrd z0.d, p0/m, z0.d, #5375; CHECK-NEXT: ret76 %out = sdiv <vscale x 2 x i64> %a, splat (i64 9007199254740992)77 ret <vscale x 2 x i64> %out78}79 80define <vscale x 2 x i64> @sdiv_i64_neg(<vscale x 2 x i64> %a) #0 {81; CHECK-LABEL: sdiv_i64_neg:82; CHECK: // %bb.0:83; CHECK-NEXT: ptrue p0.d84; CHECK-NEXT: asrd z0.d, p0/m, z0.d, #5585; CHECK-NEXT: subr z0.d, z0.d, #0 // =0x086; CHECK-NEXT: ret87 %out = sdiv <vscale x 2 x i64> %a, splat (i64 -36028797018963968)88 ret <vscale x 2 x i64> %out89}90 91attributes #0 = { "target-features"="+sve" }92