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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4; FP_EXTEND5 6define <vscale x 8 x float> @fcvts_nxv8f16(<vscale x 8 x half> %a) {7; CHECK-LABEL: fcvts_nxv8f16:8; CHECK: // %bb.0:9; CHECK-NEXT: uunpklo z1.s, z0.h10; CHECK-NEXT: uunpkhi z2.s, z0.h11; CHECK-NEXT: ptrue p0.s12; CHECK-NEXT: movprfx z0, z113; CHECK-NEXT: fcvt z0.s, p0/m, z1.h14; CHECK-NEXT: movprfx z1, z215; CHECK-NEXT: fcvt z1.s, p0/m, z2.h16; CHECK-NEXT: ret17 %res = fpext <vscale x 8 x half> %a to <vscale x 8 x float>18 ret <vscale x 8 x float> %res19}20 21define <vscale x 4 x double> @fcvtd_nxv4f16(<vscale x 4 x half> %a) {22; CHECK-LABEL: fcvtd_nxv4f16:23; CHECK: // %bb.0:24; CHECK-NEXT: uunpklo z1.d, z0.s25; CHECK-NEXT: uunpkhi z2.d, z0.s26; CHECK-NEXT: ptrue p0.d27; CHECK-NEXT: movprfx z0, z128; CHECK-NEXT: fcvt z0.d, p0/m, z1.h29; CHECK-NEXT: movprfx z1, z230; CHECK-NEXT: fcvt z1.d, p0/m, z2.h31; CHECK-NEXT: ret32 %res = fpext <vscale x 4 x half> %a to <vscale x 4 x double>33 ret <vscale x 4 x double> %res34}35 36define <vscale x 8 x double> @fcvtd_nxv8f16(<vscale x 8 x half> %a) {37; CHECK-LABEL: fcvtd_nxv8f16:38; CHECK: // %bb.0:39; CHECK-NEXT: uunpklo z1.s, z0.h40; CHECK-NEXT: uunpkhi z0.s, z0.h41; CHECK-NEXT: ptrue p0.d42; CHECK-NEXT: uunpklo z2.d, z1.s43; CHECK-NEXT: uunpkhi z1.d, z1.s44; CHECK-NEXT: uunpklo z3.d, z0.s45; CHECK-NEXT: uunpkhi z4.d, z0.s46; CHECK-NEXT: fcvt z1.d, p0/m, z1.h47; CHECK-NEXT: movprfx z0, z248; CHECK-NEXT: fcvt z0.d, p0/m, z2.h49; CHECK-NEXT: movprfx z2, z350; CHECK-NEXT: fcvt z2.d, p0/m, z3.h51; CHECK-NEXT: movprfx z3, z452; CHECK-NEXT: fcvt z3.d, p0/m, z4.h53; CHECK-NEXT: ret54 %res = fpext <vscale x 8 x half> %a to <vscale x 8 x double>55 ret <vscale x 8 x double> %res56}57 58define <vscale x 4 x double> @fcvtd_nxv4f32(<vscale x 4 x float> %a) {59; CHECK-LABEL: fcvtd_nxv4f32:60; CHECK: // %bb.0:61; CHECK-NEXT: uunpklo z1.d, z0.s62; CHECK-NEXT: uunpkhi z2.d, z0.s63; CHECK-NEXT: ptrue p0.d64; CHECK-NEXT: movprfx z0, z165; CHECK-NEXT: fcvt z0.d, p0/m, z1.s66; CHECK-NEXT: movprfx z1, z267; CHECK-NEXT: fcvt z1.d, p0/m, z2.s68; CHECK-NEXT: ret69 %res = fpext <vscale x 4 x float> %a to <vscale x 4 x double>70 ret <vscale x 4 x double> %res71}72 73define <vscale x 8 x double> @fcvtd_nxv8f32(<vscale x 8 x float> %a) {74; CHECK-LABEL: fcvtd_nxv8f32:75; CHECK: // %bb.0:76; CHECK-NEXT: uunpklo z2.d, z0.s77; CHECK-NEXT: uunpkhi z3.d, z0.s78; CHECK-NEXT: uunpklo z4.d, z1.s79; CHECK-NEXT: uunpkhi z5.d, z1.s80; CHECK-NEXT: ptrue p0.d81; CHECK-NEXT: movprfx z0, z282; CHECK-NEXT: fcvt z0.d, p0/m, z2.s83; CHECK-NEXT: movprfx z1, z384; CHECK-NEXT: fcvt z1.d, p0/m, z3.s85; CHECK-NEXT: movprfx z2, z486; CHECK-NEXT: fcvt z2.d, p0/m, z4.s87; CHECK-NEXT: movprfx z3, z588; CHECK-NEXT: fcvt z3.d, p0/m, z5.s89; CHECK-NEXT: ret90 %res = fpext <vscale x 8 x float> %a to <vscale x 8 x double>91 ret <vscale x 8 x double> %res92}93 94; FP_ROUND95 96define <vscale x 8 x half> @fcvth_nxv8f32(<vscale x 8 x float> %a) {97; CHECK-LABEL: fcvth_nxv8f32:98; CHECK: // %bb.0:99; CHECK-NEXT: ptrue p0.s100; CHECK-NEXT: fcvt z1.h, p0/m, z1.s101; CHECK-NEXT: fcvt z0.h, p0/m, z0.s102; CHECK-NEXT: uzp1 z0.h, z0.h, z1.h103; CHECK-NEXT: ret104 %res = fptrunc <vscale x 8 x float> %a to <vscale x 8 x half>105 ret <vscale x 8 x half> %res106}107 108define <vscale x 8 x half> @fcvth_nxv8f64(<vscale x 8 x double> %a) {109; CHECK-LABEL: fcvth_nxv8f64:110; CHECK: // %bb.0:111; CHECK-NEXT: ptrue p0.d112; CHECK-NEXT: fcvt z3.h, p0/m, z3.d113; CHECK-NEXT: fcvt z2.h, p0/m, z2.d114; CHECK-NEXT: fcvt z1.h, p0/m, z1.d115; CHECK-NEXT: fcvt z0.h, p0/m, z0.d116; CHECK-NEXT: uzp1 z2.s, z2.s, z3.s117; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s118; CHECK-NEXT: uzp1 z0.h, z0.h, z2.h119; CHECK-NEXT: ret120 %res = fptrunc <vscale x 8 x double> %a to <vscale x 8 x half>121 ret <vscale x 8 x half> %res122}123 124define <vscale x 4 x half> @fcvth_nxv4f64(<vscale x 4 x double> %a) {125; CHECK-LABEL: fcvth_nxv4f64:126; CHECK: // %bb.0:127; CHECK-NEXT: ptrue p0.d128; CHECK-NEXT: fcvt z1.h, p0/m, z1.d129; CHECK-NEXT: fcvt z0.h, p0/m, z0.d130; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s131; CHECK-NEXT: ret132 %res = fptrunc <vscale x 4 x double> %a to <vscale x 4 x half>133 ret <vscale x 4 x half> %res134}135 136define <vscale x 4 x float> @fcvts_nxv4f64(<vscale x 4 x double> %a) {137; CHECK-LABEL: fcvts_nxv4f64:138; CHECK: // %bb.0:139; CHECK-NEXT: ptrue p0.d140; CHECK-NEXT: fcvt z1.s, p0/m, z1.d141; CHECK-NEXT: fcvt z0.s, p0/m, z0.d142; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s143; CHECK-NEXT: ret144 %res = fptrunc <vscale x 4 x double> %a to <vscale x 4 x float>145 ret <vscale x 4 x float> %res146}147 148define <vscale x 8 x float> @fcvts_nxv8f64(<vscale x 8 x double> %a) {149; CHECK-LABEL: fcvts_nxv8f64:150; CHECK: // %bb.0:151; CHECK-NEXT: ptrue p0.d152; CHECK-NEXT: fcvt z1.s, p0/m, z1.d153; CHECK-NEXT: fcvt z0.s, p0/m, z0.d154; CHECK-NEXT: fcvt z3.s, p0/m, z3.d155; CHECK-NEXT: fcvt z2.s, p0/m, z2.d156; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s157; CHECK-NEXT: uzp1 z1.s, z2.s, z3.s158; CHECK-NEXT: ret159 %res = fptrunc <vscale x 8 x double> %a to <vscale x 8 x float>160 ret <vscale x 8 x float> %res161}162 163; FP_TO_SINT164 165; Split operand166define <vscale x 4 x i32> @fcvtzs_s_nxv4f64(<vscale x 4 x double> %a) {167; CHECK-LABEL: fcvtzs_s_nxv4f64:168; CHECK: // %bb.0:169; CHECK-NEXT: ptrue p0.d170; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d171; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d172; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s173; CHECK-NEXT: ret174 %res = fptosi <vscale x 4 x double> %a to <vscale x 4 x i32>175 ret <vscale x 4 x i32> %res176}177 178define <vscale x 8 x i16> @fcvtzs_h_nxv8f64(<vscale x 8 x double> %a) {179; CHECK-LABEL: fcvtzs_h_nxv8f64:180; CHECK: // %bb.0:181; CHECK-NEXT: ptrue p0.d182; CHECK-NEXT: fcvtzs z3.d, p0/m, z3.d183; CHECK-NEXT: fcvtzs z2.d, p0/m, z2.d184; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d185; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d186; CHECK-NEXT: uzp1 z2.s, z2.s, z3.s187; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s188; CHECK-NEXT: uzp1 z0.h, z0.h, z2.h189; CHECK-NEXT: ret190 %res = fptosi <vscale x 8 x double> %a to <vscale x 8 x i16>191 ret <vscale x 8 x i16> %res192}193 194; Split result195define <vscale x 4 x i64> @fcvtzs_d_nxv4f32(<vscale x 4 x float> %a) {196; CHECK-LABEL: fcvtzs_d_nxv4f32:197; CHECK: // %bb.0:198; CHECK-NEXT: uunpklo z1.d, z0.s199; CHECK-NEXT: uunpkhi z2.d, z0.s200; CHECK-NEXT: ptrue p0.d201; CHECK-NEXT: movprfx z0, z1202; CHECK-NEXT: fcvtzs z0.d, p0/m, z1.s203; CHECK-NEXT: movprfx z1, z2204; CHECK-NEXT: fcvtzs z1.d, p0/m, z2.s205; CHECK-NEXT: ret206 %res = fptosi <vscale x 4 x float> %a to <vscale x 4 x i64>207 ret <vscale x 4 x i64> %res208}209 210define <vscale x 16 x i32> @fcvtzs_s_nxv16f16(<vscale x 16 x half> %a) {211; CHECK-LABEL: fcvtzs_s_nxv16f16:212; CHECK: // %bb.0:213; CHECK-NEXT: uunpklo z2.s, z0.h214; CHECK-NEXT: uunpkhi z3.s, z0.h215; CHECK-NEXT: uunpklo z4.s, z1.h216; CHECK-NEXT: uunpkhi z5.s, z1.h217; CHECK-NEXT: ptrue p0.s218; CHECK-NEXT: movprfx z0, z2219; CHECK-NEXT: fcvtzs z0.s, p0/m, z2.h220; CHECK-NEXT: movprfx z1, z3221; CHECK-NEXT: fcvtzs z1.s, p0/m, z3.h222; CHECK-NEXT: movprfx z2, z4223; CHECK-NEXT: fcvtzs z2.s, p0/m, z4.h224; CHECK-NEXT: movprfx z3, z5225; CHECK-NEXT: fcvtzs z3.s, p0/m, z5.h226; CHECK-NEXT: ret227 %res = fptosi <vscale x 16 x half> %a to <vscale x 16 x i32>228 ret <vscale x 16 x i32> %res229}230 231; FP_TO_UINT232 233; Split operand234define <vscale x 4 x i32> @fcvtzu_s_nxv4f64(<vscale x 4 x double> %a) {235; CHECK-LABEL: fcvtzu_s_nxv4f64:236; CHECK: // %bb.0:237; CHECK-NEXT: ptrue p0.d238; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d239; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d240; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s241; CHECK-NEXT: ret242 %res = fptoui <vscale x 4 x double> %a to <vscale x 4 x i32>243 ret <vscale x 4 x i32> %res244}245 246; Split result247define <vscale x 4 x i64> @fcvtzu_d_nxv4f32(<vscale x 4 x float> %a) {248; CHECK-LABEL: fcvtzu_d_nxv4f32:249; CHECK: // %bb.0:250; CHECK-NEXT: uunpklo z1.d, z0.s251; CHECK-NEXT: uunpkhi z2.d, z0.s252; CHECK-NEXT: ptrue p0.d253; CHECK-NEXT: movprfx z0, z1254; CHECK-NEXT: fcvtzu z0.d, p0/m, z1.s255; CHECK-NEXT: movprfx z1, z2256; CHECK-NEXT: fcvtzu z1.d, p0/m, z2.s257; CHECK-NEXT: ret258 %res = fptoui <vscale x 4 x float> %a to <vscale x 4 x i64>259 ret <vscale x 4 x i64> %res260}261 262; SINT_TO_FP263 264; Split operand265define <vscale x 4 x float> @scvtf_s_nxv4i64(<vscale x 4 x i64> %a) {266; CHECK-LABEL: scvtf_s_nxv4i64:267; CHECK: // %bb.0:268; CHECK-NEXT: ptrue p0.d269; CHECK-NEXT: scvtf z1.s, p0/m, z1.d270; CHECK-NEXT: scvtf z0.s, p0/m, z0.d271; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s272; CHECK-NEXT: ret273 %res = sitofp <vscale x 4 x i64> %a to <vscale x 4 x float>274 ret <vscale x 4 x float> %res275}276 277define <vscale x 8 x half> @scvtf_h_nxv8i64(<vscale x 8 x i64> %a) {278; CHECK-LABEL: scvtf_h_nxv8i64:279; CHECK: // %bb.0:280; CHECK-NEXT: ptrue p0.d281; CHECK-NEXT: scvtf z3.h, p0/m, z3.d282; CHECK-NEXT: scvtf z2.h, p0/m, z2.d283; CHECK-NEXT: scvtf z1.h, p0/m, z1.d284; CHECK-NEXT: scvtf z0.h, p0/m, z0.d285; CHECK-NEXT: uzp1 z2.s, z2.s, z3.s286; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s287; CHECK-NEXT: uzp1 z0.h, z0.h, z2.h288; CHECK-NEXT: ret289 %res = sitofp <vscale x 8 x i64> %a to <vscale x 8 x half>290 ret <vscale x 8 x half> %res291}292 293; Split result294define <vscale x 16 x float> @scvtf_s_nxv16i8(<vscale x 16 x i8> %a) {295; CHECK-LABEL: scvtf_s_nxv16i8:296; CHECK: // %bb.0:297; CHECK-NEXT: sunpklo z1.h, z0.b298; CHECK-NEXT: sunpkhi z0.h, z0.b299; CHECK-NEXT: ptrue p0.s300; CHECK-NEXT: sunpklo z2.s, z1.h301; CHECK-NEXT: sunpkhi z1.s, z1.h302; CHECK-NEXT: sunpklo z3.s, z0.h303; CHECK-NEXT: sunpkhi z4.s, z0.h304; CHECK-NEXT: scvtf z1.s, p0/m, z1.s305; CHECK-NEXT: movprfx z0, z2306; CHECK-NEXT: scvtf z0.s, p0/m, z2.s307; CHECK-NEXT: movprfx z2, z3308; CHECK-NEXT: scvtf z2.s, p0/m, z3.s309; CHECK-NEXT: movprfx z3, z4310; CHECK-NEXT: scvtf z3.s, p0/m, z4.s311; CHECK-NEXT: ret312 %res = sitofp <vscale x 16 x i8> %a to <vscale x 16 x float>313 ret <vscale x 16 x float> %res314}315 316define <vscale x 4 x double> @scvtf_d_nxv4i32(<vscale x 4 x i32> %a) {317; CHECK-LABEL: scvtf_d_nxv4i32:318; CHECK: // %bb.0:319; CHECK-NEXT: sunpklo z1.d, z0.s320; CHECK-NEXT: sunpkhi z2.d, z0.s321; CHECK-NEXT: ptrue p0.d322; CHECK-NEXT: movprfx z0, z1323; CHECK-NEXT: scvtf z0.d, p0/m, z1.d324; CHECK-NEXT: movprfx z1, z2325; CHECK-NEXT: scvtf z1.d, p0/m, z2.d326; CHECK-NEXT: ret327 %res = sitofp <vscale x 4 x i32> %a to <vscale x 4 x double>328 ret <vscale x 4 x double> %res329}330 331define <vscale x 4 x double> @scvtf_d_nxv4i1(<vscale x 4 x i1> %a) {332; CHECK-LABEL: scvtf_d_nxv4i1:333; CHECK: // %bb.0:334; CHECK-NEXT: movi v0.2d, #0000000000000000335; CHECK-NEXT: movi v1.2d, #0000000000000000336; CHECK-NEXT: punpklo p1.h, p0.b337; CHECK-NEXT: punpkhi p0.h, p0.b338; CHECK-NEXT: fmov z0.d, p1/m, #-1.00000000339; CHECK-NEXT: fmov z1.d, p0/m, #-1.00000000340; CHECK-NEXT: ret341 %res = sitofp <vscale x 4 x i1> %a to <vscale x 4 x double>342 ret <vscale x 4 x double> %res343}344 345; UINT_TO_FP346 347; Split operand348define <vscale x 4 x float> @ucvtf_s_nxv4i64(<vscale x 4 x i64> %a) {349; CHECK-LABEL: ucvtf_s_nxv4i64:350; CHECK: // %bb.0:351; CHECK-NEXT: ptrue p0.d352; CHECK-NEXT: ucvtf z1.s, p0/m, z1.d353; CHECK-NEXT: ucvtf z0.s, p0/m, z0.d354; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s355; CHECK-NEXT: ret356 %res = uitofp <vscale x 4 x i64> %a to <vscale x 4 x float>357 ret <vscale x 4 x float> %res358}359 360define <vscale x 8 x half> @ucvtf_h_nxv8i64(<vscale x 8 x i64> %a) {361; CHECK-LABEL: ucvtf_h_nxv8i64:362; CHECK: // %bb.0:363; CHECK-NEXT: ptrue p0.d364; CHECK-NEXT: ucvtf z3.h, p0/m, z3.d365; CHECK-NEXT: ucvtf z2.h, p0/m, z2.d366; CHECK-NEXT: ucvtf z1.h, p0/m, z1.d367; CHECK-NEXT: ucvtf z0.h, p0/m, z0.d368; CHECK-NEXT: uzp1 z2.s, z2.s, z3.s369; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s370; CHECK-NEXT: uzp1 z0.h, z0.h, z2.h371; CHECK-NEXT: ret372 %res = uitofp <vscale x 8 x i64> %a to <vscale x 8 x half>373 ret <vscale x 8 x half> %res374}375 376; Split result377define <vscale x 4 x double> @ucvtf_d_nxv4i32(<vscale x 4 x i32> %a) {378; CHECK-LABEL: ucvtf_d_nxv4i32:379; CHECK: // %bb.0:380; CHECK-NEXT: uunpklo z1.d, z0.s381; CHECK-NEXT: uunpkhi z2.d, z0.s382; CHECK-NEXT: ptrue p0.d383; CHECK-NEXT: movprfx z0, z1384; CHECK-NEXT: ucvtf z0.d, p0/m, z1.d385; CHECK-NEXT: movprfx z1, z2386; CHECK-NEXT: ucvtf z1.d, p0/m, z2.d387; CHECK-NEXT: ret388 %res = uitofp <vscale x 4 x i32> %a to <vscale x 4 x double>389 ret <vscale x 4 x double> %res390}391 392define <vscale x 4 x double> @ucvtf_d_nxv4i1(<vscale x 4 x i1> %a) {393; CHECK-LABEL: ucvtf_d_nxv4i1:394; CHECK: // %bb.0:395; CHECK-NEXT: movi v0.2d, #0000000000000000396; CHECK-NEXT: movi v1.2d, #0000000000000000397; CHECK-NEXT: punpklo p1.h, p0.b398; CHECK-NEXT: punpkhi p0.h, p0.b399; CHECK-NEXT: fmov z0.d, p1/m, #1.00000000400; CHECK-NEXT: fmov z1.d, p0/m, #1.00000000401; CHECK-NEXT: ret402 %res = uitofp <vscale x 4 x i1> %a to <vscale x 4 x double>403 ret <vscale x 4 x double> %res404}405