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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=aarch64 -mattr=+sve2 -aarch64-streaming-hazard-size=0 | FileCheck %s --check-prefixes=CHECK-COMMON,CHECK3; RUN: llc < %s -mtriple=aarch64 -mattr=+sve2 -aarch64-streaming-hazard-size=0 -aarch64-new-sme-abi | FileCheck %s --check-prefixes=CHECK-COMMON,CHECK-NEWLOWERING4; RUN: llc < %s -mtriple=aarch64 -mattr=+sve2 -aarch64-streaming-hazard-size=0 -pass-remarks-analysis=stack-frame-layout 2>&1 >/dev/null | FileCheck %s --check-prefixes=CHECK-FRAMELAYOUT5 6; CHECK-FRAMELAYOUT-LABEL: Function: csr_d8_allocnxv4i32i32f647; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-8], Type: Spill, Align: 8, Size: 88; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16], Type: Spill, Align: 8, Size: 89; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16-16 x vscale], Type: Variable, Align: 16, Size: vscale x 1610; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-20-16 x vscale], Type: Variable, Align: 4, Size: 411; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32-16 x vscale], Type: Variable, Align: 8, Size: 812 13define i32 @csr_d8_allocnxv4i32i32f64(double %d) "aarch64_pstate_sm_compatible" {14; CHECK-COMMON-LABEL: csr_d8_allocnxv4i32i32f64:15; CHECK-COMMON: // %bb.0: // %entry16; CHECK-COMMON-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill17; CHECK-COMMON-NEXT: str x29, [sp, #8] // 8-byte Spill18; CHECK-COMMON-NEXT: sub sp, sp, #1619; CHECK-COMMON-NEXT: addvl sp, sp, #-120; CHECK-COMMON-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x20, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22 // sp + 32 + 8 * VG21; CHECK-COMMON-NEXT: .cfi_offset w29, -822; CHECK-COMMON-NEXT: .cfi_offset b8, -1623; CHECK-COMMON-NEXT: mov z1.s, #0 // =0x024; CHECK-COMMON-NEXT: add x8, sp, #1625; CHECK-COMMON-NEXT: mov w0, wzr26; CHECK-COMMON-NEXT: //APP27; CHECK-COMMON-NEXT: //NO_APP28; CHECK-COMMON-NEXT: str wzr, [sp, #12]29; CHECK-COMMON-NEXT: str d0, [sp]30; CHECK-COMMON-NEXT: str z1, [x8]31; CHECK-COMMON-NEXT: addvl sp, sp, #132; CHECK-COMMON-NEXT: add sp, sp, #1633; CHECK-COMMON-NEXT: ldr x29, [sp, #8] // 8-byte Reload34; CHECK-COMMON-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload35; CHECK-COMMON-NEXT: ret36; CHECK-COMMON-NE37entry:38 %a = alloca <vscale x 4 x i32>39 %b = alloca i3240 %c = alloca double41 tail call void asm sideeffect "", "~{d8}"() #142 store <vscale x 4 x i32> zeroinitializer, ptr %a43 store i32 zeroinitializer, ptr %b44 store double %d, ptr %c45 ret i32 046}47 48; CHECK-FRAMELAYOUT-LABEL: Function: csr_d8_allocnxv4i32i32f64_fp49; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-8], Type: Spill, Align: 8, Size: 850; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16], Type: Spill, Align: 8, Size: 851; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-20], Type: Variable, Align: 4, Size: 452; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32], Type: Spill, Align: 16, Size: 853; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32-16 x vscale], Type: Variable, Align: 16, Size: vscale x 1654; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-40-16 x vscale], Type: Variable, Align: 8, Size: 855 56define i32 @csr_d8_allocnxv4i32i32f64_fp(double %d) "aarch64_pstate_sm_compatible" "frame-pointer"="all" {57; CHECK-COMMON-LABEL: csr_d8_allocnxv4i32i32f64_fp:58; CHECK-COMMON: // %bb.0: // %entry59; CHECK-COMMON-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill60; CHECK-COMMON-NEXT: stp x29, x30, [sp, #16] // 16-byte Folded Spill61; CHECK-COMMON-NEXT: add x29, sp, #1662; CHECK-COMMON-NEXT: sub sp, sp, #1663; CHECK-COMMON-NEXT: addvl sp, sp, #-164; CHECK-COMMON-NEXT: .cfi_def_cfa w29, 1665; CHECK-COMMON-NEXT: .cfi_offset w30, -866; CHECK-COMMON-NEXT: .cfi_offset w29, -1667; CHECK-COMMON-NEXT: .cfi_offset b8, -3268; CHECK-COMMON-NEXT: mov z1.s, #0 // =0x069; CHECK-COMMON-NEXT: addvl x8, sp, #170; CHECK-COMMON-NEXT: //APP71; CHECK-COMMON-NEXT: //NO_APP72; CHECK-COMMON-NEXT: str wzr, [x8, #28]73; CHECK-COMMON-NEXT: sub x8, x29, #1674; CHECK-COMMON-NEXT: mov w0, wzr75; CHECK-COMMON-NEXT: str d0, [sp, #8]76; CHECK-COMMON-NEXT: str z1, [x8, #-1, mul vl]77; CHECK-COMMON-NEXT: addvl sp, sp, #178; CHECK-COMMON-NEXT: add sp, sp, #1679; CHECK-COMMON-NEXT: ldp x29, x30, [sp, #16] // 16-byte Folded Reload80; CHECK-COMMON-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload81; CHECK-COMMON-NEXT: ret82entry:83 %a = alloca <vscale x 4 x i32>84 %b = alloca i3285 %c = alloca double86 tail call void asm sideeffect "", "~{d8}"() #187 store <vscale x 4 x i32> zeroinitializer, ptr %a88 store i32 zeroinitializer, ptr %b89 store double %d, ptr %c90 ret i32 091}92 93; In the presence of dynamic stack-realignment we emit correct offsets for94; objects which are not realigned. For realigned objects, e.g. the i32 alloca95; in this test, we emit the correct offset ignoring the re-alignment (i.e. the96; offset if the alignment requirement is already satisfied).97 98; CHECK-FRAMELAYOUT-LABEL: Function: csr_d8_allocnxv4i32i32f64_dynamicrealign99; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-8], Type: Spill, Align: 8, Size: 8100; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16], Type: Spill, Align: 8, Size: 8101; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-24], Type: Variable, Align: 8, Size: 8102; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32], Type: Spill, Align: 16, Size: 8103; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32-16 x vscale], Type: Variable, Align: 16, Size: vscale x 16104; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-128-16 x vscale], Type: Variable, Align: 128, Size: 4105 106define i32 @csr_d8_allocnxv4i32i32f64_dynamicrealign(double %d) "aarch64_pstate_sm_compatible" {107; CHECK-COMMON-LABEL: csr_d8_allocnxv4i32i32f64_dynamicrealign:108; CHECK-COMMON: // %bb.0: // %entry109; CHECK-COMMON-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill110; CHECK-COMMON-NEXT: sub x9, sp, #96111; CHECK-COMMON-NEXT: stp x29, x30, [sp, #16] // 16-byte Folded Spill112; CHECK-COMMON-NEXT: add x29, sp, #16113; CHECK-COMMON-NEXT: addvl x9, x9, #-1114; CHECK-COMMON-NEXT: and sp, x9, #0xffffffffffffff80115; CHECK-COMMON-NEXT: .cfi_def_cfa w29, 16116; CHECK-COMMON-NEXT: .cfi_offset w30, -8117; CHECK-COMMON-NEXT: .cfi_offset w29, -16118; CHECK-COMMON-NEXT: .cfi_offset b8, -32119; CHECK-COMMON-NEXT: mov z1.s, #0 // =0x0120; CHECK-COMMON-NEXT: sub x8, x29, #16121; CHECK-COMMON-NEXT: mov w0, wzr122; CHECK-COMMON-NEXT: //APP123; CHECK-COMMON-NEXT: //NO_APP124; CHECK-COMMON-NEXT: str wzr, [sp]125; CHECK-COMMON-NEXT: stur d0, [x29, #-8]126; CHECK-COMMON-NEXT: str z1, [x8, #-1, mul vl]127; CHECK-COMMON-NEXT: sub sp, x29, #16128; CHECK-COMMON-NEXT: ldp x29, x30, [sp, #16] // 16-byte Folded Reload129; CHECK-COMMON-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload130; CHECK-COMMON-NEXT: ret131entry:132 %a = alloca <vscale x 4 x i32>133 %b = alloca i32, align 128134 %c = alloca double135 tail call void asm sideeffect "", "~{d8}"() #1136 store <vscale x 4 x i32> zeroinitializer, ptr %a137 store i32 zeroinitializer, ptr %b138 store double %d, ptr %c139 ret i32 0140}141 142; In the presence of VLA-area objects, we emit correct offsets for all objects143; except for these VLA objects.144 145; CHECK-FRAMELAYOUT-LABEL: Function: csr_d8_allocnxv4i32i32f64_vla146; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-8], Type: Spill, Align: 8, Size: 8147; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16], Type: Spill, Align: 8, Size: 8148; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-24], Type: Spill, Align: 8, Size: 8149; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32], Type: Spill, Align: 8, Size: 8150; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32-16 x vscale], Type: Variable, Align: 16, Size: vscale x 16151; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-40-16 x vscale], Type: Variable, Align: 8, Size: 8152; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-48-16 x vscale], Type: VariableSized, Align: 1, Size: 0153; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-48-16 x vscale], Type: VariableSized, Align: 1, Size: 0154 155define i32 @csr_d8_allocnxv4i32i32f64_vla(double %d, i32 %i) "aarch64_pstate_sm_compatible" {156; CHECK-COMMON-LABEL: csr_d8_allocnxv4i32i32f64_vla:157; CHECK-COMMON: // %bb.0: // %entry158; CHECK-COMMON-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill159; CHECK-COMMON-NEXT: stp x29, x30, [sp, #8] // 16-byte Folded Spill160; CHECK-COMMON-NEXT: add x29, sp, #8161; CHECK-COMMON-NEXT: str x19, [sp, #24] // 8-byte Spill162; CHECK-COMMON-NEXT: sub sp, sp, #16163; CHECK-COMMON-NEXT: addvl sp, sp, #-1164; CHECK-COMMON-NEXT: mov x19, sp165; CHECK-COMMON-NEXT: .cfi_def_cfa w29, 24166; CHECK-COMMON-NEXT: .cfi_offset w19, -8167; CHECK-COMMON-NEXT: .cfi_offset w30, -16168; CHECK-COMMON-NEXT: .cfi_offset w29, -24169; CHECK-COMMON-NEXT: .cfi_offset b8, -32170; CHECK-COMMON-NEXT: // kill: def $w0 killed $w0 def $x0171; CHECK-COMMON-NEXT: ubfiz x8, x0, #2, #32172; CHECK-COMMON-NEXT: mov x9, sp173; CHECK-COMMON-NEXT: add x8, x8, #15174; CHECK-COMMON-NEXT: and x8, x8, #0x7fffffff0175; CHECK-COMMON-NEXT: sub x9, x9, x8176; CHECK-COMMON-NEXT: mov sp, x9177; CHECK-COMMON-NEXT: mov x10, sp178; CHECK-COMMON-NEXT: sub x8, x10, x8179; CHECK-COMMON-NEXT: mov sp, x8180; CHECK-COMMON-NEXT: mov z1.s, #0 // =0x0181; CHECK-COMMON-NEXT: //APP182; CHECK-COMMON-NEXT: //NO_APP183; CHECK-COMMON-NEXT: str wzr, [x8]184; CHECK-COMMON-NEXT: sub x8, x29, #8185; CHECK-COMMON-NEXT: mov w0, wzr186; CHECK-COMMON-NEXT: str wzr, [x9]187; CHECK-COMMON-NEXT: str d0, [x19, #8]188; CHECK-COMMON-NEXT: str z1, [x8, #-1, mul vl]189; CHECK-COMMON-NEXT: sub sp, x29, #8190; CHECK-COMMON-NEXT: ldp x29, x30, [sp, #8] // 16-byte Folded Reload191; CHECK-COMMON-NEXT: ldr x19, [sp, #24] // 8-byte Reload192; CHECK-COMMON-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload193; CHECK-COMMON-NEXT: ret194entry:195 %a = alloca <vscale x 4 x i32>196 %0 = zext i32 %i to i64197 %vla0 = alloca i32, i64 %0198 %vla1 = alloca i32, i64 %0199 %c = alloca double200 tail call void asm sideeffect "", "~{d8}"() #1201 store <vscale x 4 x i32> zeroinitializer, ptr %a202 store i32 zeroinitializer, ptr %vla0203 store i32 zeroinitializer, ptr %vla1204 store double %d, ptr %c205 ret i32 0206}207 208; CHECK-FRAMELAYOUT-LABEL: Function: csr_d8_allocnxv4i32i32f64_stackargsi32f64209; CHECK-FRAMELAYOUT-NEXT: Offset: [SP+8], Type: Fixed, Align: 8, Size: 4210; CHECK-FRAMELAYOUT-NEXT: Offset: [SP+0], Type: Fixed, Align: 16, Size: 8211; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-8], Type: Spill, Align: 8, Size: 8212; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16], Type: Spill, Align: 8, Size: 8213; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16-16 x vscale], Type: Variable, Align: 16, Size: vscale x 16214; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-20-16 x vscale], Type: Variable, Align: 4, Size: 4215; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32-16 x vscale], Type: Variable, Align: 8, Size: 8216 217define i32 @csr_d8_allocnxv4i32i32f64_stackargsi32f64(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, i32 %i0, i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8) "aarch64_pstate_sm_compatible" {218; CHECK-COMMON-LABEL: csr_d8_allocnxv4i32i32f64_stackargsi32f64:219; CHECK-COMMON: // %bb.0: // %entry220; CHECK-COMMON-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill221; CHECK-COMMON-NEXT: str x29, [sp, #8] // 8-byte Spill222; CHECK-COMMON-NEXT: sub sp, sp, #16223; CHECK-COMMON-NEXT: addvl sp, sp, #-1224; CHECK-COMMON-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x20, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22 // sp + 32 + 8 * VG225; CHECK-COMMON-NEXT: .cfi_offset w29, -8226; CHECK-COMMON-NEXT: .cfi_offset b8, -16227; CHECK-COMMON-NEXT: mov z1.s, #0 // =0x0228; CHECK-COMMON-NEXT: add x8, sp, #16229; CHECK-COMMON-NEXT: mov w0, wzr230; CHECK-COMMON-NEXT: //APP231; CHECK-COMMON-NEXT: //NO_APP232; CHECK-COMMON-NEXT: str wzr, [sp, #12]233; CHECK-COMMON-NEXT: str d0, [sp]234; CHECK-COMMON-NEXT: str z1, [x8]235; CHECK-COMMON-NEXT: addvl sp, sp, #1236; CHECK-COMMON-NEXT: add sp, sp, #16237; CHECK-COMMON-NEXT: ldr x29, [sp, #8] // 8-byte Reload238; CHECK-COMMON-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload239; CHECK-COMMON-NEXT: ret240entry:241 %a = alloca <vscale x 4 x i32>242 %b = alloca i32243 %c = alloca double244 tail call void asm sideeffect "", "~{d8}"() #1245 store <vscale x 4 x i32> zeroinitializer, ptr %a246 store i32 zeroinitializer, ptr %b247 store double %d0, ptr %c248 ret i32 0249}250 251; CHECK-FRAMELAYOUT-LABEL: Function: svecc_z8_allocnxv4i32i32f64_fp252; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-8], Type: Spill, Align: 8, Size: 8253; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16], Type: Spill, Align: 8, Size: 8254; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16-16 x vscale], Type: Spill, Align: 16, Size: vscale x 16255; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16-32 x vscale], Type: Variable, Align: 16, Size: vscale x 16256; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-20-32 x vscale], Type: Variable, Align: 4, Size: 4257; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32-32 x vscale], Type: Variable, Align: 8, Size: 8258 259define i32 @svecc_z8_allocnxv4i32i32f64_fp(double %d, <vscale x 4 x i32> %v) "aarch64_pstate_sm_compatible" "frame-pointer"="all" {260; CHECK-COMMON-LABEL: svecc_z8_allocnxv4i32i32f64_fp:261; CHECK-COMMON: // %bb.0: // %entry262; CHECK-COMMON-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill263; CHECK-COMMON-NEXT: mov x29, sp264; CHECK-COMMON-NEXT: addvl sp, sp, #-1265; CHECK-COMMON-NEXT: str z8, [sp] // 16-byte Folded Spill266; CHECK-COMMON-NEXT: sub sp, sp, #16267; CHECK-COMMON-NEXT: addvl sp, sp, #-1268; CHECK-COMMON-NEXT: .cfi_def_cfa w29, 16269; CHECK-COMMON-NEXT: .cfi_offset w30, -8270; CHECK-COMMON-NEXT: .cfi_offset w29, -16271; CHECK-COMMON-NEXT: .cfi_escape 0x10, 0x48, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d8 @ cfa - 8 * VG - 16272; CHECK-COMMON-NEXT: mov w0, wzr273; CHECK-COMMON-NEXT: //APP274; CHECK-COMMON-NEXT: //NO_APP275; CHECK-COMMON-NEXT: str wzr, [sp, #12]276; CHECK-COMMON-NEXT: str z1, [x29, #-2, mul vl]277; CHECK-COMMON-NEXT: str d0, [sp], #16278; CHECK-COMMON-NEXT: addvl sp, sp, #1279; CHECK-COMMON-NEXT: ldr z8, [sp] // 16-byte Folded Reload280; CHECK-COMMON-NEXT: addvl sp, sp, #1281; CHECK-COMMON-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload282; CHECK-COMMON-NEXT: ret283entry:284 %a = alloca <vscale x 4 x i32>285 %b = alloca i32286 %c = alloca double287 tail call void asm sideeffect "", "~{d8}"() #1288 store <vscale x 4 x i32> %v, ptr %a289 store i32 zeroinitializer, ptr %b290 store double %d, ptr %c291 ret i32 0292}293 294; CHECK-FRAMELAYOUT-LABEL: Function: svecc_z8_allocnxv4i32i32f64_stackargsi32_fp295; CHECK-FRAMELAYOUT-NEXT: Offset: [SP+0], Type: Fixed, Align: 16, Size: 4296; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-8], Type: Spill, Align: 8, Size: 8297; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16], Type: Spill, Align: 8, Size: 8298; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16-16 x vscale], Type: Spill, Align: 16, Size: vscale x 16299; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16-32 x vscale], Type: Variable, Align: 16, Size: vscale x 16300; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-20-32 x vscale], Type: Variable, Align: 4, Size: 4301; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32-32 x vscale], Type: Variable, Align: 8, Size: 8302 303define i32 @svecc_z8_allocnxv4i32i32f64_stackargsi32_fp(double %d, i32 %i0, i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, <vscale x 4 x i32> %v) "aarch64_pstate_sm_compatible" "frame-pointer"="all"{304; CHECK-COMMON-LABEL: svecc_z8_allocnxv4i32i32f64_stackargsi32_fp:305; CHECK-COMMON: // %bb.0: // %entry306; CHECK-COMMON-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill307; CHECK-COMMON-NEXT: mov x29, sp308; CHECK-COMMON-NEXT: addvl sp, sp, #-1309; CHECK-COMMON-NEXT: str z8, [sp] // 16-byte Folded Spill310; CHECK-COMMON-NEXT: sub sp, sp, #16311; CHECK-COMMON-NEXT: addvl sp, sp, #-1312; CHECK-COMMON-NEXT: .cfi_def_cfa w29, 16313; CHECK-COMMON-NEXT: .cfi_offset w30, -8314; CHECK-COMMON-NEXT: .cfi_offset w29, -16315; CHECK-COMMON-NEXT: .cfi_escape 0x10, 0x48, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d8 @ cfa - 8 * VG - 16316; CHECK-COMMON-NEXT: mov w0, wzr317; CHECK-COMMON-NEXT: //APP318; CHECK-COMMON-NEXT: //NO_APP319; CHECK-COMMON-NEXT: str wzr, [sp, #12]320; CHECK-COMMON-NEXT: str z1, [x29, #-2, mul vl]321; CHECK-COMMON-NEXT: str d0, [sp], #16322; CHECK-COMMON-NEXT: addvl sp, sp, #1323; CHECK-COMMON-NEXT: ldr z8, [sp] // 16-byte Folded Reload324; CHECK-COMMON-NEXT: addvl sp, sp, #1325; CHECK-COMMON-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload326; CHECK-COMMON-NEXT: ret327entry:328 %a = alloca <vscale x 4 x i32>329 %b = alloca i32330 %c = alloca double331 tail call void asm sideeffect "", "~{d8}"() #1332 store <vscale x 4 x i32> %v, ptr %a333 store i32 zeroinitializer, ptr %b334 store double %d, ptr %c335 ret i32 0336}337 338; CHECK-FRAMELAYOUT-LABEL: Function: svecc_call339; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-8], Type: Spill, Align: 8, Size: 8340; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16], Type: Spill, Align: 8, Size: 8341; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-24], Type: Spill, Align: 8, Size: 8342; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32], Type: Spill, Align: 8, Size: 8343; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-48], Type: Spill, Align: 16, Size: 8344; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-56], Type: Spill, Align: 8, Size: 8345; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64], Type: Spill, Align: 8, Size: 8346; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-16 x vscale], Type: Spill, Align: 16, Size: vscale x 16347; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-32 x vscale], Type: Spill, Align: 16, Size: vscale x 16348; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-48 x vscale], Type: Spill, Align: 16, Size: vscale x 16349; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-64 x vscale], Type: Spill, Align: 16, Size: vscale x 16350; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-80 x vscale], Type: Spill, Align: 16, Size: vscale x 16351; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-96 x vscale], Type: Spill, Align: 16, Size: vscale x 16352; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-112 x vscale], Type: Spill, Align: 16, Size: vscale x 16353; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-128 x vscale], Type: Spill, Align: 16, Size: vscale x 16354; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-144 x vscale], Type: Spill, Align: 16, Size: vscale x 16355; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-160 x vscale], Type: Spill, Align: 16, Size: vscale x 16356; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-176 x vscale], Type: Spill, Align: 16, Size: vscale x 16357; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-192 x vscale], Type: Spill, Align: 16, Size: vscale x 16358; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-208 x vscale], Type: Spill, Align: 16, Size: vscale x 16359; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-224 x vscale], Type: Spill, Align: 16, Size: vscale x 16360; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-240 x vscale], Type: Spill, Align: 16, Size: vscale x 16361; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-256 x vscale], Type: Spill, Align: 16, Size: vscale x 16362; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-258 x vscale], Type: Spill, Align: 2, Size: vscale x 2363; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-260 x vscale], Type: Spill, Align: 2, Size: vscale x 2364; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-262 x vscale], Type: Spill, Align: 2, Size: vscale x 2365; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-264 x vscale], Type: Spill, Align: 2, Size: vscale x 2366; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-266 x vscale], Type: Spill, Align: 2, Size: vscale x 2367; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-268 x vscale], Type: Spill, Align: 2, Size: vscale x 2368; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-270 x vscale], Type: Spill, Align: 2, Size: vscale x 2369; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-272 x vscale], Type: Spill, Align: 2, Size: vscale x 2370; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-274 x vscale], Type: Spill, Align: 2, Size: vscale x 2371; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-276 x vscale], Type: Spill, Align: 2, Size: vscale x 2372; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-278 x vscale], Type: Spill, Align: 2, Size: vscale x 2373; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64-280 x vscale], Type: Spill, Align: 2, Size: vscale x 2374 375define i32 @svecc_call(<4 x i16> %P0, ptr %P1, i32 %P2, <vscale x 16 x i8> %P3, i16 %P4) "aarch64_pstate_sm_compatible" {376; CHECK-COMMON-LABEL: svecc_call:377; CHECK-COMMON: // %bb.0: // %entry378; CHECK-COMMON-NEXT: stp x29, x30, [sp, #-64]! // 16-byte Folded Spill379; CHECK-COMMON-NEXT: .cfi_def_cfa_offset 64380; CHECK-COMMON-NEXT: cntd x9381; CHECK-COMMON-NEXT: stp x28, x27, [sp, #32] // 16-byte Folded Spill382; CHECK-COMMON-NEXT: str x9, [sp, #16] // 8-byte Spill383; CHECK-COMMON-NEXT: stp x26, x19, [sp, #48] // 16-byte Folded Spill384; CHECK-COMMON-NEXT: mov x29, sp385; CHECK-COMMON-NEXT: .cfi_def_cfa w29, 64386; CHECK-COMMON-NEXT: .cfi_offset w19, -8387; CHECK-COMMON-NEXT: .cfi_offset w26, -16388; CHECK-COMMON-NEXT: .cfi_offset w27, -24389; CHECK-COMMON-NEXT: .cfi_offset w28, -32390; CHECK-COMMON-NEXT: .cfi_offset vg, -48391; CHECK-COMMON-NEXT: .cfi_offset w30, -56392; CHECK-COMMON-NEXT: .cfi_offset w29, -64393; CHECK-COMMON-NEXT: addvl sp, sp, #-18394; CHECK-COMMON-NEXT: str p15, [sp, #4, mul vl] // 2-byte Spill395; CHECK-COMMON-NEXT: str p14, [sp, #5, mul vl] // 2-byte Spill396; CHECK-COMMON-NEXT: str p13, [sp, #6, mul vl] // 2-byte Spill397; CHECK-COMMON-NEXT: str p12, [sp, #7, mul vl] // 2-byte Spill398; CHECK-COMMON-NEXT: str p11, [sp, #8, mul vl] // 2-byte Spill399; CHECK-COMMON-NEXT: str p10, [sp, #9, mul vl] // 2-byte Spill400; CHECK-COMMON-NEXT: str p9, [sp, #10, mul vl] // 2-byte Spill401; CHECK-COMMON-NEXT: str p8, [sp, #11, mul vl] // 2-byte Spill402; CHECK-COMMON-NEXT: str p7, [sp, #12, mul vl] // 2-byte Spill403; CHECK-COMMON-NEXT: str p6, [sp, #13, mul vl] // 2-byte Spill404; CHECK-COMMON-NEXT: str p5, [sp, #14, mul vl] // 2-byte Spill405; CHECK-COMMON-NEXT: str p4, [sp, #15, mul vl] // 2-byte Spill406; CHECK-COMMON-NEXT: str z23, [sp, #2, mul vl] // 16-byte Folded Spill407; CHECK-COMMON-NEXT: str z22, [sp, #3, mul vl] // 16-byte Folded Spill408; CHECK-COMMON-NEXT: str z21, [sp, #4, mul vl] // 16-byte Folded Spill409; CHECK-COMMON-NEXT: str z20, [sp, #5, mul vl] // 16-byte Folded Spill410; CHECK-COMMON-NEXT: str z19, [sp, #6, mul vl] // 16-byte Folded Spill411; CHECK-COMMON-NEXT: str z18, [sp, #7, mul vl] // 16-byte Folded Spill412; CHECK-COMMON-NEXT: str z17, [sp, #8, mul vl] // 16-byte Folded Spill413; CHECK-COMMON-NEXT: str z16, [sp, #9, mul vl] // 16-byte Folded Spill414; CHECK-COMMON-NEXT: str z15, [sp, #10, mul vl] // 16-byte Folded Spill415; CHECK-COMMON-NEXT: str z14, [sp, #11, mul vl] // 16-byte Folded Spill416; CHECK-COMMON-NEXT: str z13, [sp, #12, mul vl] // 16-byte Folded Spill417; CHECK-COMMON-NEXT: str z12, [sp, #13, mul vl] // 16-byte Folded Spill418; CHECK-COMMON-NEXT: str z11, [sp, #14, mul vl] // 16-byte Folded Spill419; CHECK-COMMON-NEXT: str z10, [sp, #15, mul vl] // 16-byte Folded Spill420; CHECK-COMMON-NEXT: str z9, [sp, #16, mul vl] // 16-byte Folded Spill421; CHECK-COMMON-NEXT: str z8, [sp, #17, mul vl] // 16-byte Folded Spill422; CHECK-COMMON-NEXT: .cfi_escape 0x10, 0x48, 0x0c, 0x12, 0x11, 0x50, 0x22, 0x06, 0x11, 0x78, 0x1e, 0x22, 0x11, 0x40, 0x22 // $d8 @ cfa - 8 * IncomingVG - 64423; CHECK-COMMON-NEXT: .cfi_escape 0x10, 0x49, 0x0c, 0x12, 0x11, 0x50, 0x22, 0x06, 0x11, 0x70, 0x1e, 0x22, 0x11, 0x40, 0x22 // $d9 @ cfa - 16 * IncomingVG - 64424; CHECK-COMMON-NEXT: .cfi_escape 0x10, 0x4a, 0x0c, 0x12, 0x11, 0x50, 0x22, 0x06, 0x11, 0x68, 0x1e, 0x22, 0x11, 0x40, 0x22 // $d10 @ cfa - 24 * IncomingVG - 64425; CHECK-COMMON-NEXT: .cfi_escape 0x10, 0x4b, 0x0c, 0x12, 0x11, 0x50, 0x22, 0x06, 0x11, 0x60, 0x1e, 0x22, 0x11, 0x40, 0x22 // $d11 @ cfa - 32 * IncomingVG - 64426; CHECK-COMMON-NEXT: .cfi_escape 0x10, 0x4c, 0x0c, 0x12, 0x11, 0x50, 0x22, 0x06, 0x11, 0x58, 0x1e, 0x22, 0x11, 0x40, 0x22 // $d12 @ cfa - 40 * IncomingVG - 64427; CHECK-COMMON-NEXT: .cfi_escape 0x10, 0x4d, 0x0c, 0x12, 0x11, 0x50, 0x22, 0x06, 0x11, 0x50, 0x1e, 0x22, 0x11, 0x40, 0x22 // $d13 @ cfa - 48 * IncomingVG - 64428; CHECK-COMMON-NEXT: .cfi_escape 0x10, 0x4e, 0x0c, 0x12, 0x11, 0x50, 0x22, 0x06, 0x11, 0x48, 0x1e, 0x22, 0x11, 0x40, 0x22 // $d14 @ cfa - 56 * IncomingVG - 64429; CHECK-COMMON-NEXT: .cfi_escape 0x10, 0x4f, 0x0c, 0x12, 0x11, 0x50, 0x22, 0x06, 0x11, 0x40, 0x1e, 0x22, 0x11, 0x40, 0x22 // $d15 @ cfa - 64 * IncomingVG - 64430; CHECK-COMMON-NEXT: mov x8, x0431; CHECK-COMMON-NEXT: bl __arm_sme_state432; CHECK-COMMON-NEXT: mov x19, x0433; CHECK-COMMON-NEXT: //APP434; CHECK-COMMON-NEXT: //NO_APP435; CHECK-COMMON-NEXT: tbz w19, #0, .LBB7_2436; CHECK-COMMON-NEXT: // %bb.1: // %entry437; CHECK-COMMON-NEXT: smstop sm438; CHECK-COMMON-NEXT: .LBB7_2: // %entry439; CHECK-COMMON-NEXT: mov x0, x8440; CHECK-COMMON-NEXT: mov w1, #45 // =0x2d441; CHECK-COMMON-NEXT: mov w2, #37 // =0x25442; CHECK-COMMON-NEXT: bl memset443; CHECK-COMMON-NEXT: tbz w19, #0, .LBB7_4444; CHECK-COMMON-NEXT: // %bb.3: // %entry445; CHECK-COMMON-NEXT: smstart sm446; CHECK-COMMON-NEXT: .LBB7_4: // %entry447; CHECK-COMMON-NEXT: ldr z23, [sp, #2, mul vl] // 16-byte Folded Reload448; CHECK-COMMON-NEXT: ldr z22, [sp, #3, mul vl] // 16-byte Folded Reload449; CHECK-COMMON-NEXT: mov w0, #22647 // =0x5877450; CHECK-COMMON-NEXT: ldr z21, [sp, #4, mul vl] // 16-byte Folded Reload451; CHECK-COMMON-NEXT: ldr z20, [sp, #5, mul vl] // 16-byte Folded Reload452; CHECK-COMMON-NEXT: movk w0, #59491, lsl #16453; CHECK-COMMON-NEXT: ldr z19, [sp, #6, mul vl] // 16-byte Folded Reload454; CHECK-COMMON-NEXT: ldr z18, [sp, #7, mul vl] // 16-byte Folded Reload455; CHECK-COMMON-NEXT: ldr z17, [sp, #8, mul vl] // 16-byte Folded Reload456; CHECK-COMMON-NEXT: ldr z16, [sp, #9, mul vl] // 16-byte Folded Reload457; CHECK-COMMON-NEXT: ldr z15, [sp, #10, mul vl] // 16-byte Folded Reload458; CHECK-COMMON-NEXT: ldr z14, [sp, #11, mul vl] // 16-byte Folded Reload459; CHECK-COMMON-NEXT: ldr z13, [sp, #12, mul vl] // 16-byte Folded Reload460; CHECK-COMMON-NEXT: ldr z12, [sp, #13, mul vl] // 16-byte Folded Reload461; CHECK-COMMON-NEXT: ldr z11, [sp, #14, mul vl] // 16-byte Folded Reload462; CHECK-COMMON-NEXT: ldr z10, [sp, #15, mul vl] // 16-byte Folded Reload463; CHECK-COMMON-NEXT: ldr z9, [sp, #16, mul vl] // 16-byte Folded Reload464; CHECK-COMMON-NEXT: ldr z8, [sp, #17, mul vl] // 16-byte Folded Reload465; CHECK-COMMON-NEXT: ldr p15, [sp, #4, mul vl] // 2-byte Reload466; CHECK-COMMON-NEXT: ldr p14, [sp, #5, mul vl] // 2-byte Reload467; CHECK-COMMON-NEXT: ldr p13, [sp, #6, mul vl] // 2-byte Reload468; CHECK-COMMON-NEXT: ldr p12, [sp, #7, mul vl] // 2-byte Reload469; CHECK-COMMON-NEXT: ldr p11, [sp, #8, mul vl] // 2-byte Reload470; CHECK-COMMON-NEXT: ldr p10, [sp, #9, mul vl] // 2-byte Reload471; CHECK-COMMON-NEXT: ldr p9, [sp, #10, mul vl] // 2-byte Reload472; CHECK-COMMON-NEXT: ldr p8, [sp, #11, mul vl] // 2-byte Reload473; CHECK-COMMON-NEXT: ldr p7, [sp, #12, mul vl] // 2-byte Reload474; CHECK-COMMON-NEXT: ldr p6, [sp, #13, mul vl] // 2-byte Reload475; CHECK-COMMON-NEXT: ldr p5, [sp, #14, mul vl] // 2-byte Reload476; CHECK-COMMON-NEXT: ldr p4, [sp, #15, mul vl] // 2-byte Reload477; CHECK-COMMON-NEXT: addvl sp, sp, #18478; CHECK-COMMON-NEXT: .cfi_restore z8479; CHECK-COMMON-NEXT: .cfi_restore z9480; CHECK-COMMON-NEXT: .cfi_restore z10481; CHECK-COMMON-NEXT: .cfi_restore z11482; CHECK-COMMON-NEXT: .cfi_restore z12483; CHECK-COMMON-NEXT: .cfi_restore z13484; CHECK-COMMON-NEXT: .cfi_restore z14485; CHECK-COMMON-NEXT: .cfi_restore z15486; CHECK-COMMON-NEXT: .cfi_def_cfa wsp, 64487; CHECK-COMMON-NEXT: ldp x26, x19, [sp, #48] // 16-byte Folded Reload488; CHECK-COMMON-NEXT: ldp x28, x27, [sp, #32] // 16-byte Folded Reload489; CHECK-COMMON-NEXT: ldp x29, x30, [sp], #64 // 16-byte Folded Reload490; CHECK-COMMON-NEXT: .cfi_def_cfa_offset 0491; CHECK-COMMON-NEXT: .cfi_restore w19492; CHECK-COMMON-NEXT: .cfi_restore w26493; CHECK-COMMON-NEXT: .cfi_restore w27494; CHECK-COMMON-NEXT: .cfi_restore w28495; CHECK-COMMON-NEXT: .cfi_restore vg496; CHECK-COMMON-NEXT: .cfi_restore w30497; CHECK-COMMON-NEXT: .cfi_restore w29498; CHECK-COMMON-NEXT: ret499entry:500 tail call void asm sideeffect "", "~{x0},~{x28},~{x27},~{x3}"() #2501 %call = call ptr @memset(ptr noundef nonnull %P1, i32 noundef 45, i32 noundef 37)502 ret i32 -396142473503}504declare ptr @memset(ptr, i32, i32)505 506; The VA register currently ends up in VLA space - in the presence of VLA-area507; objects, we emit correct offsets for all objects except for these VLA objects.508 509; CHECK-FRAMELAYOUT-LABEL: Function: vastate510; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-8], Type: Spill, Align: 8, Size: 8511; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-16], Type: Spill, Align: 8, Size: 8512; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-32], Type: Spill, Align: 16, Size: 8513; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-40], Type: Spill, Align: 8, Size: 8514; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-48], Type: Spill, Align: 8, Size: 8515; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-56], Type: Spill, Align: 8, Size: 8516; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-64], Type: Spill, Align: 8, Size: 8517; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-72], Type: Spill, Align: 8, Size: 8518; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-80], Type: Spill, Align: 8, Size: 8519; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-88], Type: Spill, Align: 8, Size: 8520; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-96], Type: Spill, Align: 8, Size: 8521; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-104], Type: Spill, Align: 8, Size: 8522; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-112], Type: Spill, Align: 8, Size: 8523; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-128], Type: Variable, Align: 16, Size: 16524; CHECK-FRAMELAYOUT-NEXT: Offset: [SP-128], Type: VariableSized, Align: 16, Size: 0525 526define i32 @vastate(i32 %x) "aarch64_inout_za" "aarch64_pstate_sm_enabled" "target-features"="+sme" {527; CHECK-LABEL: vastate:528; CHECK: // %bb.0: // %entry529; CHECK-NEXT: stp d15, d14, [sp, #-112]! // 16-byte Folded Spill530; CHECK-NEXT: .cfi_def_cfa_offset 112531; CHECK-NEXT: cntd x9532; CHECK-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill533; CHECK-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill534; CHECK-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill535; CHECK-NEXT: stp x29, x30, [sp, #64] // 16-byte Folded Spill536; CHECK-NEXT: str x9, [sp, #80] // 8-byte Spill537; CHECK-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill538; CHECK-NEXT: add x29, sp, #64539; CHECK-NEXT: .cfi_def_cfa w29, 48540; CHECK-NEXT: .cfi_offset w19, -8541; CHECK-NEXT: .cfi_offset w20, -16542; CHECK-NEXT: .cfi_offset vg, -32543; CHECK-NEXT: .cfi_offset w30, -40544; CHECK-NEXT: .cfi_offset w29, -48545; CHECK-NEXT: .cfi_offset b8, -56546; CHECK-NEXT: .cfi_offset b9, -64547; CHECK-NEXT: .cfi_offset b10, -72548; CHECK-NEXT: .cfi_offset b11, -80549; CHECK-NEXT: .cfi_offset b12, -88550; CHECK-NEXT: .cfi_offset b13, -96551; CHECK-NEXT: .cfi_offset b14, -104552; CHECK-NEXT: .cfi_offset b15, -112553; CHECK-NEXT: sub sp, sp, #16554; CHECK-NEXT: rdsvl x8, #1555; CHECK-NEXT: mov x9, sp556; CHECK-NEXT: mov w20, w0557; CHECK-NEXT: msub x9, x8, x8, x9558; CHECK-NEXT: mov sp, x9559; CHECK-NEXT: sub x10, x29, #80560; CHECK-NEXT: stp x9, x8, [x29, #-80]561; CHECK-NEXT: msr TPIDR2_EL0, x10562; CHECK-NEXT: smstop sm563; CHECK-NEXT: bl other564; CHECK-NEXT: smstart sm565; CHECK-NEXT: smstart za566; CHECK-NEXT: mrs x8, TPIDR2_EL0567; CHECK-NEXT: sub x0, x29, #80568; CHECK-NEXT: cbnz x8, .LBB8_2569; CHECK-NEXT: // %bb.1: // %entry570; CHECK-NEXT: bl __arm_tpidr2_restore571; CHECK-NEXT: .LBB8_2: // %entry572; CHECK-NEXT: mov w0, w20573; CHECK-NEXT: msr TPIDR2_EL0, xzr574; CHECK-NEXT: sub sp, x29, #64575; CHECK-NEXT: .cfi_def_cfa wsp, 112576; CHECK-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload577; CHECK-NEXT: ldp x29, x30, [sp, #64] // 16-byte Folded Reload578; CHECK-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload579; CHECK-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload580; CHECK-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload581; CHECK-NEXT: ldp d15, d14, [sp], #112 // 16-byte Folded Reload582; CHECK-NEXT: .cfi_def_cfa_offset 0583; CHECK-NEXT: .cfi_restore w19584; CHECK-NEXT: .cfi_restore w20585; CHECK-NEXT: .cfi_restore vg586; CHECK-NEXT: .cfi_restore w30587; CHECK-NEXT: .cfi_restore w29588; CHECK-NEXT: .cfi_restore b8589; CHECK-NEXT: .cfi_restore b9590; CHECK-NEXT: .cfi_restore b10591; CHECK-NEXT: .cfi_restore b11592; CHECK-NEXT: .cfi_restore b12593; CHECK-NEXT: .cfi_restore b13594; CHECK-NEXT: .cfi_restore b14595; CHECK-NEXT: .cfi_restore b15596; CHECK-NEXT: ret597;598; CHECK-NEWLOWERING-LABEL: vastate:599; CHECK-NEWLOWERING: // %bb.0: // %entry600; CHECK-NEWLOWERING-NEXT: stp d15, d14, [sp, #-112]! // 16-byte Folded Spill601; CHECK-NEWLOWERING-NEXT: .cfi_def_cfa_offset 112602; CHECK-NEWLOWERING-NEXT: cntd x9603; CHECK-NEWLOWERING-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill604; CHECK-NEWLOWERING-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill605; CHECK-NEWLOWERING-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill606; CHECK-NEWLOWERING-NEXT: stp x29, x30, [sp, #64] // 16-byte Folded Spill607; CHECK-NEWLOWERING-NEXT: str x9, [sp, #80] // 8-byte Spill608; CHECK-NEWLOWERING-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill609; CHECK-NEWLOWERING-NEXT: add x29, sp, #64610; CHECK-NEWLOWERING-NEXT: .cfi_def_cfa w29, 48611; CHECK-NEWLOWERING-NEXT: .cfi_offset w19, -8612; CHECK-NEWLOWERING-NEXT: .cfi_offset w20, -16613; CHECK-NEWLOWERING-NEXT: .cfi_offset vg, -32614; CHECK-NEWLOWERING-NEXT: .cfi_offset w30, -40615; CHECK-NEWLOWERING-NEXT: .cfi_offset w29, -48616; CHECK-NEWLOWERING-NEXT: .cfi_offset b8, -56617; CHECK-NEWLOWERING-NEXT: .cfi_offset b9, -64618; CHECK-NEWLOWERING-NEXT: .cfi_offset b10, -72619; CHECK-NEWLOWERING-NEXT: .cfi_offset b11, -80620; CHECK-NEWLOWERING-NEXT: .cfi_offset b12, -88621; CHECK-NEWLOWERING-NEXT: .cfi_offset b13, -96622; CHECK-NEWLOWERING-NEXT: .cfi_offset b14, -104623; CHECK-NEWLOWERING-NEXT: .cfi_offset b15, -112624; CHECK-NEWLOWERING-NEXT: sub sp, sp, #16625; CHECK-NEWLOWERING-NEXT: rdsvl x8, #1626; CHECK-NEWLOWERING-NEXT: mov x9, sp627; CHECK-NEWLOWERING-NEXT: msub x9, x8, x8, x9628; CHECK-NEWLOWERING-NEXT: mov sp, x9629; CHECK-NEWLOWERING-NEXT: sub x10, x29, #80630; CHECK-NEWLOWERING-NEXT: mov w20, w0631; CHECK-NEWLOWERING-NEXT: stp x9, x8, [x29, #-80]632; CHECK-NEWLOWERING-NEXT: msr TPIDR2_EL0, x10633; CHECK-NEWLOWERING-NEXT: smstop sm634; CHECK-NEWLOWERING-NEXT: bl other635; CHECK-NEWLOWERING-NEXT: smstart sm636; CHECK-NEWLOWERING-NEXT: mov w0, w20637; CHECK-NEWLOWERING-NEXT: mov w8, w0638; CHECK-NEWLOWERING-NEXT: smstart za639; CHECK-NEWLOWERING-NEXT: mrs x9, TPIDR2_EL0640; CHECK-NEWLOWERING-NEXT: sub x0, x29, #80641; CHECK-NEWLOWERING-NEXT: cbnz x9, .LBB8_2642; CHECK-NEWLOWERING-NEXT: // %bb.1: // %entry643; CHECK-NEWLOWERING-NEXT: bl __arm_tpidr2_restore644; CHECK-NEWLOWERING-NEXT: .LBB8_2: // %entry645; CHECK-NEWLOWERING-NEXT: mov w0, w8646; CHECK-NEWLOWERING-NEXT: msr TPIDR2_EL0, xzr647; CHECK-NEWLOWERING-NEXT: sub sp, x29, #64648; CHECK-NEWLOWERING-NEXT: .cfi_def_cfa wsp, 112649; CHECK-NEWLOWERING-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload650; CHECK-NEWLOWERING-NEXT: ldp x29, x30, [sp, #64] // 16-byte Folded Reload651; CHECK-NEWLOWERING-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload652; CHECK-NEWLOWERING-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload653; CHECK-NEWLOWERING-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload654; CHECK-NEWLOWERING-NEXT: ldp d15, d14, [sp], #112 // 16-byte Folded Reload655; CHECK-NEWLOWERING-NEXT: .cfi_def_cfa_offset 0656; CHECK-NEWLOWERING-NEXT: .cfi_restore w19657; CHECK-NEWLOWERING-NEXT: .cfi_restore w20658; CHECK-NEWLOWERING-NEXT: .cfi_restore vg659; CHECK-NEWLOWERING-NEXT: .cfi_restore w30660; CHECK-NEWLOWERING-NEXT: .cfi_restore w29661; CHECK-NEWLOWERING-NEXT: .cfi_restore b8662; CHECK-NEWLOWERING-NEXT: .cfi_restore b9663; CHECK-NEWLOWERING-NEXT: .cfi_restore b10664; CHECK-NEWLOWERING-NEXT: .cfi_restore b11665; CHECK-NEWLOWERING-NEXT: .cfi_restore b12666; CHECK-NEWLOWERING-NEXT: .cfi_restore b13667; CHECK-NEWLOWERING-NEXT: .cfi_restore b14668; CHECK-NEWLOWERING-NEXT: .cfi_restore b15669; CHECK-NEWLOWERING-NEXT: ret670entry:671 tail call void @other()672 ret i32 %x673}674declare void @other()