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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mattr=+sve -force-streaming-compatible < %s | FileCheck %s --check-prefixes=SVE3; RUN: llc -mattr=+sve2 -force-streaming-compatible < %s | FileCheck %s --check-prefixes=SVE24; RUN: llc -mattr=+sme -force-streaming < %s | FileCheck %s --check-prefixes=SVE25; RUN: llc -force-streaming-compatible < %s | FileCheck %s --check-prefix=NONEON-NOSVE6 7target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"8 9target triple = "aarch64-unknown-linux-gnu"10 11define void @test_copysign_f16(ptr %ap, ptr %bp) {12; SVE-LABEL: test_copysign_f16:13; SVE: // %bb.0:14; SVE-NEXT: ldr h0, [x1]15; SVE-NEXT: ldr h1, [x0]16; SVE-NEXT: and z0.h, z0.h, #0x800017; SVE-NEXT: and z1.h, z1.h, #0x7fff18; SVE-NEXT: orr z0.d, z1.d, z0.d19; SVE-NEXT: str h0, [x0]20; SVE-NEXT: ret21;22; SVE2-LABEL: test_copysign_f16:23; SVE2: // %bb.0:24; SVE2-NEXT: mov z0.h, #32767 // =0x7fff25; SVE2-NEXT: ldr h1, [x1]26; SVE2-NEXT: ldr h2, [x0]27; SVE2-NEXT: bsl z2.d, z2.d, z1.d, z0.d28; SVE2-NEXT: str h2, [x0]29; SVE2-NEXT: ret30;31; NONEON-NOSVE-LABEL: test_copysign_f16:32; NONEON-NOSVE: // %bb.0:33; NONEON-NOSVE-NEXT: sub sp, sp, #1634; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1635; NONEON-NOSVE-NEXT: ldr h0, [x0]36; NONEON-NOSVE-NEXT: ldr h1, [x1]37; NONEON-NOSVE-NEXT: fcvt s0, h038; NONEON-NOSVE-NEXT: str h1, [sp, #12]39; NONEON-NOSVE-NEXT: ldrb w8, [sp, #13]40; NONEON-NOSVE-NEXT: tst w8, #0x8041; NONEON-NOSVE-NEXT: fabs s0, s042; NONEON-NOSVE-NEXT: fneg s1, s043; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne44; NONEON-NOSVE-NEXT: fcvt h0, s045; NONEON-NOSVE-NEXT: str h0, [x0]46; NONEON-NOSVE-NEXT: add sp, sp, #1647; NONEON-NOSVE-NEXT: ret48 %a = load half, ptr %ap49 %b = load half, ptr %bp50 %r = call half @llvm.copysign.f16(half %a, half %b)51 store half %r, ptr %ap52 ret void53}54 55define void @test_copysign_bf16(ptr %ap, ptr %bp) {56; SVE-LABEL: test_copysign_bf16:57; SVE: // %bb.0:58; SVE-NEXT: ldr h0, [x1]59; SVE-NEXT: ldr h1, [x0]60; SVE-NEXT: and z0.h, z0.h, #0x800061; SVE-NEXT: and z1.h, z1.h, #0x7fff62; SVE-NEXT: orr z0.d, z1.d, z0.d63; SVE-NEXT: str h0, [x0]64; SVE-NEXT: ret65;66; SVE2-LABEL: test_copysign_bf16:67; SVE2: // %bb.0:68; SVE2-NEXT: mov z0.h, #32767 // =0x7fff69; SVE2-NEXT: ldr h1, [x1]70; SVE2-NEXT: ldr h2, [x0]71; SVE2-NEXT: bsl z2.d, z2.d, z1.d, z0.d72; SVE2-NEXT: str h2, [x0]73; SVE2-NEXT: ret74;75; NONEON-NOSVE-LABEL: test_copysign_bf16:76; NONEON-NOSVE: // %bb.0:77; NONEON-NOSVE-NEXT: sub sp, sp, #1678; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1679; NONEON-NOSVE-NEXT: ldr h0, [x0]80; NONEON-NOSVE-NEXT: ldr h1, [x1]81; NONEON-NOSVE-NEXT: fmov w8, s082; NONEON-NOSVE-NEXT: str h1, [sp, #12]83; NONEON-NOSVE-NEXT: lsl w8, w8, #1684; NONEON-NOSVE-NEXT: fmov s0, w885; NONEON-NOSVE-NEXT: ldrb w8, [sp, #13]86; NONEON-NOSVE-NEXT: tst w8, #0x8087; NONEON-NOSVE-NEXT: fabs s0, s088; NONEON-NOSVE-NEXT: fneg s1, s089; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne90; NONEON-NOSVE-NEXT: fmov w8, s091; NONEON-NOSVE-NEXT: lsr w8, w8, #1692; NONEON-NOSVE-NEXT: fmov s0, w893; NONEON-NOSVE-NEXT: str h0, [x0]94; NONEON-NOSVE-NEXT: add sp, sp, #1695; NONEON-NOSVE-NEXT: ret96 %a = load bfloat, ptr %ap97 %b = load bfloat, ptr %bp98 %r = call bfloat @llvm.copysign.bf16(bfloat %a, bfloat %b)99 store bfloat %r, ptr %ap100 ret void101}102 103define void @test_copysign_f32(ptr %ap, ptr %bp) {104; SVE-LABEL: test_copysign_f32:105; SVE: // %bb.0:106; SVE-NEXT: ldr s0, [x1]107; SVE-NEXT: ldr s1, [x0]108; SVE-NEXT: and z0.s, z0.s, #0x80000000109; SVE-NEXT: and z1.s, z1.s, #0x7fffffff110; SVE-NEXT: orr z0.d, z1.d, z0.d111; SVE-NEXT: str s0, [x0]112; SVE-NEXT: ret113;114; SVE2-LABEL: test_copysign_f32:115; SVE2: // %bb.0:116; SVE2-NEXT: mov z0.s, #0x7fffffff117; SVE2-NEXT: ldr s1, [x1]118; SVE2-NEXT: ldr s2, [x0]119; SVE2-NEXT: bsl z2.d, z2.d, z1.d, z0.d120; SVE2-NEXT: str s2, [x0]121; SVE2-NEXT: ret122;123; NONEON-NOSVE-LABEL: test_copysign_f32:124; NONEON-NOSVE: // %bb.0:125; NONEON-NOSVE-NEXT: ldr s0, [x0]126; NONEON-NOSVE-NEXT: ldr w8, [x1]127; NONEON-NOSVE-NEXT: fabs s0, s0128; NONEON-NOSVE-NEXT: tst w8, #0x80000000129; NONEON-NOSVE-NEXT: fneg s1, s0130; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne131; NONEON-NOSVE-NEXT: str s0, [x0]132; NONEON-NOSVE-NEXT: ret133 %a = load float, ptr %ap134 %b = load float, ptr %bp135 %r = call float @llvm.copysign.f32(float %a, float %b)136 store float %r, ptr %ap137 ret void138}139 140define void @test_copysign_f64(ptr %ap, ptr %bp) {141; SVE-LABEL: test_copysign_f64:142; SVE: // %bb.0:143; SVE-NEXT: ldr d0, [x1]144; SVE-NEXT: ldr d1, [x0]145; SVE-NEXT: and z0.d, z0.d, #0x8000000000000000146; SVE-NEXT: and z1.d, z1.d, #0x7fffffffffffffff147; SVE-NEXT: orr z0.d, z1.d, z0.d148; SVE-NEXT: str d0, [x0]149; SVE-NEXT: ret150;151; SVE2-LABEL: test_copysign_f64:152; SVE2: // %bb.0:153; SVE2-NEXT: mov z0.d, #0x7fffffffffffffff154; SVE2-NEXT: ldr d1, [x1]155; SVE2-NEXT: ldr d2, [x0]156; SVE2-NEXT: bsl z2.d, z2.d, z1.d, z0.d157; SVE2-NEXT: str d2, [x0]158; SVE2-NEXT: ret159;160; NONEON-NOSVE-LABEL: test_copysign_f64:161; NONEON-NOSVE: // %bb.0:162; NONEON-NOSVE-NEXT: ldr d0, [x0]163; NONEON-NOSVE-NEXT: ldr x8, [x1]164; NONEON-NOSVE-NEXT: fabs d0, d0165; NONEON-NOSVE-NEXT: tst x8, #0x8000000000000000166; NONEON-NOSVE-NEXT: fneg d1, d0167; NONEON-NOSVE-NEXT: fcsel d0, d1, d0, ne168; NONEON-NOSVE-NEXT: str d0, [x0]169; NONEON-NOSVE-NEXT: ret170 %a = load double, ptr %ap171 %b = load double, ptr %bp172 %r = call double @llvm.copysign.f64(double %a, double %b)173 store double %r, ptr %ap174 ret void175}176 177;============ f16178 179define void @test_copysign_v4f16_v4f16(ptr %ap, ptr %bp) {180; SVE-LABEL: test_copysign_v4f16_v4f16:181; SVE: // %bb.0:182; SVE-NEXT: ldr d0, [x0]183; SVE-NEXT: ldr d1, [x1]184; SVE-NEXT: and z1.h, z1.h, #0x8000185; SVE-NEXT: and z0.h, z0.h, #0x7fff186; SVE-NEXT: orr z0.d, z0.d, z1.d187; SVE-NEXT: str d0, [x0]188; SVE-NEXT: ret189;190; SVE2-LABEL: test_copysign_v4f16_v4f16:191; SVE2: // %bb.0:192; SVE2-NEXT: mov z0.h, #32767 // =0x7fff193; SVE2-NEXT: ldr d1, [x0]194; SVE2-NEXT: ldr d2, [x1]195; SVE2-NEXT: bsl z1.d, z1.d, z2.d, z0.d196; SVE2-NEXT: str d1, [x0]197; SVE2-NEXT: ret198;199; NONEON-NOSVE-LABEL: test_copysign_v4f16_v4f16:200; NONEON-NOSVE: // %bb.0:201; NONEON-NOSVE-NEXT: sub sp, sp, #48202; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48203; NONEON-NOSVE-NEXT: ldr d0, [x1]204; NONEON-NOSVE-NEXT: ldr d1, [x0]205; NONEON-NOSVE-NEXT: stp d1, d0, [sp, #24]206; NONEON-NOSVE-NEXT: ldr h0, [sp, #38]207; NONEON-NOSVE-NEXT: str h0, [sp, #20]208; NONEON-NOSVE-NEXT: ldr h0, [sp, #36]209; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21]210; NONEON-NOSVE-NEXT: str h0, [sp, #16]211; NONEON-NOSVE-NEXT: ldr h0, [sp, #34]212; NONEON-NOSVE-NEXT: tst w8, #0x80213; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]214; NONEON-NOSVE-NEXT: str h0, [sp, #12]215; NONEON-NOSVE-NEXT: ldr h0, [sp, #32]216; NONEON-NOSVE-NEXT: str h0, [sp, #8]217; NONEON-NOSVE-NEXT: ldr h0, [sp, #30]218; NONEON-NOSVE-NEXT: fcvt s0, h0219; NONEON-NOSVE-NEXT: fabs s0, s0220; NONEON-NOSVE-NEXT: fneg s1, s0221; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne222; NONEON-NOSVE-NEXT: tst w8, #0x80223; NONEON-NOSVE-NEXT: ldrb w8, [sp, #13]224; NONEON-NOSVE-NEXT: fcvt h0, s0225; NONEON-NOSVE-NEXT: str h0, [sp, #46]226; NONEON-NOSVE-NEXT: ldr h0, [sp, #28]227; NONEON-NOSVE-NEXT: fcvt s0, h0228; NONEON-NOSVE-NEXT: fabs s0, s0229; NONEON-NOSVE-NEXT: fneg s1, s0230; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne231; NONEON-NOSVE-NEXT: tst w8, #0x80232; NONEON-NOSVE-NEXT: ldrb w8, [sp, #9]233; NONEON-NOSVE-NEXT: fcvt h0, s0234; NONEON-NOSVE-NEXT: str h0, [sp, #44]235; NONEON-NOSVE-NEXT: ldr h0, [sp, #26]236; NONEON-NOSVE-NEXT: fcvt s0, h0237; NONEON-NOSVE-NEXT: fabs s0, s0238; NONEON-NOSVE-NEXT: fneg s1, s0239; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne240; NONEON-NOSVE-NEXT: tst w8, #0x80241; NONEON-NOSVE-NEXT: fcvt h0, s0242; NONEON-NOSVE-NEXT: str h0, [sp, #42]243; NONEON-NOSVE-NEXT: ldr h0, [sp, #24]244; NONEON-NOSVE-NEXT: fcvt s0, h0245; NONEON-NOSVE-NEXT: fabs s0, s0246; NONEON-NOSVE-NEXT: fneg s1, s0247; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne248; NONEON-NOSVE-NEXT: fcvt h0, s0249; NONEON-NOSVE-NEXT: str h0, [sp, #40]250; NONEON-NOSVE-NEXT: ldr d0, [sp, #40]251; NONEON-NOSVE-NEXT: str d0, [x0]252; NONEON-NOSVE-NEXT: add sp, sp, #48253; NONEON-NOSVE-NEXT: ret254 %a = load <4 x half>, ptr %ap255 %b = load <4 x half>, ptr %bp256 %r = call <4 x half> @llvm.copysign.v4f16(<4 x half> %a, <4 x half> %b)257 store <4 x half> %r, ptr %ap258 ret void259}260 261define void @test_copysign_v8f16_v8f16(ptr %ap, ptr %bp) {262; SVE-LABEL: test_copysign_v8f16_v8f16:263; SVE: // %bb.0:264; SVE-NEXT: ldr q0, [x0]265; SVE-NEXT: ldr q1, [x1]266; SVE-NEXT: and z1.h, z1.h, #0x8000267; SVE-NEXT: and z0.h, z0.h, #0x7fff268; SVE-NEXT: orr z0.d, z0.d, z1.d269; SVE-NEXT: str q0, [x0]270; SVE-NEXT: ret271;272; SVE2-LABEL: test_copysign_v8f16_v8f16:273; SVE2: // %bb.0:274; SVE2-NEXT: mov z0.h, #32767 // =0x7fff275; SVE2-NEXT: ldr q1, [x0]276; SVE2-NEXT: ldr q2, [x1]277; SVE2-NEXT: bsl z1.d, z1.d, z2.d, z0.d278; SVE2-NEXT: str q1, [x0]279; SVE2-NEXT: ret280;281; NONEON-NOSVE-LABEL: test_copysign_v8f16_v8f16:282; NONEON-NOSVE: // %bb.0:283; NONEON-NOSVE-NEXT: sub sp, sp, #80284; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 80285; NONEON-NOSVE-NEXT: ldr q0, [x1]286; NONEON-NOSVE-NEXT: ldr q1, [x0]287; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]288; NONEON-NOSVE-NEXT: ldr h0, [sp, #62]289; NONEON-NOSVE-NEXT: str h0, [sp, #28]290; NONEON-NOSVE-NEXT: ldr h0, [sp, #60]291; NONEON-NOSVE-NEXT: ldrb w8, [sp, #29]292; NONEON-NOSVE-NEXT: str h0, [sp, #24]293; NONEON-NOSVE-NEXT: ldr h0, [sp, #58]294; NONEON-NOSVE-NEXT: tst w8, #0x80295; NONEON-NOSVE-NEXT: ldrb w8, [sp, #25]296; NONEON-NOSVE-NEXT: str h0, [sp, #20]297; NONEON-NOSVE-NEXT: ldr h0, [sp, #56]298; NONEON-NOSVE-NEXT: str h0, [sp, #16]299; NONEON-NOSVE-NEXT: ldr h0, [sp, #54]300; NONEON-NOSVE-NEXT: str h0, [sp, #12]301; NONEON-NOSVE-NEXT: ldr h0, [sp, #52]302; NONEON-NOSVE-NEXT: str h0, [sp, #8]303; NONEON-NOSVE-NEXT: ldr h0, [sp, #50]304; NONEON-NOSVE-NEXT: str h0, [sp, #4]305; NONEON-NOSVE-NEXT: ldr h0, [sp, #48]306; NONEON-NOSVE-NEXT: str h0, [sp]307; NONEON-NOSVE-NEXT: ldr h0, [sp, #46]308; NONEON-NOSVE-NEXT: fcvt s0, h0309; NONEON-NOSVE-NEXT: fabs s0, s0310; NONEON-NOSVE-NEXT: fneg s1, s0311; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne312; NONEON-NOSVE-NEXT: tst w8, #0x80313; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21]314; NONEON-NOSVE-NEXT: fcvt h0, s0315; NONEON-NOSVE-NEXT: str h0, [sp, #78]316; NONEON-NOSVE-NEXT: ldr h0, [sp, #44]317; NONEON-NOSVE-NEXT: fcvt s0, h0318; NONEON-NOSVE-NEXT: fabs s0, s0319; NONEON-NOSVE-NEXT: fneg s1, s0320; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne321; NONEON-NOSVE-NEXT: tst w8, #0x80322; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]323; NONEON-NOSVE-NEXT: fcvt h0, s0324; NONEON-NOSVE-NEXT: str h0, [sp, #76]325; NONEON-NOSVE-NEXT: ldr h0, [sp, #42]326; NONEON-NOSVE-NEXT: fcvt s0, h0327; NONEON-NOSVE-NEXT: fabs s0, s0328; NONEON-NOSVE-NEXT: fneg s1, s0329; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne330; NONEON-NOSVE-NEXT: tst w8, #0x80331; NONEON-NOSVE-NEXT: ldrb w8, [sp, #13]332; NONEON-NOSVE-NEXT: fcvt h0, s0333; NONEON-NOSVE-NEXT: str h0, [sp, #74]334; NONEON-NOSVE-NEXT: ldr h0, [sp, #40]335; NONEON-NOSVE-NEXT: fcvt s0, h0336; NONEON-NOSVE-NEXT: fabs s0, s0337; NONEON-NOSVE-NEXT: fneg s1, s0338; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne339; NONEON-NOSVE-NEXT: tst w8, #0x80340; NONEON-NOSVE-NEXT: ldrb w8, [sp, #9]341; NONEON-NOSVE-NEXT: fcvt h0, s0342; NONEON-NOSVE-NEXT: str h0, [sp, #72]343; NONEON-NOSVE-NEXT: ldr h0, [sp, #38]344; NONEON-NOSVE-NEXT: fcvt s0, h0345; NONEON-NOSVE-NEXT: fabs s0, s0346; NONEON-NOSVE-NEXT: fneg s1, s0347; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne348; NONEON-NOSVE-NEXT: tst w8, #0x80349; NONEON-NOSVE-NEXT: ldrb w8, [sp, #5]350; NONEON-NOSVE-NEXT: fcvt h0, s0351; NONEON-NOSVE-NEXT: str h0, [sp, #70]352; NONEON-NOSVE-NEXT: ldr h0, [sp, #36]353; NONEON-NOSVE-NEXT: fcvt s0, h0354; NONEON-NOSVE-NEXT: fabs s0, s0355; NONEON-NOSVE-NEXT: fneg s1, s0356; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne357; NONEON-NOSVE-NEXT: tst w8, #0x80358; NONEON-NOSVE-NEXT: ldrb w8, [sp, #1]359; NONEON-NOSVE-NEXT: fcvt h0, s0360; NONEON-NOSVE-NEXT: str h0, [sp, #68]361; NONEON-NOSVE-NEXT: ldr h0, [sp, #34]362; NONEON-NOSVE-NEXT: fcvt s0, h0363; NONEON-NOSVE-NEXT: fabs s0, s0364; NONEON-NOSVE-NEXT: fneg s1, s0365; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne366; NONEON-NOSVE-NEXT: tst w8, #0x80367; NONEON-NOSVE-NEXT: fcvt h0, s0368; NONEON-NOSVE-NEXT: str h0, [sp, #66]369; NONEON-NOSVE-NEXT: ldr h0, [sp, #32]370; NONEON-NOSVE-NEXT: fcvt s0, h0371; NONEON-NOSVE-NEXT: fabs s0, s0372; NONEON-NOSVE-NEXT: fneg s1, s0373; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne374; NONEON-NOSVE-NEXT: fcvt h0, s0375; NONEON-NOSVE-NEXT: str h0, [sp, #64]376; NONEON-NOSVE-NEXT: ldr q0, [sp, #64]377; NONEON-NOSVE-NEXT: str q0, [x0]378; NONEON-NOSVE-NEXT: add sp, sp, #80379; NONEON-NOSVE-NEXT: ret380 %a = load <8 x half>, ptr %ap381 %b = load <8 x half>, ptr %bp382 %r = call <8 x half> @llvm.copysign.v8f16(<8 x half> %a, <8 x half> %b)383 store <8 x half> %r, ptr %ap384 ret void385}386 387define void @test_copysign_v16f16_v16f16(ptr %ap, ptr %bp) {388; SVE-LABEL: test_copysign_v16f16_v16f16:389; SVE: // %bb.0:390; SVE-NEXT: ldp q0, q3, [x1]391; SVE-NEXT: ldp q1, q2, [x0]392; SVE-NEXT: and z0.h, z0.h, #0x8000393; SVE-NEXT: and z3.h, z3.h, #0x8000394; SVE-NEXT: and z1.h, z1.h, #0x7fff395; SVE-NEXT: and z2.h, z2.h, #0x7fff396; SVE-NEXT: orr z0.d, z1.d, z0.d397; SVE-NEXT: orr z1.d, z2.d, z3.d398; SVE-NEXT: stp q0, q1, [x0]399; SVE-NEXT: ret400;401; SVE2-LABEL: test_copysign_v16f16_v16f16:402; SVE2: // %bb.0:403; SVE2-NEXT: mov z0.h, #32767 // =0x7fff404; SVE2-NEXT: ldp q1, q4, [x1]405; SVE2-NEXT: ldp q2, q3, [x0]406; SVE2-NEXT: bsl z2.d, z2.d, z1.d, z0.d407; SVE2-NEXT: bsl z3.d, z3.d, z4.d, z0.d408; SVE2-NEXT: stp q2, q3, [x0]409; SVE2-NEXT: ret410;411; NONEON-NOSVE-LABEL: test_copysign_v16f16_v16f16:412; NONEON-NOSVE: // %bb.0:413; NONEON-NOSVE-NEXT: sub sp, sp, #160414; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 160415; NONEON-NOSVE-NEXT: ldp q1, q0, [x1]416; NONEON-NOSVE-NEXT: ldp q2, q3, [x0]417; NONEON-NOSVE-NEXT: stp q2, q1, [sp, #64]418; NONEON-NOSVE-NEXT: stp q3, q0, [sp, #96]419; NONEON-NOSVE-NEXT: ldr h0, [sp, #126]420; NONEON-NOSVE-NEXT: str h0, [sp, #28]421; NONEON-NOSVE-NEXT: ldr h0, [sp, #124]422; NONEON-NOSVE-NEXT: ldrb w8, [sp, #29]423; NONEON-NOSVE-NEXT: str h0, [sp, #24]424; NONEON-NOSVE-NEXT: ldr h0, [sp, #122]425; NONEON-NOSVE-NEXT: tst w8, #0x80426; NONEON-NOSVE-NEXT: ldrb w8, [sp, #25]427; NONEON-NOSVE-NEXT: str h0, [sp, #20]428; NONEON-NOSVE-NEXT: ldr h0, [sp, #120]429; NONEON-NOSVE-NEXT: str h0, [sp, #16]430; NONEON-NOSVE-NEXT: ldr h0, [sp, #118]431; NONEON-NOSVE-NEXT: str h0, [sp, #12]432; NONEON-NOSVE-NEXT: ldr h0, [sp, #116]433; NONEON-NOSVE-NEXT: str h0, [sp, #8]434; NONEON-NOSVE-NEXT: ldr h0, [sp, #114]435; NONEON-NOSVE-NEXT: str h0, [sp, #4]436; NONEON-NOSVE-NEXT: ldr h0, [sp, #112]437; NONEON-NOSVE-NEXT: str h0, [sp]438; NONEON-NOSVE-NEXT: ldr h0, [sp, #94]439; NONEON-NOSVE-NEXT: str h0, [sp, #60]440; NONEON-NOSVE-NEXT: ldr h0, [sp, #92]441; NONEON-NOSVE-NEXT: str h0, [sp, #56]442; NONEON-NOSVE-NEXT: ldr h0, [sp, #90]443; NONEON-NOSVE-NEXT: str h0, [sp, #52]444; NONEON-NOSVE-NEXT: ldr h0, [sp, #88]445; NONEON-NOSVE-NEXT: str h0, [sp, #48]446; NONEON-NOSVE-NEXT: ldr h0, [sp, #86]447; NONEON-NOSVE-NEXT: str h0, [sp, #44]448; NONEON-NOSVE-NEXT: ldr h0, [sp, #84]449; NONEON-NOSVE-NEXT: str h0, [sp, #40]450; NONEON-NOSVE-NEXT: ldr h0, [sp, #82]451; NONEON-NOSVE-NEXT: str h0, [sp, #36]452; NONEON-NOSVE-NEXT: ldr h0, [sp, #80]453; NONEON-NOSVE-NEXT: str h0, [sp, #32]454; NONEON-NOSVE-NEXT: ldr h0, [sp, #110]455; NONEON-NOSVE-NEXT: fcvt s0, h0456; NONEON-NOSVE-NEXT: fabs s0, s0457; NONEON-NOSVE-NEXT: fneg s1, s0458; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne459; NONEON-NOSVE-NEXT: tst w8, #0x80460; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21]461; NONEON-NOSVE-NEXT: fcvt h0, s0462; NONEON-NOSVE-NEXT: str h0, [sp, #158]463; NONEON-NOSVE-NEXT: ldr h0, [sp, #108]464; NONEON-NOSVE-NEXT: fcvt s0, h0465; NONEON-NOSVE-NEXT: fabs s0, s0466; NONEON-NOSVE-NEXT: fneg s1, s0467; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne468; NONEON-NOSVE-NEXT: tst w8, #0x80469; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]470; NONEON-NOSVE-NEXT: fcvt h0, s0471; NONEON-NOSVE-NEXT: str h0, [sp, #156]472; NONEON-NOSVE-NEXT: ldr h0, [sp, #106]473; NONEON-NOSVE-NEXT: fcvt s0, h0474; NONEON-NOSVE-NEXT: fabs s0, s0475; NONEON-NOSVE-NEXT: fneg s1, s0476; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne477; NONEON-NOSVE-NEXT: tst w8, #0x80478; NONEON-NOSVE-NEXT: ldrb w8, [sp, #13]479; NONEON-NOSVE-NEXT: fcvt h0, s0480; NONEON-NOSVE-NEXT: str h0, [sp, #154]481; NONEON-NOSVE-NEXT: ldr h0, [sp, #104]482; NONEON-NOSVE-NEXT: fcvt s0, h0483; NONEON-NOSVE-NEXT: fabs s0, s0484; NONEON-NOSVE-NEXT: fneg s1, s0485; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne486; NONEON-NOSVE-NEXT: tst w8, #0x80487; NONEON-NOSVE-NEXT: ldrb w8, [sp, #9]488; NONEON-NOSVE-NEXT: fcvt h0, s0489; NONEON-NOSVE-NEXT: str h0, [sp, #152]490; NONEON-NOSVE-NEXT: ldr h0, [sp, #102]491; NONEON-NOSVE-NEXT: fcvt s0, h0492; NONEON-NOSVE-NEXT: fabs s0, s0493; NONEON-NOSVE-NEXT: fneg s1, s0494; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne495; NONEON-NOSVE-NEXT: tst w8, #0x80496; NONEON-NOSVE-NEXT: ldrb w8, [sp, #5]497; NONEON-NOSVE-NEXT: fcvt h0, s0498; NONEON-NOSVE-NEXT: str h0, [sp, #150]499; NONEON-NOSVE-NEXT: ldr h0, [sp, #100]500; NONEON-NOSVE-NEXT: fcvt s0, h0501; NONEON-NOSVE-NEXT: fabs s0, s0502; NONEON-NOSVE-NEXT: fneg s1, s0503; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne504; NONEON-NOSVE-NEXT: tst w8, #0x80505; NONEON-NOSVE-NEXT: ldrb w8, [sp, #1]506; NONEON-NOSVE-NEXT: fcvt h0, s0507; NONEON-NOSVE-NEXT: str h0, [sp, #148]508; NONEON-NOSVE-NEXT: ldr h0, [sp, #98]509; NONEON-NOSVE-NEXT: fcvt s0, h0510; NONEON-NOSVE-NEXT: fabs s0, s0511; NONEON-NOSVE-NEXT: fneg s1, s0512; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne513; NONEON-NOSVE-NEXT: tst w8, #0x80514; NONEON-NOSVE-NEXT: ldrb w8, [sp, #61]515; NONEON-NOSVE-NEXT: fcvt h0, s0516; NONEON-NOSVE-NEXT: str h0, [sp, #146]517; NONEON-NOSVE-NEXT: ldr h0, [sp, #96]518; NONEON-NOSVE-NEXT: fcvt s0, h0519; NONEON-NOSVE-NEXT: fabs s0, s0520; NONEON-NOSVE-NEXT: fneg s1, s0521; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne522; NONEON-NOSVE-NEXT: tst w8, #0x80523; NONEON-NOSVE-NEXT: ldrb w8, [sp, #57]524; NONEON-NOSVE-NEXT: fcvt h0, s0525; NONEON-NOSVE-NEXT: str h0, [sp, #144]526; NONEON-NOSVE-NEXT: ldr h0, [sp, #78]527; NONEON-NOSVE-NEXT: fcvt s0, h0528; NONEON-NOSVE-NEXT: fabs s0, s0529; NONEON-NOSVE-NEXT: fneg s1, s0530; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne531; NONEON-NOSVE-NEXT: tst w8, #0x80532; NONEON-NOSVE-NEXT: ldrb w8, [sp, #53]533; NONEON-NOSVE-NEXT: fcvt h0, s0534; NONEON-NOSVE-NEXT: str h0, [sp, #142]535; NONEON-NOSVE-NEXT: ldr h0, [sp, #76]536; NONEON-NOSVE-NEXT: fcvt s0, h0537; NONEON-NOSVE-NEXT: fabs s0, s0538; NONEON-NOSVE-NEXT: fneg s1, s0539; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne540; NONEON-NOSVE-NEXT: tst w8, #0x80541; NONEON-NOSVE-NEXT: ldrb w8, [sp, #49]542; NONEON-NOSVE-NEXT: fcvt h0, s0543; NONEON-NOSVE-NEXT: str h0, [sp, #140]544; NONEON-NOSVE-NEXT: ldr h0, [sp, #74]545; NONEON-NOSVE-NEXT: fcvt s0, h0546; NONEON-NOSVE-NEXT: fabs s0, s0547; NONEON-NOSVE-NEXT: fneg s1, s0548; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne549; NONEON-NOSVE-NEXT: tst w8, #0x80550; NONEON-NOSVE-NEXT: ldrb w8, [sp, #45]551; NONEON-NOSVE-NEXT: fcvt h0, s0552; NONEON-NOSVE-NEXT: str h0, [sp, #138]553; NONEON-NOSVE-NEXT: ldr h0, [sp, #72]554; NONEON-NOSVE-NEXT: fcvt s0, h0555; NONEON-NOSVE-NEXT: fabs s0, s0556; NONEON-NOSVE-NEXT: fneg s1, s0557; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne558; NONEON-NOSVE-NEXT: tst w8, #0x80559; NONEON-NOSVE-NEXT: ldrb w8, [sp, #41]560; NONEON-NOSVE-NEXT: fcvt h0, s0561; NONEON-NOSVE-NEXT: str h0, [sp, #136]562; NONEON-NOSVE-NEXT: ldr h0, [sp, #70]563; NONEON-NOSVE-NEXT: fcvt s0, h0564; NONEON-NOSVE-NEXT: fabs s0, s0565; NONEON-NOSVE-NEXT: fneg s1, s0566; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne567; NONEON-NOSVE-NEXT: tst w8, #0x80568; NONEON-NOSVE-NEXT: ldrb w8, [sp, #37]569; NONEON-NOSVE-NEXT: fcvt h0, s0570; NONEON-NOSVE-NEXT: str h0, [sp, #134]571; NONEON-NOSVE-NEXT: ldr h0, [sp, #68]572; NONEON-NOSVE-NEXT: fcvt s0, h0573; NONEON-NOSVE-NEXT: fabs s0, s0574; NONEON-NOSVE-NEXT: fneg s1, s0575; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne576; NONEON-NOSVE-NEXT: tst w8, #0x80577; NONEON-NOSVE-NEXT: ldrb w8, [sp, #33]578; NONEON-NOSVE-NEXT: fcvt h0, s0579; NONEON-NOSVE-NEXT: str h0, [sp, #132]580; NONEON-NOSVE-NEXT: ldr h0, [sp, #66]581; NONEON-NOSVE-NEXT: fcvt s0, h0582; NONEON-NOSVE-NEXT: fabs s0, s0583; NONEON-NOSVE-NEXT: fneg s1, s0584; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne585; NONEON-NOSVE-NEXT: tst w8, #0x80586; NONEON-NOSVE-NEXT: fcvt h0, s0587; NONEON-NOSVE-NEXT: str h0, [sp, #130]588; NONEON-NOSVE-NEXT: ldr h0, [sp, #64]589; NONEON-NOSVE-NEXT: fcvt s0, h0590; NONEON-NOSVE-NEXT: fabs s0, s0591; NONEON-NOSVE-NEXT: fneg s1, s0592; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne593; NONEON-NOSVE-NEXT: fcvt h0, s0594; NONEON-NOSVE-NEXT: str h0, [sp, #128]595; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #128]596; NONEON-NOSVE-NEXT: stp q0, q1, [x0]597; NONEON-NOSVE-NEXT: add sp, sp, #160598; NONEON-NOSVE-NEXT: ret599 %a = load <16 x half>, ptr %ap600 %b = load <16 x half>, ptr %bp601 %r = call <16 x half> @llvm.copysign.v16f16(<16 x half> %a, <16 x half> %b)602 store <16 x half> %r, ptr %ap603 ret void604}605 606;============ f32607 608define void @test_copysign_v2f32_v2f32(ptr %ap, ptr %bp) {609; SVE-LABEL: test_copysign_v2f32_v2f32:610; SVE: // %bb.0:611; SVE-NEXT: ldr d0, [x0]612; SVE-NEXT: ldr d1, [x1]613; SVE-NEXT: and z1.s, z1.s, #0x80000000614; SVE-NEXT: and z0.s, z0.s, #0x7fffffff615; SVE-NEXT: orr z0.d, z0.d, z1.d616; SVE-NEXT: str d0, [x0]617; SVE-NEXT: ret618;619; SVE2-LABEL: test_copysign_v2f32_v2f32:620; SVE2: // %bb.0:621; SVE2-NEXT: mov z0.s, #0x7fffffff622; SVE2-NEXT: ldr d1, [x0]623; SVE2-NEXT: ldr d2, [x1]624; SVE2-NEXT: bsl z1.d, z1.d, z2.d, z0.d625; SVE2-NEXT: str d1, [x0]626; SVE2-NEXT: ret627;628; NONEON-NOSVE-LABEL: test_copysign_v2f32_v2f32:629; NONEON-NOSVE: // %bb.0:630; NONEON-NOSVE-NEXT: sub sp, sp, #32631; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32632; NONEON-NOSVE-NEXT: ldr d0, [x0]633; NONEON-NOSVE-NEXT: ldr d1, [x1]634; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]635; NONEON-NOSVE-NEXT: ldr s0, [sp, #12]636; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #16]637; NONEON-NOSVE-NEXT: fabs s0, s0638; NONEON-NOSVE-NEXT: tst w9, #0x80000000639; NONEON-NOSVE-NEXT: fneg s1, s0640; NONEON-NOSVE-NEXT: fcsel s2, s1, s0, ne641; NONEON-NOSVE-NEXT: ldr s0, [sp, #8]642; NONEON-NOSVE-NEXT: tst w8, #0x80000000643; NONEON-NOSVE-NEXT: fabs s0, s0644; NONEON-NOSVE-NEXT: fneg s1, s0645; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne646; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #24]647; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]648; NONEON-NOSVE-NEXT: str d0, [x0]649; NONEON-NOSVE-NEXT: add sp, sp, #32650; NONEON-NOSVE-NEXT: ret651 %a = load <2 x float>, ptr %ap652 %b = load <2 x float>, ptr %bp653 %r = call <2 x float> @llvm.copysign.v2f32(<2 x float> %a, <2 x float> %b)654 store <2 x float> %r, ptr %ap655 ret void656}657 658define void @test_copysign_v4f32_v4f32(ptr %ap, ptr %bp) {659; SVE-LABEL: test_copysign_v4f32_v4f32:660; SVE: // %bb.0:661; SVE-NEXT: ldr q0, [x0]662; SVE-NEXT: ldr q1, [x1]663; SVE-NEXT: and z1.s, z1.s, #0x80000000664; SVE-NEXT: and z0.s, z0.s, #0x7fffffff665; SVE-NEXT: orr z0.d, z0.d, z1.d666; SVE-NEXT: str q0, [x0]667; SVE-NEXT: ret668;669; SVE2-LABEL: test_copysign_v4f32_v4f32:670; SVE2: // %bb.0:671; SVE2-NEXT: mov z0.s, #0x7fffffff672; SVE2-NEXT: ldr q1, [x0]673; SVE2-NEXT: ldr q2, [x1]674; SVE2-NEXT: bsl z1.d, z1.d, z2.d, z0.d675; SVE2-NEXT: str q1, [x0]676; SVE2-NEXT: ret677;678; NONEON-NOSVE-LABEL: test_copysign_v4f32_v4f32:679; NONEON-NOSVE: // %bb.0:680; NONEON-NOSVE-NEXT: ldr q0, [x0]681; NONEON-NOSVE-NEXT: ldr q1, [x1]682; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!683; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48684; NONEON-NOSVE-NEXT: ldr s0, [sp, #12]685; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #24]686; NONEON-NOSVE-NEXT: fabs s0, s0687; NONEON-NOSVE-NEXT: tst w9, #0x80000000688; NONEON-NOSVE-NEXT: fneg s1, s0689; NONEON-NOSVE-NEXT: fcsel s2, s1, s0, ne690; NONEON-NOSVE-NEXT: ldr s0, [sp, #8]691; NONEON-NOSVE-NEXT: tst w8, #0x80000000692; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #16]693; NONEON-NOSVE-NEXT: fabs s0, s0694; NONEON-NOSVE-NEXT: fneg s1, s0695; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne696; NONEON-NOSVE-NEXT: tst w9, #0x80000000697; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #40]698; NONEON-NOSVE-NEXT: ldr s0, [sp, #4]699; NONEON-NOSVE-NEXT: fabs s0, s0700; NONEON-NOSVE-NEXT: fneg s1, s0701; NONEON-NOSVE-NEXT: fcsel s2, s1, s0, ne702; NONEON-NOSVE-NEXT: ldr s0, [sp]703; NONEON-NOSVE-NEXT: tst w8, #0x80000000704; NONEON-NOSVE-NEXT: fabs s0, s0705; NONEON-NOSVE-NEXT: fneg s1, s0706; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne707; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #32]708; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]709; NONEON-NOSVE-NEXT: str q0, [x0]710; NONEON-NOSVE-NEXT: add sp, sp, #48711; NONEON-NOSVE-NEXT: ret712 %a = load <4 x float>, ptr %ap713 %b = load <4 x float>, ptr %bp714 %r = call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> %b)715 store <4 x float> %r, ptr %ap716 ret void717}718 719define void @test_copysign_v8f32_v8f32(ptr %ap, ptr %bp) {720; SVE-LABEL: test_copysign_v8f32_v8f32:721; SVE: // %bb.0:722; SVE-NEXT: ldp q0, q3, [x1]723; SVE-NEXT: ldp q1, q2, [x0]724; SVE-NEXT: and z0.s, z0.s, #0x80000000725; SVE-NEXT: and z3.s, z3.s, #0x80000000726; SVE-NEXT: and z1.s, z1.s, #0x7fffffff727; SVE-NEXT: and z2.s, z2.s, #0x7fffffff728; SVE-NEXT: orr z0.d, z1.d, z0.d729; SVE-NEXT: orr z1.d, z2.d, z3.d730; SVE-NEXT: stp q0, q1, [x0]731; SVE-NEXT: ret732;733; SVE2-LABEL: test_copysign_v8f32_v8f32:734; SVE2: // %bb.0:735; SVE2-NEXT: mov z0.s, #0x7fffffff736; SVE2-NEXT: ldp q1, q4, [x1]737; SVE2-NEXT: ldp q2, q3, [x0]738; SVE2-NEXT: bsl z2.d, z2.d, z1.d, z0.d739; SVE2-NEXT: bsl z3.d, z3.d, z4.d, z0.d740; SVE2-NEXT: stp q2, q3, [x0]741; SVE2-NEXT: ret742;743; NONEON-NOSVE-LABEL: test_copysign_v8f32_v8f32:744; NONEON-NOSVE: // %bb.0:745; NONEON-NOSVE-NEXT: sub sp, sp, #96746; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96747; NONEON-NOSVE-NEXT: ldp q2, q0, [x0]748; NONEON-NOSVE-NEXT: ldp q3, q1, [x1]749; NONEON-NOSVE-NEXT: stp q2, q3, [sp]750; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #32]751; NONEON-NOSVE-NEXT: ldr s0, [sp, #44]752; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #56]753; NONEON-NOSVE-NEXT: fabs s0, s0754; NONEON-NOSVE-NEXT: tst w9, #0x80000000755; NONEON-NOSVE-NEXT: fneg s1, s0756; NONEON-NOSVE-NEXT: fcsel s2, s1, s0, ne757; NONEON-NOSVE-NEXT: ldr s0, [sp, #40]758; NONEON-NOSVE-NEXT: tst w8, #0x80000000759; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #48]760; NONEON-NOSVE-NEXT: fabs s0, s0761; NONEON-NOSVE-NEXT: fneg s1, s0762; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne763; NONEON-NOSVE-NEXT: tst w9, #0x80000000764; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #88]765; NONEON-NOSVE-NEXT: ldr s0, [sp, #36]766; NONEON-NOSVE-NEXT: fabs s0, s0767; NONEON-NOSVE-NEXT: fneg s1, s0768; NONEON-NOSVE-NEXT: fcsel s2, s1, s0, ne769; NONEON-NOSVE-NEXT: ldr s0, [sp, #32]770; NONEON-NOSVE-NEXT: tst w8, #0x80000000771; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #24]772; NONEON-NOSVE-NEXT: fabs s0, s0773; NONEON-NOSVE-NEXT: fneg s1, s0774; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne775; NONEON-NOSVE-NEXT: tst w9, #0x80000000776; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #80]777; NONEON-NOSVE-NEXT: ldr s0, [sp, #12]778; NONEON-NOSVE-NEXT: fabs s0, s0779; NONEON-NOSVE-NEXT: fneg s1, s0780; NONEON-NOSVE-NEXT: fcsel s2, s1, s0, ne781; NONEON-NOSVE-NEXT: ldr s0, [sp, #8]782; NONEON-NOSVE-NEXT: tst w8, #0x80000000783; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #16]784; NONEON-NOSVE-NEXT: fabs s0, s0785; NONEON-NOSVE-NEXT: fneg s1, s0786; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne787; NONEON-NOSVE-NEXT: tst w9, #0x80000000788; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #72]789; NONEON-NOSVE-NEXT: ldr s0, [sp, #4]790; NONEON-NOSVE-NEXT: fabs s0, s0791; NONEON-NOSVE-NEXT: fneg s1, s0792; NONEON-NOSVE-NEXT: fcsel s2, s1, s0, ne793; NONEON-NOSVE-NEXT: ldr s0, [sp]794; NONEON-NOSVE-NEXT: tst w8, #0x80000000795; NONEON-NOSVE-NEXT: fabs s0, s0796; NONEON-NOSVE-NEXT: fneg s1, s0797; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne798; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #64]799; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]800; NONEON-NOSVE-NEXT: stp q0, q1, [x0]801; NONEON-NOSVE-NEXT: add sp, sp, #96802; NONEON-NOSVE-NEXT: ret803 %a = load <8 x float>, ptr %ap804 %b = load <8 x float>, ptr %bp805 %r = call <8 x float> @llvm.copysign.v8f32(<8 x float> %a, <8 x float> %b)806 store <8 x float> %r, ptr %ap807 ret void808}809 810;============ f64811 812define void @test_copysign_v2f64_v2f64(ptr %ap, ptr %bp) {813; SVE-LABEL: test_copysign_v2f64_v2f64:814; SVE: // %bb.0:815; SVE-NEXT: ldr q0, [x0]816; SVE-NEXT: ldr q1, [x1]817; SVE-NEXT: and z1.d, z1.d, #0x8000000000000000818; SVE-NEXT: and z0.d, z0.d, #0x7fffffffffffffff819; SVE-NEXT: orr z0.d, z0.d, z1.d820; SVE-NEXT: str q0, [x0]821; SVE-NEXT: ret822;823; SVE2-LABEL: test_copysign_v2f64_v2f64:824; SVE2: // %bb.0:825; SVE2-NEXT: mov z0.d, #0x7fffffffffffffff826; SVE2-NEXT: ldr q1, [x0]827; SVE2-NEXT: ldr q2, [x1]828; SVE2-NEXT: bsl z1.d, z1.d, z2.d, z0.d829; SVE2-NEXT: str q1, [x0]830; SVE2-NEXT: ret831;832; NONEON-NOSVE-LABEL: test_copysign_v2f64_v2f64:833; NONEON-NOSVE: // %bb.0:834; NONEON-NOSVE-NEXT: ldr q0, [x0]835; NONEON-NOSVE-NEXT: ldr q1, [x1]836; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!837; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48838; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]839; NONEON-NOSVE-NEXT: ldp x8, x9, [sp, #16]840; NONEON-NOSVE-NEXT: fabs d0, d0841; NONEON-NOSVE-NEXT: tst x9, #0x8000000000000000842; NONEON-NOSVE-NEXT: fneg d1, d0843; NONEON-NOSVE-NEXT: fcsel d2, d1, d0, ne844; NONEON-NOSVE-NEXT: ldr d0, [sp]845; NONEON-NOSVE-NEXT: tst x8, #0x8000000000000000846; NONEON-NOSVE-NEXT: fabs d0, d0847; NONEON-NOSVE-NEXT: fneg d1, d0848; NONEON-NOSVE-NEXT: fcsel d0, d1, d0, ne849; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #32]850; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]851; NONEON-NOSVE-NEXT: str q0, [x0]852; NONEON-NOSVE-NEXT: add sp, sp, #48853; NONEON-NOSVE-NEXT: ret854 %a = load <2 x double>, ptr %ap855 %b = load <2 x double>, ptr %bp856 %r = call <2 x double> @llvm.copysign.v2f64(<2 x double> %a, <2 x double> %b)857 store <2 x double> %r, ptr %ap858 ret void859}860 861define void @test_copysign_v4f64_v4f64(ptr %ap, ptr %bp) {862; SVE-LABEL: test_copysign_v4f64_v4f64:863; SVE: // %bb.0:864; SVE-NEXT: ldp q0, q3, [x1]865; SVE-NEXT: ldp q1, q2, [x0]866; SVE-NEXT: and z0.d, z0.d, #0x8000000000000000867; SVE-NEXT: and z3.d, z3.d, #0x8000000000000000868; SVE-NEXT: and z1.d, z1.d, #0x7fffffffffffffff869; SVE-NEXT: and z2.d, z2.d, #0x7fffffffffffffff870; SVE-NEXT: orr z0.d, z1.d, z0.d871; SVE-NEXT: orr z1.d, z2.d, z3.d872; SVE-NEXT: stp q0, q1, [x0]873; SVE-NEXT: ret874;875; SVE2-LABEL: test_copysign_v4f64_v4f64:876; SVE2: // %bb.0:877; SVE2-NEXT: mov z0.d, #0x7fffffffffffffff878; SVE2-NEXT: ldp q1, q4, [x1]879; SVE2-NEXT: ldp q2, q3, [x0]880; SVE2-NEXT: bsl z2.d, z2.d, z1.d, z0.d881; SVE2-NEXT: bsl z3.d, z3.d, z4.d, z0.d882; SVE2-NEXT: stp q2, q3, [x0]883; SVE2-NEXT: ret884;885; NONEON-NOSVE-LABEL: test_copysign_v4f64_v4f64:886; NONEON-NOSVE: // %bb.0:887; NONEON-NOSVE-NEXT: sub sp, sp, #96888; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96889; NONEON-NOSVE-NEXT: ldp q2, q0, [x0]890; NONEON-NOSVE-NEXT: ldp q3, q1, [x1]891; NONEON-NOSVE-NEXT: stp q2, q3, [sp]892; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #32]893; NONEON-NOSVE-NEXT: ldr d0, [sp, #40]894; NONEON-NOSVE-NEXT: ldp x8, x9, [sp, #48]895; NONEON-NOSVE-NEXT: fabs d0, d0896; NONEON-NOSVE-NEXT: tst x9, #0x8000000000000000897; NONEON-NOSVE-NEXT: fneg d1, d0898; NONEON-NOSVE-NEXT: fcsel d2, d1, d0, ne899; NONEON-NOSVE-NEXT: ldr d0, [sp, #32]900; NONEON-NOSVE-NEXT: tst x8, #0x8000000000000000901; NONEON-NOSVE-NEXT: ldp x8, x9, [sp, #16]902; NONEON-NOSVE-NEXT: fabs d0, d0903; NONEON-NOSVE-NEXT: fneg d1, d0904; NONEON-NOSVE-NEXT: fcsel d0, d1, d0, ne905; NONEON-NOSVE-NEXT: tst x9, #0x8000000000000000906; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #80]907; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]908; NONEON-NOSVE-NEXT: fabs d0, d0909; NONEON-NOSVE-NEXT: fneg d1, d0910; NONEON-NOSVE-NEXT: fcsel d2, d1, d0, ne911; NONEON-NOSVE-NEXT: ldr d0, [sp]912; NONEON-NOSVE-NEXT: tst x8, #0x8000000000000000913; NONEON-NOSVE-NEXT: fabs d0, d0914; NONEON-NOSVE-NEXT: fneg d1, d0915; NONEON-NOSVE-NEXT: fcsel d0, d1, d0, ne916; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #64]917; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]918; NONEON-NOSVE-NEXT: stp q0, q1, [x0]919; NONEON-NOSVE-NEXT: add sp, sp, #96920; NONEON-NOSVE-NEXT: ret921 %a = load <4 x double>, ptr %ap922 %b = load <4 x double>, ptr %bp923 %r = call <4 x double> @llvm.copysign.v4f64(<4 x double> %a, <4 x double> %b)924 store <4 x double> %r, ptr %ap925 ret void926}927 928;============ v2f32929 930define void @test_copysign_v2f32_v2f64(ptr %ap, ptr %bp) {931; SVE-LABEL: test_copysign_v2f32_v2f64:932; SVE: // %bb.0:933; SVE-NEXT: ptrue p0.d934; SVE-NEXT: ldr q0, [x1]935; SVE-NEXT: ldr d1, [x0]936; SVE-NEXT: fcvt z0.s, p0/m, z0.d937; SVE-NEXT: and z1.s, z1.s, #0x7fffffff938; SVE-NEXT: uzp1 z0.s, z0.s, z0.s939; SVE-NEXT: and z0.s, z0.s, #0x80000000940; SVE-NEXT: orr z0.d, z1.d, z0.d941; SVE-NEXT: str d0, [x0]942; SVE-NEXT: ret943;944; SVE2-LABEL: test_copysign_v2f32_v2f64:945; SVE2: // %bb.0:946; SVE2-NEXT: ptrue p0.d947; SVE2-NEXT: ldr q0, [x1]948; SVE2-NEXT: mov z1.s, #0x7fffffff949; SVE2-NEXT: ldr d2, [x0]950; SVE2-NEXT: fcvt z0.s, p0/m, z0.d951; SVE2-NEXT: uzp1 z0.s, z0.s, z0.s952; SVE2-NEXT: bsl z2.d, z2.d, z0.d, z1.d953; SVE2-NEXT: str d2, [x0]954; SVE2-NEXT: ret955;956; NONEON-NOSVE-LABEL: test_copysign_v2f32_v2f64:957; NONEON-NOSVE: // %bb.0:958; NONEON-NOSVE-NEXT: sub sp, sp, #48959; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48960; NONEON-NOSVE-NEXT: ldr d1, [x0]961; NONEON-NOSVE-NEXT: ldr q0, [x1]962; NONEON-NOSVE-NEXT: str d1, [sp, #8]963; NONEON-NOSVE-NEXT: str q0, [sp, #16]964; NONEON-NOSVE-NEXT: ldr s0, [sp, #12]965; NONEON-NOSVE-NEXT: ldp x8, x9, [sp, #16]966; NONEON-NOSVE-NEXT: fabs s0, s0967; NONEON-NOSVE-NEXT: tst x9, #0x8000000000000000968; NONEON-NOSVE-NEXT: fneg s1, s0969; NONEON-NOSVE-NEXT: fcsel s2, s1, s0, ne970; NONEON-NOSVE-NEXT: ldr s0, [sp, #8]971; NONEON-NOSVE-NEXT: tst x8, #0x8000000000000000972; NONEON-NOSVE-NEXT: fabs s0, s0973; NONEON-NOSVE-NEXT: fneg s1, s0974; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne975; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #40]976; NONEON-NOSVE-NEXT: ldr d0, [sp, #40]977; NONEON-NOSVE-NEXT: str d0, [x0]978; NONEON-NOSVE-NEXT: add sp, sp, #48979; NONEON-NOSVE-NEXT: ret980 %a = load <2 x float>, ptr %ap981 %b = load <2 x double>, ptr %bp982 %tmp0 = fptrunc <2 x double> %b to <2 x float>983 %r = call <2 x float> @llvm.copysign.v2f32(<2 x float> %a, <2 x float> %tmp0)984 store <2 x float> %r, ptr %ap985 ret void986}987 988;============ v4f32989 990; SplitVecOp #1991define void @test_copysign_v4f32_v4f64(ptr %ap, ptr %bp) {992; SVE-LABEL: test_copysign_v4f32_v4f64:993; SVE: // %bb.0:994; SVE-NEXT: ldp q0, q1, [x1]995; SVE-NEXT: ptrue p0.d996; SVE-NEXT: fcvt z1.s, p0/m, z1.d997; SVE-NEXT: fcvt z0.s, p0/m, z0.d998; SVE-NEXT: ptrue p0.s, vl2999; SVE-NEXT: uzp1 z1.s, z1.s, z1.s1000; SVE-NEXT: uzp1 z0.s, z0.s, z0.s1001; SVE-NEXT: splice z0.s, p0, z0.s, z1.s1002; SVE-NEXT: ldr q1, [x0]1003; SVE-NEXT: and z1.s, z1.s, #0x7fffffff1004; SVE-NEXT: and z0.s, z0.s, #0x800000001005; SVE-NEXT: orr z0.d, z1.d, z0.d1006; SVE-NEXT: str q0, [x0]1007; SVE-NEXT: ret1008;1009; SVE2-LABEL: test_copysign_v4f32_v4f64:1010; SVE2: // %bb.0:1011; SVE2-NEXT: ldp q1, q0, [x1]1012; SVE2-NEXT: ptrue p0.d1013; SVE2-NEXT: fcvt z0.s, p0/m, z0.d1014; SVE2-NEXT: fcvt z1.s, p0/m, z1.d1015; SVE2-NEXT: ptrue p0.s, vl21016; SVE2-NEXT: uzp1 z3.s, z0.s, z0.s1017; SVE2-NEXT: uzp1 z2.s, z1.s, z1.s1018; SVE2-NEXT: mov z1.s, #0x7fffffff1019; SVE2-NEXT: splice z0.s, p0, { z2.s, z3.s }1020; SVE2-NEXT: ldr q2, [x0]1021; SVE2-NEXT: bsl z2.d, z2.d, z0.d, z1.d1022; SVE2-NEXT: str q2, [x0]1023; SVE2-NEXT: ret1024;1025; NONEON-NOSVE-LABEL: test_copysign_v4f32_v4f64:1026; NONEON-NOSVE: // %bb.0:1027; NONEON-NOSVE-NEXT: sub sp, sp, #641028; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 641029; NONEON-NOSVE-NEXT: ldp q1, q0, [x1]1030; NONEON-NOSVE-NEXT: ldr q2, [x0]1031; NONEON-NOSVE-NEXT: str q2, [sp]1032; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #16]1033; NONEON-NOSVE-NEXT: ldr s0, [sp, #12]1034; NONEON-NOSVE-NEXT: ldp x8, x9, [sp, #32]1035; NONEON-NOSVE-NEXT: fabs s0, s01036; NONEON-NOSVE-NEXT: tst x9, #0x80000000000000001037; NONEON-NOSVE-NEXT: fneg s1, s01038; NONEON-NOSVE-NEXT: fcsel s2, s1, s0, ne1039; NONEON-NOSVE-NEXT: ldr s0, [sp, #8]1040; NONEON-NOSVE-NEXT: tst x8, #0x80000000000000001041; NONEON-NOSVE-NEXT: ldp x8, x9, [sp, #16]1042; NONEON-NOSVE-NEXT: fabs s0, s01043; NONEON-NOSVE-NEXT: fneg s1, s01044; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1045; NONEON-NOSVE-NEXT: tst x9, #0x80000000000000001046; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #56]1047; NONEON-NOSVE-NEXT: ldr s0, [sp, #4]1048; NONEON-NOSVE-NEXT: fabs s0, s01049; NONEON-NOSVE-NEXT: fneg s1, s01050; NONEON-NOSVE-NEXT: fcsel s2, s1, s0, ne1051; NONEON-NOSVE-NEXT: ldr s0, [sp]1052; NONEON-NOSVE-NEXT: tst x8, #0x80000000000000001053; NONEON-NOSVE-NEXT: fabs s0, s01054; NONEON-NOSVE-NEXT: fneg s1, s01055; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1056; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #48]1057; NONEON-NOSVE-NEXT: ldr q0, [sp, #48]1058; NONEON-NOSVE-NEXT: str q0, [x0]1059; NONEON-NOSVE-NEXT: add sp, sp, #641060; NONEON-NOSVE-NEXT: ret1061 %a = load <4 x float>, ptr %ap1062 %b = load <4 x double>, ptr %bp1063 %tmp0 = fptrunc <4 x double> %b to <4 x float>1064 %r = call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> %tmp0)1065 store <4 x float> %r, ptr %ap1066 ret void1067}1068 1069;============ v2f641070 1071define void @test_copysign_v2f64_v2f32(ptr %ap, ptr %bp) {1072; SVE-LABEL: test_copysign_v2f64_v2f32:1073; SVE: // %bb.0:1074; SVE-NEXT: ptrue p0.d, vl21075; SVE-NEXT: ldr q0, [x0]1076; SVE-NEXT: ld1w { z1.d }, p0/z, [x1]1077; SVE-NEXT: and z0.d, z0.d, #0x7fffffffffffffff1078; SVE-NEXT: fcvt z1.d, p0/m, z1.s1079; SVE-NEXT: and z1.d, z1.d, #0x80000000000000001080; SVE-NEXT: orr z0.d, z0.d, z1.d1081; SVE-NEXT: str q0, [x0]1082; SVE-NEXT: ret1083;1084; SVE2-LABEL: test_copysign_v2f64_v2f32:1085; SVE2: // %bb.0:1086; SVE2-NEXT: ptrue p0.d, vl21087; SVE2-NEXT: mov z1.d, #0x7fffffffffffffff1088; SVE2-NEXT: ldr q2, [x0]1089; SVE2-NEXT: ld1w { z0.d }, p0/z, [x1]1090; SVE2-NEXT: fcvt z0.d, p0/m, z0.s1091; SVE2-NEXT: bsl z2.d, z2.d, z0.d, z1.d1092; SVE2-NEXT: str q2, [x0]1093; SVE2-NEXT: ret1094;1095; NONEON-NOSVE-LABEL: test_copysign_v2f64_v2f32:1096; NONEON-NOSVE: // %bb.0:1097; NONEON-NOSVE-NEXT: sub sp, sp, #481098; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 481099; NONEON-NOSVE-NEXT: ldr q1, [x0]1100; NONEON-NOSVE-NEXT: ldr d0, [x1]1101; NONEON-NOSVE-NEXT: str q1, [sp]1102; NONEON-NOSVE-NEXT: str d0, [sp, #24]1103; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]1104; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #24]1105; NONEON-NOSVE-NEXT: fabs d0, d01106; NONEON-NOSVE-NEXT: tst w9, #0x800000001107; NONEON-NOSVE-NEXT: fneg d1, d01108; NONEON-NOSVE-NEXT: fcsel d2, d1, d0, ne1109; NONEON-NOSVE-NEXT: ldr d0, [sp]1110; NONEON-NOSVE-NEXT: tst w8, #0x800000001111; NONEON-NOSVE-NEXT: fabs d0, d01112; NONEON-NOSVE-NEXT: fneg d1, d01113; NONEON-NOSVE-NEXT: fcsel d0, d1, d0, ne1114; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #32]1115; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]1116; NONEON-NOSVE-NEXT: str q0, [x0]1117; NONEON-NOSVE-NEXT: add sp, sp, #481118; NONEON-NOSVE-NEXT: ret1119 %a = load <2 x double>, ptr %ap1120 %b = load < 2 x float>, ptr %bp1121 %tmp0 = fpext <2 x float> %b to <2 x double>1122 %r = call <2 x double> @llvm.copysign.v2f64(<2 x double> %a, <2 x double> %tmp0)1123 store <2 x double> %r, ptr %ap1124 ret void1125}1126 1127;============ v4f641128 1129; SplitVecRes mismatched1130define void @test_copysign_v4f64_v4f32(ptr %ap, ptr %bp) {1131; SVE-LABEL: test_copysign_v4f64_v4f32:1132; SVE: // %bb.0:1133; SVE-NEXT: ptrue p0.d, vl21134; SVE-NEXT: mov x8, #2 // =0x21135; SVE-NEXT: ldp q2, q3, [x0]1136; SVE-NEXT: ld1w { z0.d }, p0/z, [x1]1137; SVE-NEXT: ld1w { z1.d }, p0/z, [x1, x8, lsl #2]1138; SVE-NEXT: and z2.d, z2.d, #0x7fffffffffffffff1139; SVE-NEXT: and z3.d, z3.d, #0x7fffffffffffffff1140; SVE-NEXT: fcvt z0.d, p0/m, z0.s1141; SVE-NEXT: fcvt z1.d, p0/m, z1.s1142; SVE-NEXT: and z0.d, z0.d, #0x80000000000000001143; SVE-NEXT: and z1.d, z1.d, #0x80000000000000001144; SVE-NEXT: orr z0.d, z2.d, z0.d1145; SVE-NEXT: orr z1.d, z3.d, z1.d1146; SVE-NEXT: stp q0, q1, [x0]1147; SVE-NEXT: ret1148;1149; SVE2-LABEL: test_copysign_v4f64_v4f32:1150; SVE2: // %bb.0:1151; SVE2-NEXT: ptrue p0.d, vl21152; SVE2-NEXT: mov x8, #2 // =0x21153; SVE2-NEXT: mov z2.d, #0x7fffffffffffffff1154; SVE2-NEXT: ldp q3, q4, [x0]1155; SVE2-NEXT: ld1w { z0.d }, p0/z, [x1]1156; SVE2-NEXT: ld1w { z1.d }, p0/z, [x1, x8, lsl #2]1157; SVE2-NEXT: fcvt z0.d, p0/m, z0.s1158; SVE2-NEXT: fcvt z1.d, p0/m, z1.s1159; SVE2-NEXT: bsl z3.d, z3.d, z0.d, z2.d1160; SVE2-NEXT: bsl z4.d, z4.d, z1.d, z2.d1161; SVE2-NEXT: stp q3, q4, [x0]1162; SVE2-NEXT: ret1163;1164; NONEON-NOSVE-LABEL: test_copysign_v4f64_v4f32:1165; NONEON-NOSVE: // %bb.0:1166; NONEON-NOSVE-NEXT: sub sp, sp, #961167; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 961168; NONEON-NOSVE-NEXT: ldp q1, q2, [x0]1169; NONEON-NOSVE-NEXT: ldr q0, [x1]1170; NONEON-NOSVE-NEXT: stp q0, q2, [sp, #16]1171; NONEON-NOSVE-NEXT: ldp d0, d2, [sp, #16]1172; NONEON-NOSVE-NEXT: str q1, [sp]1173; NONEON-NOSVE-NEXT: stp d2, d0, [sp, #48]1174; NONEON-NOSVE-NEXT: ldr d0, [sp, #40]1175; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #48]1176; NONEON-NOSVE-NEXT: fabs d0, d01177; NONEON-NOSVE-NEXT: tst w9, #0x800000001178; NONEON-NOSVE-NEXT: fneg d1, d01179; NONEON-NOSVE-NEXT: fcsel d2, d1, d0, ne1180; NONEON-NOSVE-NEXT: ldr d0, [sp, #32]1181; NONEON-NOSVE-NEXT: tst w8, #0x800000001182; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #56]1183; NONEON-NOSVE-NEXT: fabs d0, d01184; NONEON-NOSVE-NEXT: fneg d1, d01185; NONEON-NOSVE-NEXT: fcsel d0, d1, d0, ne1186; NONEON-NOSVE-NEXT: tst w9, #0x800000001187; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #64]1188; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]1189; NONEON-NOSVE-NEXT: fabs d0, d01190; NONEON-NOSVE-NEXT: fneg d1, d01191; NONEON-NOSVE-NEXT: fcsel d2, d1, d0, ne1192; NONEON-NOSVE-NEXT: ldr d0, [sp]1193; NONEON-NOSVE-NEXT: tst w8, #0x800000001194; NONEON-NOSVE-NEXT: fabs d0, d01195; NONEON-NOSVE-NEXT: fneg d1, d01196; NONEON-NOSVE-NEXT: fcsel d0, d1, d0, ne1197; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #80]1198; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #64]1199; NONEON-NOSVE-NEXT: stp q0, q1, [x0]1200; NONEON-NOSVE-NEXT: add sp, sp, #961201; NONEON-NOSVE-NEXT: ret1202 %a = load <4 x double>, ptr %ap1203 %b = load <4 x float>, ptr %bp1204 %tmp0 = fpext <4 x float> %b to <4 x double>1205 %r = call <4 x double> @llvm.copysign.v4f64(<4 x double> %a, <4 x double> %tmp0)1206 store <4 x double> %r, ptr %ap1207 ret void1208}1209 1210;============ v4f161211 1212define void @test_copysign_v4f16_v4f32(ptr %ap, ptr %bp) {1213; SVE-LABEL: test_copysign_v4f16_v4f32:1214; SVE: // %bb.0:1215; SVE-NEXT: ptrue p0.s1216; SVE-NEXT: ldr q0, [x1]1217; SVE-NEXT: ldr d1, [x0]1218; SVE-NEXT: fcvt z0.h, p0/m, z0.s1219; SVE-NEXT: and z1.h, z1.h, #0x7fff1220; SVE-NEXT: uzp1 z0.h, z0.h, z0.h1221; SVE-NEXT: and z0.h, z0.h, #0x80001222; SVE-NEXT: orr z0.d, z1.d, z0.d1223; SVE-NEXT: str d0, [x0]1224; SVE-NEXT: ret1225;1226; SVE2-LABEL: test_copysign_v4f16_v4f32:1227; SVE2: // %bb.0:1228; SVE2-NEXT: ptrue p0.s1229; SVE2-NEXT: ldr q0, [x1]1230; SVE2-NEXT: mov z1.h, #32767 // =0x7fff1231; SVE2-NEXT: ldr d2, [x0]1232; SVE2-NEXT: fcvt z0.h, p0/m, z0.s1233; SVE2-NEXT: uzp1 z0.h, z0.h, z0.h1234; SVE2-NEXT: bsl z2.d, z2.d, z0.d, z1.d1235; SVE2-NEXT: str d2, [x0]1236; SVE2-NEXT: ret1237;1238; NONEON-NOSVE-LABEL: test_copysign_v4f16_v4f32:1239; NONEON-NOSVE: // %bb.0:1240; NONEON-NOSVE-NEXT: sub sp, sp, #481241; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 481242; NONEON-NOSVE-NEXT: ldr d1, [x0]1243; NONEON-NOSVE-NEXT: ldr q0, [x1]1244; NONEON-NOSVE-NEXT: str d1, [sp, #8]1245; NONEON-NOSVE-NEXT: str q0, [sp, #16]1246; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]1247; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #24]1248; NONEON-NOSVE-NEXT: fcvt s0, h01249; NONEON-NOSVE-NEXT: tst w9, #0x800000001250; NONEON-NOSVE-NEXT: fabs s0, s01251; NONEON-NOSVE-NEXT: fneg s1, s01252; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1253; NONEON-NOSVE-NEXT: tst w8, #0x800000001254; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #16]1255; NONEON-NOSVE-NEXT: fcvt h0, s01256; NONEON-NOSVE-NEXT: str h0, [sp, #46]1257; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]1258; NONEON-NOSVE-NEXT: fcvt s0, h01259; NONEON-NOSVE-NEXT: fabs s0, s01260; NONEON-NOSVE-NEXT: fneg s1, s01261; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1262; NONEON-NOSVE-NEXT: tst w9, #0x800000001263; NONEON-NOSVE-NEXT: fcvt h0, s01264; NONEON-NOSVE-NEXT: str h0, [sp, #44]1265; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]1266; NONEON-NOSVE-NEXT: fcvt s0, h01267; NONEON-NOSVE-NEXT: fabs s0, s01268; NONEON-NOSVE-NEXT: fneg s1, s01269; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1270; NONEON-NOSVE-NEXT: tst w8, #0x800000001271; NONEON-NOSVE-NEXT: fcvt h0, s01272; NONEON-NOSVE-NEXT: str h0, [sp, #42]1273; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]1274; NONEON-NOSVE-NEXT: fcvt s0, h01275; NONEON-NOSVE-NEXT: fabs s0, s01276; NONEON-NOSVE-NEXT: fneg s1, s01277; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1278; NONEON-NOSVE-NEXT: fcvt h0, s01279; NONEON-NOSVE-NEXT: str h0, [sp, #40]1280; NONEON-NOSVE-NEXT: ldr d0, [sp, #40]1281; NONEON-NOSVE-NEXT: str d0, [x0]1282; NONEON-NOSVE-NEXT: add sp, sp, #481283; NONEON-NOSVE-NEXT: ret1284 %a = load <4 x half>, ptr %ap1285 %b = load <4 x float>, ptr %bp1286 %tmp0 = fptrunc <4 x float> %b to <4 x half>1287 %r = call <4 x half> @llvm.copysign.v4f16(<4 x half> %a, <4 x half> %tmp0)1288 store <4 x half> %r, ptr %ap1289 ret void1290}1291 1292define void @test_copysign_v4f16_v4f64(ptr %ap, ptr %bp) {1293; SVE-LABEL: test_copysign_v4f16_v4f64:1294; SVE: // %bb.0:1295; SVE-NEXT: ldp q0, q1, [x1]1296; SVE-NEXT: mov z2.d, z1.d[1]1297; SVE-NEXT: mov z3.d, z0.d[1]1298; SVE-NEXT: fcvt h1, d11299; SVE-NEXT: fcvt h0, d01300; SVE-NEXT: fcvt h2, d21301; SVE-NEXT: fcvt h3, d31302; SVE-NEXT: zip1 z1.h, z1.h, z2.h1303; SVE-NEXT: zip1 z0.h, z0.h, z3.h1304; SVE-NEXT: zip1 z0.s, z0.s, z1.s1305; SVE-NEXT: ldr d1, [x0]1306; SVE-NEXT: and z1.h, z1.h, #0x7fff1307; SVE-NEXT: and z0.h, z0.h, #0x80001308; SVE-NEXT: orr z0.d, z1.d, z0.d1309; SVE-NEXT: str d0, [x0]1310; SVE-NEXT: ret1311;1312; SVE2-LABEL: test_copysign_v4f16_v4f64:1313; SVE2: // %bb.0:1314; SVE2-NEXT: ldp q0, q1, [x1]1315; SVE2-NEXT: mov z2.d, z1.d[1]1316; SVE2-NEXT: mov z3.d, z0.d[1]1317; SVE2-NEXT: fcvt h1, d11318; SVE2-NEXT: fcvt h0, d01319; SVE2-NEXT: fcvt h2, d21320; SVE2-NEXT: fcvt h3, d31321; SVE2-NEXT: zip1 z1.h, z1.h, z2.h1322; SVE2-NEXT: zip1 z0.h, z0.h, z3.h1323; SVE2-NEXT: mov z2.h, #32767 // =0x7fff1324; SVE2-NEXT: zip1 z0.s, z0.s, z1.s1325; SVE2-NEXT: ldr d1, [x0]1326; SVE2-NEXT: bsl z1.d, z1.d, z0.d, z2.d1327; SVE2-NEXT: str d1, [x0]1328; SVE2-NEXT: ret1329;1330; NONEON-NOSVE-LABEL: test_copysign_v4f16_v4f64:1331; NONEON-NOSVE: // %bb.0:1332; NONEON-NOSVE-NEXT: sub sp, sp, #641333; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 641334; NONEON-NOSVE-NEXT: ldp q1, q0, [x1]1335; NONEON-NOSVE-NEXT: ldr d2, [x0]1336; NONEON-NOSVE-NEXT: str d2, [sp, #8]1337; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #16]1338; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]1339; NONEON-NOSVE-NEXT: ldp x8, x9, [sp, #32]1340; NONEON-NOSVE-NEXT: fcvt s0, h01341; NONEON-NOSVE-NEXT: tst x9, #0x80000000000000001342; NONEON-NOSVE-NEXT: fabs s0, s01343; NONEON-NOSVE-NEXT: fneg s1, s01344; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1345; NONEON-NOSVE-NEXT: tst x8, #0x80000000000000001346; NONEON-NOSVE-NEXT: ldp x8, x9, [sp, #16]1347; NONEON-NOSVE-NEXT: fcvt h0, s01348; NONEON-NOSVE-NEXT: str h0, [sp, #62]1349; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]1350; NONEON-NOSVE-NEXT: fcvt s0, h01351; NONEON-NOSVE-NEXT: fabs s0, s01352; NONEON-NOSVE-NEXT: fneg s1, s01353; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1354; NONEON-NOSVE-NEXT: tst x9, #0x80000000000000001355; NONEON-NOSVE-NEXT: fcvt h0, s01356; NONEON-NOSVE-NEXT: str h0, [sp, #60]1357; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]1358; NONEON-NOSVE-NEXT: fcvt s0, h01359; NONEON-NOSVE-NEXT: fabs s0, s01360; NONEON-NOSVE-NEXT: fneg s1, s01361; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1362; NONEON-NOSVE-NEXT: tst x8, #0x80000000000000001363; NONEON-NOSVE-NEXT: fcvt h0, s01364; NONEON-NOSVE-NEXT: str h0, [sp, #58]1365; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]1366; NONEON-NOSVE-NEXT: fcvt s0, h01367; NONEON-NOSVE-NEXT: fabs s0, s01368; NONEON-NOSVE-NEXT: fneg s1, s01369; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1370; NONEON-NOSVE-NEXT: fcvt h0, s01371; NONEON-NOSVE-NEXT: str h0, [sp, #56]1372; NONEON-NOSVE-NEXT: ldr d0, [sp, #56]1373; NONEON-NOSVE-NEXT: str d0, [x0]1374; NONEON-NOSVE-NEXT: add sp, sp, #641375; NONEON-NOSVE-NEXT: ret1376 %a = load <4 x half>, ptr %ap1377 %b = load <4 x double>, ptr %bp1378 %tmp0 = fptrunc <4 x double> %b to <4 x half>1379 %r = call <4 x half> @llvm.copysign.v4f16(<4 x half> %a, <4 x half> %tmp0)1380 store <4 x half> %r, ptr %ap1381 ret void1382}1383 1384;============ v8f161385 1386define void @test_copysign_v8f16_v8f32(ptr %ap, ptr %bp) {1387; SVE-LABEL: test_copysign_v8f16_v8f32:1388; SVE: // %bb.0:1389; SVE-NEXT: ldp q0, q1, [x1]1390; SVE-NEXT: ptrue p0.s1391; SVE-NEXT: fcvt z1.h, p0/m, z1.s1392; SVE-NEXT: fcvt z0.h, p0/m, z0.s1393; SVE-NEXT: ptrue p0.h, vl41394; SVE-NEXT: uzp1 z1.h, z1.h, z1.h1395; SVE-NEXT: uzp1 z0.h, z0.h, z0.h1396; SVE-NEXT: splice z0.h, p0, z0.h, z1.h1397; SVE-NEXT: ldr q1, [x0]1398; SVE-NEXT: and z1.h, z1.h, #0x7fff1399; SVE-NEXT: and z0.h, z0.h, #0x80001400; SVE-NEXT: orr z0.d, z1.d, z0.d1401; SVE-NEXT: str q0, [x0]1402; SVE-NEXT: ret1403;1404; SVE2-LABEL: test_copysign_v8f16_v8f32:1405; SVE2: // %bb.0:1406; SVE2-NEXT: ldp q1, q0, [x1]1407; SVE2-NEXT: ptrue p0.s1408; SVE2-NEXT: fcvt z0.h, p0/m, z0.s1409; SVE2-NEXT: fcvt z1.h, p0/m, z1.s1410; SVE2-NEXT: ptrue p0.h, vl41411; SVE2-NEXT: uzp1 z3.h, z0.h, z0.h1412; SVE2-NEXT: uzp1 z2.h, z1.h, z1.h1413; SVE2-NEXT: mov z1.h, #32767 // =0x7fff1414; SVE2-NEXT: splice z0.h, p0, { z2.h, z3.h }1415; SVE2-NEXT: ldr q2, [x0]1416; SVE2-NEXT: bsl z2.d, z2.d, z0.d, z1.d1417; SVE2-NEXT: str q2, [x0]1418; SVE2-NEXT: ret1419;1420; NONEON-NOSVE-LABEL: test_copysign_v8f16_v8f32:1421; NONEON-NOSVE: // %bb.0:1422; NONEON-NOSVE-NEXT: sub sp, sp, #641423; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 641424; NONEON-NOSVE-NEXT: ldp q1, q0, [x1]1425; NONEON-NOSVE-NEXT: ldr q2, [x0]1426; NONEON-NOSVE-NEXT: str q2, [sp]1427; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #16]1428; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]1429; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #40]1430; NONEON-NOSVE-NEXT: fcvt s0, h01431; NONEON-NOSVE-NEXT: tst w9, #0x800000001432; NONEON-NOSVE-NEXT: fabs s0, s01433; NONEON-NOSVE-NEXT: fneg s1, s01434; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1435; NONEON-NOSVE-NEXT: tst w8, #0x800000001436; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #32]1437; NONEON-NOSVE-NEXT: fcvt h0, s01438; NONEON-NOSVE-NEXT: str h0, [sp, #62]1439; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]1440; NONEON-NOSVE-NEXT: fcvt s0, h01441; NONEON-NOSVE-NEXT: fabs s0, s01442; NONEON-NOSVE-NEXT: fneg s1, s01443; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1444; NONEON-NOSVE-NEXT: tst w9, #0x800000001445; NONEON-NOSVE-NEXT: fcvt h0, s01446; NONEON-NOSVE-NEXT: str h0, [sp, #60]1447; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]1448; NONEON-NOSVE-NEXT: fcvt s0, h01449; NONEON-NOSVE-NEXT: fabs s0, s01450; NONEON-NOSVE-NEXT: fneg s1, s01451; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1452; NONEON-NOSVE-NEXT: tst w8, #0x800000001453; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #24]1454; NONEON-NOSVE-NEXT: fcvt h0, s01455; NONEON-NOSVE-NEXT: str h0, [sp, #58]1456; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]1457; NONEON-NOSVE-NEXT: fcvt s0, h01458; NONEON-NOSVE-NEXT: fabs s0, s01459; NONEON-NOSVE-NEXT: fneg s1, s01460; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1461; NONEON-NOSVE-NEXT: tst w9, #0x800000001462; NONEON-NOSVE-NEXT: fcvt h0, s01463; NONEON-NOSVE-NEXT: str h0, [sp, #56]1464; NONEON-NOSVE-NEXT: ldr h0, [sp, #6]1465; NONEON-NOSVE-NEXT: fcvt s0, h01466; NONEON-NOSVE-NEXT: fabs s0, s01467; NONEON-NOSVE-NEXT: fneg s1, s01468; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1469; NONEON-NOSVE-NEXT: tst w8, #0x800000001470; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #16]1471; NONEON-NOSVE-NEXT: fcvt h0, s01472; NONEON-NOSVE-NEXT: str h0, [sp, #54]1473; NONEON-NOSVE-NEXT: ldr h0, [sp, #4]1474; NONEON-NOSVE-NEXT: fcvt s0, h01475; NONEON-NOSVE-NEXT: fabs s0, s01476; NONEON-NOSVE-NEXT: fneg s1, s01477; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1478; NONEON-NOSVE-NEXT: tst w9, #0x800000001479; NONEON-NOSVE-NEXT: fcvt h0, s01480; NONEON-NOSVE-NEXT: str h0, [sp, #52]1481; NONEON-NOSVE-NEXT: ldr h0, [sp, #2]1482; NONEON-NOSVE-NEXT: fcvt s0, h01483; NONEON-NOSVE-NEXT: fabs s0, s01484; NONEON-NOSVE-NEXT: fneg s1, s01485; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1486; NONEON-NOSVE-NEXT: tst w8, #0x800000001487; NONEON-NOSVE-NEXT: fcvt h0, s01488; NONEON-NOSVE-NEXT: str h0, [sp, #50]1489; NONEON-NOSVE-NEXT: ldr h0, [sp]1490; NONEON-NOSVE-NEXT: fcvt s0, h01491; NONEON-NOSVE-NEXT: fabs s0, s01492; NONEON-NOSVE-NEXT: fneg s1, s01493; NONEON-NOSVE-NEXT: fcsel s0, s1, s0, ne1494; NONEON-NOSVE-NEXT: fcvt h0, s01495; NONEON-NOSVE-NEXT: str h0, [sp, #48]1496; NONEON-NOSVE-NEXT: ldr q0, [sp, #48]1497; NONEON-NOSVE-NEXT: str q0, [x0]1498; NONEON-NOSVE-NEXT: add sp, sp, #641499; NONEON-NOSVE-NEXT: ret1500 %a = load <8 x half>, ptr %ap1501 %b = load <8 x float>, ptr %bp1502 %tmp0 = fptrunc <8 x float> %b to <8 x half>1503 %r = call <8 x half> @llvm.copysign.v8f16(<8 x half> %a, <8 x half> %tmp0)1504 store <8 x half> %r, ptr %ap1505 ret void1506}1507 1508declare <4 x half> @llvm.copysign.v4f16(<4 x half> %a, <4 x half> %b) #01509declare <8 x half> @llvm.copysign.v8f16(<8 x half> %a, <8 x half> %b) #01510declare <16 x half> @llvm.copysign.v16f16(<16 x half> %a, <16 x half> %b) #01511 1512declare <2 x float> @llvm.copysign.v2f32(<2 x float> %a, <2 x float> %b) #01513declare <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> %b) #01514declare <8 x float> @llvm.copysign.v8f32(<8 x float> %a, <8 x float> %b) #01515 1516declare <2 x double> @llvm.copysign.v2f64(<2 x double> %a, <2 x double> %b) #01517declare <4 x double> @llvm.copysign.v4f64(<4 x double> %a, <4 x double> %b) #01518