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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mattr=+sve -force-streaming-compatible < %s | FileCheck %s3; RUN: llc -force-streaming-compatible < %s | FileCheck %s --check-prefix=NONEON-NOSVE4 5target triple = "aarch64-unknown-linux-gnu"6 7;8; FCVTZU H -> H9;10 11define <4 x i16> @fcvtzu_v4f16_v4i16(<4 x half> %op1) {12; CHECK-LABEL: fcvtzu_v4f16_v4i16:13; CHECK: // %bb.0:14; CHECK-NEXT: ptrue p0.h, vl415; CHECK-NEXT: // kill: def $d0 killed $d0 def $z016; CHECK-NEXT: fcvtzu z0.h, p0/m, z0.h17; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z018; CHECK-NEXT: ret19;20; NONEON-NOSVE-LABEL: fcvtzu_v4f16_v4i16:21; NONEON-NOSVE: // %bb.0:22; NONEON-NOSVE-NEXT: str d0, [sp, #-16]!23; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1624; NONEON-NOSVE-NEXT: ldr h0, [sp, #6]25; NONEON-NOSVE-NEXT: fcvt s0, h026; NONEON-NOSVE-NEXT: fcvtzs w8, s027; NONEON-NOSVE-NEXT: ldr h0, [sp, #4]28; NONEON-NOSVE-NEXT: fcvt s0, h029; NONEON-NOSVE-NEXT: strh w8, [sp, #14]30; NONEON-NOSVE-NEXT: fcvtzs w8, s031; NONEON-NOSVE-NEXT: ldr h0, [sp, #2]32; NONEON-NOSVE-NEXT: fcvt s0, h033; NONEON-NOSVE-NEXT: strh w8, [sp, #12]34; NONEON-NOSVE-NEXT: fcvtzs w8, s035; NONEON-NOSVE-NEXT: ldr h0, [sp]36; NONEON-NOSVE-NEXT: fcvt s0, h037; NONEON-NOSVE-NEXT: strh w8, [sp, #10]38; NONEON-NOSVE-NEXT: fcvtzs w8, s039; NONEON-NOSVE-NEXT: strh w8, [sp, #8]40; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]41; NONEON-NOSVE-NEXT: add sp, sp, #1642; NONEON-NOSVE-NEXT: ret43 %res = fptoui <4 x half> %op1 to <4 x i16>44 ret <4 x i16> %res45}46 47define void @fcvtzu_v8f16_v8i16(ptr %a, ptr %b) {48; CHECK-LABEL: fcvtzu_v8f16_v8i16:49; CHECK: // %bb.0:50; CHECK-NEXT: ptrue p0.h, vl851; CHECK-NEXT: ldr q0, [x0]52; CHECK-NEXT: fcvtzu z0.h, p0/m, z0.h53; CHECK-NEXT: str q0, [x1]54; CHECK-NEXT: ret55;56; NONEON-NOSVE-LABEL: fcvtzu_v8f16_v8i16:57; NONEON-NOSVE: // %bb.0:58; NONEON-NOSVE-NEXT: ldr q0, [x0]59; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!60; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 3261; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]62; NONEON-NOSVE-NEXT: fcvt s0, h063; NONEON-NOSVE-NEXT: fcvtzs w8, s064; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]65; NONEON-NOSVE-NEXT: fcvt s0, h066; NONEON-NOSVE-NEXT: strh w8, [sp, #30]67; NONEON-NOSVE-NEXT: fcvtzs w8, s068; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]69; NONEON-NOSVE-NEXT: fcvt s0, h070; NONEON-NOSVE-NEXT: strh w8, [sp, #28]71; NONEON-NOSVE-NEXT: fcvtzs w8, s072; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]73; NONEON-NOSVE-NEXT: fcvt s0, h074; NONEON-NOSVE-NEXT: strh w8, [sp, #26]75; NONEON-NOSVE-NEXT: fcvtzs w8, s076; NONEON-NOSVE-NEXT: ldr h0, [sp, #6]77; NONEON-NOSVE-NEXT: fcvt s0, h078; NONEON-NOSVE-NEXT: strh w8, [sp, #24]79; NONEON-NOSVE-NEXT: fcvtzs w8, s080; NONEON-NOSVE-NEXT: ldr h0, [sp, #4]81; NONEON-NOSVE-NEXT: fcvt s0, h082; NONEON-NOSVE-NEXT: strh w8, [sp, #22]83; NONEON-NOSVE-NEXT: fcvtzs w8, s084; NONEON-NOSVE-NEXT: ldr h0, [sp, #2]85; NONEON-NOSVE-NEXT: fcvt s0, h086; NONEON-NOSVE-NEXT: strh w8, [sp, #20]87; NONEON-NOSVE-NEXT: fcvtzs w8, s088; NONEON-NOSVE-NEXT: ldr h0, [sp]89; NONEON-NOSVE-NEXT: fcvt s0, h090; NONEON-NOSVE-NEXT: strh w8, [sp, #18]91; NONEON-NOSVE-NEXT: fcvtzs w8, s092; NONEON-NOSVE-NEXT: strh w8, [sp, #16]93; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]94; NONEON-NOSVE-NEXT: str q0, [x1]95; NONEON-NOSVE-NEXT: add sp, sp, #3296; NONEON-NOSVE-NEXT: ret97 %op1 = load <8 x half>, ptr %a98 %res = fptoui <8 x half> %op1 to <8 x i16>99 store <8 x i16> %res, ptr %b100 ret void101}102 103define void @fcvtzu_v16f16_v16i16(ptr %a, ptr %b) {104; CHECK-LABEL: fcvtzu_v16f16_v16i16:105; CHECK: // %bb.0:106; CHECK-NEXT: ldp q0, q1, [x0]107; CHECK-NEXT: ptrue p0.h, vl8108; CHECK-NEXT: fcvtzu z0.h, p0/m, z0.h109; CHECK-NEXT: fcvtzu z1.h, p0/m, z1.h110; CHECK-NEXT: stp q0, q1, [x1]111; CHECK-NEXT: ret112;113; NONEON-NOSVE-LABEL: fcvtzu_v16f16_v16i16:114; NONEON-NOSVE: // %bb.0:115; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]116; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-64]!117; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 64118; NONEON-NOSVE-NEXT: ldr h0, [sp, #30]119; NONEON-NOSVE-NEXT: fcvt s0, h0120; NONEON-NOSVE-NEXT: fcvtzs w8, s0121; NONEON-NOSVE-NEXT: ldr h0, [sp, #28]122; NONEON-NOSVE-NEXT: fcvt s0, h0123; NONEON-NOSVE-NEXT: strh w8, [sp, #62]124; NONEON-NOSVE-NEXT: fcvtzs w8, s0125; NONEON-NOSVE-NEXT: ldr h0, [sp, #26]126; NONEON-NOSVE-NEXT: fcvt s0, h0127; NONEON-NOSVE-NEXT: strh w8, [sp, #60]128; NONEON-NOSVE-NEXT: fcvtzs w8, s0129; NONEON-NOSVE-NEXT: ldr h0, [sp, #24]130; NONEON-NOSVE-NEXT: fcvt s0, h0131; NONEON-NOSVE-NEXT: strh w8, [sp, #58]132; NONEON-NOSVE-NEXT: fcvtzs w8, s0133; NONEON-NOSVE-NEXT: ldr h0, [sp, #22]134; NONEON-NOSVE-NEXT: fcvt s0, h0135; NONEON-NOSVE-NEXT: strh w8, [sp, #56]136; NONEON-NOSVE-NEXT: fcvtzs w8, s0137; NONEON-NOSVE-NEXT: ldr h0, [sp, #20]138; NONEON-NOSVE-NEXT: fcvt s0, h0139; NONEON-NOSVE-NEXT: strh w8, [sp, #54]140; NONEON-NOSVE-NEXT: fcvtzs w8, s0141; NONEON-NOSVE-NEXT: ldr h0, [sp, #18]142; NONEON-NOSVE-NEXT: fcvt s0, h0143; NONEON-NOSVE-NEXT: strh w8, [sp, #52]144; NONEON-NOSVE-NEXT: fcvtzs w8, s0145; NONEON-NOSVE-NEXT: ldr h0, [sp, #16]146; NONEON-NOSVE-NEXT: fcvt s0, h0147; NONEON-NOSVE-NEXT: strh w8, [sp, #50]148; NONEON-NOSVE-NEXT: fcvtzs w8, s0149; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]150; NONEON-NOSVE-NEXT: fcvt s0, h0151; NONEON-NOSVE-NEXT: strh w8, [sp, #48]152; NONEON-NOSVE-NEXT: fcvtzs w8, s0153; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]154; NONEON-NOSVE-NEXT: fcvt s0, h0155; NONEON-NOSVE-NEXT: strh w8, [sp, #46]156; NONEON-NOSVE-NEXT: fcvtzs w8, s0157; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]158; NONEON-NOSVE-NEXT: fcvt s0, h0159; NONEON-NOSVE-NEXT: strh w8, [sp, #44]160; NONEON-NOSVE-NEXT: fcvtzs w8, s0161; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]162; NONEON-NOSVE-NEXT: fcvt s0, h0163; NONEON-NOSVE-NEXT: strh w8, [sp, #42]164; NONEON-NOSVE-NEXT: fcvtzs w8, s0165; NONEON-NOSVE-NEXT: ldr h0, [sp, #6]166; NONEON-NOSVE-NEXT: fcvt s0, h0167; NONEON-NOSVE-NEXT: strh w8, [sp, #40]168; NONEON-NOSVE-NEXT: fcvtzs w8, s0169; NONEON-NOSVE-NEXT: ldr h0, [sp, #4]170; NONEON-NOSVE-NEXT: fcvt s0, h0171; NONEON-NOSVE-NEXT: strh w8, [sp, #38]172; NONEON-NOSVE-NEXT: fcvtzs w8, s0173; NONEON-NOSVE-NEXT: ldr h0, [sp, #2]174; NONEON-NOSVE-NEXT: fcvt s0, h0175; NONEON-NOSVE-NEXT: strh w8, [sp, #36]176; NONEON-NOSVE-NEXT: fcvtzs w8, s0177; NONEON-NOSVE-NEXT: ldr h0, [sp]178; NONEON-NOSVE-NEXT: fcvt s0, h0179; NONEON-NOSVE-NEXT: strh w8, [sp, #34]180; NONEON-NOSVE-NEXT: fcvtzs w8, s0181; NONEON-NOSVE-NEXT: strh w8, [sp, #32]182; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #32]183; NONEON-NOSVE-NEXT: stp q0, q1, [x1]184; NONEON-NOSVE-NEXT: add sp, sp, #64185; NONEON-NOSVE-NEXT: ret186 %op1 = load <16 x half>, ptr %a187 %res = fptoui <16 x half> %op1 to <16 x i16>188 store <16 x i16> %res, ptr %b189 ret void190}191 192;193; FCVTZU H -> S194;195 196define <2 x i32> @fcvtzu_v2f16_v2i32(<2 x half> %op1) {197; CHECK-LABEL: fcvtzu_v2f16_v2i32:198; CHECK: // %bb.0:199; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0200; CHECK-NEXT: ptrue p0.s, vl4201; CHECK-NEXT: uunpklo z0.s, z0.h202; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.h203; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0204; CHECK-NEXT: ret205;206; NONEON-NOSVE-LABEL: fcvtzu_v2f16_v2i32:207; NONEON-NOSVE: // %bb.0:208; NONEON-NOSVE-NEXT: str d0, [sp, #-16]!209; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16210; NONEON-NOSVE-NEXT: ldr h0, [sp, #2]211; NONEON-NOSVE-NEXT: fcvt s0, h0212; NONEON-NOSVE-NEXT: fcvtzu w9, s0213; NONEON-NOSVE-NEXT: ldr h0, [sp]214; NONEON-NOSVE-NEXT: fcvt s0, h0215; NONEON-NOSVE-NEXT: fcvtzu w8, s0216; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #8]217; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]218; NONEON-NOSVE-NEXT: add sp, sp, #16219; NONEON-NOSVE-NEXT: ret220 %res = fptoui <2 x half> %op1 to <2 x i32>221 ret <2 x i32> %res222}223 224define <4 x i32> @fcvtzu_v4f16_v4i32(<4 x half> %op1) {225; CHECK-LABEL: fcvtzu_v4f16_v4i32:226; CHECK: // %bb.0:227; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0228; CHECK-NEXT: ptrue p0.s, vl4229; CHECK-NEXT: uunpklo z0.s, z0.h230; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.h231; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0232; CHECK-NEXT: ret233;234; NONEON-NOSVE-LABEL: fcvtzu_v4f16_v4i32:235; NONEON-NOSVE: // %bb.0:236; NONEON-NOSVE-NEXT: sub sp, sp, #32237; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32238; NONEON-NOSVE-NEXT: str d0, [sp, #8]239; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]240; NONEON-NOSVE-NEXT: fcvt s0, h0241; NONEON-NOSVE-NEXT: fcvtzu w9, s0242; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]243; NONEON-NOSVE-NEXT: fcvt s0, h0244; NONEON-NOSVE-NEXT: fcvtzu w8, s0245; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]246; NONEON-NOSVE-NEXT: fcvt s0, h0247; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #24]248; NONEON-NOSVE-NEXT: fcvtzu w9, s0249; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]250; NONEON-NOSVE-NEXT: fcvt s0, h0251; NONEON-NOSVE-NEXT: fcvtzu w8, s0252; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #16]253; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]254; NONEON-NOSVE-NEXT: add sp, sp, #32255; NONEON-NOSVE-NEXT: ret256 %res = fptoui <4 x half> %op1 to <4 x i32>257 ret <4 x i32> %res258}259 260define void @fcvtzu_v8f16_v8i32(ptr %a, ptr %b) {261; CHECK-LABEL: fcvtzu_v8f16_v8i32:262; CHECK: // %bb.0:263; CHECK-NEXT: ldr q0, [x0]264; CHECK-NEXT: ptrue p0.s, vl4265; CHECK-NEXT: movprfx z1, z0266; CHECK-NEXT: ext z1.b, z1.b, z0.b, #8267; CHECK-NEXT: uunpklo z0.s, z0.h268; CHECK-NEXT: uunpklo z1.s, z1.h269; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.h270; CHECK-NEXT: fcvtzu z1.s, p0/m, z1.h271; CHECK-NEXT: stp q0, q1, [x1]272; CHECK-NEXT: ret273;274; NONEON-NOSVE-LABEL: fcvtzu_v8f16_v8i32:275; NONEON-NOSVE: // %bb.0:276; NONEON-NOSVE-NEXT: ldr q0, [x0]277; NONEON-NOSVE-NEXT: str q0, [sp, #-64]!278; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 64279; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]280; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #16]281; NONEON-NOSVE-NEXT: ldr h0, [sp, #30]282; NONEON-NOSVE-NEXT: fcvt s0, h0283; NONEON-NOSVE-NEXT: fcvtzu w9, s0284; NONEON-NOSVE-NEXT: ldr h0, [sp, #28]285; NONEON-NOSVE-NEXT: fcvt s0, h0286; NONEON-NOSVE-NEXT: fcvtzu w8, s0287; NONEON-NOSVE-NEXT: ldr h0, [sp, #26]288; NONEON-NOSVE-NEXT: fcvt s0, h0289; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #56]290; NONEON-NOSVE-NEXT: fcvtzu w9, s0291; NONEON-NOSVE-NEXT: ldr h0, [sp, #24]292; NONEON-NOSVE-NEXT: fcvt s0, h0293; NONEON-NOSVE-NEXT: fcvtzu w8, s0294; NONEON-NOSVE-NEXT: ldr h0, [sp, #22]295; NONEON-NOSVE-NEXT: fcvt s0, h0296; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #48]297; NONEON-NOSVE-NEXT: fcvtzu w9, s0298; NONEON-NOSVE-NEXT: ldr h0, [sp, #20]299; NONEON-NOSVE-NEXT: fcvt s0, h0300; NONEON-NOSVE-NEXT: fcvtzu w8, s0301; NONEON-NOSVE-NEXT: ldr h0, [sp, #18]302; NONEON-NOSVE-NEXT: fcvt s0, h0303; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #40]304; NONEON-NOSVE-NEXT: fcvtzu w9, s0305; NONEON-NOSVE-NEXT: ldr h0, [sp, #16]306; NONEON-NOSVE-NEXT: fcvt s0, h0307; NONEON-NOSVE-NEXT: fcvtzu w8, s0308; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #32]309; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #32]310; NONEON-NOSVE-NEXT: stp q1, q0, [x1]311; NONEON-NOSVE-NEXT: add sp, sp, #64312; NONEON-NOSVE-NEXT: ret313 %op1 = load <8 x half>, ptr %a314 %res = fptoui <8 x half> %op1 to <8 x i32>315 store <8 x i32> %res, ptr %b316 ret void317}318 319define void @fcvtzu_v16f16_v16i32(ptr %a, ptr %b) {320; CHECK-LABEL: fcvtzu_v16f16_v16i32:321; CHECK: // %bb.0:322; CHECK-NEXT: ldp q1, q0, [x0]323; CHECK-NEXT: ptrue p0.s, vl4324; CHECK-NEXT: movprfx z2, z0325; CHECK-NEXT: ext z2.b, z2.b, z0.b, #8326; CHECK-NEXT: movprfx z3, z1327; CHECK-NEXT: ext z3.b, z3.b, z1.b, #8328; CHECK-NEXT: uunpklo z0.s, z0.h329; CHECK-NEXT: uunpklo z1.s, z1.h330; CHECK-NEXT: uunpklo z2.s, z2.h331; CHECK-NEXT: uunpklo z3.s, z3.h332; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.h333; CHECK-NEXT: fcvtzu z1.s, p0/m, z1.h334; CHECK-NEXT: fcvtzu z2.s, p0/m, z2.h335; CHECK-NEXT: fcvtzu z3.s, p0/m, z3.h336; CHECK-NEXT: stp q1, q3, [x1]337; CHECK-NEXT: stp q0, q2, [x1, #32]338; CHECK-NEXT: ret339;340; NONEON-NOSVE-LABEL: fcvtzu_v16f16_v16i32:341; NONEON-NOSVE: // %bb.0:342; NONEON-NOSVE-NEXT: ldp q0, q1, [x0]343; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-128]!344; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 128345; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]346; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #32]347; NONEON-NOSVE-NEXT: ldp d1, d0, [sp, #16]348; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #48]349; NONEON-NOSVE-NEXT: ldr h0, [sp, #46]350; NONEON-NOSVE-NEXT: fcvt s0, h0351; NONEON-NOSVE-NEXT: fcvtzu w9, s0352; NONEON-NOSVE-NEXT: ldr h0, [sp, #44]353; NONEON-NOSVE-NEXT: fcvt s0, h0354; NONEON-NOSVE-NEXT: fcvtzu w8, s0355; NONEON-NOSVE-NEXT: ldr h0, [sp, #42]356; NONEON-NOSVE-NEXT: fcvt s0, h0357; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #88]358; NONEON-NOSVE-NEXT: fcvtzu w9, s0359; NONEON-NOSVE-NEXT: ldr h0, [sp, #40]360; NONEON-NOSVE-NEXT: fcvt s0, h0361; NONEON-NOSVE-NEXT: fcvtzu w8, s0362; NONEON-NOSVE-NEXT: ldr h0, [sp, #38]363; NONEON-NOSVE-NEXT: fcvt s0, h0364; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #80]365; NONEON-NOSVE-NEXT: fcvtzu w9, s0366; NONEON-NOSVE-NEXT: ldr h0, [sp, #36]367; NONEON-NOSVE-NEXT: fcvt s0, h0368; NONEON-NOSVE-NEXT: fcvtzu w8, s0369; NONEON-NOSVE-NEXT: ldr h0, [sp, #34]370; NONEON-NOSVE-NEXT: fcvt s0, h0371; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #72]372; NONEON-NOSVE-NEXT: fcvtzu w9, s0373; NONEON-NOSVE-NEXT: ldr h0, [sp, #32]374; NONEON-NOSVE-NEXT: fcvt s0, h0375; NONEON-NOSVE-NEXT: fcvtzu w8, s0376; NONEON-NOSVE-NEXT: ldr h0, [sp, #62]377; NONEON-NOSVE-NEXT: fcvt s0, h0378; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #64]379; NONEON-NOSVE-NEXT: ldp q3, q2, [sp, #64]380; NONEON-NOSVE-NEXT: fcvtzu w9, s0381; NONEON-NOSVE-NEXT: ldr h0, [sp, #60]382; NONEON-NOSVE-NEXT: fcvt s0, h0383; NONEON-NOSVE-NEXT: fcvtzu w8, s0384; NONEON-NOSVE-NEXT: ldr h0, [sp, #58]385; NONEON-NOSVE-NEXT: fcvt s0, h0386; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #120]387; NONEON-NOSVE-NEXT: fcvtzu w9, s0388; NONEON-NOSVE-NEXT: ldr h0, [sp, #56]389; NONEON-NOSVE-NEXT: fcvt s0, h0390; NONEON-NOSVE-NEXT: fcvtzu w8, s0391; NONEON-NOSVE-NEXT: ldr h0, [sp, #54]392; NONEON-NOSVE-NEXT: fcvt s0, h0393; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #112]394; NONEON-NOSVE-NEXT: fcvtzu w9, s0395; NONEON-NOSVE-NEXT: ldr h0, [sp, #52]396; NONEON-NOSVE-NEXT: fcvt s0, h0397; NONEON-NOSVE-NEXT: fcvtzu w8, s0398; NONEON-NOSVE-NEXT: ldr h0, [sp, #50]399; NONEON-NOSVE-NEXT: fcvt s0, h0400; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #104]401; NONEON-NOSVE-NEXT: fcvtzu w9, s0402; NONEON-NOSVE-NEXT: ldr h0, [sp, #48]403; NONEON-NOSVE-NEXT: fcvt s0, h0404; NONEON-NOSVE-NEXT: fcvtzu w8, s0405; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #96]406; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #96]407; NONEON-NOSVE-NEXT: stp q2, q3, [x1]408; NONEON-NOSVE-NEXT: stp q1, q0, [x1, #32]409; NONEON-NOSVE-NEXT: add sp, sp, #128410; NONEON-NOSVE-NEXT: ret411 %op1 = load <16 x half>, ptr %a412 %res = fptoui <16 x half> %op1 to <16 x i32>413 store <16 x i32> %res, ptr %b414 ret void415}416 417;418; FCVTZU H -> D419;420 421define <1 x i64> @fcvtzu_v1f16_v1i64(<1 x half> %op1) {422; CHECK-LABEL: fcvtzu_v1f16_v1i64:423; CHECK: // %bb.0:424; CHECK-NEXT: ptrue p0.d425; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0426; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.h427; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0428; CHECK-NEXT: ret429;430; NONEON-NOSVE-LABEL: fcvtzu_v1f16_v1i64:431; NONEON-NOSVE: // %bb.0:432; NONEON-NOSVE-NEXT: sub sp, sp, #16433; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16434; NONEON-NOSVE-NEXT: fcvt s0, h0435; NONEON-NOSVE-NEXT: fcvtzu x8, s0436; NONEON-NOSVE-NEXT: str x8, [sp, #8]437; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]438; NONEON-NOSVE-NEXT: add sp, sp, #16439; NONEON-NOSVE-NEXT: ret440 %res = fptoui <1 x half> %op1 to <1 x i64>441 ret <1 x i64> %res442}443 444define <2 x i64> @fcvtzu_v2f16_v2i64(<2 x half> %op1) {445; CHECK-LABEL: fcvtzu_v2f16_v2i64:446; CHECK: // %bb.0:447; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0448; CHECK-NEXT: mov z1.h, z0.h[1]449; CHECK-NEXT: ptrue p0.d450; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.h451; CHECK-NEXT: fcvtzu z1.d, p0/m, z1.h452; CHECK-NEXT: zip1 z0.d, z0.d, z1.d453; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0454; CHECK-NEXT: ret455;456; NONEON-NOSVE-LABEL: fcvtzu_v2f16_v2i64:457; NONEON-NOSVE: // %bb.0:458; NONEON-NOSVE-NEXT: sub sp, sp, #32459; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32460; NONEON-NOSVE-NEXT: str d0, [sp, #8]461; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]462; NONEON-NOSVE-NEXT: fcvt s0, h0463; NONEON-NOSVE-NEXT: fcvtzu x9, s0464; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]465; NONEON-NOSVE-NEXT: fcvt s0, h0466; NONEON-NOSVE-NEXT: fcvtzu x8, s0467; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #16]468; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]469; NONEON-NOSVE-NEXT: add sp, sp, #32470; NONEON-NOSVE-NEXT: ret471 %res = fptoui <2 x half> %op1 to <2 x i64>472 ret <2 x i64> %res473}474 475define void @fcvtzu_v4f16_v4i64(ptr %a, ptr %b) {476; CHECK-LABEL: fcvtzu_v4f16_v4i64:477; CHECK: // %bb.0:478; CHECK-NEXT: ldr d0, [x0]479; CHECK-NEXT: ptrue p0.d480; CHECK-NEXT: mov z1.h, z0.h[3]481; CHECK-NEXT: mov z2.h, z0.h[2]482; CHECK-NEXT: mov z3.h, z0.h[1]483; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.h484; CHECK-NEXT: fcvtzu z1.d, p0/m, z1.h485; CHECK-NEXT: fcvtzu z2.d, p0/m, z2.h486; CHECK-NEXT: fcvtzu z3.d, p0/m, z3.h487; CHECK-NEXT: zip1 z1.d, z2.d, z1.d488; CHECK-NEXT: zip1 z0.d, z0.d, z3.d489; CHECK-NEXT: stp q0, q1, [x1]490; CHECK-NEXT: ret491;492; NONEON-NOSVE-LABEL: fcvtzu_v4f16_v4i64:493; NONEON-NOSVE: // %bb.0:494; NONEON-NOSVE-NEXT: sub sp, sp, #48495; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48496; NONEON-NOSVE-NEXT: ldr d0, [x0]497; NONEON-NOSVE-NEXT: str d0, [sp, #8]498; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]499; NONEON-NOSVE-NEXT: fcvt s0, h0500; NONEON-NOSVE-NEXT: fcvtzu x9, s0501; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]502; NONEON-NOSVE-NEXT: fcvt s0, h0503; NONEON-NOSVE-NEXT: fcvtzu x8, s0504; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]505; NONEON-NOSVE-NEXT: fcvt s0, h0506; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #16]507; NONEON-NOSVE-NEXT: fcvtzu x9, s0508; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]509; NONEON-NOSVE-NEXT: fcvt s0, h0510; NONEON-NOSVE-NEXT: fcvtzu x8, s0511; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #32]512; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #16]513; NONEON-NOSVE-NEXT: stp q1, q0, [x1]514; NONEON-NOSVE-NEXT: add sp, sp, #48515; NONEON-NOSVE-NEXT: ret516 %op1 = load <4 x half>, ptr %a517 %res = fptoui <4 x half> %op1 to <4 x i64>518 store <4 x i64> %res, ptr %b519 ret void520}521 522define void @fcvtzu_v8f16_v8i64(ptr %a, ptr %b) {523; CHECK-LABEL: fcvtzu_v8f16_v8i64:524; CHECK: // %bb.0:525; CHECK-NEXT: ldr q0, [x0]526; CHECK-NEXT: ptrue p0.d527; CHECK-NEXT: mov z2.h, z0.h[3]528; CHECK-NEXT: mov z3.h, z0.h[2]529; CHECK-NEXT: mov z4.h, z0.h[1]530; CHECK-NEXT: movprfx z1, z0531; CHECK-NEXT: ext z1.b, z1.b, z0.b, #8532; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.h533; CHECK-NEXT: fcvtzu z2.d, p0/m, z2.h534; CHECK-NEXT: fcvtzu z3.d, p0/m, z3.h535; CHECK-NEXT: fcvtzu z4.d, p0/m, z4.h536; CHECK-NEXT: mov z5.h, z1.h[3]537; CHECK-NEXT: mov z6.h, z1.h[2]538; CHECK-NEXT: mov z7.h, z1.h[1]539; CHECK-NEXT: fcvtzu z1.d, p0/m, z1.h540; CHECK-NEXT: fcvtzu z5.d, p0/m, z5.h541; CHECK-NEXT: fcvtzu z6.d, p0/m, z6.h542; CHECK-NEXT: fcvtzu z7.d, p0/m, z7.h543; CHECK-NEXT: zip1 z2.d, z3.d, z2.d544; CHECK-NEXT: zip1 z0.d, z0.d, z4.d545; CHECK-NEXT: zip1 z3.d, z6.d, z5.d546; CHECK-NEXT: zip1 z1.d, z1.d, z7.d547; CHECK-NEXT: stp q0, q2, [x1]548; CHECK-NEXT: stp q1, q3, [x1, #32]549; CHECK-NEXT: ret550;551; NONEON-NOSVE-LABEL: fcvtzu_v8f16_v8i64:552; NONEON-NOSVE: // %bb.0:553; NONEON-NOSVE-NEXT: ldr q0, [x0]554; NONEON-NOSVE-NEXT: str q0, [sp, #-96]!555; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96556; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]557; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #16]558; NONEON-NOSVE-NEXT: ldr h0, [sp, #26]559; NONEON-NOSVE-NEXT: fcvt s0, h0560; NONEON-NOSVE-NEXT: fcvtzu x9, s0561; NONEON-NOSVE-NEXT: ldr h0, [sp, #24]562; NONEON-NOSVE-NEXT: fcvt s0, h0563; NONEON-NOSVE-NEXT: fcvtzu x8, s0564; NONEON-NOSVE-NEXT: ldr h0, [sp, #30]565; NONEON-NOSVE-NEXT: fcvt s0, h0566; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #64]567; NONEON-NOSVE-NEXT: fcvtzu x9, s0568; NONEON-NOSVE-NEXT: ldr h0, [sp, #28]569; NONEON-NOSVE-NEXT: fcvt s0, h0570; NONEON-NOSVE-NEXT: fcvtzu x8, s0571; NONEON-NOSVE-NEXT: ldr h0, [sp, #18]572; NONEON-NOSVE-NEXT: fcvt s0, h0573; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #80]574; NONEON-NOSVE-NEXT: ldp q2, q3, [sp, #64]575; NONEON-NOSVE-NEXT: fcvtzu x9, s0576; NONEON-NOSVE-NEXT: ldr h0, [sp, #16]577; NONEON-NOSVE-NEXT: fcvt s0, h0578; NONEON-NOSVE-NEXT: fcvtzu x8, s0579; NONEON-NOSVE-NEXT: ldr h0, [sp, #22]580; NONEON-NOSVE-NEXT: fcvt s0, h0581; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #32]582; NONEON-NOSVE-NEXT: fcvtzu x9, s0583; NONEON-NOSVE-NEXT: ldr h0, [sp, #20]584; NONEON-NOSVE-NEXT: fcvt s0, h0585; NONEON-NOSVE-NEXT: fcvtzu x8, s0586; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #48]587; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #32]588; NONEON-NOSVE-NEXT: stp q2, q3, [x1]589; NONEON-NOSVE-NEXT: stp q1, q0, [x1, #32]590; NONEON-NOSVE-NEXT: add sp, sp, #96591; NONEON-NOSVE-NEXT: ret592 %op1 = load <8 x half>, ptr %a593 %res = fptoui <8 x half> %op1 to <8 x i64>594 store <8 x i64> %res, ptr %b595 ret void596}597 598define void @fcvtzu_v16f16_v16i64(ptr %a, ptr %b) {599; CHECK-LABEL: fcvtzu_v16f16_v16i64:600; CHECK: // %bb.0:601; CHECK-NEXT: ldp q1, q0, [x0]602; CHECK-NEXT: ptrue p0.d603; CHECK-NEXT: mov z2.h, z1.h[1]604; CHECK-NEXT: mov z3.h, z0.h[3]605; CHECK-NEXT: mov z4.h, z0.h[2]606; CHECK-NEXT: movprfx z5, z1607; CHECK-NEXT: ext z5.b, z5.b, z1.b, #8608; CHECK-NEXT: movprfx z7, z1609; CHECK-NEXT: fcvtzu z7.d, p0/m, z1.h610; CHECK-NEXT: mov z16.h, z1.h[3]611; CHECK-NEXT: mov z1.h, z1.h[2]612; CHECK-NEXT: mov z17.h, z0.h[1]613; CHECK-NEXT: movprfx z6, z0614; CHECK-NEXT: ext z6.b, z6.b, z0.b, #8615; CHECK-NEXT: fcvtzu z2.d, p0/m, z2.h616; CHECK-NEXT: fcvtzu z3.d, p0/m, z3.h617; CHECK-NEXT: fcvtzu z4.d, p0/m, z4.h618; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.h619; CHECK-NEXT: fcvtzu z16.d, p0/m, z16.h620; CHECK-NEXT: mov z18.h, z5.h[3]621; CHECK-NEXT: fcvtzu z17.d, p0/m, z17.h622; CHECK-NEXT: fcvtzu z1.d, p0/m, z1.h623; CHECK-NEXT: mov z19.h, z6.h[3]624; CHECK-NEXT: mov z20.h, z6.h[2]625; CHECK-NEXT: mov z21.h, z6.h[1]626; CHECK-NEXT: fcvtzu z6.d, p0/m, z6.h627; CHECK-NEXT: zip1 z2.d, z7.d, z2.d628; CHECK-NEXT: mov z7.h, z5.h[2]629; CHECK-NEXT: zip1 z3.d, z4.d, z3.d630; CHECK-NEXT: mov z4.h, z5.h[1]631; CHECK-NEXT: fcvtzu z19.d, p0/m, z19.h632; CHECK-NEXT: fcvtzu z5.d, p0/m, z5.h633; CHECK-NEXT: fcvtzu z20.d, p0/m, z20.h634; CHECK-NEXT: zip1 z0.d, z0.d, z17.d635; CHECK-NEXT: movprfx z17, z21636; CHECK-NEXT: fcvtzu z17.d, p0/m, z21.h637; CHECK-NEXT: zip1 z1.d, z1.d, z16.d638; CHECK-NEXT: movprfx z16, z18639; CHECK-NEXT: fcvtzu z16.d, p0/m, z18.h640; CHECK-NEXT: fcvtzu z7.d, p0/m, z7.h641; CHECK-NEXT: fcvtzu z4.d, p0/m, z4.h642; CHECK-NEXT: stp q0, q3, [x1, #64]643; CHECK-NEXT: zip1 z0.d, z20.d, z19.d644; CHECK-NEXT: zip1 z3.d, z6.d, z17.d645; CHECK-NEXT: stp q2, q1, [x1]646; CHECK-NEXT: zip1 z1.d, z7.d, z16.d647; CHECK-NEXT: zip1 z2.d, z5.d, z4.d648; CHECK-NEXT: stp q3, q0, [x1, #96]649; CHECK-NEXT: stp q2, q1, [x1, #32]650; CHECK-NEXT: ret651;652; NONEON-NOSVE-LABEL: fcvtzu_v16f16_v16i64:653; NONEON-NOSVE: // %bb.0:654; NONEON-NOSVE-NEXT: sub sp, sp, #192655; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 192656; NONEON-NOSVE-NEXT: ldp q0, q1, [x0]657; NONEON-NOSVE-NEXT: stp q0, q1, [sp]658; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]659; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #32]660; NONEON-NOSVE-NEXT: ldp d1, d0, [sp, #16]661; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #48]662; NONEON-NOSVE-NEXT: ldr h0, [sp, #42]663; NONEON-NOSVE-NEXT: fcvt s0, h0664; NONEON-NOSVE-NEXT: fcvtzu x9, s0665; NONEON-NOSVE-NEXT: ldr h0, [sp, #40]666; NONEON-NOSVE-NEXT: fcvt s0, h0667; NONEON-NOSVE-NEXT: fcvtzu x8, s0668; NONEON-NOSVE-NEXT: ldr h0, [sp, #46]669; NONEON-NOSVE-NEXT: fcvt s0, h0670; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #96]671; NONEON-NOSVE-NEXT: fcvtzu x9, s0672; NONEON-NOSVE-NEXT: ldr h0, [sp, #44]673; NONEON-NOSVE-NEXT: fcvt s0, h0674; NONEON-NOSVE-NEXT: fcvtzu x8, s0675; NONEON-NOSVE-NEXT: ldr h0, [sp, #34]676; NONEON-NOSVE-NEXT: fcvt s0, h0677; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #112]678; NONEON-NOSVE-NEXT: fcvtzu x9, s0679; NONEON-NOSVE-NEXT: ldr h0, [sp, #32]680; NONEON-NOSVE-NEXT: fcvt s0, h0681; NONEON-NOSVE-NEXT: fcvtzu x8, s0682; NONEON-NOSVE-NEXT: ldr h0, [sp, #38]683; NONEON-NOSVE-NEXT: fcvt s0, h0684; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #64]685; NONEON-NOSVE-NEXT: fcvtzu x9, s0686; NONEON-NOSVE-NEXT: ldr h0, [sp, #36]687; NONEON-NOSVE-NEXT: fcvt s0, h0688; NONEON-NOSVE-NEXT: fcvtzu x8, s0689; NONEON-NOSVE-NEXT: ldr h0, [sp, #58]690; NONEON-NOSVE-NEXT: fcvt s0, h0691; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #80]692; NONEON-NOSVE-NEXT: ldp q3, q4, [sp, #64]693; NONEON-NOSVE-NEXT: fcvtzu x9, s0694; NONEON-NOSVE-NEXT: ldr h0, [sp, #56]695; NONEON-NOSVE-NEXT: fcvt s0, h0696; NONEON-NOSVE-NEXT: fcvtzu x8, s0697; NONEON-NOSVE-NEXT: ldr h0, [sp, #62]698; NONEON-NOSVE-NEXT: fcvt s0, h0699; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #160]700; NONEON-NOSVE-NEXT: fcvtzu x9, s0701; NONEON-NOSVE-NEXT: ldr h0, [sp, #60]702; NONEON-NOSVE-NEXT: fcvt s0, h0703; NONEON-NOSVE-NEXT: fcvtzu x8, s0704; NONEON-NOSVE-NEXT: ldr h0, [sp, #50]705; NONEON-NOSVE-NEXT: fcvt s0, h0706; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #176]707; NONEON-NOSVE-NEXT: ldp q6, q7, [sp, #160]708; NONEON-NOSVE-NEXT: fcvtzu x9, s0709; NONEON-NOSVE-NEXT: ldr h0, [sp, #48]710; NONEON-NOSVE-NEXT: fcvt s0, h0711; NONEON-NOSVE-NEXT: fcvtzu x8, s0712; NONEON-NOSVE-NEXT: ldr h0, [sp, #54]713; NONEON-NOSVE-NEXT: fcvt s0, h0714; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #128]715; NONEON-NOSVE-NEXT: fcvtzu x9, s0716; NONEON-NOSVE-NEXT: ldr h0, [sp, #52]717; NONEON-NOSVE-NEXT: fcvt s0, h0718; NONEON-NOSVE-NEXT: fcvtzu x8, s0719; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #96]720; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #144]721; NONEON-NOSVE-NEXT: ldp q5, q2, [sp, #128]722; NONEON-NOSVE-NEXT: stp q0, q1, [x1]723; NONEON-NOSVE-NEXT: stp q3, q4, [x1, #32]724; NONEON-NOSVE-NEXT: stp q6, q7, [x1, #64]725; NONEON-NOSVE-NEXT: stp q5, q2, [x1, #96]726; NONEON-NOSVE-NEXT: add sp, sp, #192727; NONEON-NOSVE-NEXT: ret728 %op1 = load <16 x half>, ptr %a729 %res = fptoui <16 x half> %op1 to <16 x i64>730 store <16 x i64> %res, ptr %b731 ret void732}733 734;735; FCVTZU S -> H736;737 738define <2 x i16> @fcvtzu_v2f32_v2i16(<2 x float> %op1) {739; CHECK-LABEL: fcvtzu_v2f32_v2i16:740; CHECK: // %bb.0:741; CHECK-NEXT: ptrue p0.s, vl2742; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0743; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.s744; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0745; CHECK-NEXT: ret746;747; NONEON-NOSVE-LABEL: fcvtzu_v2f32_v2i16:748; NONEON-NOSVE: // %bb.0:749; NONEON-NOSVE-NEXT: str d0, [sp, #-16]!750; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16751; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]752; NONEON-NOSVE-NEXT: fcvtzu w9, s1753; NONEON-NOSVE-NEXT: fcvtzu w8, s0754; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #8]755; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]756; NONEON-NOSVE-NEXT: add sp, sp, #16757; NONEON-NOSVE-NEXT: ret758 %res = fptoui <2 x float> %op1 to <2 x i16>759 ret <2 x i16> %res760}761 762define <4 x i16> @fcvtzu_v4f32_v4i16(<4 x float> %op1) {763; CHECK-LABEL: fcvtzu_v4f32_v4i16:764; CHECK: // %bb.0:765; CHECK-NEXT: ptrue p0.s, vl4766; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0767; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.s768; CHECK-NEXT: uzp1 z0.h, z0.h, z0.h769; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0770; CHECK-NEXT: ret771;772; NONEON-NOSVE-LABEL: fcvtzu_v4f32_v4i16:773; NONEON-NOSVE: // %bb.0:774; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!775; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32776; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]777; NONEON-NOSVE-NEXT: fcvtzs w8, s1778; NONEON-NOSVE-NEXT: strh w8, [sp, #30]779; NONEON-NOSVE-NEXT: fcvtzs w8, s0780; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]781; NONEON-NOSVE-NEXT: strh w8, [sp, #28]782; NONEON-NOSVE-NEXT: fcvtzs w8, s1783; NONEON-NOSVE-NEXT: strh w8, [sp, #26]784; NONEON-NOSVE-NEXT: fcvtzs w8, s0785; NONEON-NOSVE-NEXT: strh w8, [sp, #24]786; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]787; NONEON-NOSVE-NEXT: add sp, sp, #32788; NONEON-NOSVE-NEXT: ret789 %res = fptoui <4 x float> %op1 to <4 x i16>790 ret <4 x i16> %res791}792 793define <8 x i16> @fcvtzu_v8f32_v8i16(ptr %a) {794; CHECK-LABEL: fcvtzu_v8f32_v8i16:795; CHECK: // %bb.0:796; CHECK-NEXT: ldp q0, q1, [x0]797; CHECK-NEXT: ptrue p0.s, vl4798; CHECK-NEXT: fcvtzu z1.s, p0/m, z1.s799; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.s800; CHECK-NEXT: ptrue p0.h, vl4801; CHECK-NEXT: uzp1 z1.h, z1.h, z1.h802; CHECK-NEXT: uzp1 z0.h, z0.h, z0.h803; CHECK-NEXT: splice z0.h, p0, z0.h, z1.h804; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0805; CHECK-NEXT: ret806;807; NONEON-NOSVE-LABEL: fcvtzu_v8f32_v8i16:808; NONEON-NOSVE: // %bb.0:809; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]810; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-48]!811; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48812; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #24]813; NONEON-NOSVE-NEXT: fcvtzs w8, s1814; NONEON-NOSVE-NEXT: strh w8, [sp, #46]815; NONEON-NOSVE-NEXT: fcvtzs w8, s0816; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #16]817; NONEON-NOSVE-NEXT: strh w8, [sp, #44]818; NONEON-NOSVE-NEXT: fcvtzs w8, s1819; NONEON-NOSVE-NEXT: strh w8, [sp, #42]820; NONEON-NOSVE-NEXT: fcvtzs w8, s0821; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]822; NONEON-NOSVE-NEXT: strh w8, [sp, #40]823; NONEON-NOSVE-NEXT: fcvtzs w8, s1824; NONEON-NOSVE-NEXT: strh w8, [sp, #38]825; NONEON-NOSVE-NEXT: fcvtzs w8, s0826; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]827; NONEON-NOSVE-NEXT: strh w8, [sp, #36]828; NONEON-NOSVE-NEXT: fcvtzs w8, s1829; NONEON-NOSVE-NEXT: strh w8, [sp, #34]830; NONEON-NOSVE-NEXT: fcvtzs w8, s0831; NONEON-NOSVE-NEXT: strh w8, [sp, #32]832; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]833; NONEON-NOSVE-NEXT: add sp, sp, #48834; NONEON-NOSVE-NEXT: ret835 %op1 = load <8 x float>, ptr %a836 %res = fptoui <8 x float> %op1 to <8 x i16>837 ret <8 x i16> %res838}839 840define void @fcvtzu_v16f32_v16i16(ptr %a, ptr %b) {841; CHECK-LABEL: fcvtzu_v16f32_v16i16:842; CHECK: // %bb.0:843; CHECK-NEXT: ldp q0, q1, [x0, #32]844; CHECK-NEXT: ptrue p0.s, vl4845; CHECK-NEXT: ldp q2, q3, [x0]846; CHECK-NEXT: fcvtzu z1.s, p0/m, z1.s847; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.s848; CHECK-NEXT: fcvtzu z3.s, p0/m, z3.s849; CHECK-NEXT: fcvtzu z2.s, p0/m, z2.s850; CHECK-NEXT: ptrue p0.h, vl4851; CHECK-NEXT: uzp1 z1.h, z1.h, z1.h852; CHECK-NEXT: uzp1 z0.h, z0.h, z0.h853; CHECK-NEXT: uzp1 z3.h, z3.h, z3.h854; CHECK-NEXT: uzp1 z2.h, z2.h, z2.h855; CHECK-NEXT: splice z0.h, p0, z0.h, z1.h856; CHECK-NEXT: splice z2.h, p0, z2.h, z3.h857; CHECK-NEXT: stp q2, q0, [x1]858; CHECK-NEXT: ret859;860; NONEON-NOSVE-LABEL: fcvtzu_v16f32_v16i16:861; NONEON-NOSVE: // %bb.0:862; NONEON-NOSVE-NEXT: sub sp, sp, #96863; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96864; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]865; NONEON-NOSVE-NEXT: ldp q2, q3, [x0, #32]866; NONEON-NOSVE-NEXT: str q1, [sp]867; NONEON-NOSVE-NEXT: stp q3, q0, [sp, #16]868; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #40]869; NONEON-NOSVE-NEXT: str q2, [sp, #48]870; NONEON-NOSVE-NEXT: fcvtzs w8, s1871; NONEON-NOSVE-NEXT: strh w8, [sp, #78]872; NONEON-NOSVE-NEXT: fcvtzs w8, s0873; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #32]874; NONEON-NOSVE-NEXT: strh w8, [sp, #76]875; NONEON-NOSVE-NEXT: fcvtzs w8, s1876; NONEON-NOSVE-NEXT: strh w8, [sp, #74]877; NONEON-NOSVE-NEXT: fcvtzs w8, s0878; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]879; NONEON-NOSVE-NEXT: strh w8, [sp, #72]880; NONEON-NOSVE-NEXT: fcvtzs w8, s1881; NONEON-NOSVE-NEXT: strh w8, [sp, #70]882; NONEON-NOSVE-NEXT: fcvtzs w8, s0883; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]884; NONEON-NOSVE-NEXT: strh w8, [sp, #68]885; NONEON-NOSVE-NEXT: fcvtzs w8, s1886; NONEON-NOSVE-NEXT: strh w8, [sp, #66]887; NONEON-NOSVE-NEXT: fcvtzs w8, s0888; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #24]889; NONEON-NOSVE-NEXT: strh w8, [sp, #64]890; NONEON-NOSVE-NEXT: fcvtzs w8, s1891; NONEON-NOSVE-NEXT: strh w8, [sp, #94]892; NONEON-NOSVE-NEXT: fcvtzs w8, s0893; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #16]894; NONEON-NOSVE-NEXT: strh w8, [sp, #92]895; NONEON-NOSVE-NEXT: fcvtzs w8, s1896; NONEON-NOSVE-NEXT: strh w8, [sp, #90]897; NONEON-NOSVE-NEXT: fcvtzs w8, s0898; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #56]899; NONEON-NOSVE-NEXT: strh w8, [sp, #88]900; NONEON-NOSVE-NEXT: fcvtzs w8, s1901; NONEON-NOSVE-NEXT: strh w8, [sp, #86]902; NONEON-NOSVE-NEXT: fcvtzs w8, s0903; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #48]904; NONEON-NOSVE-NEXT: strh w8, [sp, #84]905; NONEON-NOSVE-NEXT: fcvtzs w8, s1906; NONEON-NOSVE-NEXT: strh w8, [sp, #82]907; NONEON-NOSVE-NEXT: fcvtzs w8, s0908; NONEON-NOSVE-NEXT: strh w8, [sp, #80]909; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #64]910; NONEON-NOSVE-NEXT: stp q1, q0, [x1]911; NONEON-NOSVE-NEXT: add sp, sp, #96912; NONEON-NOSVE-NEXT: ret913 %op1 = load <16 x float>, ptr %a914 %res = fptoui <16 x float> %op1 to <16 x i16>915 store <16 x i16> %res, ptr %b916 ret void917}918 919;920; FCVTZU S -> S921;922 923define <2 x i32> @fcvtzu_v2f32_v2i32(<2 x float> %op1) {924; CHECK-LABEL: fcvtzu_v2f32_v2i32:925; CHECK: // %bb.0:926; CHECK-NEXT: ptrue p0.s, vl2927; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0928; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.s929; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0930; CHECK-NEXT: ret931;932; NONEON-NOSVE-LABEL: fcvtzu_v2f32_v2i32:933; NONEON-NOSVE: // %bb.0:934; NONEON-NOSVE-NEXT: str d0, [sp, #-16]!935; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16936; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]937; NONEON-NOSVE-NEXT: fcvtzu w9, s1938; NONEON-NOSVE-NEXT: fcvtzu w8, s0939; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #8]940; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]941; NONEON-NOSVE-NEXT: add sp, sp, #16942; NONEON-NOSVE-NEXT: ret943 %res = fptoui <2 x float> %op1 to <2 x i32>944 ret <2 x i32> %res945}946 947define <4 x i32> @fcvtzu_v4f32_v4i32(<4 x float> %op1) {948; CHECK-LABEL: fcvtzu_v4f32_v4i32:949; CHECK: // %bb.0:950; CHECK-NEXT: ptrue p0.s, vl4951; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0952; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.s953; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0954; CHECK-NEXT: ret955;956; NONEON-NOSVE-LABEL: fcvtzu_v4f32_v4i32:957; NONEON-NOSVE: // %bb.0:958; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!959; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32960; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]961; NONEON-NOSVE-NEXT: fcvtzu w9, s1962; NONEON-NOSVE-NEXT: fcvtzu w8, s0963; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]964; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #24]965; NONEON-NOSVE-NEXT: fcvtzu w9, s1966; NONEON-NOSVE-NEXT: fcvtzu w8, s0967; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #16]968; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]969; NONEON-NOSVE-NEXT: add sp, sp, #32970; NONEON-NOSVE-NEXT: ret971 %res = fptoui <4 x float> %op1 to <4 x i32>972 ret <4 x i32> %res973}974 975define void @fcvtzu_v8f32_v8i32(ptr %a, ptr %b) {976; CHECK-LABEL: fcvtzu_v8f32_v8i32:977; CHECK: // %bb.0:978; CHECK-NEXT: ldp q0, q1, [x0]979; CHECK-NEXT: ptrue p0.s, vl4980; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.s981; CHECK-NEXT: fcvtzu z1.s, p0/m, z1.s982; CHECK-NEXT: stp q0, q1, [x1]983; CHECK-NEXT: ret984;985; NONEON-NOSVE-LABEL: fcvtzu_v8f32_v8i32:986; NONEON-NOSVE: // %bb.0:987; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]988; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-64]!989; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 64990; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #24]991; NONEON-NOSVE-NEXT: fcvtzu w9, s1992; NONEON-NOSVE-NEXT: fcvtzu w8, s0993; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #16]994; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #56]995; NONEON-NOSVE-NEXT: fcvtzu w9, s1996; NONEON-NOSVE-NEXT: fcvtzu w8, s0997; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]998; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #48]999; NONEON-NOSVE-NEXT: fcvtzu w9, s11000; NONEON-NOSVE-NEXT: fcvtzu w8, s01001; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]1002; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #40]1003; NONEON-NOSVE-NEXT: fcvtzu w9, s11004; NONEON-NOSVE-NEXT: fcvtzu w8, s01005; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #32]1006; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #32]1007; NONEON-NOSVE-NEXT: stp q0, q1, [x1]1008; NONEON-NOSVE-NEXT: add sp, sp, #641009; NONEON-NOSVE-NEXT: ret1010 %op1 = load <8 x float>, ptr %a1011 %res = fptoui <8 x float> %op1 to <8 x i32>1012 store <8 x i32> %res, ptr %b1013 ret void1014}1015 1016;1017; FCVTZU S -> D1018;1019 1020define <1 x i64> @fcvtzu_v1f32_v1i64(<1 x float> %op1) {1021; CHECK-LABEL: fcvtzu_v1f32_v1i64:1022; CHECK: // %bb.0:1023; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01024; CHECK-NEXT: ptrue p0.d, vl21025; CHECK-NEXT: uunpklo z0.d, z0.s1026; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.s1027; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z01028; CHECK-NEXT: ret1029;1030; NONEON-NOSVE-LABEL: fcvtzu_v1f32_v1i64:1031; NONEON-NOSVE: // %bb.0:1032; NONEON-NOSVE-NEXT: sub sp, sp, #161033; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161034; NONEON-NOSVE-NEXT: str d0, [sp, #8]1035; NONEON-NOSVE-NEXT: ldr s0, [sp, #8]1036; NONEON-NOSVE-NEXT: fcvtzu x8, s01037; NONEON-NOSVE-NEXT: fmov d0, x81038; NONEON-NOSVE-NEXT: add sp, sp, #161039; NONEON-NOSVE-NEXT: ret1040 %res = fptoui <1 x float> %op1 to <1 x i64>1041 ret <1 x i64> %res1042}1043 1044define <2 x i64> @fcvtzu_v2f32_v2i64(<2 x float> %op1) {1045; CHECK-LABEL: fcvtzu_v2f32_v2i64:1046; CHECK: // %bb.0:1047; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01048; CHECK-NEXT: ptrue p0.d, vl21049; CHECK-NEXT: uunpklo z0.d, z0.s1050; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.s1051; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z01052; CHECK-NEXT: ret1053;1054; NONEON-NOSVE-LABEL: fcvtzu_v2f32_v2i64:1055; NONEON-NOSVE: // %bb.0:1056; NONEON-NOSVE-NEXT: sub sp, sp, #321057; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321058; NONEON-NOSVE-NEXT: str d0, [sp, #8]1059; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]1060; NONEON-NOSVE-NEXT: fcvtzu x9, s11061; NONEON-NOSVE-NEXT: fcvtzu x8, s01062; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #16]1063; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]1064; NONEON-NOSVE-NEXT: add sp, sp, #321065; NONEON-NOSVE-NEXT: ret1066 %res = fptoui <2 x float> %op1 to <2 x i64>1067 ret <2 x i64> %res1068}1069 1070define void @fcvtzu_v4f32_v4i64(ptr %a, ptr %b) {1071; CHECK-LABEL: fcvtzu_v4f32_v4i64:1072; CHECK: // %bb.0:1073; CHECK-NEXT: ldr q0, [x0]1074; CHECK-NEXT: ptrue p0.d, vl21075; CHECK-NEXT: movprfx z1, z01076; CHECK-NEXT: ext z1.b, z1.b, z0.b, #81077; CHECK-NEXT: uunpklo z0.d, z0.s1078; CHECK-NEXT: uunpklo z1.d, z1.s1079; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.s1080; CHECK-NEXT: fcvtzu z1.d, p0/m, z1.s1081; CHECK-NEXT: stp q0, q1, [x1]1082; CHECK-NEXT: ret1083;1084; NONEON-NOSVE-LABEL: fcvtzu_v4f32_v4i64:1085; NONEON-NOSVE: // %bb.0:1086; NONEON-NOSVE-NEXT: ldr q0, [x0]1087; NONEON-NOSVE-NEXT: str q0, [sp, #-64]!1088; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 641089; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]1090; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #16]1091; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #24]1092; NONEON-NOSVE-NEXT: fcvtzu x9, s11093; NONEON-NOSVE-NEXT: fcvtzu x8, s01094; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #16]1095; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #48]1096; NONEON-NOSVE-NEXT: fcvtzu x9, s11097; NONEON-NOSVE-NEXT: fcvtzu x8, s01098; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #32]1099; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #32]1100; NONEON-NOSVE-NEXT: stp q1, q0, [x1]1101; NONEON-NOSVE-NEXT: add sp, sp, #641102; NONEON-NOSVE-NEXT: ret1103 %op1 = load <4 x float>, ptr %a1104 %res = fptoui <4 x float> %op1 to <4 x i64>1105 store <4 x i64> %res, ptr %b1106 ret void1107}1108 1109define void @fcvtzu_v8f32_v8i64(ptr %a, ptr %b) {1110; CHECK-LABEL: fcvtzu_v8f32_v8i64:1111; CHECK: // %bb.0:1112; CHECK-NEXT: ldp q1, q0, [x0]1113; CHECK-NEXT: ptrue p0.d, vl21114; CHECK-NEXT: movprfx z2, z01115; CHECK-NEXT: ext z2.b, z2.b, z0.b, #81116; CHECK-NEXT: movprfx z3, z11117; CHECK-NEXT: ext z3.b, z3.b, z1.b, #81118; CHECK-NEXT: uunpklo z0.d, z0.s1119; CHECK-NEXT: uunpklo z1.d, z1.s1120; CHECK-NEXT: uunpklo z2.d, z2.s1121; CHECK-NEXT: uunpklo z3.d, z3.s1122; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.s1123; CHECK-NEXT: fcvtzu z1.d, p0/m, z1.s1124; CHECK-NEXT: fcvtzu z2.d, p0/m, z2.s1125; CHECK-NEXT: fcvtzu z3.d, p0/m, z3.s1126; CHECK-NEXT: stp q1, q3, [x1]1127; CHECK-NEXT: stp q0, q2, [x1, #32]1128; CHECK-NEXT: ret1129;1130; NONEON-NOSVE-LABEL: fcvtzu_v8f32_v8i64:1131; NONEON-NOSVE: // %bb.0:1132; NONEON-NOSVE-NEXT: ldp q0, q1, [x0]1133; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-128]!1134; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1281135; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]1136; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #32]1137; NONEON-NOSVE-NEXT: ldp d1, d0, [sp, #16]1138; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #48]1139; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #40]1140; NONEON-NOSVE-NEXT: fcvtzu x9, s11141; NONEON-NOSVE-NEXT: fcvtzu x8, s01142; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #32]1143; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #80]1144; NONEON-NOSVE-NEXT: fcvtzu x9, s11145; NONEON-NOSVE-NEXT: fcvtzu x8, s01146; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #56]1147; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #64]1148; NONEON-NOSVE-NEXT: fcvtzu x9, s11149; NONEON-NOSVE-NEXT: fcvtzu x8, s01150; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #48]1151; NONEON-NOSVE-NEXT: ldp q3, q2, [sp, #64]1152; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #112]1153; NONEON-NOSVE-NEXT: fcvtzu x9, s11154; NONEON-NOSVE-NEXT: fcvtzu x8, s01155; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #96]1156; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #96]1157; NONEON-NOSVE-NEXT: stp q2, q3, [x1]1158; NONEON-NOSVE-NEXT: stp q1, q0, [x1, #32]1159; NONEON-NOSVE-NEXT: add sp, sp, #1281160; NONEON-NOSVE-NEXT: ret1161 %op1 = load <8 x float>, ptr %a1162 %res = fptoui <8 x float> %op1 to <8 x i64>1163 store <8 x i64> %res, ptr %b1164 ret void1165}1166 1167;1168; FCVTZU D -> H1169;1170 1171define <1 x i16> @fcvtzu_v1f64_v1i16(<1 x double> %op1) {1172; CHECK-LABEL: fcvtzu_v1f64_v1i16:1173; CHECK: // %bb.0:1174; CHECK-NEXT: fcvtzs w8, d01175; CHECK-NEXT: mov z0.h, w81176; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z01177; CHECK-NEXT: ret1178;1179; NONEON-NOSVE-LABEL: fcvtzu_v1f64_v1i16:1180; NONEON-NOSVE: // %bb.0:1181; NONEON-NOSVE-NEXT: sub sp, sp, #161182; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161183; NONEON-NOSVE-NEXT: fcvtzs w8, d01184; NONEON-NOSVE-NEXT: strh w8, [sp, #8]1185; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]1186; NONEON-NOSVE-NEXT: add sp, sp, #161187; NONEON-NOSVE-NEXT: ret1188 %res = fptoui <1 x double> %op1 to <1 x i16>1189 ret <1 x i16> %res1190}1191 1192define <2 x i16> @fcvtzu_v2f64_v2i16(<2 x double> %op1) {1193; CHECK-LABEL: fcvtzu_v2f64_v2i16:1194; CHECK: // %bb.0:1195; CHECK-NEXT: ptrue p0.d, vl21196; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01197; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d1198; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s1199; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z01200; CHECK-NEXT: ret1201;1202; NONEON-NOSVE-LABEL: fcvtzu_v2f64_v2i16:1203; NONEON-NOSVE: // %bb.0:1204; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!1205; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321206; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]1207; NONEON-NOSVE-NEXT: fcvtzu w9, d11208; NONEON-NOSVE-NEXT: fcvtzu w8, d01209; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #24]1210; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]1211; NONEON-NOSVE-NEXT: add sp, sp, #321212; NONEON-NOSVE-NEXT: ret1213 %res = fptoui <2 x double> %op1 to <2 x i16>1214 ret <2 x i16> %res1215}1216 1217define <4 x i16> @fcvtzu_v4f64_v4i16(ptr %a) {1218; CHECK-LABEL: fcvtzu_v4f64_v4i16:1219; CHECK: // %bb.0:1220; CHECK-NEXT: ldp q0, q1, [x0]1221; CHECK-NEXT: ptrue p0.d, vl21222; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d1223; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d1224; CHECK-NEXT: uzp1 z1.s, z1.s, z1.s1225; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s1226; CHECK-NEXT: mov z2.s, z1.s[1]1227; CHECK-NEXT: mov z3.s, z0.s[1]1228; CHECK-NEXT: zip1 z1.h, z1.h, z2.h1229; CHECK-NEXT: zip1 z0.h, z0.h, z3.h1230; CHECK-NEXT: zip1 z0.s, z0.s, z1.s1231; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z01232; CHECK-NEXT: ret1233;1234; NONEON-NOSVE-LABEL: fcvtzu_v4f64_v4i16:1235; NONEON-NOSVE: // %bb.0:1236; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1237; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-80]!1238; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 801239; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]1240; NONEON-NOSVE-NEXT: fcvtzu w9, d11241; NONEON-NOSVE-NEXT: fcvtzu w8, d01242; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]1243; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #48]1244; NONEON-NOSVE-NEXT: fcvtzu w9, d11245; NONEON-NOSVE-NEXT: fcvtzu w8, d01246; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #40]1247; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #40]1248; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #56]1249; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #64]1250; NONEON-NOSVE-NEXT: strh w9, [sp, #78]1251; NONEON-NOSVE-NEXT: strh w8, [sp, #76]1252; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #56]1253; NONEON-NOSVE-NEXT: strh w9, [sp, #74]1254; NONEON-NOSVE-NEXT: strh w8, [sp, #72]1255; NONEON-NOSVE-NEXT: ldr d0, [sp, #72]1256; NONEON-NOSVE-NEXT: add sp, sp, #801257; NONEON-NOSVE-NEXT: ret1258 %op1 = load <4 x double>, ptr %a1259 %res = fptoui <4 x double> %op1 to <4 x i16>1260 ret <4 x i16> %res1261}1262 1263define <8 x i16> @fcvtzu_v8f64_v8i16(ptr %a) {1264; CHECK-LABEL: fcvtzu_v8f64_v8i16:1265; CHECK: // %bb.0:1266; CHECK-NEXT: ldp q1, q0, [x0, #32]1267; CHECK-NEXT: ptrue p0.d, vl21268; CHECK-NEXT: ldp q2, q3, [x0]1269; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d1270; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d1271; CHECK-NEXT: fcvtzs z3.d, p0/m, z3.d1272; CHECK-NEXT: fcvtzs z2.d, p0/m, z2.d1273; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s1274; CHECK-NEXT: uzp1 z1.s, z1.s, z1.s1275; CHECK-NEXT: uzp1 z3.s, z3.s, z3.s1276; CHECK-NEXT: uzp1 z2.s, z2.s, z2.s1277; CHECK-NEXT: mov z4.s, z0.s[1]1278; CHECK-NEXT: mov z5.s, z1.s[1]1279; CHECK-NEXT: mov z6.s, z3.s[1]1280; CHECK-NEXT: mov z7.s, z2.s[1]1281; CHECK-NEXT: zip1 z0.h, z0.h, z4.h1282; CHECK-NEXT: zip1 z1.h, z1.h, z5.h1283; CHECK-NEXT: zip1 z3.h, z3.h, z6.h1284; CHECK-NEXT: zip1 z2.h, z2.h, z7.h1285; CHECK-NEXT: zip1 z0.s, z1.s, z0.s1286; CHECK-NEXT: zip1 z1.s, z2.s, z3.s1287; CHECK-NEXT: zip1 z0.d, z1.d, z0.d1288; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z01289; CHECK-NEXT: ret1290;1291; NONEON-NOSVE-LABEL: fcvtzu_v8f64_v8i16:1292; NONEON-NOSVE: // %bb.0:1293; NONEON-NOSVE-NEXT: sub sp, sp, #1441294; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1441295; NONEON-NOSVE-NEXT: ldp q1, q0, [x0, #32]1296; NONEON-NOSVE-NEXT: ldp q2, q3, [x0]1297; NONEON-NOSVE-NEXT: str q1, [sp, #48]1298; NONEON-NOSVE-NEXT: stp q0, q3, [sp, #16]1299; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]1300; NONEON-NOSVE-NEXT: str q2, [sp]1301; NONEON-NOSVE-NEXT: fcvtzu w9, d11302; NONEON-NOSVE-NEXT: fcvtzu w8, d01303; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #48]1304; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #72]1305; NONEON-NOSVE-NEXT: fcvtzu w9, d11306; NONEON-NOSVE-NEXT: fcvtzu w8, d01307; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #32]1308; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #88]1309; NONEON-NOSVE-NEXT: fcvtzu w9, d11310; NONEON-NOSVE-NEXT: fcvtzu w8, d01311; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]1312; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #80]1313; NONEON-NOSVE-NEXT: fcvtzu w9, d11314; NONEON-NOSVE-NEXT: fcvtzu w8, d01315; NONEON-NOSVE-NEXT: ldp d0, d2, [sp, #80]1316; NONEON-NOSVE-NEXT: ldr d1, [sp, #72]1317; NONEON-NOSVE-NEXT: stp d1, d0, [sp, #104]1318; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #64]1319; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #104]1320; NONEON-NOSVE-NEXT: str d2, [sp, #120]1321; NONEON-NOSVE-NEXT: ldr d0, [sp, #64]1322; NONEON-NOSVE-NEXT: strh w9, [sp, #142]1323; NONEON-NOSVE-NEXT: strh w8, [sp, #140]1324; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #120]1325; NONEON-NOSVE-NEXT: str d0, [sp, #96]1326; NONEON-NOSVE-NEXT: strh w9, [sp, #138]1327; NONEON-NOSVE-NEXT: strh w8, [sp, #136]1328; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #112]1329; NONEON-NOSVE-NEXT: strh w9, [sp, #134]1330; NONEON-NOSVE-NEXT: strh w8, [sp, #132]1331; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #96]1332; NONEON-NOSVE-NEXT: strh w9, [sp, #130]1333; NONEON-NOSVE-NEXT: strh w8, [sp, #128]1334; NONEON-NOSVE-NEXT: ldr q0, [sp, #128]1335; NONEON-NOSVE-NEXT: add sp, sp, #1441336; NONEON-NOSVE-NEXT: ret1337 %op1 = load <8 x double>, ptr %a1338 %res = fptoui <8 x double> %op1 to <8 x i16>1339 ret <8 x i16> %res1340}1341 1342define void @fcvtzu_v16f64_v16i16(ptr %a, ptr %b) {1343; CHECK-LABEL: fcvtzu_v16f64_v16i16:1344; CHECK: // %bb.0:1345; CHECK-NEXT: ldp q0, q1, [x0, #96]1346; CHECK-NEXT: ptrue p0.d, vl21347; CHECK-NEXT: ldp q2, q3, [x0, #32]1348; CHECK-NEXT: ldp q4, q5, [x0, #64]1349; CHECK-NEXT: ldp q6, q7, [x0]1350; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d1351; CHECK-NEXT: fcvtzs z3.d, p0/m, z3.d1352; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d1353; CHECK-NEXT: fcvtzs z2.d, p0/m, z2.d1354; CHECK-NEXT: fcvtzs z5.d, p0/m, z5.d1355; CHECK-NEXT: fcvtzs z4.d, p0/m, z4.d1356; CHECK-NEXT: fcvtzs z7.d, p0/m, z7.d1357; CHECK-NEXT: fcvtzs z6.d, p0/m, z6.d1358; CHECK-NEXT: uzp1 z1.s, z1.s, z1.s1359; CHECK-NEXT: uzp1 z3.s, z3.s, z3.s1360; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s1361; CHECK-NEXT: uzp1 z2.s, z2.s, z2.s1362; CHECK-NEXT: uzp1 z5.s, z5.s, z5.s1363; CHECK-NEXT: uzp1 z4.s, z4.s, z4.s1364; CHECK-NEXT: uzp1 z7.s, z7.s, z7.s1365; CHECK-NEXT: uzp1 z6.s, z6.s, z6.s1366; CHECK-NEXT: mov z17.s, z1.s[1]1367; CHECK-NEXT: mov z16.s, z3.s[1]1368; CHECK-NEXT: mov z18.s, z0.s[1]1369; CHECK-NEXT: mov z21.s, z2.s[1]1370; CHECK-NEXT: mov z19.s, z5.s[1]1371; CHECK-NEXT: mov z20.s, z4.s[1]1372; CHECK-NEXT: mov z22.s, z7.s[1]1373; CHECK-NEXT: mov z23.s, z6.s[1]1374; CHECK-NEXT: zip1 z1.h, z1.h, z17.h1375; CHECK-NEXT: zip1 z3.h, z3.h, z16.h1376; CHECK-NEXT: zip1 z0.h, z0.h, z18.h1377; CHECK-NEXT: zip1 z2.h, z2.h, z21.h1378; CHECK-NEXT: zip1 z5.h, z5.h, z19.h1379; CHECK-NEXT: zip1 z4.h, z4.h, z20.h1380; CHECK-NEXT: zip1 z7.h, z7.h, z22.h1381; CHECK-NEXT: zip1 z6.h, z6.h, z23.h1382; CHECK-NEXT: zip1 z0.s, z0.s, z1.s1383; CHECK-NEXT: zip1 z2.s, z2.s, z3.s1384; CHECK-NEXT: zip1 z1.s, z4.s, z5.s1385; CHECK-NEXT: zip1 z3.s, z6.s, z7.s1386; CHECK-NEXT: zip1 z0.d, z1.d, z0.d1387; CHECK-NEXT: zip1 z1.d, z3.d, z2.d1388; CHECK-NEXT: stp q1, q0, [x1]1389; CHECK-NEXT: ret1390;1391; NONEON-NOSVE-LABEL: fcvtzu_v16f64_v16i16:1392; NONEON-NOSVE: // %bb.0:1393; NONEON-NOSVE-NEXT: sub sp, sp, #3041394; NONEON-NOSVE-NEXT: str x29, [sp, #288] // 8-byte Spill1395; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 3041396; NONEON-NOSVE-NEXT: .cfi_offset w29, -161397; NONEON-NOSVE-NEXT: ldp q0, q1, [x0, #32]1398; NONEON-NOSVE-NEXT: ldr x29, [sp, #288] // 8-byte Reload1399; NONEON-NOSVE-NEXT: ldp q6, q7, [x0]1400; NONEON-NOSVE-NEXT: ldp q2, q3, [x0, #64]1401; NONEON-NOSVE-NEXT: ldp q4, q5, [x0, #96]1402; NONEON-NOSVE-NEXT: stp q1, q7, [sp, #64]1403; NONEON-NOSVE-NEXT: stp q0, q2, [sp, #96]1404; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #64]1405; NONEON-NOSVE-NEXT: stp q6, q4, [sp]1406; NONEON-NOSVE-NEXT: stp q5, q3, [sp, #32]1407; NONEON-NOSVE-NEXT: fcvtzu w9, d11408; NONEON-NOSVE-NEXT: fcvtzu w8, d01409; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #96]1410; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #168]1411; NONEON-NOSVE-NEXT: fcvtzu w9, d11412; NONEON-NOSVE-NEXT: fcvtzu w8, d01413; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #80]1414; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #184]1415; NONEON-NOSVE-NEXT: fcvtzu w9, d11416; NONEON-NOSVE-NEXT: fcvtzu w8, d01417; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]1418; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #176]1419; NONEON-NOSVE-NEXT: fcvtzu w9, d11420; NONEON-NOSVE-NEXT: fcvtzu w8, d01421; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #32]1422; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #136]1423; NONEON-NOSVE-NEXT: fcvtzu w9, d11424; NONEON-NOSVE-NEXT: fcvtzu w8, d01425; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]1426; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #152]1427; NONEON-NOSVE-NEXT: fcvtzu w9, d11428; NONEON-NOSVE-NEXT: fcvtzu w8, d01429; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #48]1430; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #144]1431; NONEON-NOSVE-NEXT: fcvtzu w9, d11432; NONEON-NOSVE-NEXT: fcvtzu w8, d01433; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #112]1434; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #160]1435; NONEON-NOSVE-NEXT: fcvtzu w9, d11436; NONEON-NOSVE-NEXT: fcvtzu w8, d01437; NONEON-NOSVE-NEXT: ldp d0, d2, [sp, #176]1438; NONEON-NOSVE-NEXT: ldr d1, [sp, #168]1439; NONEON-NOSVE-NEXT: stp d1, d0, [sp, #232]1440; NONEON-NOSVE-NEXT: ldr d1, [sp, #136]1441; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #192]1442; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #232]1443; NONEON-NOSVE-NEXT: str d2, [sp, #248]1444; NONEON-NOSVE-NEXT: ldp d0, d2, [sp, #144]1445; NONEON-NOSVE-NEXT: strh w9, [sp, #270]1446; NONEON-NOSVE-NEXT: strh w8, [sp, #268]1447; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #248]1448; NONEON-NOSVE-NEXT: stp d1, d0, [sp, #200]1449; NONEON-NOSVE-NEXT: ldr d0, [sp, #160]1450; NONEON-NOSVE-NEXT: strh w9, [sp, #266]1451; NONEON-NOSVE-NEXT: strh w8, [sp, #264]1452; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #240]1453; NONEON-NOSVE-NEXT: stp d2, d0, [sp, #216]1454; NONEON-NOSVE-NEXT: ldr d0, [sp, #192]1455; NONEON-NOSVE-NEXT: strh w9, [sp, #262]1456; NONEON-NOSVE-NEXT: strh w8, [sp, #260]1457; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #200]1458; NONEON-NOSVE-NEXT: str d0, [sp, #296]1459; NONEON-NOSVE-NEXT: strh w9, [sp, #258]1460; NONEON-NOSVE-NEXT: strh w8, [sp, #256]1461; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #216]1462; NONEON-NOSVE-NEXT: strh w9, [sp, #286]1463; NONEON-NOSVE-NEXT: strh w8, [sp, #284]1464; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #208]1465; NONEON-NOSVE-NEXT: strh w9, [sp, #282]1466; NONEON-NOSVE-NEXT: strh w8, [sp, #280]1467; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #224]1468; NONEON-NOSVE-NEXT: strh w8, [sp, #276]1469; NONEON-NOSVE-NEXT: ldr w8, [sp, #300]1470; NONEON-NOSVE-NEXT: strh w9, [sp, #278]1471; NONEON-NOSVE-NEXT: strh w8, [sp, #274]1472; NONEON-NOSVE-NEXT: ldr w8, [sp, #296]1473; NONEON-NOSVE-NEXT: strh w8, [sp, #272]1474; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #256]1475; NONEON-NOSVE-NEXT: stp q1, q0, [x1]1476; NONEON-NOSVE-NEXT: add sp, sp, #3041477; NONEON-NOSVE-NEXT: ret1478 %op1 = load <16 x double>, ptr %a1479 %res = fptoui <16 x double> %op1 to <16 x i16>1480 store <16 x i16> %res, ptr %b1481 ret void1482}1483 1484;1485; FCVTZU D -> S1486;1487 1488define <1 x i32> @fcvtzu_v1f64_v1i32(<1 x double> %op1) {1489; CHECK-LABEL: fcvtzu_v1f64_v1i32:1490; CHECK: // %bb.0:1491; CHECK-NEXT: ptrue p0.d, vl21492; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01493; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.d1494; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s1495; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z01496; CHECK-NEXT: ret1497;1498; NONEON-NOSVE-LABEL: fcvtzu_v1f64_v1i32:1499; NONEON-NOSVE: // %bb.0:1500; NONEON-NOSVE-NEXT: sub sp, sp, #161501; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161502; NONEON-NOSVE-NEXT: fcvtzu w8, d01503; NONEON-NOSVE-NEXT: str w8, [sp, #8]1504; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]1505; NONEON-NOSVE-NEXT: add sp, sp, #161506; NONEON-NOSVE-NEXT: ret1507 %res = fptoui <1 x double> %op1 to <1 x i32>1508 ret <1 x i32> %res1509}1510 1511define <2 x i32> @fcvtzu_v2f64_v2i32(<2 x double> %op1) {1512; CHECK-LABEL: fcvtzu_v2f64_v2i32:1513; CHECK: // %bb.0:1514; CHECK-NEXT: ptrue p0.d, vl21515; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01516; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.d1517; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s1518; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z01519; CHECK-NEXT: ret1520;1521; NONEON-NOSVE-LABEL: fcvtzu_v2f64_v2i32:1522; NONEON-NOSVE: // %bb.0:1523; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!1524; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321525; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]1526; NONEON-NOSVE-NEXT: fcvtzu w9, d11527; NONEON-NOSVE-NEXT: fcvtzu w8, d01528; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #24]1529; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]1530; NONEON-NOSVE-NEXT: add sp, sp, #321531; NONEON-NOSVE-NEXT: ret1532 %res = fptoui <2 x double> %op1 to <2 x i32>1533 ret <2 x i32> %res1534}1535 1536define <4 x i32> @fcvtzu_v4f64_v4i32(ptr %a) {1537; CHECK-LABEL: fcvtzu_v4f64_v4i32:1538; CHECK: // %bb.0:1539; CHECK-NEXT: ldp q0, q1, [x0]1540; CHECK-NEXT: ptrue p0.d, vl21541; CHECK-NEXT: fcvtzu z1.d, p0/m, z1.d1542; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.d1543; CHECK-NEXT: ptrue p0.s, vl21544; CHECK-NEXT: uzp1 z1.s, z1.s, z1.s1545; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s1546; CHECK-NEXT: splice z0.s, p0, z0.s, z1.s1547; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z01548; CHECK-NEXT: ret1549;1550; NONEON-NOSVE-LABEL: fcvtzu_v4f64_v4i32:1551; NONEON-NOSVE: // %bb.0:1552; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1553; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-48]!1554; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 481555; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]1556; NONEON-NOSVE-NEXT: fcvtzu w9, d11557; NONEON-NOSVE-NEXT: fcvtzu w8, d01558; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]1559; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #40]1560; NONEON-NOSVE-NEXT: fcvtzu w9, d11561; NONEON-NOSVE-NEXT: fcvtzu w8, d01562; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #32]1563; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]1564; NONEON-NOSVE-NEXT: add sp, sp, #481565; NONEON-NOSVE-NEXT: ret1566 %op1 = load <4 x double>, ptr %a1567 %res = fptoui <4 x double> %op1 to <4 x i32>1568 ret <4 x i32> %res1569}1570 1571define void @fcvtzu_v8f64_v8i32(ptr %a, ptr %b) {1572; CHECK-LABEL: fcvtzu_v8f64_v8i32:1573; CHECK: // %bb.0:1574; CHECK-NEXT: ldp q0, q1, [x0, #32]1575; CHECK-NEXT: ptrue p0.d, vl21576; CHECK-NEXT: ldp q2, q3, [x0]1577; CHECK-NEXT: fcvtzu z1.d, p0/m, z1.d1578; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.d1579; CHECK-NEXT: fcvtzu z3.d, p0/m, z3.d1580; CHECK-NEXT: fcvtzu z2.d, p0/m, z2.d1581; CHECK-NEXT: ptrue p0.s, vl21582; CHECK-NEXT: uzp1 z1.s, z1.s, z1.s1583; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s1584; CHECK-NEXT: uzp1 z3.s, z3.s, z3.s1585; CHECK-NEXT: uzp1 z2.s, z2.s, z2.s1586; CHECK-NEXT: splice z0.s, p0, z0.s, z1.s1587; CHECK-NEXT: splice z2.s, p0, z2.s, z3.s1588; CHECK-NEXT: stp q2, q0, [x1]1589; CHECK-NEXT: ret1590;1591; NONEON-NOSVE-LABEL: fcvtzu_v8f64_v8i32:1592; NONEON-NOSVE: // %bb.0:1593; NONEON-NOSVE-NEXT: sub sp, sp, #961594; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 961595; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1596; NONEON-NOSVE-NEXT: ldp q2, q3, [x0, #32]1597; NONEON-NOSVE-NEXT: str q1, [sp]1598; NONEON-NOSVE-NEXT: stp q3, q0, [sp, #16]1599; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #32]1600; NONEON-NOSVE-NEXT: str q2, [sp, #48]1601; NONEON-NOSVE-NEXT: fcvtzu w9, d11602; NONEON-NOSVE-NEXT: fcvtzu w8, d01603; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]1604; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #72]1605; NONEON-NOSVE-NEXT: fcvtzu w9, d11606; NONEON-NOSVE-NEXT: fcvtzu w8, d01607; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]1608; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #64]1609; NONEON-NOSVE-NEXT: fcvtzu w9, d11610; NONEON-NOSVE-NEXT: fcvtzu w8, d01611; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #48]1612; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #88]1613; NONEON-NOSVE-NEXT: fcvtzu w9, d11614; NONEON-NOSVE-NEXT: fcvtzu w8, d01615; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #80]1616; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #64]1617; NONEON-NOSVE-NEXT: stp q1, q0, [x1]1618; NONEON-NOSVE-NEXT: add sp, sp, #961619; NONEON-NOSVE-NEXT: ret1620 %op1 = load <8 x double>, ptr %a1621 %res = fptoui <8 x double> %op1 to <8 x i32>1622 store <8 x i32> %res, ptr %b1623 ret void1624}1625 1626;1627; FCVTZU D -> D1628;1629 1630define <1 x i64> @fcvtzu_v1f64_v1i64(<1 x double> %op1) {1631; CHECK-LABEL: fcvtzu_v1f64_v1i64:1632; CHECK: // %bb.0:1633; CHECK-NEXT: ptrue p0.d, vl11634; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01635; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.d1636; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z01637; CHECK-NEXT: ret1638;1639; NONEON-NOSVE-LABEL: fcvtzu_v1f64_v1i64:1640; NONEON-NOSVE: // %bb.0:1641; NONEON-NOSVE-NEXT: sub sp, sp, #161642; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161643; NONEON-NOSVE-NEXT: fcvtzu x8, d01644; NONEON-NOSVE-NEXT: str x8, [sp, #8]1645; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]1646; NONEON-NOSVE-NEXT: add sp, sp, #161647; NONEON-NOSVE-NEXT: ret1648 %res = fptoui <1 x double> %op1 to <1 x i64>1649 ret <1 x i64> %res1650}1651 1652define <2 x i64> @fcvtzu_v2f64_v2i64(<2 x double> %op1) {1653; CHECK-LABEL: fcvtzu_v2f64_v2i64:1654; CHECK: // %bb.0:1655; CHECK-NEXT: ptrue p0.d, vl21656; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01657; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.d1658; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z01659; CHECK-NEXT: ret1660;1661; NONEON-NOSVE-LABEL: fcvtzu_v2f64_v2i64:1662; NONEON-NOSVE: // %bb.0:1663; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!1664; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321665; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]1666; NONEON-NOSVE-NEXT: fcvtzu x9, d11667; NONEON-NOSVE-NEXT: fcvtzu x8, d01668; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #16]1669; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]1670; NONEON-NOSVE-NEXT: add sp, sp, #321671; NONEON-NOSVE-NEXT: ret1672 %res = fptoui <2 x double> %op1 to <2 x i64>1673 ret <2 x i64> %res1674}1675 1676define void @fcvtzu_v4f64_v4i64(ptr %a, ptr %b) {1677; CHECK-LABEL: fcvtzu_v4f64_v4i64:1678; CHECK: // %bb.0:1679; CHECK-NEXT: ldp q0, q1, [x0]1680; CHECK-NEXT: ptrue p0.d, vl21681; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.d1682; CHECK-NEXT: fcvtzu z1.d, p0/m, z1.d1683; CHECK-NEXT: stp q0, q1, [x1]1684; CHECK-NEXT: ret1685;1686; NONEON-NOSVE-LABEL: fcvtzu_v4f64_v4i64:1687; NONEON-NOSVE: // %bb.0:1688; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1689; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-64]!1690; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 641691; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]1692; NONEON-NOSVE-NEXT: fcvtzu x9, d11693; NONEON-NOSVE-NEXT: fcvtzu x8, d01694; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]1695; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #48]1696; NONEON-NOSVE-NEXT: fcvtzu x9, d11697; NONEON-NOSVE-NEXT: fcvtzu x8, d01698; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #32]1699; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #32]1700; NONEON-NOSVE-NEXT: stp q0, q1, [x1]1701; NONEON-NOSVE-NEXT: add sp, sp, #641702; NONEON-NOSVE-NEXT: ret1703 %op1 = load <4 x double>, ptr %a1704 %res = fptoui <4 x double> %op1 to <4 x i64>1705 store <4 x i64> %res, ptr %b1706 ret void1707}1708 1709;1710; FCVTZS H -> H1711;1712 1713define <4 x i16> @fcvtzs_v4f16_v4i16(<4 x half> %op1) {1714; CHECK-LABEL: fcvtzs_v4f16_v4i16:1715; CHECK: // %bb.0:1716; CHECK-NEXT: ptrue p0.h, vl41717; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01718; CHECK-NEXT: fcvtzs z0.h, p0/m, z0.h1719; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z01720; CHECK-NEXT: ret1721;1722; NONEON-NOSVE-LABEL: fcvtzs_v4f16_v4i16:1723; NONEON-NOSVE: // %bb.0:1724; NONEON-NOSVE-NEXT: str d0, [sp, #-16]!1725; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161726; NONEON-NOSVE-NEXT: ldr h0, [sp, #6]1727; NONEON-NOSVE-NEXT: fcvt s0, h01728; NONEON-NOSVE-NEXT: fcvtzs w8, s01729; NONEON-NOSVE-NEXT: ldr h0, [sp, #4]1730; NONEON-NOSVE-NEXT: fcvt s0, h01731; NONEON-NOSVE-NEXT: strh w8, [sp, #14]1732; NONEON-NOSVE-NEXT: fcvtzs w8, s01733; NONEON-NOSVE-NEXT: ldr h0, [sp, #2]1734; NONEON-NOSVE-NEXT: fcvt s0, h01735; NONEON-NOSVE-NEXT: strh w8, [sp, #12]1736; NONEON-NOSVE-NEXT: fcvtzs w8, s01737; NONEON-NOSVE-NEXT: ldr h0, [sp]1738; NONEON-NOSVE-NEXT: fcvt s0, h01739; NONEON-NOSVE-NEXT: strh w8, [sp, #10]1740; NONEON-NOSVE-NEXT: fcvtzs w8, s01741; NONEON-NOSVE-NEXT: strh w8, [sp, #8]1742; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]1743; NONEON-NOSVE-NEXT: add sp, sp, #161744; NONEON-NOSVE-NEXT: ret1745 %res = fptosi <4 x half> %op1 to <4 x i16>1746 ret <4 x i16> %res1747}1748 1749define void @fcvtzs_v8f16_v8i16(ptr %a, ptr %b) {1750; CHECK-LABEL: fcvtzs_v8f16_v8i16:1751; CHECK: // %bb.0:1752; CHECK-NEXT: ptrue p0.h, vl81753; CHECK-NEXT: ldr q0, [x0]1754; CHECK-NEXT: fcvtzs z0.h, p0/m, z0.h1755; CHECK-NEXT: str q0, [x1]1756; CHECK-NEXT: ret1757;1758; NONEON-NOSVE-LABEL: fcvtzs_v8f16_v8i16:1759; NONEON-NOSVE: // %bb.0:1760; NONEON-NOSVE-NEXT: ldr q0, [x0]1761; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!1762; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321763; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]1764; NONEON-NOSVE-NEXT: fcvt s0, h01765; NONEON-NOSVE-NEXT: fcvtzs w8, s01766; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]1767; NONEON-NOSVE-NEXT: fcvt s0, h01768; NONEON-NOSVE-NEXT: strh w8, [sp, #30]1769; NONEON-NOSVE-NEXT: fcvtzs w8, s01770; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]1771; NONEON-NOSVE-NEXT: fcvt s0, h01772; NONEON-NOSVE-NEXT: strh w8, [sp, #28]1773; NONEON-NOSVE-NEXT: fcvtzs w8, s01774; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]1775; NONEON-NOSVE-NEXT: fcvt s0, h01776; NONEON-NOSVE-NEXT: strh w8, [sp, #26]1777; NONEON-NOSVE-NEXT: fcvtzs w8, s01778; NONEON-NOSVE-NEXT: ldr h0, [sp, #6]1779; NONEON-NOSVE-NEXT: fcvt s0, h01780; NONEON-NOSVE-NEXT: strh w8, [sp, #24]1781; NONEON-NOSVE-NEXT: fcvtzs w8, s01782; NONEON-NOSVE-NEXT: ldr h0, [sp, #4]1783; NONEON-NOSVE-NEXT: fcvt s0, h01784; NONEON-NOSVE-NEXT: strh w8, [sp, #22]1785; NONEON-NOSVE-NEXT: fcvtzs w8, s01786; NONEON-NOSVE-NEXT: ldr h0, [sp, #2]1787; NONEON-NOSVE-NEXT: fcvt s0, h01788; NONEON-NOSVE-NEXT: strh w8, [sp, #20]1789; NONEON-NOSVE-NEXT: fcvtzs w8, s01790; NONEON-NOSVE-NEXT: ldr h0, [sp]1791; NONEON-NOSVE-NEXT: fcvt s0, h01792; NONEON-NOSVE-NEXT: strh w8, [sp, #18]1793; NONEON-NOSVE-NEXT: fcvtzs w8, s01794; NONEON-NOSVE-NEXT: strh w8, [sp, #16]1795; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]1796; NONEON-NOSVE-NEXT: str q0, [x1]1797; NONEON-NOSVE-NEXT: add sp, sp, #321798; NONEON-NOSVE-NEXT: ret1799 %op1 = load <8 x half>, ptr %a1800 %res = fptosi <8 x half> %op1 to <8 x i16>1801 store <8 x i16> %res, ptr %b1802 ret void1803}1804 1805define void @fcvtzs_v16f16_v16i16(ptr %a, ptr %b) {1806; CHECK-LABEL: fcvtzs_v16f16_v16i16:1807; CHECK: // %bb.0:1808; CHECK-NEXT: ldp q0, q1, [x0]1809; CHECK-NEXT: ptrue p0.h, vl81810; CHECK-NEXT: fcvtzs z0.h, p0/m, z0.h1811; CHECK-NEXT: fcvtzs z1.h, p0/m, z1.h1812; CHECK-NEXT: stp q0, q1, [x1]1813; CHECK-NEXT: ret1814;1815; NONEON-NOSVE-LABEL: fcvtzs_v16f16_v16i16:1816; NONEON-NOSVE: // %bb.0:1817; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1818; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-64]!1819; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 641820; NONEON-NOSVE-NEXT: ldr h0, [sp, #30]1821; NONEON-NOSVE-NEXT: fcvt s0, h01822; NONEON-NOSVE-NEXT: fcvtzs w8, s01823; NONEON-NOSVE-NEXT: ldr h0, [sp, #28]1824; NONEON-NOSVE-NEXT: fcvt s0, h01825; NONEON-NOSVE-NEXT: strh w8, [sp, #62]1826; NONEON-NOSVE-NEXT: fcvtzs w8, s01827; NONEON-NOSVE-NEXT: ldr h0, [sp, #26]1828; NONEON-NOSVE-NEXT: fcvt s0, h01829; NONEON-NOSVE-NEXT: strh w8, [sp, #60]1830; NONEON-NOSVE-NEXT: fcvtzs w8, s01831; NONEON-NOSVE-NEXT: ldr h0, [sp, #24]1832; NONEON-NOSVE-NEXT: fcvt s0, h01833; NONEON-NOSVE-NEXT: strh w8, [sp, #58]1834; NONEON-NOSVE-NEXT: fcvtzs w8, s01835; NONEON-NOSVE-NEXT: ldr h0, [sp, #22]1836; NONEON-NOSVE-NEXT: fcvt s0, h01837; NONEON-NOSVE-NEXT: strh w8, [sp, #56]1838; NONEON-NOSVE-NEXT: fcvtzs w8, s01839; NONEON-NOSVE-NEXT: ldr h0, [sp, #20]1840; NONEON-NOSVE-NEXT: fcvt s0, h01841; NONEON-NOSVE-NEXT: strh w8, [sp, #54]1842; NONEON-NOSVE-NEXT: fcvtzs w8, s01843; NONEON-NOSVE-NEXT: ldr h0, [sp, #18]1844; NONEON-NOSVE-NEXT: fcvt s0, h01845; NONEON-NOSVE-NEXT: strh w8, [sp, #52]1846; NONEON-NOSVE-NEXT: fcvtzs w8, s01847; NONEON-NOSVE-NEXT: ldr h0, [sp, #16]1848; NONEON-NOSVE-NEXT: fcvt s0, h01849; NONEON-NOSVE-NEXT: strh w8, [sp, #50]1850; NONEON-NOSVE-NEXT: fcvtzs w8, s01851; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]1852; NONEON-NOSVE-NEXT: fcvt s0, h01853; NONEON-NOSVE-NEXT: strh w8, [sp, #48]1854; NONEON-NOSVE-NEXT: fcvtzs w8, s01855; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]1856; NONEON-NOSVE-NEXT: fcvt s0, h01857; NONEON-NOSVE-NEXT: strh w8, [sp, #46]1858; NONEON-NOSVE-NEXT: fcvtzs w8, s01859; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]1860; NONEON-NOSVE-NEXT: fcvt s0, h01861; NONEON-NOSVE-NEXT: strh w8, [sp, #44]1862; NONEON-NOSVE-NEXT: fcvtzs w8, s01863; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]1864; NONEON-NOSVE-NEXT: fcvt s0, h01865; NONEON-NOSVE-NEXT: strh w8, [sp, #42]1866; NONEON-NOSVE-NEXT: fcvtzs w8, s01867; NONEON-NOSVE-NEXT: ldr h0, [sp, #6]1868; NONEON-NOSVE-NEXT: fcvt s0, h01869; NONEON-NOSVE-NEXT: strh w8, [sp, #40]1870; NONEON-NOSVE-NEXT: fcvtzs w8, s01871; NONEON-NOSVE-NEXT: ldr h0, [sp, #4]1872; NONEON-NOSVE-NEXT: fcvt s0, h01873; NONEON-NOSVE-NEXT: strh w8, [sp, #38]1874; NONEON-NOSVE-NEXT: fcvtzs w8, s01875; NONEON-NOSVE-NEXT: ldr h0, [sp, #2]1876; NONEON-NOSVE-NEXT: fcvt s0, h01877; NONEON-NOSVE-NEXT: strh w8, [sp, #36]1878; NONEON-NOSVE-NEXT: fcvtzs w8, s01879; NONEON-NOSVE-NEXT: ldr h0, [sp]1880; NONEON-NOSVE-NEXT: fcvt s0, h01881; NONEON-NOSVE-NEXT: strh w8, [sp, #34]1882; NONEON-NOSVE-NEXT: fcvtzs w8, s01883; NONEON-NOSVE-NEXT: strh w8, [sp, #32]1884; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #32]1885; NONEON-NOSVE-NEXT: stp q0, q1, [x1]1886; NONEON-NOSVE-NEXT: add sp, sp, #641887; NONEON-NOSVE-NEXT: ret1888 %op1 = load <16 x half>, ptr %a1889 %res = fptosi <16 x half> %op1 to <16 x i16>1890 store <16 x i16> %res, ptr %b1891 ret void1892}1893 1894;1895; FCVTZS H -> S1896;1897 1898define <2 x i32> @fcvtzs_v2f16_v2i32(<2 x half> %op1) {1899; CHECK-LABEL: fcvtzs_v2f16_v2i32:1900; CHECK: // %bb.0:1901; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01902; CHECK-NEXT: ptrue p0.s, vl41903; CHECK-NEXT: uunpklo z0.s, z0.h1904; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.h1905; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z01906; CHECK-NEXT: ret1907;1908; NONEON-NOSVE-LABEL: fcvtzs_v2f16_v2i32:1909; NONEON-NOSVE: // %bb.0:1910; NONEON-NOSVE-NEXT: str d0, [sp, #-16]!1911; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161912; NONEON-NOSVE-NEXT: ldr h0, [sp, #2]1913; NONEON-NOSVE-NEXT: fcvt s0, h01914; NONEON-NOSVE-NEXT: fcvtzs w9, s01915; NONEON-NOSVE-NEXT: ldr h0, [sp]1916; NONEON-NOSVE-NEXT: fcvt s0, h01917; NONEON-NOSVE-NEXT: fcvtzs w8, s01918; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #8]1919; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]1920; NONEON-NOSVE-NEXT: add sp, sp, #161921; NONEON-NOSVE-NEXT: ret1922 %res = fptosi <2 x half> %op1 to <2 x i32>1923 ret <2 x i32> %res1924}1925 1926define <4 x i32> @fcvtzs_v4f16_v4i32(<4 x half> %op1) {1927; CHECK-LABEL: fcvtzs_v4f16_v4i32:1928; CHECK: // %bb.0:1929; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01930; CHECK-NEXT: ptrue p0.s, vl41931; CHECK-NEXT: uunpklo z0.s, z0.h1932; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.h1933; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z01934; CHECK-NEXT: ret1935;1936; NONEON-NOSVE-LABEL: fcvtzs_v4f16_v4i32:1937; NONEON-NOSVE: // %bb.0:1938; NONEON-NOSVE-NEXT: sub sp, sp, #321939; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321940; NONEON-NOSVE-NEXT: str d0, [sp, #8]1941; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]1942; NONEON-NOSVE-NEXT: fcvt s0, h01943; NONEON-NOSVE-NEXT: fcvtzs w9, s01944; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]1945; NONEON-NOSVE-NEXT: fcvt s0, h01946; NONEON-NOSVE-NEXT: fcvtzs w8, s01947; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]1948; NONEON-NOSVE-NEXT: fcvt s0, h01949; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #24]1950; NONEON-NOSVE-NEXT: fcvtzs w9, s01951; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]1952; NONEON-NOSVE-NEXT: fcvt s0, h01953; NONEON-NOSVE-NEXT: fcvtzs w8, s01954; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #16]1955; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]1956; NONEON-NOSVE-NEXT: add sp, sp, #321957; NONEON-NOSVE-NEXT: ret1958 %res = fptosi <4 x half> %op1 to <4 x i32>1959 ret <4 x i32> %res1960}1961 1962define void @fcvtzs_v8f16_v8i32(ptr %a, ptr %b) {1963; CHECK-LABEL: fcvtzs_v8f16_v8i32:1964; CHECK: // %bb.0:1965; CHECK-NEXT: ldr q0, [x0]1966; CHECK-NEXT: ptrue p0.s, vl41967; CHECK-NEXT: movprfx z1, z01968; CHECK-NEXT: ext z1.b, z1.b, z0.b, #81969; CHECK-NEXT: uunpklo z0.s, z0.h1970; CHECK-NEXT: uunpklo z1.s, z1.h1971; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.h1972; CHECK-NEXT: fcvtzs z1.s, p0/m, z1.h1973; CHECK-NEXT: stp q0, q1, [x1]1974; CHECK-NEXT: ret1975;1976; NONEON-NOSVE-LABEL: fcvtzs_v8f16_v8i32:1977; NONEON-NOSVE: // %bb.0:1978; NONEON-NOSVE-NEXT: ldr q0, [x0]1979; NONEON-NOSVE-NEXT: str q0, [sp, #-64]!1980; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 641981; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]1982; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #16]1983; NONEON-NOSVE-NEXT: ldr h0, [sp, #30]1984; NONEON-NOSVE-NEXT: fcvt s0, h01985; NONEON-NOSVE-NEXT: fcvtzs w9, s01986; NONEON-NOSVE-NEXT: ldr h0, [sp, #28]1987; NONEON-NOSVE-NEXT: fcvt s0, h01988; NONEON-NOSVE-NEXT: fcvtzs w8, s01989; NONEON-NOSVE-NEXT: ldr h0, [sp, #26]1990; NONEON-NOSVE-NEXT: fcvt s0, h01991; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #56]1992; NONEON-NOSVE-NEXT: fcvtzs w9, s01993; NONEON-NOSVE-NEXT: ldr h0, [sp, #24]1994; NONEON-NOSVE-NEXT: fcvt s0, h01995; NONEON-NOSVE-NEXT: fcvtzs w8, s01996; NONEON-NOSVE-NEXT: ldr h0, [sp, #22]1997; NONEON-NOSVE-NEXT: fcvt s0, h01998; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #48]1999; NONEON-NOSVE-NEXT: fcvtzs w9, s02000; NONEON-NOSVE-NEXT: ldr h0, [sp, #20]2001; NONEON-NOSVE-NEXT: fcvt s0, h02002; NONEON-NOSVE-NEXT: fcvtzs w8, s02003; NONEON-NOSVE-NEXT: ldr h0, [sp, #18]2004; NONEON-NOSVE-NEXT: fcvt s0, h02005; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #40]2006; NONEON-NOSVE-NEXT: fcvtzs w9, s02007; NONEON-NOSVE-NEXT: ldr h0, [sp, #16]2008; NONEON-NOSVE-NEXT: fcvt s0, h02009; NONEON-NOSVE-NEXT: fcvtzs w8, s02010; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #32]2011; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #32]2012; NONEON-NOSVE-NEXT: stp q1, q0, [x1]2013; NONEON-NOSVE-NEXT: add sp, sp, #642014; NONEON-NOSVE-NEXT: ret2015 %op1 = load <8 x half>, ptr %a2016 %res = fptosi <8 x half> %op1 to <8 x i32>2017 store <8 x i32> %res, ptr %b2018 ret void2019}2020 2021define void @fcvtzs_v16f16_v16i32(ptr %a, ptr %b) {2022; CHECK-LABEL: fcvtzs_v16f16_v16i32:2023; CHECK: // %bb.0:2024; CHECK-NEXT: ldp q1, q0, [x0]2025; CHECK-NEXT: ptrue p0.s, vl42026; CHECK-NEXT: movprfx z2, z02027; CHECK-NEXT: ext z2.b, z2.b, z0.b, #82028; CHECK-NEXT: movprfx z3, z12029; CHECK-NEXT: ext z3.b, z3.b, z1.b, #82030; CHECK-NEXT: uunpklo z0.s, z0.h2031; CHECK-NEXT: uunpklo z1.s, z1.h2032; CHECK-NEXT: uunpklo z2.s, z2.h2033; CHECK-NEXT: uunpklo z3.s, z3.h2034; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.h2035; CHECK-NEXT: fcvtzs z1.s, p0/m, z1.h2036; CHECK-NEXT: fcvtzs z2.s, p0/m, z2.h2037; CHECK-NEXT: fcvtzs z3.s, p0/m, z3.h2038; CHECK-NEXT: stp q1, q3, [x1]2039; CHECK-NEXT: stp q0, q2, [x1, #32]2040; CHECK-NEXT: ret2041;2042; NONEON-NOSVE-LABEL: fcvtzs_v16f16_v16i32:2043; NONEON-NOSVE: // %bb.0:2044; NONEON-NOSVE-NEXT: ldp q0, q1, [x0]2045; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-128]!2046; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1282047; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]2048; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #32]2049; NONEON-NOSVE-NEXT: ldp d1, d0, [sp, #16]2050; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #48]2051; NONEON-NOSVE-NEXT: ldr h0, [sp, #46]2052; NONEON-NOSVE-NEXT: fcvt s0, h02053; NONEON-NOSVE-NEXT: fcvtzs w9, s02054; NONEON-NOSVE-NEXT: ldr h0, [sp, #44]2055; NONEON-NOSVE-NEXT: fcvt s0, h02056; NONEON-NOSVE-NEXT: fcvtzs w8, s02057; NONEON-NOSVE-NEXT: ldr h0, [sp, #42]2058; NONEON-NOSVE-NEXT: fcvt s0, h02059; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #88]2060; NONEON-NOSVE-NEXT: fcvtzs w9, s02061; NONEON-NOSVE-NEXT: ldr h0, [sp, #40]2062; NONEON-NOSVE-NEXT: fcvt s0, h02063; NONEON-NOSVE-NEXT: fcvtzs w8, s02064; NONEON-NOSVE-NEXT: ldr h0, [sp, #38]2065; NONEON-NOSVE-NEXT: fcvt s0, h02066; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #80]2067; NONEON-NOSVE-NEXT: fcvtzs w9, s02068; NONEON-NOSVE-NEXT: ldr h0, [sp, #36]2069; NONEON-NOSVE-NEXT: fcvt s0, h02070; NONEON-NOSVE-NEXT: fcvtzs w8, s02071; NONEON-NOSVE-NEXT: ldr h0, [sp, #34]2072; NONEON-NOSVE-NEXT: fcvt s0, h02073; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #72]2074; NONEON-NOSVE-NEXT: fcvtzs w9, s02075; NONEON-NOSVE-NEXT: ldr h0, [sp, #32]2076; NONEON-NOSVE-NEXT: fcvt s0, h02077; NONEON-NOSVE-NEXT: fcvtzs w8, s02078; NONEON-NOSVE-NEXT: ldr h0, [sp, #62]2079; NONEON-NOSVE-NEXT: fcvt s0, h02080; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #64]2081; NONEON-NOSVE-NEXT: ldp q3, q2, [sp, #64]2082; NONEON-NOSVE-NEXT: fcvtzs w9, s02083; NONEON-NOSVE-NEXT: ldr h0, [sp, #60]2084; NONEON-NOSVE-NEXT: fcvt s0, h02085; NONEON-NOSVE-NEXT: fcvtzs w8, s02086; NONEON-NOSVE-NEXT: ldr h0, [sp, #58]2087; NONEON-NOSVE-NEXT: fcvt s0, h02088; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #120]2089; NONEON-NOSVE-NEXT: fcvtzs w9, s02090; NONEON-NOSVE-NEXT: ldr h0, [sp, #56]2091; NONEON-NOSVE-NEXT: fcvt s0, h02092; NONEON-NOSVE-NEXT: fcvtzs w8, s02093; NONEON-NOSVE-NEXT: ldr h0, [sp, #54]2094; NONEON-NOSVE-NEXT: fcvt s0, h02095; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #112]2096; NONEON-NOSVE-NEXT: fcvtzs w9, s02097; NONEON-NOSVE-NEXT: ldr h0, [sp, #52]2098; NONEON-NOSVE-NEXT: fcvt s0, h02099; NONEON-NOSVE-NEXT: fcvtzs w8, s02100; NONEON-NOSVE-NEXT: ldr h0, [sp, #50]2101; NONEON-NOSVE-NEXT: fcvt s0, h02102; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #104]2103; NONEON-NOSVE-NEXT: fcvtzs w9, s02104; NONEON-NOSVE-NEXT: ldr h0, [sp, #48]2105; NONEON-NOSVE-NEXT: fcvt s0, h02106; NONEON-NOSVE-NEXT: fcvtzs w8, s02107; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #96]2108; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #96]2109; NONEON-NOSVE-NEXT: stp q2, q3, [x1]2110; NONEON-NOSVE-NEXT: stp q1, q0, [x1, #32]2111; NONEON-NOSVE-NEXT: add sp, sp, #1282112; NONEON-NOSVE-NEXT: ret2113 %op1 = load <16 x half>, ptr %a2114 %res = fptosi <16 x half> %op1 to <16 x i32>2115 store <16 x i32> %res, ptr %b2116 ret void2117}2118 2119;2120; FCVTZS H -> D2121;2122 2123define <1 x i64> @fcvtzs_v1f16_v1i64(<1 x half> %op1) {2124; CHECK-LABEL: fcvtzs_v1f16_v1i64:2125; CHECK: // %bb.0:2126; CHECK-NEXT: ptrue p0.d2127; CHECK-NEXT: // kill: def $h0 killed $h0 def $z02128; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.h2129; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z02130; CHECK-NEXT: ret2131;2132; NONEON-NOSVE-LABEL: fcvtzs_v1f16_v1i64:2133; NONEON-NOSVE: // %bb.0:2134; NONEON-NOSVE-NEXT: sub sp, sp, #162135; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 162136; NONEON-NOSVE-NEXT: fcvt s0, h02137; NONEON-NOSVE-NEXT: fcvtzs x8, s02138; NONEON-NOSVE-NEXT: str x8, [sp, #8]2139; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]2140; NONEON-NOSVE-NEXT: add sp, sp, #162141; NONEON-NOSVE-NEXT: ret2142 %res = fptosi <1 x half> %op1 to <1 x i64>2143 ret <1 x i64> %res2144}2145 2146; v2f16 is not legal for NEON, so use SVE2147define <2 x i64> @fcvtzs_v2f16_v2i64(<2 x half> %op1) {2148; CHECK-LABEL: fcvtzs_v2f16_v2i64:2149; CHECK: // %bb.0:2150; CHECK-NEXT: // kill: def $d0 killed $d0 def $z02151; CHECK-NEXT: mov z1.h, z0.h[1]2152; CHECK-NEXT: ptrue p0.d2153; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.h2154; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.h2155; CHECK-NEXT: zip1 z0.d, z0.d, z1.d2156; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z02157; CHECK-NEXT: ret2158;2159; NONEON-NOSVE-LABEL: fcvtzs_v2f16_v2i64:2160; NONEON-NOSVE: // %bb.0:2161; NONEON-NOSVE-NEXT: sub sp, sp, #322162; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 322163; NONEON-NOSVE-NEXT: str d0, [sp, #8]2164; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]2165; NONEON-NOSVE-NEXT: fcvt s0, h02166; NONEON-NOSVE-NEXT: fcvtzs x9, s02167; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]2168; NONEON-NOSVE-NEXT: fcvt s0, h02169; NONEON-NOSVE-NEXT: fcvtzs x8, s02170; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #16]2171; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]2172; NONEON-NOSVE-NEXT: add sp, sp, #322173; NONEON-NOSVE-NEXT: ret2174 %res = fptosi <2 x half> %op1 to <2 x i64>2175 ret <2 x i64> %res2176}2177 2178define void @fcvtzs_v4f16_v4i64(ptr %a, ptr %b) {2179; CHECK-LABEL: fcvtzs_v4f16_v4i64:2180; CHECK: // %bb.0:2181; CHECK-NEXT: ldr d0, [x0]2182; CHECK-NEXT: ptrue p0.d2183; CHECK-NEXT: mov z1.h, z0.h[3]2184; CHECK-NEXT: mov z2.h, z0.h[2]2185; CHECK-NEXT: mov z3.h, z0.h[1]2186; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.h2187; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.h2188; CHECK-NEXT: fcvtzs z2.d, p0/m, z2.h2189; CHECK-NEXT: fcvtzs z3.d, p0/m, z3.h2190; CHECK-NEXT: zip1 z1.d, z2.d, z1.d2191; CHECK-NEXT: zip1 z0.d, z0.d, z3.d2192; CHECK-NEXT: stp q0, q1, [x1]2193; CHECK-NEXT: ret2194;2195; NONEON-NOSVE-LABEL: fcvtzs_v4f16_v4i64:2196; NONEON-NOSVE: // %bb.0:2197; NONEON-NOSVE-NEXT: sub sp, sp, #482198; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 482199; NONEON-NOSVE-NEXT: ldr d0, [x0]2200; NONEON-NOSVE-NEXT: str d0, [sp, #8]2201; NONEON-NOSVE-NEXT: ldr h0, [sp, #10]2202; NONEON-NOSVE-NEXT: fcvt s0, h02203; NONEON-NOSVE-NEXT: fcvtzs x9, s02204; NONEON-NOSVE-NEXT: ldr h0, [sp, #8]2205; NONEON-NOSVE-NEXT: fcvt s0, h02206; NONEON-NOSVE-NEXT: fcvtzs x8, s02207; NONEON-NOSVE-NEXT: ldr h0, [sp, #14]2208; NONEON-NOSVE-NEXT: fcvt s0, h02209; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #16]2210; NONEON-NOSVE-NEXT: fcvtzs x9, s02211; NONEON-NOSVE-NEXT: ldr h0, [sp, #12]2212; NONEON-NOSVE-NEXT: fcvt s0, h02213; NONEON-NOSVE-NEXT: fcvtzs x8, s02214; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #32]2215; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #16]2216; NONEON-NOSVE-NEXT: stp q1, q0, [x1]2217; NONEON-NOSVE-NEXT: add sp, sp, #482218; NONEON-NOSVE-NEXT: ret2219 %op1 = load <4 x half>, ptr %a2220 %res = fptosi <4 x half> %op1 to <4 x i64>2221 store <4 x i64> %res, ptr %b2222 ret void2223}2224 2225define void @fcvtzs_v8f16_v8i64(ptr %a, ptr %b) {2226; CHECK-LABEL: fcvtzs_v8f16_v8i64:2227; CHECK: // %bb.0:2228; CHECK-NEXT: ldr q0, [x0]2229; CHECK-NEXT: ptrue p0.d2230; CHECK-NEXT: mov z2.h, z0.h[3]2231; CHECK-NEXT: mov z3.h, z0.h[2]2232; CHECK-NEXT: mov z4.h, z0.h[1]2233; CHECK-NEXT: movprfx z1, z02234; CHECK-NEXT: ext z1.b, z1.b, z0.b, #82235; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.h2236; CHECK-NEXT: fcvtzs z2.d, p0/m, z2.h2237; CHECK-NEXT: fcvtzs z3.d, p0/m, z3.h2238; CHECK-NEXT: fcvtzs z4.d, p0/m, z4.h2239; CHECK-NEXT: mov z5.h, z1.h[3]2240; CHECK-NEXT: mov z6.h, z1.h[2]2241; CHECK-NEXT: mov z7.h, z1.h[1]2242; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.h2243; CHECK-NEXT: fcvtzs z5.d, p0/m, z5.h2244; CHECK-NEXT: fcvtzs z6.d, p0/m, z6.h2245; CHECK-NEXT: fcvtzs z7.d, p0/m, z7.h2246; CHECK-NEXT: zip1 z2.d, z3.d, z2.d2247; CHECK-NEXT: zip1 z0.d, z0.d, z4.d2248; CHECK-NEXT: zip1 z3.d, z6.d, z5.d2249; CHECK-NEXT: zip1 z1.d, z1.d, z7.d2250; CHECK-NEXT: stp q0, q2, [x1]2251; CHECK-NEXT: stp q1, q3, [x1, #32]2252; CHECK-NEXT: ret2253;2254; NONEON-NOSVE-LABEL: fcvtzs_v8f16_v8i64:2255; NONEON-NOSVE: // %bb.0:2256; NONEON-NOSVE-NEXT: ldr q0, [x0]2257; NONEON-NOSVE-NEXT: str q0, [sp, #-96]!2258; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 962259; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]2260; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #16]2261; NONEON-NOSVE-NEXT: ldr h0, [sp, #26]2262; NONEON-NOSVE-NEXT: fcvt s0, h02263; NONEON-NOSVE-NEXT: fcvtzs x9, s02264; NONEON-NOSVE-NEXT: ldr h0, [sp, #24]2265; NONEON-NOSVE-NEXT: fcvt s0, h02266; NONEON-NOSVE-NEXT: fcvtzs x8, s02267; NONEON-NOSVE-NEXT: ldr h0, [sp, #30]2268; NONEON-NOSVE-NEXT: fcvt s0, h02269; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #64]2270; NONEON-NOSVE-NEXT: fcvtzs x9, s02271; NONEON-NOSVE-NEXT: ldr h0, [sp, #28]2272; NONEON-NOSVE-NEXT: fcvt s0, h02273; NONEON-NOSVE-NEXT: fcvtzs x8, s02274; NONEON-NOSVE-NEXT: ldr h0, [sp, #18]2275; NONEON-NOSVE-NEXT: fcvt s0, h02276; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #80]2277; NONEON-NOSVE-NEXT: ldp q2, q3, [sp, #64]2278; NONEON-NOSVE-NEXT: fcvtzs x9, s02279; NONEON-NOSVE-NEXT: ldr h0, [sp, #16]2280; NONEON-NOSVE-NEXT: fcvt s0, h02281; NONEON-NOSVE-NEXT: fcvtzs x8, s02282; NONEON-NOSVE-NEXT: ldr h0, [sp, #22]2283; NONEON-NOSVE-NEXT: fcvt s0, h02284; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #32]2285; NONEON-NOSVE-NEXT: fcvtzs x9, s02286; NONEON-NOSVE-NEXT: ldr h0, [sp, #20]2287; NONEON-NOSVE-NEXT: fcvt s0, h02288; NONEON-NOSVE-NEXT: fcvtzs x8, s02289; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #48]2290; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #32]2291; NONEON-NOSVE-NEXT: stp q2, q3, [x1]2292; NONEON-NOSVE-NEXT: stp q1, q0, [x1, #32]2293; NONEON-NOSVE-NEXT: add sp, sp, #962294; NONEON-NOSVE-NEXT: ret2295 %op1 = load <8 x half>, ptr %a2296 %res = fptosi <8 x half> %op1 to <8 x i64>2297 store <8 x i64> %res, ptr %b2298 ret void2299}2300 2301define void @fcvtzs_v16f16_v16i64(ptr %a, ptr %b) {2302; CHECK-LABEL: fcvtzs_v16f16_v16i64:2303; CHECK: // %bb.0:2304; CHECK-NEXT: ldp q1, q0, [x0]2305; CHECK-NEXT: ptrue p0.d2306; CHECK-NEXT: mov z2.h, z1.h[1]2307; CHECK-NEXT: mov z3.h, z0.h[3]2308; CHECK-NEXT: mov z4.h, z0.h[2]2309; CHECK-NEXT: movprfx z5, z12310; CHECK-NEXT: ext z5.b, z5.b, z1.b, #82311; CHECK-NEXT: movprfx z7, z12312; CHECK-NEXT: fcvtzs z7.d, p0/m, z1.h2313; CHECK-NEXT: mov z16.h, z1.h[3]2314; CHECK-NEXT: mov z1.h, z1.h[2]2315; CHECK-NEXT: mov z17.h, z0.h[1]2316; CHECK-NEXT: movprfx z6, z02317; CHECK-NEXT: ext z6.b, z6.b, z0.b, #82318; CHECK-NEXT: fcvtzs z2.d, p0/m, z2.h2319; CHECK-NEXT: fcvtzs z3.d, p0/m, z3.h2320; CHECK-NEXT: fcvtzs z4.d, p0/m, z4.h2321; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.h2322; CHECK-NEXT: fcvtzs z16.d, p0/m, z16.h2323; CHECK-NEXT: mov z18.h, z5.h[3]2324; CHECK-NEXT: fcvtzs z17.d, p0/m, z17.h2325; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.h2326; CHECK-NEXT: mov z19.h, z6.h[3]2327; CHECK-NEXT: mov z20.h, z6.h[2]2328; CHECK-NEXT: mov z21.h, z6.h[1]2329; CHECK-NEXT: fcvtzs z6.d, p0/m, z6.h2330; CHECK-NEXT: zip1 z2.d, z7.d, z2.d2331; CHECK-NEXT: mov z7.h, z5.h[2]2332; CHECK-NEXT: zip1 z3.d, z4.d, z3.d2333; CHECK-NEXT: mov z4.h, z5.h[1]2334; CHECK-NEXT: fcvtzs z19.d, p0/m, z19.h2335; CHECK-NEXT: fcvtzs z5.d, p0/m, z5.h2336; CHECK-NEXT: fcvtzs z20.d, p0/m, z20.h2337; CHECK-NEXT: zip1 z0.d, z0.d, z17.d2338; CHECK-NEXT: movprfx z17, z212339; CHECK-NEXT: fcvtzs z17.d, p0/m, z21.h2340; CHECK-NEXT: zip1 z1.d, z1.d, z16.d2341; CHECK-NEXT: movprfx z16, z182342; CHECK-NEXT: fcvtzs z16.d, p0/m, z18.h2343; CHECK-NEXT: fcvtzs z7.d, p0/m, z7.h2344; CHECK-NEXT: fcvtzs z4.d, p0/m, z4.h2345; CHECK-NEXT: stp q0, q3, [x1, #64]2346; CHECK-NEXT: zip1 z0.d, z20.d, z19.d2347; CHECK-NEXT: zip1 z3.d, z6.d, z17.d2348; CHECK-NEXT: stp q2, q1, [x1]2349; CHECK-NEXT: zip1 z1.d, z7.d, z16.d2350; CHECK-NEXT: zip1 z2.d, z5.d, z4.d2351; CHECK-NEXT: stp q3, q0, [x1, #96]2352; CHECK-NEXT: stp q2, q1, [x1, #32]2353; CHECK-NEXT: ret2354;2355; NONEON-NOSVE-LABEL: fcvtzs_v16f16_v16i64:2356; NONEON-NOSVE: // %bb.0:2357; NONEON-NOSVE-NEXT: sub sp, sp, #1922358; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1922359; NONEON-NOSVE-NEXT: ldp q0, q1, [x0]2360; NONEON-NOSVE-NEXT: stp q0, q1, [sp]2361; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]2362; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #32]2363; NONEON-NOSVE-NEXT: ldp d1, d0, [sp, #16]2364; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #48]2365; NONEON-NOSVE-NEXT: ldr h0, [sp, #42]2366; NONEON-NOSVE-NEXT: fcvt s0, h02367; NONEON-NOSVE-NEXT: fcvtzs x9, s02368; NONEON-NOSVE-NEXT: ldr h0, [sp, #40]2369; NONEON-NOSVE-NEXT: fcvt s0, h02370; NONEON-NOSVE-NEXT: fcvtzs x8, s02371; NONEON-NOSVE-NEXT: ldr h0, [sp, #46]2372; NONEON-NOSVE-NEXT: fcvt s0, h02373; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #96]2374; NONEON-NOSVE-NEXT: fcvtzs x9, s02375; NONEON-NOSVE-NEXT: ldr h0, [sp, #44]2376; NONEON-NOSVE-NEXT: fcvt s0, h02377; NONEON-NOSVE-NEXT: fcvtzs x8, s02378; NONEON-NOSVE-NEXT: ldr h0, [sp, #34]2379; NONEON-NOSVE-NEXT: fcvt s0, h02380; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #112]2381; NONEON-NOSVE-NEXT: fcvtzs x9, s02382; NONEON-NOSVE-NEXT: ldr h0, [sp, #32]2383; NONEON-NOSVE-NEXT: fcvt s0, h02384; NONEON-NOSVE-NEXT: fcvtzs x8, s02385; NONEON-NOSVE-NEXT: ldr h0, [sp, #38]2386; NONEON-NOSVE-NEXT: fcvt s0, h02387; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #64]2388; NONEON-NOSVE-NEXT: fcvtzs x9, s02389; NONEON-NOSVE-NEXT: ldr h0, [sp, #36]2390; NONEON-NOSVE-NEXT: fcvt s0, h02391; NONEON-NOSVE-NEXT: fcvtzs x8, s02392; NONEON-NOSVE-NEXT: ldr h0, [sp, #58]2393; NONEON-NOSVE-NEXT: fcvt s0, h02394; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #80]2395; NONEON-NOSVE-NEXT: ldp q3, q4, [sp, #64]2396; NONEON-NOSVE-NEXT: fcvtzs x9, s02397; NONEON-NOSVE-NEXT: ldr h0, [sp, #56]2398; NONEON-NOSVE-NEXT: fcvt s0, h02399; NONEON-NOSVE-NEXT: fcvtzs x8, s02400; NONEON-NOSVE-NEXT: ldr h0, [sp, #62]2401; NONEON-NOSVE-NEXT: fcvt s0, h02402; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #160]2403; NONEON-NOSVE-NEXT: fcvtzs x9, s02404; NONEON-NOSVE-NEXT: ldr h0, [sp, #60]2405; NONEON-NOSVE-NEXT: fcvt s0, h02406; NONEON-NOSVE-NEXT: fcvtzs x8, s02407; NONEON-NOSVE-NEXT: ldr h0, [sp, #50]2408; NONEON-NOSVE-NEXT: fcvt s0, h02409; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #176]2410; NONEON-NOSVE-NEXT: ldp q6, q7, [sp, #160]2411; NONEON-NOSVE-NEXT: fcvtzs x9, s02412; NONEON-NOSVE-NEXT: ldr h0, [sp, #48]2413; NONEON-NOSVE-NEXT: fcvt s0, h02414; NONEON-NOSVE-NEXT: fcvtzs x8, s02415; NONEON-NOSVE-NEXT: ldr h0, [sp, #54]2416; NONEON-NOSVE-NEXT: fcvt s0, h02417; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #128]2418; NONEON-NOSVE-NEXT: fcvtzs x9, s02419; NONEON-NOSVE-NEXT: ldr h0, [sp, #52]2420; NONEON-NOSVE-NEXT: fcvt s0, h02421; NONEON-NOSVE-NEXT: fcvtzs x8, s02422; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #96]2423; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #144]2424; NONEON-NOSVE-NEXT: ldp q5, q2, [sp, #128]2425; NONEON-NOSVE-NEXT: stp q0, q1, [x1]2426; NONEON-NOSVE-NEXT: stp q3, q4, [x1, #32]2427; NONEON-NOSVE-NEXT: stp q6, q7, [x1, #64]2428; NONEON-NOSVE-NEXT: stp q5, q2, [x1, #96]2429; NONEON-NOSVE-NEXT: add sp, sp, #1922430; NONEON-NOSVE-NEXT: ret2431 %op1 = load <16 x half>, ptr %a2432 %res = fptosi <16 x half> %op1 to <16 x i64>2433 store <16 x i64> %res, ptr %b2434 ret void2435}2436 2437;2438; FCVTZS S -> H2439;2440 2441define <2 x i16> @fcvtzs_v2f32_v2i16(<2 x float> %op1) {2442; CHECK-LABEL: fcvtzs_v2f32_v2i16:2443; CHECK: // %bb.0:2444; CHECK-NEXT: ptrue p0.s, vl22445; CHECK-NEXT: // kill: def $d0 killed $d0 def $z02446; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.s2447; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z02448; CHECK-NEXT: ret2449;2450; NONEON-NOSVE-LABEL: fcvtzs_v2f32_v2i16:2451; NONEON-NOSVE: // %bb.0:2452; NONEON-NOSVE-NEXT: str d0, [sp, #-16]!2453; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 162454; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]2455; NONEON-NOSVE-NEXT: fcvtzs w9, s12456; NONEON-NOSVE-NEXT: fcvtzs w8, s02457; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #8]2458; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]2459; NONEON-NOSVE-NEXT: add sp, sp, #162460; NONEON-NOSVE-NEXT: ret2461 %res = fptosi <2 x float> %op1 to <2 x i16>2462 ret <2 x i16> %res2463}2464 2465define <4 x i16> @fcvtzs_v4f32_v4i16(<4 x float> %op1) {2466; CHECK-LABEL: fcvtzs_v4f32_v4i16:2467; CHECK: // %bb.0:2468; CHECK-NEXT: ptrue p0.s, vl42469; CHECK-NEXT: // kill: def $q0 killed $q0 def $z02470; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.s2471; CHECK-NEXT: uzp1 z0.h, z0.h, z0.h2472; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z02473; CHECK-NEXT: ret2474;2475; NONEON-NOSVE-LABEL: fcvtzs_v4f32_v4i16:2476; NONEON-NOSVE: // %bb.0:2477; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!2478; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 322479; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]2480; NONEON-NOSVE-NEXT: fcvtzs w8, s12481; NONEON-NOSVE-NEXT: strh w8, [sp, #30]2482; NONEON-NOSVE-NEXT: fcvtzs w8, s02483; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]2484; NONEON-NOSVE-NEXT: strh w8, [sp, #28]2485; NONEON-NOSVE-NEXT: fcvtzs w8, s12486; NONEON-NOSVE-NEXT: strh w8, [sp, #26]2487; NONEON-NOSVE-NEXT: fcvtzs w8, s02488; NONEON-NOSVE-NEXT: strh w8, [sp, #24]2489; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]2490; NONEON-NOSVE-NEXT: add sp, sp, #322491; NONEON-NOSVE-NEXT: ret2492 %res = fptosi <4 x float> %op1 to <4 x i16>2493 ret <4 x i16> %res2494}2495 2496define <8 x i16> @fcvtzs_v8f32_v8i16(ptr %a) {2497; CHECK-LABEL: fcvtzs_v8f32_v8i16:2498; CHECK: // %bb.0:2499; CHECK-NEXT: ldp q0, q1, [x0]2500; CHECK-NEXT: ptrue p0.s, vl42501; CHECK-NEXT: fcvtzs z1.s, p0/m, z1.s2502; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.s2503; CHECK-NEXT: ptrue p0.h, vl42504; CHECK-NEXT: uzp1 z1.h, z1.h, z1.h2505; CHECK-NEXT: uzp1 z0.h, z0.h, z0.h2506; CHECK-NEXT: splice z0.h, p0, z0.h, z1.h2507; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z02508; CHECK-NEXT: ret2509;2510; NONEON-NOSVE-LABEL: fcvtzs_v8f32_v8i16:2511; NONEON-NOSVE: // %bb.0:2512; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]2513; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-48]!2514; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 482515; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #24]2516; NONEON-NOSVE-NEXT: fcvtzs w8, s12517; NONEON-NOSVE-NEXT: strh w8, [sp, #46]2518; NONEON-NOSVE-NEXT: fcvtzs w8, s02519; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #16]2520; NONEON-NOSVE-NEXT: strh w8, [sp, #44]2521; NONEON-NOSVE-NEXT: fcvtzs w8, s12522; NONEON-NOSVE-NEXT: strh w8, [sp, #42]2523; NONEON-NOSVE-NEXT: fcvtzs w8, s02524; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]2525; NONEON-NOSVE-NEXT: strh w8, [sp, #40]2526; NONEON-NOSVE-NEXT: fcvtzs w8, s12527; NONEON-NOSVE-NEXT: strh w8, [sp, #38]2528; NONEON-NOSVE-NEXT: fcvtzs w8, s02529; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]2530; NONEON-NOSVE-NEXT: strh w8, [sp, #36]2531; NONEON-NOSVE-NEXT: fcvtzs w8, s12532; NONEON-NOSVE-NEXT: strh w8, [sp, #34]2533; NONEON-NOSVE-NEXT: fcvtzs w8, s02534; NONEON-NOSVE-NEXT: strh w8, [sp, #32]2535; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]2536; NONEON-NOSVE-NEXT: add sp, sp, #482537; NONEON-NOSVE-NEXT: ret2538 %op1 = load <8 x float>, ptr %a2539 %res = fptosi <8 x float> %op1 to <8 x i16>2540 ret <8 x i16> %res2541}2542 2543define void @fcvtzs_v16f32_v16i16(ptr %a, ptr %b) {2544; CHECK-LABEL: fcvtzs_v16f32_v16i16:2545; CHECK: // %bb.0:2546; CHECK-NEXT: ldp q0, q1, [x0, #32]2547; CHECK-NEXT: ptrue p0.s, vl42548; CHECK-NEXT: ldp q2, q3, [x0]2549; CHECK-NEXT: fcvtzs z1.s, p0/m, z1.s2550; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.s2551; CHECK-NEXT: fcvtzs z3.s, p0/m, z3.s2552; CHECK-NEXT: fcvtzs z2.s, p0/m, z2.s2553; CHECK-NEXT: ptrue p0.h, vl42554; CHECK-NEXT: uzp1 z1.h, z1.h, z1.h2555; CHECK-NEXT: uzp1 z0.h, z0.h, z0.h2556; CHECK-NEXT: uzp1 z3.h, z3.h, z3.h2557; CHECK-NEXT: uzp1 z2.h, z2.h, z2.h2558; CHECK-NEXT: splice z0.h, p0, z0.h, z1.h2559; CHECK-NEXT: splice z2.h, p0, z2.h, z3.h2560; CHECK-NEXT: stp q2, q0, [x1]2561; CHECK-NEXT: ret2562;2563; NONEON-NOSVE-LABEL: fcvtzs_v16f32_v16i16:2564; NONEON-NOSVE: // %bb.0:2565; NONEON-NOSVE-NEXT: sub sp, sp, #962566; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 962567; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]2568; NONEON-NOSVE-NEXT: ldp q2, q3, [x0, #32]2569; NONEON-NOSVE-NEXT: str q1, [sp]2570; NONEON-NOSVE-NEXT: stp q3, q0, [sp, #16]2571; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #40]2572; NONEON-NOSVE-NEXT: str q2, [sp, #48]2573; NONEON-NOSVE-NEXT: fcvtzs w8, s12574; NONEON-NOSVE-NEXT: strh w8, [sp, #78]2575; NONEON-NOSVE-NEXT: fcvtzs w8, s02576; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #32]2577; NONEON-NOSVE-NEXT: strh w8, [sp, #76]2578; NONEON-NOSVE-NEXT: fcvtzs w8, s12579; NONEON-NOSVE-NEXT: strh w8, [sp, #74]2580; NONEON-NOSVE-NEXT: fcvtzs w8, s02581; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]2582; NONEON-NOSVE-NEXT: strh w8, [sp, #72]2583; NONEON-NOSVE-NEXT: fcvtzs w8, s12584; NONEON-NOSVE-NEXT: strh w8, [sp, #70]2585; NONEON-NOSVE-NEXT: fcvtzs w8, s02586; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]2587; NONEON-NOSVE-NEXT: strh w8, [sp, #68]2588; NONEON-NOSVE-NEXT: fcvtzs w8, s12589; NONEON-NOSVE-NEXT: strh w8, [sp, #66]2590; NONEON-NOSVE-NEXT: fcvtzs w8, s02591; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #24]2592; NONEON-NOSVE-NEXT: strh w8, [sp, #64]2593; NONEON-NOSVE-NEXT: fcvtzs w8, s12594; NONEON-NOSVE-NEXT: strh w8, [sp, #94]2595; NONEON-NOSVE-NEXT: fcvtzs w8, s02596; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #16]2597; NONEON-NOSVE-NEXT: strh w8, [sp, #92]2598; NONEON-NOSVE-NEXT: fcvtzs w8, s12599; NONEON-NOSVE-NEXT: strh w8, [sp, #90]2600; NONEON-NOSVE-NEXT: fcvtzs w8, s02601; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #56]2602; NONEON-NOSVE-NEXT: strh w8, [sp, #88]2603; NONEON-NOSVE-NEXT: fcvtzs w8, s12604; NONEON-NOSVE-NEXT: strh w8, [sp, #86]2605; NONEON-NOSVE-NEXT: fcvtzs w8, s02606; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #48]2607; NONEON-NOSVE-NEXT: strh w8, [sp, #84]2608; NONEON-NOSVE-NEXT: fcvtzs w8, s12609; NONEON-NOSVE-NEXT: strh w8, [sp, #82]2610; NONEON-NOSVE-NEXT: fcvtzs w8, s02611; NONEON-NOSVE-NEXT: strh w8, [sp, #80]2612; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #64]2613; NONEON-NOSVE-NEXT: stp q1, q0, [x1]2614; NONEON-NOSVE-NEXT: add sp, sp, #962615; NONEON-NOSVE-NEXT: ret2616 %op1 = load <16 x float>, ptr %a2617 %res = fptosi <16 x float> %op1 to <16 x i16>2618 store <16 x i16> %res, ptr %b2619 ret void2620}2621 2622;2623; FCVTZS S -> S2624;2625 2626define <2 x i32> @fcvtzs_v2f32_v2i32(<2 x float> %op1) {2627; CHECK-LABEL: fcvtzs_v2f32_v2i32:2628; CHECK: // %bb.0:2629; CHECK-NEXT: ptrue p0.s, vl22630; CHECK-NEXT: // kill: def $d0 killed $d0 def $z02631; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.s2632; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z02633; CHECK-NEXT: ret2634;2635; NONEON-NOSVE-LABEL: fcvtzs_v2f32_v2i32:2636; NONEON-NOSVE: // %bb.0:2637; NONEON-NOSVE-NEXT: str d0, [sp, #-16]!2638; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 162639; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]2640; NONEON-NOSVE-NEXT: fcvtzs w9, s12641; NONEON-NOSVE-NEXT: fcvtzs w8, s02642; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #8]2643; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]2644; NONEON-NOSVE-NEXT: add sp, sp, #162645; NONEON-NOSVE-NEXT: ret2646 %res = fptosi <2 x float> %op1 to <2 x i32>2647 ret <2 x i32> %res2648}2649 2650define <4 x i32> @fcvtzs_v4f32_v4i32(<4 x float> %op1) {2651; CHECK-LABEL: fcvtzs_v4f32_v4i32:2652; CHECK: // %bb.0:2653; CHECK-NEXT: ptrue p0.s, vl42654; CHECK-NEXT: // kill: def $q0 killed $q0 def $z02655; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.s2656; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z02657; CHECK-NEXT: ret2658;2659; NONEON-NOSVE-LABEL: fcvtzs_v4f32_v4i32:2660; NONEON-NOSVE: // %bb.0:2661; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!2662; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 322663; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]2664; NONEON-NOSVE-NEXT: fcvtzs w9, s12665; NONEON-NOSVE-NEXT: fcvtzs w8, s02666; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]2667; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #24]2668; NONEON-NOSVE-NEXT: fcvtzs w9, s12669; NONEON-NOSVE-NEXT: fcvtzs w8, s02670; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #16]2671; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]2672; NONEON-NOSVE-NEXT: add sp, sp, #322673; NONEON-NOSVE-NEXT: ret2674 %res = fptosi <4 x float> %op1 to <4 x i32>2675 ret <4 x i32> %res2676}2677 2678define void @fcvtzs_v8f32_v8i32(ptr %a, ptr %b) {2679; CHECK-LABEL: fcvtzs_v8f32_v8i32:2680; CHECK: // %bb.0:2681; CHECK-NEXT: ldp q0, q1, [x0]2682; CHECK-NEXT: ptrue p0.s, vl42683; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.s2684; CHECK-NEXT: fcvtzs z1.s, p0/m, z1.s2685; CHECK-NEXT: stp q0, q1, [x1]2686; CHECK-NEXT: ret2687;2688; NONEON-NOSVE-LABEL: fcvtzs_v8f32_v8i32:2689; NONEON-NOSVE: // %bb.0:2690; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]2691; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-64]!2692; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 642693; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #24]2694; NONEON-NOSVE-NEXT: fcvtzs w9, s12695; NONEON-NOSVE-NEXT: fcvtzs w8, s02696; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #16]2697; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #56]2698; NONEON-NOSVE-NEXT: fcvtzs w9, s12699; NONEON-NOSVE-NEXT: fcvtzs w8, s02700; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]2701; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #48]2702; NONEON-NOSVE-NEXT: fcvtzs w9, s12703; NONEON-NOSVE-NEXT: fcvtzs w8, s02704; NONEON-NOSVE-NEXT: ldp s0, s1, [sp]2705; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #40]2706; NONEON-NOSVE-NEXT: fcvtzs w9, s12707; NONEON-NOSVE-NEXT: fcvtzs w8, s02708; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #32]2709; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #32]2710; NONEON-NOSVE-NEXT: stp q0, q1, [x1]2711; NONEON-NOSVE-NEXT: add sp, sp, #642712; NONEON-NOSVE-NEXT: ret2713 %op1 = load <8 x float>, ptr %a2714 %res = fptosi <8 x float> %op1 to <8 x i32>2715 store <8 x i32> %res, ptr %b2716 ret void2717}2718 2719;2720; FCVTZS S -> D2721;2722 2723define <1 x i64> @fcvtzs_v1f32_v1i64(<1 x float> %op1) {2724; CHECK-LABEL: fcvtzs_v1f32_v1i64:2725; CHECK: // %bb.0:2726; CHECK-NEXT: // kill: def $d0 killed $d0 def $z02727; CHECK-NEXT: ptrue p0.d, vl22728; CHECK-NEXT: uunpklo z0.d, z0.s2729; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.s2730; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z02731; CHECK-NEXT: ret2732;2733; NONEON-NOSVE-LABEL: fcvtzs_v1f32_v1i64:2734; NONEON-NOSVE: // %bb.0:2735; NONEON-NOSVE-NEXT: sub sp, sp, #162736; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 162737; NONEON-NOSVE-NEXT: str d0, [sp, #8]2738; NONEON-NOSVE-NEXT: ldr s0, [sp, #8]2739; NONEON-NOSVE-NEXT: fcvtzs x8, s02740; NONEON-NOSVE-NEXT: fmov d0, x82741; NONEON-NOSVE-NEXT: add sp, sp, #162742; NONEON-NOSVE-NEXT: ret2743 %res = fptosi <1 x float> %op1 to <1 x i64>2744 ret <1 x i64> %res2745}2746 2747define <2 x i64> @fcvtzs_v2f32_v2i64(<2 x float> %op1) {2748; CHECK-LABEL: fcvtzs_v2f32_v2i64:2749; CHECK: // %bb.0:2750; CHECK-NEXT: // kill: def $d0 killed $d0 def $z02751; CHECK-NEXT: ptrue p0.d, vl22752; CHECK-NEXT: uunpklo z0.d, z0.s2753; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.s2754; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z02755; CHECK-NEXT: ret2756;2757; NONEON-NOSVE-LABEL: fcvtzs_v2f32_v2i64:2758; NONEON-NOSVE: // %bb.0:2759; NONEON-NOSVE-NEXT: sub sp, sp, #322760; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 322761; NONEON-NOSVE-NEXT: str d0, [sp, #8]2762; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #8]2763; NONEON-NOSVE-NEXT: fcvtzs x9, s12764; NONEON-NOSVE-NEXT: fcvtzs x8, s02765; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #16]2766; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]2767; NONEON-NOSVE-NEXT: add sp, sp, #322768; NONEON-NOSVE-NEXT: ret2769 %res = fptosi <2 x float> %op1 to <2 x i64>2770 ret <2 x i64> %res2771}2772 2773define void @fcvtzs_v4f32_v4i64(ptr %a, ptr %b) {2774; CHECK-LABEL: fcvtzs_v4f32_v4i64:2775; CHECK: // %bb.0:2776; CHECK-NEXT: ldr q0, [x0]2777; CHECK-NEXT: ptrue p0.d, vl22778; CHECK-NEXT: movprfx z1, z02779; CHECK-NEXT: ext z1.b, z1.b, z0.b, #82780; CHECK-NEXT: uunpklo z0.d, z0.s2781; CHECK-NEXT: uunpklo z1.d, z1.s2782; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.s2783; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.s2784; CHECK-NEXT: stp q0, q1, [x1]2785; CHECK-NEXT: ret2786;2787; NONEON-NOSVE-LABEL: fcvtzs_v4f32_v4i64:2788; NONEON-NOSVE: // %bb.0:2789; NONEON-NOSVE-NEXT: ldr q0, [x0]2790; NONEON-NOSVE-NEXT: str q0, [sp, #-64]!2791; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 642792; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]2793; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #16]2794; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #24]2795; NONEON-NOSVE-NEXT: fcvtzs x9, s12796; NONEON-NOSVE-NEXT: fcvtzs x8, s02797; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #16]2798; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #48]2799; NONEON-NOSVE-NEXT: fcvtzs x9, s12800; NONEON-NOSVE-NEXT: fcvtzs x8, s02801; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #32]2802; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #32]2803; NONEON-NOSVE-NEXT: stp q1, q0, [x1]2804; NONEON-NOSVE-NEXT: add sp, sp, #642805; NONEON-NOSVE-NEXT: ret2806 %op1 = load <4 x float>, ptr %a2807 %res = fptosi <4 x float> %op1 to <4 x i64>2808 store <4 x i64> %res, ptr %b2809 ret void2810}2811 2812define void @fcvtzs_v8f32_v8i64(ptr %a, ptr %b) {2813; CHECK-LABEL: fcvtzs_v8f32_v8i64:2814; CHECK: // %bb.0:2815; CHECK-NEXT: ldp q1, q0, [x0]2816; CHECK-NEXT: ptrue p0.d, vl22817; CHECK-NEXT: movprfx z2, z02818; CHECK-NEXT: ext z2.b, z2.b, z0.b, #82819; CHECK-NEXT: movprfx z3, z12820; CHECK-NEXT: ext z3.b, z3.b, z1.b, #82821; CHECK-NEXT: uunpklo z0.d, z0.s2822; CHECK-NEXT: uunpklo z1.d, z1.s2823; CHECK-NEXT: uunpklo z2.d, z2.s2824; CHECK-NEXT: uunpklo z3.d, z3.s2825; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.s2826; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.s2827; CHECK-NEXT: fcvtzs z2.d, p0/m, z2.s2828; CHECK-NEXT: fcvtzs z3.d, p0/m, z3.s2829; CHECK-NEXT: stp q1, q3, [x1]2830; CHECK-NEXT: stp q0, q2, [x1, #32]2831; CHECK-NEXT: ret2832;2833; NONEON-NOSVE-LABEL: fcvtzs_v8f32_v8i64:2834; NONEON-NOSVE: // %bb.0:2835; NONEON-NOSVE-NEXT: ldp q0, q1, [x0]2836; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-128]!2837; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1282838; NONEON-NOSVE-NEXT: ldp d1, d0, [sp]2839; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #32]2840; NONEON-NOSVE-NEXT: ldp d1, d0, [sp, #16]2841; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #48]2842; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #40]2843; NONEON-NOSVE-NEXT: fcvtzs x9, s12844; NONEON-NOSVE-NEXT: fcvtzs x8, s02845; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #32]2846; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #80]2847; NONEON-NOSVE-NEXT: fcvtzs x9, s12848; NONEON-NOSVE-NEXT: fcvtzs x8, s02849; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #56]2850; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #64]2851; NONEON-NOSVE-NEXT: fcvtzs x9, s12852; NONEON-NOSVE-NEXT: fcvtzs x8, s02853; NONEON-NOSVE-NEXT: ldp s0, s1, [sp, #48]2854; NONEON-NOSVE-NEXT: ldp q3, q2, [sp, #64]2855; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #112]2856; NONEON-NOSVE-NEXT: fcvtzs x9, s12857; NONEON-NOSVE-NEXT: fcvtzs x8, s02858; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #96]2859; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #96]2860; NONEON-NOSVE-NEXT: stp q2, q3, [x1]2861; NONEON-NOSVE-NEXT: stp q1, q0, [x1, #32]2862; NONEON-NOSVE-NEXT: add sp, sp, #1282863; NONEON-NOSVE-NEXT: ret2864 %op1 = load <8 x float>, ptr %a2865 %res = fptosi <8 x float> %op1 to <8 x i64>2866 store <8 x i64> %res, ptr %b2867 ret void2868}2869 2870 2871;2872; FCVTZS D -> H2873;2874 2875; v1f64 is perfered to be widened to v4f64, so use SVE2876define <1 x i16> @fcvtzs_v1f64_v1i16(<1 x double> %op1) {2877; CHECK-LABEL: fcvtzs_v1f64_v1i16:2878; CHECK: // %bb.0:2879; CHECK-NEXT: fcvtzs w8, d02880; CHECK-NEXT: mov z0.h, w82881; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z02882; CHECK-NEXT: ret2883;2884; NONEON-NOSVE-LABEL: fcvtzs_v1f64_v1i16:2885; NONEON-NOSVE: // %bb.0:2886; NONEON-NOSVE-NEXT: sub sp, sp, #162887; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 162888; NONEON-NOSVE-NEXT: fcvtzs w8, d02889; NONEON-NOSVE-NEXT: strh w8, [sp, #8]2890; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]2891; NONEON-NOSVE-NEXT: add sp, sp, #162892; NONEON-NOSVE-NEXT: ret2893 %res = fptosi <1 x double> %op1 to <1 x i16>2894 ret <1 x i16> %res2895}2896 2897define <2 x i16> @fcvtzs_v2f64_v2i16(<2 x double> %op1) {2898; CHECK-LABEL: fcvtzs_v2f64_v2i16:2899; CHECK: // %bb.0:2900; CHECK-NEXT: ptrue p0.d, vl22901; CHECK-NEXT: // kill: def $q0 killed $q0 def $z02902; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d2903; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s2904; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z02905; CHECK-NEXT: ret2906;2907; NONEON-NOSVE-LABEL: fcvtzs_v2f64_v2i16:2908; NONEON-NOSVE: // %bb.0:2909; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!2910; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 322911; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]2912; NONEON-NOSVE-NEXT: fcvtzs w9, d12913; NONEON-NOSVE-NEXT: fcvtzs w8, d02914; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #24]2915; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]2916; NONEON-NOSVE-NEXT: add sp, sp, #322917; NONEON-NOSVE-NEXT: ret2918 %res = fptosi <2 x double> %op1 to <2 x i16>2919 ret <2 x i16> %res2920}2921 2922define <4 x i16> @fcvtzs_v4f64_v4i16(ptr %a) {2923; CHECK-LABEL: fcvtzs_v4f64_v4i16:2924; CHECK: // %bb.0:2925; CHECK-NEXT: ldp q0, q1, [x0]2926; CHECK-NEXT: ptrue p0.d, vl22927; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d2928; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d2929; CHECK-NEXT: uzp1 z1.s, z1.s, z1.s2930; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s2931; CHECK-NEXT: mov z2.s, z1.s[1]2932; CHECK-NEXT: mov z3.s, z0.s[1]2933; CHECK-NEXT: zip1 z1.h, z1.h, z2.h2934; CHECK-NEXT: zip1 z0.h, z0.h, z3.h2935; CHECK-NEXT: zip1 z0.s, z0.s, z1.s2936; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z02937; CHECK-NEXT: ret2938;2939; NONEON-NOSVE-LABEL: fcvtzs_v4f64_v4i16:2940; NONEON-NOSVE: // %bb.0:2941; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]2942; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-80]!2943; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 802944; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]2945; NONEON-NOSVE-NEXT: fcvtzs w9, d12946; NONEON-NOSVE-NEXT: fcvtzs w8, d02947; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]2948; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #48]2949; NONEON-NOSVE-NEXT: fcvtzs w9, d12950; NONEON-NOSVE-NEXT: fcvtzs w8, d02951; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #40]2952; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #40]2953; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #56]2954; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #64]2955; NONEON-NOSVE-NEXT: strh w9, [sp, #78]2956; NONEON-NOSVE-NEXT: strh w8, [sp, #76]2957; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #56]2958; NONEON-NOSVE-NEXT: strh w9, [sp, #74]2959; NONEON-NOSVE-NEXT: strh w8, [sp, #72]2960; NONEON-NOSVE-NEXT: ldr d0, [sp, #72]2961; NONEON-NOSVE-NEXT: add sp, sp, #802962; NONEON-NOSVE-NEXT: ret2963 %op1 = load <4 x double>, ptr %a2964 %res = fptosi <4 x double> %op1 to <4 x i16>2965 ret <4 x i16> %res2966}2967 2968define <8 x i16> @fcvtzs_v8f64_v8i16(ptr %a) {2969; CHECK-LABEL: fcvtzs_v8f64_v8i16:2970; CHECK: // %bb.0:2971; CHECK-NEXT: ldp q1, q0, [x0, #32]2972; CHECK-NEXT: ptrue p0.d, vl22973; CHECK-NEXT: ldp q2, q3, [x0]2974; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d2975; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d2976; CHECK-NEXT: fcvtzs z3.d, p0/m, z3.d2977; CHECK-NEXT: fcvtzs z2.d, p0/m, z2.d2978; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s2979; CHECK-NEXT: uzp1 z1.s, z1.s, z1.s2980; CHECK-NEXT: uzp1 z3.s, z3.s, z3.s2981; CHECK-NEXT: uzp1 z2.s, z2.s, z2.s2982; CHECK-NEXT: mov z4.s, z0.s[1]2983; CHECK-NEXT: mov z5.s, z1.s[1]2984; CHECK-NEXT: mov z6.s, z3.s[1]2985; CHECK-NEXT: mov z7.s, z2.s[1]2986; CHECK-NEXT: zip1 z0.h, z0.h, z4.h2987; CHECK-NEXT: zip1 z1.h, z1.h, z5.h2988; CHECK-NEXT: zip1 z3.h, z3.h, z6.h2989; CHECK-NEXT: zip1 z2.h, z2.h, z7.h2990; CHECK-NEXT: zip1 z0.s, z1.s, z0.s2991; CHECK-NEXT: zip1 z1.s, z2.s, z3.s2992; CHECK-NEXT: zip1 z0.d, z1.d, z0.d2993; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z02994; CHECK-NEXT: ret2995;2996; NONEON-NOSVE-LABEL: fcvtzs_v8f64_v8i16:2997; NONEON-NOSVE: // %bb.0:2998; NONEON-NOSVE-NEXT: sub sp, sp, #1442999; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1443000; NONEON-NOSVE-NEXT: ldp q1, q0, [x0, #32]3001; NONEON-NOSVE-NEXT: ldp q2, q3, [x0]3002; NONEON-NOSVE-NEXT: str q1, [sp, #48]3003; NONEON-NOSVE-NEXT: stp q0, q3, [sp, #16]3004; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]3005; NONEON-NOSVE-NEXT: str q2, [sp]3006; NONEON-NOSVE-NEXT: fcvtzs w9, d13007; NONEON-NOSVE-NEXT: fcvtzs w8, d03008; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #48]3009; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #72]3010; NONEON-NOSVE-NEXT: fcvtzs w9, d13011; NONEON-NOSVE-NEXT: fcvtzs w8, d03012; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #32]3013; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #88]3014; NONEON-NOSVE-NEXT: fcvtzs w9, d13015; NONEON-NOSVE-NEXT: fcvtzs w8, d03016; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]3017; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #80]3018; NONEON-NOSVE-NEXT: fcvtzs w9, d13019; NONEON-NOSVE-NEXT: fcvtzs w8, d03020; NONEON-NOSVE-NEXT: ldp d0, d2, [sp, #80]3021; NONEON-NOSVE-NEXT: ldr d1, [sp, #72]3022; NONEON-NOSVE-NEXT: stp d1, d0, [sp, #104]3023; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #64]3024; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #104]3025; NONEON-NOSVE-NEXT: str d2, [sp, #120]3026; NONEON-NOSVE-NEXT: ldr d0, [sp, #64]3027; NONEON-NOSVE-NEXT: strh w9, [sp, #142]3028; NONEON-NOSVE-NEXT: strh w8, [sp, #140]3029; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #120]3030; NONEON-NOSVE-NEXT: str d0, [sp, #96]3031; NONEON-NOSVE-NEXT: strh w9, [sp, #138]3032; NONEON-NOSVE-NEXT: strh w8, [sp, #136]3033; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #112]3034; NONEON-NOSVE-NEXT: strh w9, [sp, #134]3035; NONEON-NOSVE-NEXT: strh w8, [sp, #132]3036; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #96]3037; NONEON-NOSVE-NEXT: strh w9, [sp, #130]3038; NONEON-NOSVE-NEXT: strh w8, [sp, #128]3039; NONEON-NOSVE-NEXT: ldr q0, [sp, #128]3040; NONEON-NOSVE-NEXT: add sp, sp, #1443041; NONEON-NOSVE-NEXT: ret3042 %op1 = load <8 x double>, ptr %a3043 %res = fptosi <8 x double> %op1 to <8 x i16>3044 ret <8 x i16> %res3045}3046 3047define void @fcvtzs_v16f64_v16i16(ptr %a, ptr %b) {3048; CHECK-LABEL: fcvtzs_v16f64_v16i16:3049; CHECK: // %bb.0:3050; CHECK-NEXT: ldp q0, q1, [x0, #96]3051; CHECK-NEXT: ptrue p0.d, vl23052; CHECK-NEXT: ldp q2, q3, [x0, #32]3053; CHECK-NEXT: ldp q4, q5, [x0, #64]3054; CHECK-NEXT: ldp q6, q7, [x0]3055; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d3056; CHECK-NEXT: fcvtzs z3.d, p0/m, z3.d3057; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d3058; CHECK-NEXT: fcvtzs z2.d, p0/m, z2.d3059; CHECK-NEXT: fcvtzs z5.d, p0/m, z5.d3060; CHECK-NEXT: fcvtzs z4.d, p0/m, z4.d3061; CHECK-NEXT: fcvtzs z7.d, p0/m, z7.d3062; CHECK-NEXT: fcvtzs z6.d, p0/m, z6.d3063; CHECK-NEXT: uzp1 z1.s, z1.s, z1.s3064; CHECK-NEXT: uzp1 z3.s, z3.s, z3.s3065; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s3066; CHECK-NEXT: uzp1 z2.s, z2.s, z2.s3067; CHECK-NEXT: uzp1 z5.s, z5.s, z5.s3068; CHECK-NEXT: uzp1 z4.s, z4.s, z4.s3069; CHECK-NEXT: uzp1 z7.s, z7.s, z7.s3070; CHECK-NEXT: uzp1 z6.s, z6.s, z6.s3071; CHECK-NEXT: mov z17.s, z1.s[1]3072; CHECK-NEXT: mov z16.s, z3.s[1]3073; CHECK-NEXT: mov z18.s, z0.s[1]3074; CHECK-NEXT: mov z21.s, z2.s[1]3075; CHECK-NEXT: mov z19.s, z5.s[1]3076; CHECK-NEXT: mov z20.s, z4.s[1]3077; CHECK-NEXT: mov z22.s, z7.s[1]3078; CHECK-NEXT: mov z23.s, z6.s[1]3079; CHECK-NEXT: zip1 z1.h, z1.h, z17.h3080; CHECK-NEXT: zip1 z3.h, z3.h, z16.h3081; CHECK-NEXT: zip1 z0.h, z0.h, z18.h3082; CHECK-NEXT: zip1 z2.h, z2.h, z21.h3083; CHECK-NEXT: zip1 z5.h, z5.h, z19.h3084; CHECK-NEXT: zip1 z4.h, z4.h, z20.h3085; CHECK-NEXT: zip1 z7.h, z7.h, z22.h3086; CHECK-NEXT: zip1 z6.h, z6.h, z23.h3087; CHECK-NEXT: zip1 z0.s, z0.s, z1.s3088; CHECK-NEXT: zip1 z2.s, z2.s, z3.s3089; CHECK-NEXT: zip1 z1.s, z4.s, z5.s3090; CHECK-NEXT: zip1 z3.s, z6.s, z7.s3091; CHECK-NEXT: zip1 z0.d, z1.d, z0.d3092; CHECK-NEXT: zip1 z1.d, z3.d, z2.d3093; CHECK-NEXT: stp q1, q0, [x1]3094; CHECK-NEXT: ret3095;3096; NONEON-NOSVE-LABEL: fcvtzs_v16f64_v16i16:3097; NONEON-NOSVE: // %bb.0:3098; NONEON-NOSVE-NEXT: sub sp, sp, #3043099; NONEON-NOSVE-NEXT: str x29, [sp, #288] // 8-byte Spill3100; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 3043101; NONEON-NOSVE-NEXT: .cfi_offset w29, -163102; NONEON-NOSVE-NEXT: ldp q0, q1, [x0, #32]3103; NONEON-NOSVE-NEXT: ldr x29, [sp, #288] // 8-byte Reload3104; NONEON-NOSVE-NEXT: ldp q6, q7, [x0]3105; NONEON-NOSVE-NEXT: ldp q2, q3, [x0, #64]3106; NONEON-NOSVE-NEXT: ldp q4, q5, [x0, #96]3107; NONEON-NOSVE-NEXT: stp q1, q7, [sp, #64]3108; NONEON-NOSVE-NEXT: stp q0, q2, [sp, #96]3109; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #64]3110; NONEON-NOSVE-NEXT: stp q6, q4, [sp]3111; NONEON-NOSVE-NEXT: stp q5, q3, [sp, #32]3112; NONEON-NOSVE-NEXT: fcvtzs w9, d13113; NONEON-NOSVE-NEXT: fcvtzs w8, d03114; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #96]3115; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #168]3116; NONEON-NOSVE-NEXT: fcvtzs w9, d13117; NONEON-NOSVE-NEXT: fcvtzs w8, d03118; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #80]3119; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #184]3120; NONEON-NOSVE-NEXT: fcvtzs w9, d13121; NONEON-NOSVE-NEXT: fcvtzs w8, d03122; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]3123; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #176]3124; NONEON-NOSVE-NEXT: fcvtzs w9, d13125; NONEON-NOSVE-NEXT: fcvtzs w8, d03126; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #32]3127; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #136]3128; NONEON-NOSVE-NEXT: fcvtzs w9, d13129; NONEON-NOSVE-NEXT: fcvtzs w8, d03130; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]3131; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #152]3132; NONEON-NOSVE-NEXT: fcvtzs w9, d13133; NONEON-NOSVE-NEXT: fcvtzs w8, d03134; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #48]3135; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #144]3136; NONEON-NOSVE-NEXT: fcvtzs w9, d13137; NONEON-NOSVE-NEXT: fcvtzs w8, d03138; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #112]3139; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #160]3140; NONEON-NOSVE-NEXT: fcvtzs w9, d13141; NONEON-NOSVE-NEXT: fcvtzs w8, d03142; NONEON-NOSVE-NEXT: ldp d0, d2, [sp, #176]3143; NONEON-NOSVE-NEXT: ldr d1, [sp, #168]3144; NONEON-NOSVE-NEXT: stp d1, d0, [sp, #232]3145; NONEON-NOSVE-NEXT: ldr d1, [sp, #136]3146; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #192]3147; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #232]3148; NONEON-NOSVE-NEXT: str d2, [sp, #248]3149; NONEON-NOSVE-NEXT: ldp d0, d2, [sp, #144]3150; NONEON-NOSVE-NEXT: strh w9, [sp, #270]3151; NONEON-NOSVE-NEXT: strh w8, [sp, #268]3152; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #248]3153; NONEON-NOSVE-NEXT: stp d1, d0, [sp, #200]3154; NONEON-NOSVE-NEXT: ldr d0, [sp, #160]3155; NONEON-NOSVE-NEXT: strh w9, [sp, #266]3156; NONEON-NOSVE-NEXT: strh w8, [sp, #264]3157; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #240]3158; NONEON-NOSVE-NEXT: stp d2, d0, [sp, #216]3159; NONEON-NOSVE-NEXT: ldr d0, [sp, #192]3160; NONEON-NOSVE-NEXT: strh w9, [sp, #262]3161; NONEON-NOSVE-NEXT: strh w8, [sp, #260]3162; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #200]3163; NONEON-NOSVE-NEXT: str d0, [sp, #296]3164; NONEON-NOSVE-NEXT: strh w9, [sp, #258]3165; NONEON-NOSVE-NEXT: strh w8, [sp, #256]3166; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #216]3167; NONEON-NOSVE-NEXT: strh w9, [sp, #286]3168; NONEON-NOSVE-NEXT: strh w8, [sp, #284]3169; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #208]3170; NONEON-NOSVE-NEXT: strh w9, [sp, #282]3171; NONEON-NOSVE-NEXT: strh w8, [sp, #280]3172; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #224]3173; NONEON-NOSVE-NEXT: strh w8, [sp, #276]3174; NONEON-NOSVE-NEXT: ldr w8, [sp, #300]3175; NONEON-NOSVE-NEXT: strh w9, [sp, #278]3176; NONEON-NOSVE-NEXT: strh w8, [sp, #274]3177; NONEON-NOSVE-NEXT: ldr w8, [sp, #296]3178; NONEON-NOSVE-NEXT: strh w8, [sp, #272]3179; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #256]3180; NONEON-NOSVE-NEXT: stp q1, q0, [x1]3181; NONEON-NOSVE-NEXT: add sp, sp, #3043182; NONEON-NOSVE-NEXT: ret3183 %op1 = load <16 x double>, ptr %a3184 %res = fptosi <16 x double> %op1 to <16 x i16>3185 store <16 x i16> %res, ptr %b3186 ret void3187}3188 3189;3190; FCVTZS D -> S3191;3192 3193define <1 x i32> @fcvtzs_v1f64_v1i32(<1 x double> %op1) {3194; CHECK-LABEL: fcvtzs_v1f64_v1i32:3195; CHECK: // %bb.0:3196; CHECK-NEXT: ptrue p0.d, vl23197; CHECK-NEXT: // kill: def $d0 killed $d0 def $z03198; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d3199; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s3200; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z03201; CHECK-NEXT: ret3202;3203; NONEON-NOSVE-LABEL: fcvtzs_v1f64_v1i32:3204; NONEON-NOSVE: // %bb.0:3205; NONEON-NOSVE-NEXT: sub sp, sp, #163206; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 163207; NONEON-NOSVE-NEXT: fcvtzs w8, d03208; NONEON-NOSVE-NEXT: str w8, [sp, #8]3209; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]3210; NONEON-NOSVE-NEXT: add sp, sp, #163211; NONEON-NOSVE-NEXT: ret3212 %res = fptosi <1 x double> %op1 to <1 x i32>3213 ret <1 x i32> %res3214}3215 3216define <2 x i32> @fcvtzs_v2f64_v2i32(<2 x double> %op1) {3217; CHECK-LABEL: fcvtzs_v2f64_v2i32:3218; CHECK: // %bb.0:3219; CHECK-NEXT: ptrue p0.d, vl23220; CHECK-NEXT: // kill: def $q0 killed $q0 def $z03221; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d3222; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s3223; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z03224; CHECK-NEXT: ret3225;3226; NONEON-NOSVE-LABEL: fcvtzs_v2f64_v2i32:3227; NONEON-NOSVE: // %bb.0:3228; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!3229; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 323230; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]3231; NONEON-NOSVE-NEXT: fcvtzs w9, d13232; NONEON-NOSVE-NEXT: fcvtzs w8, d03233; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #24]3234; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]3235; NONEON-NOSVE-NEXT: add sp, sp, #323236; NONEON-NOSVE-NEXT: ret3237 %res = fptosi <2 x double> %op1 to <2 x i32>3238 ret <2 x i32> %res3239}3240 3241define <4 x i32> @fcvtzs_v4f64_v4i32(ptr %a) {3242; CHECK-LABEL: fcvtzs_v4f64_v4i32:3243; CHECK: // %bb.0:3244; CHECK-NEXT: ldp q0, q1, [x0]3245; CHECK-NEXT: ptrue p0.d, vl23246; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d3247; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d3248; CHECK-NEXT: ptrue p0.s, vl23249; CHECK-NEXT: uzp1 z1.s, z1.s, z1.s3250; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s3251; CHECK-NEXT: splice z0.s, p0, z0.s, z1.s3252; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z03253; CHECK-NEXT: ret3254;3255; NONEON-NOSVE-LABEL: fcvtzs_v4f64_v4i32:3256; NONEON-NOSVE: // %bb.0:3257; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]3258; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-48]!3259; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 483260; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]3261; NONEON-NOSVE-NEXT: fcvtzs w9, d13262; NONEON-NOSVE-NEXT: fcvtzs w8, d03263; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]3264; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #40]3265; NONEON-NOSVE-NEXT: fcvtzs w9, d13266; NONEON-NOSVE-NEXT: fcvtzs w8, d03267; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #32]3268; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]3269; NONEON-NOSVE-NEXT: add sp, sp, #483270; NONEON-NOSVE-NEXT: ret3271 %op1 = load <4 x double>, ptr %a3272 %res = fptosi <4 x double> %op1 to <4 x i32>3273 ret <4 x i32> %res3274}3275 3276define void @fcvtzs_v8f64_v8i32(ptr %a, ptr %b) {3277; CHECK-LABEL: fcvtzs_v8f64_v8i32:3278; CHECK: // %bb.0:3279; CHECK-NEXT: ldp q0, q1, [x0, #32]3280; CHECK-NEXT: ptrue p0.d, vl23281; CHECK-NEXT: ldp q2, q3, [x0]3282; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d3283; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d3284; CHECK-NEXT: fcvtzs z3.d, p0/m, z3.d3285; CHECK-NEXT: fcvtzs z2.d, p0/m, z2.d3286; CHECK-NEXT: ptrue p0.s, vl23287; CHECK-NEXT: uzp1 z1.s, z1.s, z1.s3288; CHECK-NEXT: uzp1 z0.s, z0.s, z0.s3289; CHECK-NEXT: uzp1 z3.s, z3.s, z3.s3290; CHECK-NEXT: uzp1 z2.s, z2.s, z2.s3291; CHECK-NEXT: splice z0.s, p0, z0.s, z1.s3292; CHECK-NEXT: splice z2.s, p0, z2.s, z3.s3293; CHECK-NEXT: stp q2, q0, [x1]3294; CHECK-NEXT: ret3295;3296; NONEON-NOSVE-LABEL: fcvtzs_v8f64_v8i32:3297; NONEON-NOSVE: // %bb.0:3298; NONEON-NOSVE-NEXT: sub sp, sp, #963299; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 963300; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]3301; NONEON-NOSVE-NEXT: ldp q2, q3, [x0, #32]3302; NONEON-NOSVE-NEXT: str q1, [sp]3303; NONEON-NOSVE-NEXT: stp q3, q0, [sp, #16]3304; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #32]3305; NONEON-NOSVE-NEXT: str q2, [sp, #48]3306; NONEON-NOSVE-NEXT: fcvtzs w9, d13307; NONEON-NOSVE-NEXT: fcvtzs w8, d03308; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]3309; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #72]3310; NONEON-NOSVE-NEXT: fcvtzs w9, d13311; NONEON-NOSVE-NEXT: fcvtzs w8, d03312; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]3313; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #64]3314; NONEON-NOSVE-NEXT: fcvtzs w9, d13315; NONEON-NOSVE-NEXT: fcvtzs w8, d03316; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #48]3317; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #88]3318; NONEON-NOSVE-NEXT: fcvtzs w9, d13319; NONEON-NOSVE-NEXT: fcvtzs w8, d03320; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #80]3321; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #64]3322; NONEON-NOSVE-NEXT: stp q1, q0, [x1]3323; NONEON-NOSVE-NEXT: add sp, sp, #963324; NONEON-NOSVE-NEXT: ret3325 %op1 = load <8 x double>, ptr %a3326 %res = fptosi <8 x double> %op1 to <8 x i32>3327 store <8 x i32> %res, ptr %b3328 ret void3329}3330 3331;3332; FCVTZS D -> D3333;3334 3335define <1 x i64> @fcvtzs_v1f64_v1i64(<1 x double> %op1) {3336; CHECK-LABEL: fcvtzs_v1f64_v1i64:3337; CHECK: // %bb.0:3338; CHECK-NEXT: ptrue p0.d, vl13339; CHECK-NEXT: // kill: def $d0 killed $d0 def $z03340; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d3341; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z03342; CHECK-NEXT: ret3343;3344; NONEON-NOSVE-LABEL: fcvtzs_v1f64_v1i64:3345; NONEON-NOSVE: // %bb.0:3346; NONEON-NOSVE-NEXT: sub sp, sp, #163347; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 163348; NONEON-NOSVE-NEXT: fcvtzs x8, d03349; NONEON-NOSVE-NEXT: str x8, [sp, #8]3350; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]3351; NONEON-NOSVE-NEXT: add sp, sp, #163352; NONEON-NOSVE-NEXT: ret3353 %res = fptosi <1 x double> %op1 to <1 x i64>3354 ret <1 x i64> %res3355}3356 3357define <2 x i64> @fcvtzs_v2f64_v2i64(<2 x double> %op1) {3358; CHECK-LABEL: fcvtzs_v2f64_v2i64:3359; CHECK: // %bb.0:3360; CHECK-NEXT: ptrue p0.d, vl23361; CHECK-NEXT: // kill: def $q0 killed $q0 def $z03362; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d3363; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z03364; CHECK-NEXT: ret3365;3366; NONEON-NOSVE-LABEL: fcvtzs_v2f64_v2i64:3367; NONEON-NOSVE: // %bb.0:3368; NONEON-NOSVE-NEXT: str q0, [sp, #-32]!3369; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 323370; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]3371; NONEON-NOSVE-NEXT: fcvtzs x9, d13372; NONEON-NOSVE-NEXT: fcvtzs x8, d03373; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #16]3374; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]3375; NONEON-NOSVE-NEXT: add sp, sp, #323376; NONEON-NOSVE-NEXT: ret3377 %res = fptosi <2 x double> %op1 to <2 x i64>3378 ret <2 x i64> %res3379}3380 3381define void @fcvtzs_v4f64_v4i64(ptr %a, ptr %b) {3382; CHECK-LABEL: fcvtzs_v4f64_v4i64:3383; CHECK: // %bb.0:3384; CHECK-NEXT: ldp q0, q1, [x0]3385; CHECK-NEXT: ptrue p0.d, vl23386; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d3387; CHECK-NEXT: fcvtzs z1.d, p0/m, z1.d3388; CHECK-NEXT: stp q0, q1, [x1]3389; CHECK-NEXT: ret3390;3391; NONEON-NOSVE-LABEL: fcvtzs_v4f64_v4i64:3392; NONEON-NOSVE: // %bb.0:3393; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]3394; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-64]!3395; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 643396; NONEON-NOSVE-NEXT: ldp d0, d1, [sp, #16]3397; NONEON-NOSVE-NEXT: fcvtzs x9, d13398; NONEON-NOSVE-NEXT: fcvtzs x8, d03399; NONEON-NOSVE-NEXT: ldp d0, d1, [sp]3400; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #48]3401; NONEON-NOSVE-NEXT: fcvtzs x9, d13402; NONEON-NOSVE-NEXT: fcvtzs x8, d03403; NONEON-NOSVE-NEXT: stp x8, x9, [sp, #32]3404; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #32]3405; NONEON-NOSVE-NEXT: stp q0, q1, [x1]3406; NONEON-NOSVE-NEXT: add sp, sp, #643407; NONEON-NOSVE-NEXT: ret3408 %op1 = load <4 x double>, ptr %a3409 %res = fptosi <4 x double> %op1 to <4 x i64>3410 store <4 x i64> %res, ptr %b3411 ret void3412}3413