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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mattr=+sve -force-streaming-compatible < %s | FileCheck %s3; RUN: llc -mattr=+sme -force-streaming < %s | FileCheck %s4; RUN: llc -force-streaming-compatible < %s | FileCheck %s --check-prefix=NONEON-NOSVE5 6target triple = "aarch64-unknown-linux-gnu"7 8;9; UADDV10;11 12define i8 @uaddv_v8i8(<8 x i8> %a) {13; CHECK-LABEL: uaddv_v8i8:14; CHECK: // %bb.0:15; CHECK-NEXT: ptrue p0.b, vl816; CHECK-NEXT: // kill: def $d0 killed $d0 def $z017; CHECK-NEXT: uaddv d0, p0, z0.b18; CHECK-NEXT: fmov w0, s019; CHECK-NEXT: ret20;21; NONEON-NOSVE-LABEL: uaddv_v8i8:22; NONEON-NOSVE: // %bb.0:23; NONEON-NOSVE-NEXT: sub sp, sp, #1624; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1625; NONEON-NOSVE-NEXT: str d0, [sp, #8]26; NONEON-NOSVE-NEXT: ldrb w8, [sp, #13]27; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12]28; NONEON-NOSVE-NEXT: ldrb w10, [sp, #11]29; NONEON-NOSVE-NEXT: ldrb w11, [sp, #10]30; NONEON-NOSVE-NEXT: ldrb w12, [sp, #9]31; NONEON-NOSVE-NEXT: ldrb w13, [sp, #8]32; NONEON-NOSVE-NEXT: ldrb w14, [sp, #14]33; NONEON-NOSVE-NEXT: add w8, w9, w834; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]35; NONEON-NOSVE-NEXT: add w12, w13, w1236; NONEON-NOSVE-NEXT: add w10, w11, w1037; NONEON-NOSVE-NEXT: add w10, w12, w1038; NONEON-NOSVE-NEXT: add w8, w8, w1439; NONEON-NOSVE-NEXT: add w8, w10, w840; NONEON-NOSVE-NEXT: add w0, w8, w941; NONEON-NOSVE-NEXT: add sp, sp, #1642; NONEON-NOSVE-NEXT: ret43 %res = call i8 @llvm.vector.reduce.add.v8i8(<8 x i8> %a)44 ret i8 %res45}46 47define i8 @uaddv_v16i8(<16 x i8> %a) {48; CHECK-LABEL: uaddv_v16i8:49; CHECK: // %bb.0:50; CHECK-NEXT: ptrue p0.b, vl1651; CHECK-NEXT: // kill: def $q0 killed $q0 def $z052; CHECK-NEXT: uaddv d0, p0, z0.b53; CHECK-NEXT: fmov w0, s054; CHECK-NEXT: ret55;56; NONEON-NOSVE-LABEL: uaddv_v16i8:57; NONEON-NOSVE: // %bb.0:58; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!59; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1660; NONEON-NOSVE-NEXT: ldrb w9, [sp, #5]61; NONEON-NOSVE-NEXT: ldrb w10, [sp, #1]62; NONEON-NOSVE-NEXT: ldrb w11, [sp]63; NONEON-NOSVE-NEXT: ldrb w12, [sp, #4]64; NONEON-NOSVE-NEXT: ldrb w13, [sp, #3]65; NONEON-NOSVE-NEXT: ldrb w14, [sp, #2]66; NONEON-NOSVE-NEXT: add w10, w11, w1067; NONEON-NOSVE-NEXT: ldrb w8, [sp, #12]68; NONEON-NOSVE-NEXT: ldrb w15, [sp, #8]69; NONEON-NOSVE-NEXT: add w11, w14, w1370; NONEON-NOSVE-NEXT: add w9, w12, w971; NONEON-NOSVE-NEXT: ldrb w16, [sp, #6]72; NONEON-NOSVE-NEXT: ldrb w12, [sp, #7]73; NONEON-NOSVE-NEXT: add w10, w10, w1174; NONEON-NOSVE-NEXT: ldrb w13, [sp, #11]75; NONEON-NOSVE-NEXT: ldrb w11, [sp, #13]76; NONEON-NOSVE-NEXT: add w9, w9, w1677; NONEON-NOSVE-NEXT: ldrb w14, [sp, #9]78; NONEON-NOSVE-NEXT: add w12, w12, w1579; NONEON-NOSVE-NEXT: ldrb w15, [sp, #14]80; NONEON-NOSVE-NEXT: add w8, w13, w881; NONEON-NOSVE-NEXT: ldrb w16, [sp, #10]82; NONEON-NOSVE-NEXT: ldrb w13, [sp, #15]83; NONEON-NOSVE-NEXT: add w12, w12, w1484; NONEON-NOSVE-NEXT: add w8, w8, w1185; NONEON-NOSVE-NEXT: add w9, w10, w986; NONEON-NOSVE-NEXT: add w10, w12, w1687; NONEON-NOSVE-NEXT: add w8, w8, w1588; NONEON-NOSVE-NEXT: add w9, w9, w1089; NONEON-NOSVE-NEXT: add w8, w8, w1390; NONEON-NOSVE-NEXT: add w0, w9, w891; NONEON-NOSVE-NEXT: add sp, sp, #1692; NONEON-NOSVE-NEXT: ret93 %res = call i8 @llvm.vector.reduce.add.v16i8(<16 x i8> %a)94 ret i8 %res95}96 97define i8 @uaddv_v32i8(ptr %a) {98; CHECK-LABEL: uaddv_v32i8:99; CHECK: // %bb.0:100; CHECK-NEXT: ldp q1, q0, [x0]101; CHECK-NEXT: ptrue p0.b, vl16102; CHECK-NEXT: add z0.b, z1.b, z0.b103; CHECK-NEXT: uaddv d0, p0, z0.b104; CHECK-NEXT: fmov w0, s0105; CHECK-NEXT: ret106;107; NONEON-NOSVE-LABEL: uaddv_v32i8:108; NONEON-NOSVE: // %bb.0:109; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]110; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!111; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32112; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]113; NONEON-NOSVE-NEXT: ldrb w9, [sp, #1]114; NONEON-NOSVE-NEXT: ldrb w10, [sp, #16]115; NONEON-NOSVE-NEXT: ldrb w11, [sp]116; NONEON-NOSVE-NEXT: ldrb w12, [sp, #18]117; NONEON-NOSVE-NEXT: ldrb w13, [sp, #2]118; NONEON-NOSVE-NEXT: add w8, w9, w8119; NONEON-NOSVE-NEXT: ldrb w14, [sp, #19]120; NONEON-NOSVE-NEXT: ldrb w15, [sp, #3]121; NONEON-NOSVE-NEXT: add w9, w11, w10122; NONEON-NOSVE-NEXT: add w10, w13, w12123; NONEON-NOSVE-NEXT: ldrb w12, [sp, #21]124; NONEON-NOSVE-NEXT: ldrb w13, [sp, #5]125; NONEON-NOSVE-NEXT: add w11, w15, w14126; NONEON-NOSVE-NEXT: add w8, w9, w8127; NONEON-NOSVE-NEXT: ldrb w16, [sp, #20]128; NONEON-NOSVE-NEXT: ldrb w17, [sp, #4]129; NONEON-NOSVE-NEXT: add w9, w10, w11130; NONEON-NOSVE-NEXT: add w10, w13, w12131; NONEON-NOSVE-NEXT: ldrb w11, [sp, #22]132; NONEON-NOSVE-NEXT: ldrb w12, [sp, #6]133; NONEON-NOSVE-NEXT: add w14, w17, w16134; NONEON-NOSVE-NEXT: ldrb w13, [sp, #23]135; NONEON-NOSVE-NEXT: ldrb w15, [sp, #8]136; NONEON-NOSVE-NEXT: add w10, w14, w10137; NONEON-NOSVE-NEXT: ldrb w14, [sp, #7]138; NONEON-NOSVE-NEXT: add w11, w12, w11139; NONEON-NOSVE-NEXT: ldrb w12, [sp, #24]140; NONEON-NOSVE-NEXT: add w8, w8, w9141; NONEON-NOSVE-NEXT: add w9, w10, w11142; NONEON-NOSVE-NEXT: add w10, w14, w13143; NONEON-NOSVE-NEXT: ldrb w13, [sp, #9]144; NONEON-NOSVE-NEXT: add w8, w8, w9145; NONEON-NOSVE-NEXT: add w11, w15, w12146; NONEON-NOSVE-NEXT: ldrb w12, [sp, #25]147; NONEON-NOSVE-NEXT: ldrb w14, [sp, #26]148; NONEON-NOSVE-NEXT: add w9, w10, w11149; NONEON-NOSVE-NEXT: ldrb w11, [sp, #27]150; NONEON-NOSVE-NEXT: ldrb w15, [sp, #10]151; NONEON-NOSVE-NEXT: add w10, w13, w12152; NONEON-NOSVE-NEXT: ldrb w12, [sp, #11]153; NONEON-NOSVE-NEXT: ldrb w13, [sp, #12]154; NONEON-NOSVE-NEXT: add w9, w9, w10155; NONEON-NOSVE-NEXT: ldrb w10, [sp, #28]156; NONEON-NOSVE-NEXT: ldrb w16, [sp, #14]157; NONEON-NOSVE-NEXT: add w11, w12, w11158; NONEON-NOSVE-NEXT: ldrb w12, [sp, #29]159; NONEON-NOSVE-NEXT: ldrb w17, [sp, #15]160; NONEON-NOSVE-NEXT: add w10, w13, w10161; NONEON-NOSVE-NEXT: ldrb w13, [sp, #13]162; NONEON-NOSVE-NEXT: add w14, w15, w14163; NONEON-NOSVE-NEXT: add w10, w11, w10164; NONEON-NOSVE-NEXT: ldrb w11, [sp, #30]165; NONEON-NOSVE-NEXT: add w9, w9, w14166; NONEON-NOSVE-NEXT: add w12, w13, w12167; NONEON-NOSVE-NEXT: ldrb w13, [sp, #31]168; NONEON-NOSVE-NEXT: add w8, w8, w9169; NONEON-NOSVE-NEXT: add w10, w10, w12170; NONEON-NOSVE-NEXT: add w11, w16, w11171; NONEON-NOSVE-NEXT: add w10, w10, w11172; NONEON-NOSVE-NEXT: add w11, w17, w13173; NONEON-NOSVE-NEXT: add w9, w10, w11174; NONEON-NOSVE-NEXT: add w0, w8, w9175; NONEON-NOSVE-NEXT: add sp, sp, #32176; NONEON-NOSVE-NEXT: ret177 %op = load <32 x i8>, ptr %a178 %res = call i8 @llvm.vector.reduce.add.v32i8(<32 x i8> %op)179 ret i8 %res180}181 182define i16 @uaddv_v4i16(<4 x i16> %a) {183; CHECK-LABEL: uaddv_v4i16:184; CHECK: // %bb.0:185; CHECK-NEXT: ptrue p0.h, vl4186; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0187; CHECK-NEXT: uaddv d0, p0, z0.h188; CHECK-NEXT: fmov w0, s0189; CHECK-NEXT: ret190;191; NONEON-NOSVE-LABEL: uaddv_v4i16:192; NONEON-NOSVE: // %bb.0:193; NONEON-NOSVE-NEXT: sub sp, sp, #16194; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16195; NONEON-NOSVE-NEXT: str d0, [sp, #8]196; NONEON-NOSVE-NEXT: ldrh w8, [sp, #14]197; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]198; NONEON-NOSVE-NEXT: ldrh w10, [sp, #10]199; NONEON-NOSVE-NEXT: ldrh w11, [sp, #8]200; NONEON-NOSVE-NEXT: add w8, w9, w8201; NONEON-NOSVE-NEXT: add w10, w11, w10202; NONEON-NOSVE-NEXT: add w0, w10, w8203; NONEON-NOSVE-NEXT: add sp, sp, #16204; NONEON-NOSVE-NEXT: ret205 %res = call i16 @llvm.vector.reduce.add.v4i16(<4 x i16> %a)206 ret i16 %res207}208 209define i16 @uaddv_v8i16(<8 x i16> %a) {210; CHECK-LABEL: uaddv_v8i16:211; CHECK: // %bb.0:212; CHECK-NEXT: ptrue p0.h, vl8213; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0214; CHECK-NEXT: uaddv d0, p0, z0.h215; CHECK-NEXT: fmov w0, s0216; CHECK-NEXT: ret217;218; NONEON-NOSVE-LABEL: uaddv_v8i16:219; NONEON-NOSVE: // %bb.0:220; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!221; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16222; NONEON-NOSVE-NEXT: ldrh w8, [sp, #10]223; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]224; NONEON-NOSVE-NEXT: ldrh w10, [sp, #6]225; NONEON-NOSVE-NEXT: ldrh w11, [sp, #4]226; NONEON-NOSVE-NEXT: ldrh w12, [sp, #2]227; NONEON-NOSVE-NEXT: ldrh w13, [sp]228; NONEON-NOSVE-NEXT: add w8, w9, w8229; NONEON-NOSVE-NEXT: ldrh w14, [sp, #12]230; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]231; NONEON-NOSVE-NEXT: add w12, w13, w12232; NONEON-NOSVE-NEXT: add w10, w11, w10233; NONEON-NOSVE-NEXT: add w10, w12, w10234; NONEON-NOSVE-NEXT: add w8, w8, w14235; NONEON-NOSVE-NEXT: add w8, w10, w8236; NONEON-NOSVE-NEXT: add w0, w8, w9237; NONEON-NOSVE-NEXT: add sp, sp, #16238; NONEON-NOSVE-NEXT: ret239 %res = call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> %a)240 ret i16 %res241}242 243define i16 @uaddv_v16i16(ptr %a) {244; CHECK-LABEL: uaddv_v16i16:245; CHECK: // %bb.0:246; CHECK-NEXT: ldp q1, q0, [x0]247; CHECK-NEXT: ptrue p0.h, vl8248; CHECK-NEXT: add z0.h, z1.h, z0.h249; CHECK-NEXT: uaddv d0, p0, z0.h250; CHECK-NEXT: fmov w0, s0251; CHECK-NEXT: ret252;253; NONEON-NOSVE-LABEL: uaddv_v16i16:254; NONEON-NOSVE: // %bb.0:255; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]256; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!257; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32258; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]259; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2]260; NONEON-NOSVE-NEXT: ldrh w10, [sp, #16]261; NONEON-NOSVE-NEXT: ldrh w11, [sp]262; NONEON-NOSVE-NEXT: ldrh w12, [sp, #20]263; NONEON-NOSVE-NEXT: ldrh w13, [sp, #4]264; NONEON-NOSVE-NEXT: add w8, w9, w8265; NONEON-NOSVE-NEXT: ldrh w14, [sp, #22]266; NONEON-NOSVE-NEXT: ldrh w15, [sp, #6]267; NONEON-NOSVE-NEXT: add w9, w11, w10268; NONEON-NOSVE-NEXT: add w12, w13, w12269; NONEON-NOSVE-NEXT: ldrh w10, [sp, #26]270; NONEON-NOSVE-NEXT: ldrh w11, [sp, #10]271; NONEON-NOSVE-NEXT: add w13, w15, w14272; NONEON-NOSVE-NEXT: add w8, w9, w8273; NONEON-NOSVE-NEXT: ldrh w16, [sp, #24]274; NONEON-NOSVE-NEXT: ldrh w17, [sp, #8]275; NONEON-NOSVE-NEXT: add w9, w12, w13276; NONEON-NOSVE-NEXT: add w10, w11, w10277; NONEON-NOSVE-NEXT: ldrh w11, [sp, #28]278; NONEON-NOSVE-NEXT: ldrh w15, [sp, #12]279; NONEON-NOSVE-NEXT: add w14, w17, w16280; NONEON-NOSVE-NEXT: ldrh w12, [sp, #30]281; NONEON-NOSVE-NEXT: ldrh w13, [sp, #14]282; NONEON-NOSVE-NEXT: add w10, w14, w10283; NONEON-NOSVE-NEXT: add w11, w15, w11284; NONEON-NOSVE-NEXT: add w8, w8, w9285; NONEON-NOSVE-NEXT: add w9, w10, w11286; NONEON-NOSVE-NEXT: add w8, w8, w9287; NONEON-NOSVE-NEXT: add w9, w13, w12288; NONEON-NOSVE-NEXT: add w0, w8, w9289; NONEON-NOSVE-NEXT: add sp, sp, #32290; NONEON-NOSVE-NEXT: ret291 %op = load <16 x i16>, ptr %a292 %res = call i16 @llvm.vector.reduce.add.v16i16(<16 x i16> %op)293 ret i16 %res294}295 296define i32 @uaddv_v2i32(<2 x i32> %a) {297; CHECK-LABEL: uaddv_v2i32:298; CHECK: // %bb.0:299; CHECK-NEXT: ptrue p0.s, vl2300; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0301; CHECK-NEXT: uaddv d0, p0, z0.s302; CHECK-NEXT: fmov w0, s0303; CHECK-NEXT: ret304;305; NONEON-NOSVE-LABEL: uaddv_v2i32:306; NONEON-NOSVE: // %bb.0:307; NONEON-NOSVE-NEXT: sub sp, sp, #16308; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16309; NONEON-NOSVE-NEXT: str d0, [sp, #8]310; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]311; NONEON-NOSVE-NEXT: add w0, w9, w8312; NONEON-NOSVE-NEXT: add sp, sp, #16313; NONEON-NOSVE-NEXT: ret314 %res = call i32 @llvm.vector.reduce.add.v2i32(<2 x i32> %a)315 ret i32 %res316}317 318define i32 @uaddv_v4i32(<4 x i32> %a) {319; CHECK-LABEL: uaddv_v4i32:320; CHECK: // %bb.0:321; CHECK-NEXT: ptrue p0.s, vl4322; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0323; CHECK-NEXT: uaddv d0, p0, z0.s324; CHECK-NEXT: fmov w0, s0325; CHECK-NEXT: ret326;327; NONEON-NOSVE-LABEL: uaddv_v4i32:328; NONEON-NOSVE: // %bb.0:329; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!330; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16331; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]332; NONEON-NOSVE-NEXT: ldp w11, w10, [sp], #16333; NONEON-NOSVE-NEXT: add w10, w11, w10334; NONEON-NOSVE-NEXT: add w8, w9, w8335; NONEON-NOSVE-NEXT: add w0, w10, w8336; NONEON-NOSVE-NEXT: ret337 %res = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %a)338 ret i32 %res339}340 341define i32 @uaddv_v8i32(ptr %a) {342; CHECK-LABEL: uaddv_v8i32:343; CHECK: // %bb.0:344; CHECK-NEXT: ldp q1, q0, [x0]345; CHECK-NEXT: ptrue p0.s, vl4346; CHECK-NEXT: add z0.s, z1.s, z0.s347; CHECK-NEXT: uaddv d0, p0, z0.s348; CHECK-NEXT: fmov w0, s0349; CHECK-NEXT: ret350;351; NONEON-NOSVE-LABEL: uaddv_v8i32:352; NONEON-NOSVE: // %bb.0:353; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]354; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!355; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32356; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #16]357; NONEON-NOSVE-NEXT: ldp w11, w10, [sp]358; NONEON-NOSVE-NEXT: ldp w12, w13, [sp, #24]359; NONEON-NOSVE-NEXT: ldp w14, w15, [sp, #8]360; NONEON-NOSVE-NEXT: add w8, w10, w8361; NONEON-NOSVE-NEXT: add w9, w11, w9362; NONEON-NOSVE-NEXT: add w8, w9, w8363; NONEON-NOSVE-NEXT: add w10, w14, w12364; NONEON-NOSVE-NEXT: add w11, w15, w13365; NONEON-NOSVE-NEXT: add w9, w10, w11366; NONEON-NOSVE-NEXT: add w0, w8, w9367; NONEON-NOSVE-NEXT: add sp, sp, #32368; NONEON-NOSVE-NEXT: ret369 %op = load <8 x i32>, ptr %a370 %res = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %op)371 ret i32 %res372}373 374define i64 @uaddv_v2i64(<2 x i64> %a) {375; CHECK-LABEL: uaddv_v2i64:376; CHECK: // %bb.0:377; CHECK-NEXT: ptrue p0.d, vl2378; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0379; CHECK-NEXT: uaddv d0, p0, z0.d380; CHECK-NEXT: fmov x0, d0381; CHECK-NEXT: ret382;383; NONEON-NOSVE-LABEL: uaddv_v2i64:384; NONEON-NOSVE: // %bb.0:385; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!386; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16387; NONEON-NOSVE-NEXT: ldp x9, x8, [sp], #16388; NONEON-NOSVE-NEXT: add x0, x9, x8389; NONEON-NOSVE-NEXT: ret390 %res = call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %a)391 ret i64 %res392}393 394define i64 @uaddv_v4i64(ptr %a) {395; CHECK-LABEL: uaddv_v4i64:396; CHECK: // %bb.0:397; CHECK-NEXT: ldp q1, q0, [x0]398; CHECK-NEXT: ptrue p0.d, vl2399; CHECK-NEXT: add z0.d, z1.d, z0.d400; CHECK-NEXT: uaddv d0, p0, z0.d401; CHECK-NEXT: fmov x0, d0402; CHECK-NEXT: ret403;404; NONEON-NOSVE-LABEL: uaddv_v4i64:405; NONEON-NOSVE: // %bb.0:406; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]407; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!408; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32409; NONEON-NOSVE-NEXT: ldp x9, x8, [sp, #16]410; NONEON-NOSVE-NEXT: ldp x11, x10, [sp], #32411; NONEON-NOSVE-NEXT: add x8, x10, x8412; NONEON-NOSVE-NEXT: add x9, x11, x9413; NONEON-NOSVE-NEXT: add x0, x9, x8414; NONEON-NOSVE-NEXT: ret415 %op = load <4 x i64>, ptr %a416 %res = call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> %op)417 ret i64 %res418}419 420;421; SMAXV422;423 424define i8 @smaxv_v8i8(<8 x i8> %a) {425; CHECK-LABEL: smaxv_v8i8:426; CHECK: // %bb.0:427; CHECK-NEXT: ptrue p0.b, vl8428; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0429; CHECK-NEXT: smaxv b0, p0, z0.b430; CHECK-NEXT: fmov w0, s0431; CHECK-NEXT: ret432;433; NONEON-NOSVE-LABEL: smaxv_v8i8:434; NONEON-NOSVE: // %bb.0:435; NONEON-NOSVE-NEXT: sub sp, sp, #16436; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16437; NONEON-NOSVE-NEXT: str d0, [sp, #8]438; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #9]439; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #8]440; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #10]441; NONEON-NOSVE-NEXT: cmp w9, w8442; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt443; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #11]444; NONEON-NOSVE-NEXT: cmp w8, w10445; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt446; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #12]447; NONEON-NOSVE-NEXT: cmp w8, w9448; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt449; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #13]450; NONEON-NOSVE-NEXT: cmp w8, w10451; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt452; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #14]453; NONEON-NOSVE-NEXT: cmp w8, w9454; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt455; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #15]456; NONEON-NOSVE-NEXT: cmp w8, w10457; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt458; NONEON-NOSVE-NEXT: cmp w8, w9459; NONEON-NOSVE-NEXT: csel w0, w8, w9, gt460; NONEON-NOSVE-NEXT: add sp, sp, #16461; NONEON-NOSVE-NEXT: ret462 %res = call i8 @llvm.vector.reduce.smax.v8i8(<8 x i8> %a)463 ret i8 %res464}465 466define i8 @smaxv_v16i8(<16 x i8> %a) {467; CHECK-LABEL: smaxv_v16i8:468; CHECK: // %bb.0:469; CHECK-NEXT: ptrue p0.b, vl16470; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0471; CHECK-NEXT: smaxv b0, p0, z0.b472; CHECK-NEXT: fmov w0, s0473; CHECK-NEXT: ret474;475; NONEON-NOSVE-LABEL: smaxv_v16i8:476; NONEON-NOSVE: // %bb.0:477; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!478; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16479; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #1]480; NONEON-NOSVE-NEXT: ldrsb w9, [sp]481; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #2]482; NONEON-NOSVE-NEXT: cmp w9, w8483; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt484; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #3]485; NONEON-NOSVE-NEXT: cmp w8, w10486; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt487; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #4]488; NONEON-NOSVE-NEXT: cmp w8, w9489; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt490; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #5]491; NONEON-NOSVE-NEXT: cmp w8, w10492; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt493; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #6]494; NONEON-NOSVE-NEXT: cmp w8, w9495; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt496; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #7]497; NONEON-NOSVE-NEXT: cmp w8, w10498; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt499; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #8]500; NONEON-NOSVE-NEXT: cmp w8, w9501; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt502; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #9]503; NONEON-NOSVE-NEXT: cmp w8, w10504; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt505; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #10]506; NONEON-NOSVE-NEXT: cmp w8, w9507; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt508; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #11]509; NONEON-NOSVE-NEXT: cmp w8, w10510; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt511; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #12]512; NONEON-NOSVE-NEXT: cmp w8, w9513; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt514; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #13]515; NONEON-NOSVE-NEXT: cmp w8, w10516; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt517; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #14]518; NONEON-NOSVE-NEXT: cmp w8, w9519; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt520; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #15]521; NONEON-NOSVE-NEXT: cmp w8, w10522; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt523; NONEON-NOSVE-NEXT: cmp w8, w9524; NONEON-NOSVE-NEXT: csel w0, w8, w9, gt525; NONEON-NOSVE-NEXT: add sp, sp, #16526; NONEON-NOSVE-NEXT: ret527 %res = call i8 @llvm.vector.reduce.smax.v16i8(<16 x i8> %a)528 ret i8 %res529}530 531define i8 @smaxv_v32i8(ptr %a) {532; CHECK-LABEL: smaxv_v32i8:533; CHECK: // %bb.0:534; CHECK-NEXT: ldp q1, q0, [x0]535; CHECK-NEXT: ptrue p0.b, vl16536; CHECK-NEXT: smax z0.b, p0/m, z0.b, z1.b537; CHECK-NEXT: smaxv b0, p0, z0.b538; CHECK-NEXT: fmov w0, s0539; CHECK-NEXT: ret540;541; NONEON-NOSVE-LABEL: smaxv_v32i8:542; NONEON-NOSVE: // %bb.0:543; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]544; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!545; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32546; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #17]547; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #1]548; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #16]549; NONEON-NOSVE-NEXT: ldrsb w11, [sp]550; NONEON-NOSVE-NEXT: cmp w9, w8551; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt552; NONEON-NOSVE-NEXT: cmp w11, w10553; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt554; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #18]555; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #2]556; NONEON-NOSVE-NEXT: cmp w9, w8557; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt558; NONEON-NOSVE-NEXT: cmp w11, w10559; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt560; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #19]561; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #3]562; NONEON-NOSVE-NEXT: cmp w8, w9563; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt564; NONEON-NOSVE-NEXT: cmp w11, w10565; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt566; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #20]567; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #4]568; NONEON-NOSVE-NEXT: cmp w8, w9569; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt570; NONEON-NOSVE-NEXT: cmp w11, w10571; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt572; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #21]573; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #5]574; NONEON-NOSVE-NEXT: cmp w8, w9575; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt576; NONEON-NOSVE-NEXT: cmp w11, w10577; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt578; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #22]579; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #6]580; NONEON-NOSVE-NEXT: cmp w8, w9581; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt582; NONEON-NOSVE-NEXT: cmp w11, w10583; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt584; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #23]585; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #7]586; NONEON-NOSVE-NEXT: cmp w8, w9587; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt588; NONEON-NOSVE-NEXT: cmp w11, w10589; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt590; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #24]591; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #8]592; NONEON-NOSVE-NEXT: cmp w8, w9593; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt594; NONEON-NOSVE-NEXT: cmp w11, w10595; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt596; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #25]597; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #9]598; NONEON-NOSVE-NEXT: cmp w8, w9599; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt600; NONEON-NOSVE-NEXT: cmp w11, w10601; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt602; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #26]603; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #10]604; NONEON-NOSVE-NEXT: cmp w8, w9605; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt606; NONEON-NOSVE-NEXT: cmp w11, w10607; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt608; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #27]609; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #11]610; NONEON-NOSVE-NEXT: cmp w8, w9611; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt612; NONEON-NOSVE-NEXT: cmp w11, w10613; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt614; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #28]615; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #12]616; NONEON-NOSVE-NEXT: cmp w8, w9617; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt618; NONEON-NOSVE-NEXT: cmp w11, w10619; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt620; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #29]621; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #13]622; NONEON-NOSVE-NEXT: cmp w8, w9623; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt624; NONEON-NOSVE-NEXT: cmp w11, w10625; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt626; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #30]627; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #14]628; NONEON-NOSVE-NEXT: cmp w8, w9629; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt630; NONEON-NOSVE-NEXT: cmp w11, w10631; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt632; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #31]633; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #15]634; NONEON-NOSVE-NEXT: cmp w8, w9635; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt636; NONEON-NOSVE-NEXT: cmp w11, w10637; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt638; NONEON-NOSVE-NEXT: cmp w8, w9639; NONEON-NOSVE-NEXT: csel w0, w8, w9, gt640; NONEON-NOSVE-NEXT: add sp, sp, #32641; NONEON-NOSVE-NEXT: ret642 %op = load <32 x i8>, ptr %a643 %res = call i8 @llvm.vector.reduce.smax.v32i8(<32 x i8> %op)644 ret i8 %res645}646 647define i16 @smaxv_v4i16(<4 x i16> %a) {648; CHECK-LABEL: smaxv_v4i16:649; CHECK: // %bb.0:650; CHECK-NEXT: ptrue p0.h, vl4651; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0652; CHECK-NEXT: smaxv h0, p0, z0.h653; CHECK-NEXT: fmov w0, s0654; CHECK-NEXT: ret655;656; NONEON-NOSVE-LABEL: smaxv_v4i16:657; NONEON-NOSVE: // %bb.0:658; NONEON-NOSVE-NEXT: sub sp, sp, #16659; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16660; NONEON-NOSVE-NEXT: str d0, [sp, #8]661; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #10]662; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #8]663; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #12]664; NONEON-NOSVE-NEXT: cmp w9, w8665; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt666; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #14]667; NONEON-NOSVE-NEXT: cmp w8, w10668; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt669; NONEON-NOSVE-NEXT: cmp w8, w9670; NONEON-NOSVE-NEXT: csel w0, w8, w9, gt671; NONEON-NOSVE-NEXT: add sp, sp, #16672; NONEON-NOSVE-NEXT: ret673 %res = call i16 @llvm.vector.reduce.smax.v4i16(<4 x i16> %a)674 ret i16 %res675}676 677define i16 @smaxv_v8i16(<8 x i16> %a) {678; CHECK-LABEL: smaxv_v8i16:679; CHECK: // %bb.0:680; CHECK-NEXT: ptrue p0.h, vl8681; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0682; CHECK-NEXT: smaxv h0, p0, z0.h683; CHECK-NEXT: fmov w0, s0684; CHECK-NEXT: ret685;686; NONEON-NOSVE-LABEL: smaxv_v8i16:687; NONEON-NOSVE: // %bb.0:688; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!689; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16690; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #2]691; NONEON-NOSVE-NEXT: ldrsh w9, [sp]692; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #4]693; NONEON-NOSVE-NEXT: cmp w9, w8694; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt695; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #6]696; NONEON-NOSVE-NEXT: cmp w8, w10697; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt698; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #8]699; NONEON-NOSVE-NEXT: cmp w8, w9700; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt701; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #10]702; NONEON-NOSVE-NEXT: cmp w8, w10703; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt704; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #12]705; NONEON-NOSVE-NEXT: cmp w8, w9706; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt707; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #14]708; NONEON-NOSVE-NEXT: cmp w8, w10709; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt710; NONEON-NOSVE-NEXT: cmp w8, w9711; NONEON-NOSVE-NEXT: csel w0, w8, w9, gt712; NONEON-NOSVE-NEXT: add sp, sp, #16713; NONEON-NOSVE-NEXT: ret714 %res = call i16 @llvm.vector.reduce.smax.v8i16(<8 x i16> %a)715 ret i16 %res716}717 718define i16 @smaxv_v16i16(ptr %a) {719; CHECK-LABEL: smaxv_v16i16:720; CHECK: // %bb.0:721; CHECK-NEXT: ldp q1, q0, [x0]722; CHECK-NEXT: ptrue p0.h, vl8723; CHECK-NEXT: smax z0.h, p0/m, z0.h, z1.h724; CHECK-NEXT: smaxv h0, p0, z0.h725; CHECK-NEXT: fmov w0, s0726; CHECK-NEXT: ret727;728; NONEON-NOSVE-LABEL: smaxv_v16i16:729; NONEON-NOSVE: // %bb.0:730; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]731; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!732; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32733; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #18]734; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #2]735; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #16]736; NONEON-NOSVE-NEXT: ldrsh w11, [sp]737; NONEON-NOSVE-NEXT: cmp w9, w8738; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt739; NONEON-NOSVE-NEXT: cmp w11, w10740; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt741; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #20]742; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #4]743; NONEON-NOSVE-NEXT: cmp w9, w8744; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt745; NONEON-NOSVE-NEXT: cmp w11, w10746; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt747; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #22]748; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #6]749; NONEON-NOSVE-NEXT: cmp w8, w9750; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt751; NONEON-NOSVE-NEXT: cmp w11, w10752; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt753; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #24]754; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #8]755; NONEON-NOSVE-NEXT: cmp w8, w9756; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt757; NONEON-NOSVE-NEXT: cmp w11, w10758; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt759; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #26]760; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #10]761; NONEON-NOSVE-NEXT: cmp w8, w9762; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt763; NONEON-NOSVE-NEXT: cmp w11, w10764; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt765; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #28]766; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #12]767; NONEON-NOSVE-NEXT: cmp w8, w9768; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt769; NONEON-NOSVE-NEXT: cmp w11, w10770; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt771; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #30]772; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #14]773; NONEON-NOSVE-NEXT: cmp w8, w9774; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt775; NONEON-NOSVE-NEXT: cmp w11, w10776; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt777; NONEON-NOSVE-NEXT: cmp w8, w9778; NONEON-NOSVE-NEXT: csel w0, w8, w9, gt779; NONEON-NOSVE-NEXT: add sp, sp, #32780; NONEON-NOSVE-NEXT: ret781 %op = load <16 x i16>, ptr %a782 %res = call i16 @llvm.vector.reduce.smax.v16i16(<16 x i16> %op)783 ret i16 %res784}785 786define i32 @smaxv_v2i32(<2 x i32> %a) {787; CHECK-LABEL: smaxv_v2i32:788; CHECK: // %bb.0:789; CHECK-NEXT: ptrue p0.s, vl2790; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0791; CHECK-NEXT: smaxv s0, p0, z0.s792; CHECK-NEXT: fmov w0, s0793; CHECK-NEXT: ret794;795; NONEON-NOSVE-LABEL: smaxv_v2i32:796; NONEON-NOSVE: // %bb.0:797; NONEON-NOSVE-NEXT: sub sp, sp, #16798; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16799; NONEON-NOSVE-NEXT: str d0, [sp, #8]800; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]801; NONEON-NOSVE-NEXT: cmp w9, w8802; NONEON-NOSVE-NEXT: csel w0, w9, w8, gt803; NONEON-NOSVE-NEXT: add sp, sp, #16804; NONEON-NOSVE-NEXT: ret805 %res = call i32 @llvm.vector.reduce.smax.v2i32(<2 x i32> %a)806 ret i32 %res807}808 809define i32 @smaxv_v4i32(<4 x i32> %a) {810; CHECK-LABEL: smaxv_v4i32:811; CHECK: // %bb.0:812; CHECK-NEXT: ptrue p0.s, vl4813; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0814; CHECK-NEXT: smaxv s0, p0, z0.s815; CHECK-NEXT: fmov w0, s0816; CHECK-NEXT: ret817;818; NONEON-NOSVE-LABEL: smaxv_v4i32:819; NONEON-NOSVE: // %bb.0:820; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!821; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16822; NONEON-NOSVE-NEXT: ldp w9, w8, [sp]823; NONEON-NOSVE-NEXT: cmp w9, w8824; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt825; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #8]826; NONEON-NOSVE-NEXT: cmp w8, w10827; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt828; NONEON-NOSVE-NEXT: cmp w8, w9829; NONEON-NOSVE-NEXT: csel w0, w8, w9, gt830; NONEON-NOSVE-NEXT: add sp, sp, #16831; NONEON-NOSVE-NEXT: ret832 %res = call i32 @llvm.vector.reduce.smax.v4i32(<4 x i32> %a)833 ret i32 %res834}835 836define i32 @smaxv_v8i32(ptr %a) {837; CHECK-LABEL: smaxv_v8i32:838; CHECK: // %bb.0:839; CHECK-NEXT: ldp q1, q0, [x0]840; CHECK-NEXT: ptrue p0.s, vl4841; CHECK-NEXT: smax z0.s, p0/m, z0.s, z1.s842; CHECK-NEXT: smaxv s0, p0, z0.s843; CHECK-NEXT: fmov w0, s0844; CHECK-NEXT: ret845;846; NONEON-NOSVE-LABEL: smaxv_v8i32:847; NONEON-NOSVE: // %bb.0:848; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]849; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!850; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32851; NONEON-NOSVE-NEXT: ldp w11, w8, [sp]852; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #16]853; NONEON-NOSVE-NEXT: cmp w8, w9854; NONEON-NOSVE-NEXT: csel w8, w8, w9, gt855; NONEON-NOSVE-NEXT: cmp w11, w10856; NONEON-NOSVE-NEXT: csel w9, w11, w10, gt857; NONEON-NOSVE-NEXT: cmp w9, w8858; NONEON-NOSVE-NEXT: ldp w11, w12, [sp, #8]859; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt860; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #24]861; NONEON-NOSVE-NEXT: cmp w11, w10862; NONEON-NOSVE-NEXT: csel w10, w11, w10, gt863; NONEON-NOSVE-NEXT: cmp w8, w10864; NONEON-NOSVE-NEXT: csel w8, w8, w10, gt865; NONEON-NOSVE-NEXT: cmp w12, w9866; NONEON-NOSVE-NEXT: csel w9, w12, w9, gt867; NONEON-NOSVE-NEXT: cmp w8, w9868; NONEON-NOSVE-NEXT: csel w0, w8, w9, gt869; NONEON-NOSVE-NEXT: add sp, sp, #32870; NONEON-NOSVE-NEXT: ret871 %op = load <8 x i32>, ptr %a872 %res = call i32 @llvm.vector.reduce.smax.v8i32(<8 x i32> %op)873 ret i32 %res874}875 876; No NEON 64-bit vector SMAXV support. Use SVE.877define i64 @smaxv_v2i64(<2 x i64> %a) {878; CHECK-LABEL: smaxv_v2i64:879; CHECK: // %bb.0:880; CHECK-NEXT: ptrue p0.d, vl2881; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0882; CHECK-NEXT: smaxv d0, p0, z0.d883; CHECK-NEXT: fmov x0, d0884; CHECK-NEXT: ret885;886; NONEON-NOSVE-LABEL: smaxv_v2i64:887; NONEON-NOSVE: // %bb.0:888; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!889; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16890; NONEON-NOSVE-NEXT: ldp x9, x8, [sp], #16891; NONEON-NOSVE-NEXT: cmp x9, x8892; NONEON-NOSVE-NEXT: csel x0, x9, x8, gt893; NONEON-NOSVE-NEXT: ret894 %res = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> %a)895 ret i64 %res896}897 898define i64 @smaxv_v4i64(ptr %a) {899; CHECK-LABEL: smaxv_v4i64:900; CHECK: // %bb.0:901; CHECK-NEXT: ldp q1, q0, [x0]902; CHECK-NEXT: ptrue p0.d, vl2903; CHECK-NEXT: smax z0.d, p0/m, z0.d, z1.d904; CHECK-NEXT: smaxv d0, p0, z0.d905; CHECK-NEXT: fmov x0, d0906; CHECK-NEXT: ret907;908; NONEON-NOSVE-LABEL: smaxv_v4i64:909; NONEON-NOSVE: // %bb.0:910; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]911; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!912; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32913; NONEON-NOSVE-NEXT: ldp x8, x10, [sp, #8]914; NONEON-NOSVE-NEXT: ldr x9, [sp, #24]915; NONEON-NOSVE-NEXT: ldr x11, [sp], #32916; NONEON-NOSVE-NEXT: cmp x8, x9917; NONEON-NOSVE-NEXT: csel x8, x8, x9, gt918; NONEON-NOSVE-NEXT: cmp x11, x10919; NONEON-NOSVE-NEXT: csel x9, x11, x10, gt920; NONEON-NOSVE-NEXT: cmp x9, x8921; NONEON-NOSVE-NEXT: csel x0, x9, x8, gt922; NONEON-NOSVE-NEXT: ret923 %op = load <4 x i64>, ptr %a924 %res = call i64 @llvm.vector.reduce.smax.v4i64(<4 x i64> %op)925 ret i64 %res926}927 928;929; SMINV930;931 932define i8 @sminv_v8i8(<8 x i8> %a) {933; CHECK-LABEL: sminv_v8i8:934; CHECK: // %bb.0:935; CHECK-NEXT: ptrue p0.b, vl8936; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0937; CHECK-NEXT: sminv b0, p0, z0.b938; CHECK-NEXT: fmov w0, s0939; CHECK-NEXT: ret940;941; NONEON-NOSVE-LABEL: sminv_v8i8:942; NONEON-NOSVE: // %bb.0:943; NONEON-NOSVE-NEXT: sub sp, sp, #16944; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16945; NONEON-NOSVE-NEXT: str d0, [sp, #8]946; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #9]947; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #8]948; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #10]949; NONEON-NOSVE-NEXT: cmp w9, w8950; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt951; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #11]952; NONEON-NOSVE-NEXT: cmp w8, w10953; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt954; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #12]955; NONEON-NOSVE-NEXT: cmp w8, w9956; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt957; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #13]958; NONEON-NOSVE-NEXT: cmp w8, w10959; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt960; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #14]961; NONEON-NOSVE-NEXT: cmp w8, w9962; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt963; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #15]964; NONEON-NOSVE-NEXT: cmp w8, w10965; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt966; NONEON-NOSVE-NEXT: cmp w8, w9967; NONEON-NOSVE-NEXT: csel w0, w8, w9, lt968; NONEON-NOSVE-NEXT: add sp, sp, #16969; NONEON-NOSVE-NEXT: ret970 %res = call i8 @llvm.vector.reduce.smin.v8i8(<8 x i8> %a)971 ret i8 %res972}973 974define i8 @sminv_v16i8(<16 x i8> %a) {975; CHECK-LABEL: sminv_v16i8:976; CHECK: // %bb.0:977; CHECK-NEXT: ptrue p0.b, vl16978; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0979; CHECK-NEXT: sminv b0, p0, z0.b980; CHECK-NEXT: fmov w0, s0981; CHECK-NEXT: ret982;983; NONEON-NOSVE-LABEL: sminv_v16i8:984; NONEON-NOSVE: // %bb.0:985; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!986; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16987; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #1]988; NONEON-NOSVE-NEXT: ldrsb w9, [sp]989; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #2]990; NONEON-NOSVE-NEXT: cmp w9, w8991; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt992; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #3]993; NONEON-NOSVE-NEXT: cmp w8, w10994; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt995; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #4]996; NONEON-NOSVE-NEXT: cmp w8, w9997; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt998; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #5]999; NONEON-NOSVE-NEXT: cmp w8, w101000; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1001; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #6]1002; NONEON-NOSVE-NEXT: cmp w8, w91003; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1004; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #7]1005; NONEON-NOSVE-NEXT: cmp w8, w101006; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1007; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #8]1008; NONEON-NOSVE-NEXT: cmp w8, w91009; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1010; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #9]1011; NONEON-NOSVE-NEXT: cmp w8, w101012; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1013; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #10]1014; NONEON-NOSVE-NEXT: cmp w8, w91015; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1016; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #11]1017; NONEON-NOSVE-NEXT: cmp w8, w101018; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1019; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #12]1020; NONEON-NOSVE-NEXT: cmp w8, w91021; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1022; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #13]1023; NONEON-NOSVE-NEXT: cmp w8, w101024; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1025; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #14]1026; NONEON-NOSVE-NEXT: cmp w8, w91027; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1028; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #15]1029; NONEON-NOSVE-NEXT: cmp w8, w101030; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1031; NONEON-NOSVE-NEXT: cmp w8, w91032; NONEON-NOSVE-NEXT: csel w0, w8, w9, lt1033; NONEON-NOSVE-NEXT: add sp, sp, #161034; NONEON-NOSVE-NEXT: ret1035 %res = call i8 @llvm.vector.reduce.smin.v16i8(<16 x i8> %a)1036 ret i8 %res1037}1038 1039define i8 @sminv_v32i8(ptr %a) {1040; CHECK-LABEL: sminv_v32i8:1041; CHECK: // %bb.0:1042; CHECK-NEXT: ldp q1, q0, [x0]1043; CHECK-NEXT: ptrue p0.b, vl161044; CHECK-NEXT: smin z0.b, p0/m, z0.b, z1.b1045; CHECK-NEXT: sminv b0, p0, z0.b1046; CHECK-NEXT: fmov w0, s01047; CHECK-NEXT: ret1048;1049; NONEON-NOSVE-LABEL: sminv_v32i8:1050; NONEON-NOSVE: // %bb.0:1051; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1052; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1053; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321054; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #17]1055; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #1]1056; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #16]1057; NONEON-NOSVE-NEXT: ldrsb w11, [sp]1058; NONEON-NOSVE-NEXT: cmp w9, w81059; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt1060; NONEON-NOSVE-NEXT: cmp w11, w101061; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1062; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #18]1063; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #2]1064; NONEON-NOSVE-NEXT: cmp w9, w81065; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt1066; NONEON-NOSVE-NEXT: cmp w11, w101067; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1068; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #19]1069; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #3]1070; NONEON-NOSVE-NEXT: cmp w8, w91071; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1072; NONEON-NOSVE-NEXT: cmp w11, w101073; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1074; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #20]1075; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #4]1076; NONEON-NOSVE-NEXT: cmp w8, w91077; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1078; NONEON-NOSVE-NEXT: cmp w11, w101079; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1080; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #21]1081; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #5]1082; NONEON-NOSVE-NEXT: cmp w8, w91083; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1084; NONEON-NOSVE-NEXT: cmp w11, w101085; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1086; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #22]1087; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #6]1088; NONEON-NOSVE-NEXT: cmp w8, w91089; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1090; NONEON-NOSVE-NEXT: cmp w11, w101091; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1092; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #23]1093; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #7]1094; NONEON-NOSVE-NEXT: cmp w8, w91095; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1096; NONEON-NOSVE-NEXT: cmp w11, w101097; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1098; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #24]1099; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #8]1100; NONEON-NOSVE-NEXT: cmp w8, w91101; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1102; NONEON-NOSVE-NEXT: cmp w11, w101103; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1104; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #25]1105; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #9]1106; NONEON-NOSVE-NEXT: cmp w8, w91107; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1108; NONEON-NOSVE-NEXT: cmp w11, w101109; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1110; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #26]1111; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #10]1112; NONEON-NOSVE-NEXT: cmp w8, w91113; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1114; NONEON-NOSVE-NEXT: cmp w11, w101115; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1116; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #27]1117; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #11]1118; NONEON-NOSVE-NEXT: cmp w8, w91119; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1120; NONEON-NOSVE-NEXT: cmp w11, w101121; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1122; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #28]1123; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #12]1124; NONEON-NOSVE-NEXT: cmp w8, w91125; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1126; NONEON-NOSVE-NEXT: cmp w11, w101127; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1128; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #29]1129; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #13]1130; NONEON-NOSVE-NEXT: cmp w8, w91131; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1132; NONEON-NOSVE-NEXT: cmp w11, w101133; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1134; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #30]1135; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #14]1136; NONEON-NOSVE-NEXT: cmp w8, w91137; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1138; NONEON-NOSVE-NEXT: cmp w11, w101139; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1140; NONEON-NOSVE-NEXT: ldrsb w10, [sp, #31]1141; NONEON-NOSVE-NEXT: ldrsb w11, [sp, #15]1142; NONEON-NOSVE-NEXT: cmp w8, w91143; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1144; NONEON-NOSVE-NEXT: cmp w11, w101145; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1146; NONEON-NOSVE-NEXT: cmp w8, w91147; NONEON-NOSVE-NEXT: csel w0, w8, w9, lt1148; NONEON-NOSVE-NEXT: add sp, sp, #321149; NONEON-NOSVE-NEXT: ret1150 %op = load <32 x i8>, ptr %a1151 %res = call i8 @llvm.vector.reduce.smin.v32i8(<32 x i8> %op)1152 ret i8 %res1153}1154 1155define i16 @sminv_v4i16(<4 x i16> %a) {1156; CHECK-LABEL: sminv_v4i16:1157; CHECK: // %bb.0:1158; CHECK-NEXT: ptrue p0.h, vl41159; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01160; CHECK-NEXT: sminv h0, p0, z0.h1161; CHECK-NEXT: fmov w0, s01162; CHECK-NEXT: ret1163;1164; NONEON-NOSVE-LABEL: sminv_v4i16:1165; NONEON-NOSVE: // %bb.0:1166; NONEON-NOSVE-NEXT: sub sp, sp, #161167; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161168; NONEON-NOSVE-NEXT: str d0, [sp, #8]1169; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #10]1170; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #8]1171; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #12]1172; NONEON-NOSVE-NEXT: cmp w9, w81173; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt1174; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #14]1175; NONEON-NOSVE-NEXT: cmp w8, w101176; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1177; NONEON-NOSVE-NEXT: cmp w8, w91178; NONEON-NOSVE-NEXT: csel w0, w8, w9, lt1179; NONEON-NOSVE-NEXT: add sp, sp, #161180; NONEON-NOSVE-NEXT: ret1181 %res = call i16 @llvm.vector.reduce.smin.v4i16(<4 x i16> %a)1182 ret i16 %res1183}1184 1185define i16 @sminv_v8i16(<8 x i16> %a) {1186; CHECK-LABEL: sminv_v8i16:1187; CHECK: // %bb.0:1188; CHECK-NEXT: ptrue p0.h, vl81189; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01190; CHECK-NEXT: sminv h0, p0, z0.h1191; CHECK-NEXT: fmov w0, s01192; CHECK-NEXT: ret1193;1194; NONEON-NOSVE-LABEL: sminv_v8i16:1195; NONEON-NOSVE: // %bb.0:1196; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!1197; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161198; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #2]1199; NONEON-NOSVE-NEXT: ldrsh w9, [sp]1200; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #4]1201; NONEON-NOSVE-NEXT: cmp w9, w81202; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt1203; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #6]1204; NONEON-NOSVE-NEXT: cmp w8, w101205; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1206; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #8]1207; NONEON-NOSVE-NEXT: cmp w8, w91208; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1209; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #10]1210; NONEON-NOSVE-NEXT: cmp w8, w101211; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1212; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #12]1213; NONEON-NOSVE-NEXT: cmp w8, w91214; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1215; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #14]1216; NONEON-NOSVE-NEXT: cmp w8, w101217; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1218; NONEON-NOSVE-NEXT: cmp w8, w91219; NONEON-NOSVE-NEXT: csel w0, w8, w9, lt1220; NONEON-NOSVE-NEXT: add sp, sp, #161221; NONEON-NOSVE-NEXT: ret1222 %res = call i16 @llvm.vector.reduce.smin.v8i16(<8 x i16> %a)1223 ret i16 %res1224}1225 1226define i16 @sminv_v16i16(ptr %a) {1227; CHECK-LABEL: sminv_v16i16:1228; CHECK: // %bb.0:1229; CHECK-NEXT: ldp q1, q0, [x0]1230; CHECK-NEXT: ptrue p0.h, vl81231; CHECK-NEXT: smin z0.h, p0/m, z0.h, z1.h1232; CHECK-NEXT: sminv h0, p0, z0.h1233; CHECK-NEXT: fmov w0, s01234; CHECK-NEXT: ret1235;1236; NONEON-NOSVE-LABEL: sminv_v16i16:1237; NONEON-NOSVE: // %bb.0:1238; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1239; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1240; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321241; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #18]1242; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #2]1243; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #16]1244; NONEON-NOSVE-NEXT: ldrsh w11, [sp]1245; NONEON-NOSVE-NEXT: cmp w9, w81246; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt1247; NONEON-NOSVE-NEXT: cmp w11, w101248; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1249; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #20]1250; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #4]1251; NONEON-NOSVE-NEXT: cmp w9, w81252; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt1253; NONEON-NOSVE-NEXT: cmp w11, w101254; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1255; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #22]1256; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #6]1257; NONEON-NOSVE-NEXT: cmp w8, w91258; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1259; NONEON-NOSVE-NEXT: cmp w11, w101260; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1261; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #24]1262; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #8]1263; NONEON-NOSVE-NEXT: cmp w8, w91264; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1265; NONEON-NOSVE-NEXT: cmp w11, w101266; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1267; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #26]1268; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #10]1269; NONEON-NOSVE-NEXT: cmp w8, w91270; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1271; NONEON-NOSVE-NEXT: cmp w11, w101272; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1273; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #28]1274; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #12]1275; NONEON-NOSVE-NEXT: cmp w8, w91276; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1277; NONEON-NOSVE-NEXT: cmp w11, w101278; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1279; NONEON-NOSVE-NEXT: ldrsh w10, [sp, #30]1280; NONEON-NOSVE-NEXT: ldrsh w11, [sp, #14]1281; NONEON-NOSVE-NEXT: cmp w8, w91282; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1283; NONEON-NOSVE-NEXT: cmp w11, w101284; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1285; NONEON-NOSVE-NEXT: cmp w8, w91286; NONEON-NOSVE-NEXT: csel w0, w8, w9, lt1287; NONEON-NOSVE-NEXT: add sp, sp, #321288; NONEON-NOSVE-NEXT: ret1289 %op = load <16 x i16>, ptr %a1290 %res = call i16 @llvm.vector.reduce.smin.v16i16(<16 x i16> %op)1291 ret i16 %res1292}1293 1294define i32 @sminv_v2i32(<2 x i32> %a) {1295; CHECK-LABEL: sminv_v2i32:1296; CHECK: // %bb.0:1297; CHECK-NEXT: ptrue p0.s, vl21298; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01299; CHECK-NEXT: sminv s0, p0, z0.s1300; CHECK-NEXT: fmov w0, s01301; CHECK-NEXT: ret1302;1303; NONEON-NOSVE-LABEL: sminv_v2i32:1304; NONEON-NOSVE: // %bb.0:1305; NONEON-NOSVE-NEXT: sub sp, sp, #161306; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161307; NONEON-NOSVE-NEXT: str d0, [sp, #8]1308; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]1309; NONEON-NOSVE-NEXT: cmp w9, w81310; NONEON-NOSVE-NEXT: csel w0, w9, w8, lt1311; NONEON-NOSVE-NEXT: add sp, sp, #161312; NONEON-NOSVE-NEXT: ret1313 %res = call i32 @llvm.vector.reduce.smin.v2i32(<2 x i32> %a)1314 ret i32 %res1315}1316 1317define i32 @sminv_v4i32(<4 x i32> %a) {1318; CHECK-LABEL: sminv_v4i32:1319; CHECK: // %bb.0:1320; CHECK-NEXT: ptrue p0.s, vl41321; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01322; CHECK-NEXT: sminv s0, p0, z0.s1323; CHECK-NEXT: fmov w0, s01324; CHECK-NEXT: ret1325;1326; NONEON-NOSVE-LABEL: sminv_v4i32:1327; NONEON-NOSVE: // %bb.0:1328; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!1329; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161330; NONEON-NOSVE-NEXT: ldp w9, w8, [sp]1331; NONEON-NOSVE-NEXT: cmp w9, w81332; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt1333; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #8]1334; NONEON-NOSVE-NEXT: cmp w8, w101335; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1336; NONEON-NOSVE-NEXT: cmp w8, w91337; NONEON-NOSVE-NEXT: csel w0, w8, w9, lt1338; NONEON-NOSVE-NEXT: add sp, sp, #161339; NONEON-NOSVE-NEXT: ret1340 %res = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> %a)1341 ret i32 %res1342}1343 1344define i32 @sminv_v8i32(ptr %a) {1345; CHECK-LABEL: sminv_v8i32:1346; CHECK: // %bb.0:1347; CHECK-NEXT: ldp q1, q0, [x0]1348; CHECK-NEXT: ptrue p0.s, vl41349; CHECK-NEXT: smin z0.s, p0/m, z0.s, z1.s1350; CHECK-NEXT: sminv s0, p0, z0.s1351; CHECK-NEXT: fmov w0, s01352; CHECK-NEXT: ret1353;1354; NONEON-NOSVE-LABEL: sminv_v8i32:1355; NONEON-NOSVE: // %bb.0:1356; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1357; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1358; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321359; NONEON-NOSVE-NEXT: ldp w11, w8, [sp]1360; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #16]1361; NONEON-NOSVE-NEXT: cmp w8, w91362; NONEON-NOSVE-NEXT: csel w8, w8, w9, lt1363; NONEON-NOSVE-NEXT: cmp w11, w101364; NONEON-NOSVE-NEXT: csel w9, w11, w10, lt1365; NONEON-NOSVE-NEXT: cmp w9, w81366; NONEON-NOSVE-NEXT: ldp w11, w12, [sp, #8]1367; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt1368; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #24]1369; NONEON-NOSVE-NEXT: cmp w11, w101370; NONEON-NOSVE-NEXT: csel w10, w11, w10, lt1371; NONEON-NOSVE-NEXT: cmp w8, w101372; NONEON-NOSVE-NEXT: csel w8, w8, w10, lt1373; NONEON-NOSVE-NEXT: cmp w12, w91374; NONEON-NOSVE-NEXT: csel w9, w12, w9, lt1375; NONEON-NOSVE-NEXT: cmp w8, w91376; NONEON-NOSVE-NEXT: csel w0, w8, w9, lt1377; NONEON-NOSVE-NEXT: add sp, sp, #321378; NONEON-NOSVE-NEXT: ret1379 %op = load <8 x i32>, ptr %a1380 %res = call i32 @llvm.vector.reduce.smin.v8i32(<8 x i32> %op)1381 ret i32 %res1382}1383 1384; No NEON 64-bit vector SMINV support. Use SVE.1385define i64 @sminv_v2i64(<2 x i64> %a) {1386; CHECK-LABEL: sminv_v2i64:1387; CHECK: // %bb.0:1388; CHECK-NEXT: ptrue p0.d, vl21389; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01390; CHECK-NEXT: sminv d0, p0, z0.d1391; CHECK-NEXT: fmov x0, d01392; CHECK-NEXT: ret1393;1394; NONEON-NOSVE-LABEL: sminv_v2i64:1395; NONEON-NOSVE: // %bb.0:1396; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!1397; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161398; NONEON-NOSVE-NEXT: ldp x9, x8, [sp], #161399; NONEON-NOSVE-NEXT: cmp x9, x81400; NONEON-NOSVE-NEXT: csel x0, x9, x8, lt1401; NONEON-NOSVE-NEXT: ret1402 %res = call i64 @llvm.vector.reduce.smin.v2i64(<2 x i64> %a)1403 ret i64 %res1404}1405 1406define i64 @sminv_v4i64(ptr %a) {1407; CHECK-LABEL: sminv_v4i64:1408; CHECK: // %bb.0:1409; CHECK-NEXT: ldp q1, q0, [x0]1410; CHECK-NEXT: ptrue p0.d, vl21411; CHECK-NEXT: smin z0.d, p0/m, z0.d, z1.d1412; CHECK-NEXT: sminv d0, p0, z0.d1413; CHECK-NEXT: fmov x0, d01414; CHECK-NEXT: ret1415;1416; NONEON-NOSVE-LABEL: sminv_v4i64:1417; NONEON-NOSVE: // %bb.0:1418; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1419; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1420; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321421; NONEON-NOSVE-NEXT: ldp x8, x10, [sp, #8]1422; NONEON-NOSVE-NEXT: ldr x9, [sp, #24]1423; NONEON-NOSVE-NEXT: ldr x11, [sp], #321424; NONEON-NOSVE-NEXT: cmp x8, x91425; NONEON-NOSVE-NEXT: csel x8, x8, x9, lt1426; NONEON-NOSVE-NEXT: cmp x11, x101427; NONEON-NOSVE-NEXT: csel x9, x11, x10, lt1428; NONEON-NOSVE-NEXT: cmp x9, x81429; NONEON-NOSVE-NEXT: csel x0, x9, x8, lt1430; NONEON-NOSVE-NEXT: ret1431 %op = load <4 x i64>, ptr %a1432 %res = call i64 @llvm.vector.reduce.smin.v4i64(<4 x i64> %op)1433 ret i64 %res1434}1435 1436;1437; UMAXV1438;1439 1440define i8 @umaxv_v8i8(<8 x i8> %a) {1441; CHECK-LABEL: umaxv_v8i8:1442; CHECK: // %bb.0:1443; CHECK-NEXT: ptrue p0.b, vl81444; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01445; CHECK-NEXT: umaxv b0, p0, z0.b1446; CHECK-NEXT: fmov w0, s01447; CHECK-NEXT: ret1448;1449; NONEON-NOSVE-LABEL: umaxv_v8i8:1450; NONEON-NOSVE: // %bb.0:1451; NONEON-NOSVE-NEXT: sub sp, sp, #161452; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161453; NONEON-NOSVE-NEXT: str d0, [sp, #8]1454; NONEON-NOSVE-NEXT: ldrb w8, [sp, #9]1455; NONEON-NOSVE-NEXT: ldrb w9, [sp, #8]1456; NONEON-NOSVE-NEXT: ldrb w10, [sp, #10]1457; NONEON-NOSVE-NEXT: cmp w9, w81458; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi1459; NONEON-NOSVE-NEXT: ldrb w9, [sp, #11]1460; NONEON-NOSVE-NEXT: cmp w8, w101461; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1462; NONEON-NOSVE-NEXT: ldrb w10, [sp, #12]1463; NONEON-NOSVE-NEXT: cmp w8, w91464; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1465; NONEON-NOSVE-NEXT: ldrb w9, [sp, #13]1466; NONEON-NOSVE-NEXT: cmp w8, w101467; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1468; NONEON-NOSVE-NEXT: ldrb w10, [sp, #14]1469; NONEON-NOSVE-NEXT: cmp w8, w91470; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1471; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]1472; NONEON-NOSVE-NEXT: cmp w8, w101473; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1474; NONEON-NOSVE-NEXT: cmp w8, w91475; NONEON-NOSVE-NEXT: csel w0, w8, w9, hi1476; NONEON-NOSVE-NEXT: add sp, sp, #161477; NONEON-NOSVE-NEXT: ret1478 %res = call i8 @llvm.vector.reduce.umax.v8i8(<8 x i8> %a)1479 ret i8 %res1480}1481 1482define i8 @umaxv_v16i8(<16 x i8> %a) {1483; CHECK-LABEL: umaxv_v16i8:1484; CHECK: // %bb.0:1485; CHECK-NEXT: ptrue p0.b, vl161486; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01487; CHECK-NEXT: umaxv b0, p0, z0.b1488; CHECK-NEXT: fmov w0, s01489; CHECK-NEXT: ret1490;1491; NONEON-NOSVE-LABEL: umaxv_v16i8:1492; NONEON-NOSVE: // %bb.0:1493; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!1494; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161495; NONEON-NOSVE-NEXT: ldrb w8, [sp, #1]1496; NONEON-NOSVE-NEXT: ldrb w9, [sp]1497; NONEON-NOSVE-NEXT: ldrb w10, [sp, #2]1498; NONEON-NOSVE-NEXT: cmp w9, w81499; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi1500; NONEON-NOSVE-NEXT: ldrb w9, [sp, #3]1501; NONEON-NOSVE-NEXT: cmp w8, w101502; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1503; NONEON-NOSVE-NEXT: ldrb w10, [sp, #4]1504; NONEON-NOSVE-NEXT: cmp w8, w91505; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1506; NONEON-NOSVE-NEXT: ldrb w9, [sp, #5]1507; NONEON-NOSVE-NEXT: cmp w8, w101508; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1509; NONEON-NOSVE-NEXT: ldrb w10, [sp, #6]1510; NONEON-NOSVE-NEXT: cmp w8, w91511; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1512; NONEON-NOSVE-NEXT: ldrb w9, [sp, #7]1513; NONEON-NOSVE-NEXT: cmp w8, w101514; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1515; NONEON-NOSVE-NEXT: ldrb w10, [sp, #8]1516; NONEON-NOSVE-NEXT: cmp w8, w91517; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1518; NONEON-NOSVE-NEXT: ldrb w9, [sp, #9]1519; NONEON-NOSVE-NEXT: cmp w8, w101520; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1521; NONEON-NOSVE-NEXT: ldrb w10, [sp, #10]1522; NONEON-NOSVE-NEXT: cmp w8, w91523; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1524; NONEON-NOSVE-NEXT: ldrb w9, [sp, #11]1525; NONEON-NOSVE-NEXT: cmp w8, w101526; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1527; NONEON-NOSVE-NEXT: ldrb w10, [sp, #12]1528; NONEON-NOSVE-NEXT: cmp w8, w91529; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1530; NONEON-NOSVE-NEXT: ldrb w9, [sp, #13]1531; NONEON-NOSVE-NEXT: cmp w8, w101532; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1533; NONEON-NOSVE-NEXT: ldrb w10, [sp, #14]1534; NONEON-NOSVE-NEXT: cmp w8, w91535; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1536; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]1537; NONEON-NOSVE-NEXT: cmp w8, w101538; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1539; NONEON-NOSVE-NEXT: cmp w8, w91540; NONEON-NOSVE-NEXT: csel w0, w8, w9, hi1541; NONEON-NOSVE-NEXT: add sp, sp, #161542; NONEON-NOSVE-NEXT: ret1543 %res = call i8 @llvm.vector.reduce.umax.v16i8(<16 x i8> %a)1544 ret i8 %res1545}1546 1547define i8 @umaxv_v32i8(ptr %a) {1548; CHECK-LABEL: umaxv_v32i8:1549; CHECK: // %bb.0:1550; CHECK-NEXT: ldp q1, q0, [x0]1551; CHECK-NEXT: ptrue p0.b, vl161552; CHECK-NEXT: umax z0.b, p0/m, z0.b, z1.b1553; CHECK-NEXT: umaxv b0, p0, z0.b1554; CHECK-NEXT: fmov w0, s01555; CHECK-NEXT: ret1556;1557; NONEON-NOSVE-LABEL: umaxv_v32i8:1558; NONEON-NOSVE: // %bb.0:1559; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1560; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1561; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321562; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]1563; NONEON-NOSVE-NEXT: ldrb w9, [sp, #1]1564; NONEON-NOSVE-NEXT: ldrb w10, [sp, #16]1565; NONEON-NOSVE-NEXT: ldrb w11, [sp]1566; NONEON-NOSVE-NEXT: cmp w9, w81567; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi1568; NONEON-NOSVE-NEXT: cmp w11, w101569; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1570; NONEON-NOSVE-NEXT: ldrb w10, [sp, #18]1571; NONEON-NOSVE-NEXT: ldrb w11, [sp, #2]1572; NONEON-NOSVE-NEXT: cmp w9, w81573; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi1574; NONEON-NOSVE-NEXT: cmp w11, w101575; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1576; NONEON-NOSVE-NEXT: ldrb w10, [sp, #19]1577; NONEON-NOSVE-NEXT: ldrb w11, [sp, #3]1578; NONEON-NOSVE-NEXT: cmp w8, w91579; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1580; NONEON-NOSVE-NEXT: cmp w11, w101581; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1582; NONEON-NOSVE-NEXT: ldrb w10, [sp, #20]1583; NONEON-NOSVE-NEXT: ldrb w11, [sp, #4]1584; NONEON-NOSVE-NEXT: cmp w8, w91585; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1586; NONEON-NOSVE-NEXT: cmp w11, w101587; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1588; NONEON-NOSVE-NEXT: ldrb w10, [sp, #21]1589; NONEON-NOSVE-NEXT: ldrb w11, [sp, #5]1590; NONEON-NOSVE-NEXT: cmp w8, w91591; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1592; NONEON-NOSVE-NEXT: cmp w11, w101593; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1594; NONEON-NOSVE-NEXT: ldrb w10, [sp, #22]1595; NONEON-NOSVE-NEXT: ldrb w11, [sp, #6]1596; NONEON-NOSVE-NEXT: cmp w8, w91597; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1598; NONEON-NOSVE-NEXT: cmp w11, w101599; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1600; NONEON-NOSVE-NEXT: ldrb w10, [sp, #23]1601; NONEON-NOSVE-NEXT: ldrb w11, [sp, #7]1602; NONEON-NOSVE-NEXT: cmp w8, w91603; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1604; NONEON-NOSVE-NEXT: cmp w11, w101605; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1606; NONEON-NOSVE-NEXT: ldrb w10, [sp, #24]1607; NONEON-NOSVE-NEXT: ldrb w11, [sp, #8]1608; NONEON-NOSVE-NEXT: cmp w8, w91609; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1610; NONEON-NOSVE-NEXT: cmp w11, w101611; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1612; NONEON-NOSVE-NEXT: ldrb w10, [sp, #25]1613; NONEON-NOSVE-NEXT: ldrb w11, [sp, #9]1614; NONEON-NOSVE-NEXT: cmp w8, w91615; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1616; NONEON-NOSVE-NEXT: cmp w11, w101617; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1618; NONEON-NOSVE-NEXT: ldrb w10, [sp, #26]1619; NONEON-NOSVE-NEXT: ldrb w11, [sp, #10]1620; NONEON-NOSVE-NEXT: cmp w8, w91621; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1622; NONEON-NOSVE-NEXT: cmp w11, w101623; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1624; NONEON-NOSVE-NEXT: ldrb w10, [sp, #27]1625; NONEON-NOSVE-NEXT: ldrb w11, [sp, #11]1626; NONEON-NOSVE-NEXT: cmp w8, w91627; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1628; NONEON-NOSVE-NEXT: cmp w11, w101629; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1630; NONEON-NOSVE-NEXT: ldrb w10, [sp, #28]1631; NONEON-NOSVE-NEXT: ldrb w11, [sp, #12]1632; NONEON-NOSVE-NEXT: cmp w8, w91633; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1634; NONEON-NOSVE-NEXT: cmp w11, w101635; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1636; NONEON-NOSVE-NEXT: ldrb w10, [sp, #29]1637; NONEON-NOSVE-NEXT: ldrb w11, [sp, #13]1638; NONEON-NOSVE-NEXT: cmp w8, w91639; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1640; NONEON-NOSVE-NEXT: cmp w11, w101641; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1642; NONEON-NOSVE-NEXT: ldrb w10, [sp, #30]1643; NONEON-NOSVE-NEXT: ldrb w11, [sp, #14]1644; NONEON-NOSVE-NEXT: cmp w8, w91645; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1646; NONEON-NOSVE-NEXT: cmp w11, w101647; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1648; NONEON-NOSVE-NEXT: ldrb w10, [sp, #31]1649; NONEON-NOSVE-NEXT: ldrb w11, [sp, #15]1650; NONEON-NOSVE-NEXT: cmp w8, w91651; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1652; NONEON-NOSVE-NEXT: cmp w11, w101653; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1654; NONEON-NOSVE-NEXT: cmp w8, w91655; NONEON-NOSVE-NEXT: csel w0, w8, w9, hi1656; NONEON-NOSVE-NEXT: add sp, sp, #321657; NONEON-NOSVE-NEXT: ret1658 %op = load <32 x i8>, ptr %a1659 %res = call i8 @llvm.vector.reduce.umax.v32i8(<32 x i8> %op)1660 ret i8 %res1661}1662 1663define i16 @umaxv_v4i16(<4 x i16> %a) {1664; CHECK-LABEL: umaxv_v4i16:1665; CHECK: // %bb.0:1666; CHECK-NEXT: ptrue p0.h, vl41667; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01668; CHECK-NEXT: umaxv h0, p0, z0.h1669; CHECK-NEXT: fmov w0, s01670; CHECK-NEXT: ret1671;1672; NONEON-NOSVE-LABEL: umaxv_v4i16:1673; NONEON-NOSVE: // %bb.0:1674; NONEON-NOSVE-NEXT: sub sp, sp, #161675; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161676; NONEON-NOSVE-NEXT: str d0, [sp, #8]1677; NONEON-NOSVE-NEXT: ldrh w8, [sp, #10]1678; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]1679; NONEON-NOSVE-NEXT: ldrh w10, [sp, #12]1680; NONEON-NOSVE-NEXT: cmp w9, w81681; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi1682; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]1683; NONEON-NOSVE-NEXT: cmp w8, w101684; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1685; NONEON-NOSVE-NEXT: cmp w8, w91686; NONEON-NOSVE-NEXT: csel w0, w8, w9, hi1687; NONEON-NOSVE-NEXT: add sp, sp, #161688; NONEON-NOSVE-NEXT: ret1689 %res = call i16 @llvm.vector.reduce.umax.v4i16(<4 x i16> %a)1690 ret i16 %res1691}1692 1693define i16 @umaxv_v8i16(<8 x i16> %a) {1694; CHECK-LABEL: umaxv_v8i16:1695; CHECK: // %bb.0:1696; CHECK-NEXT: ptrue p0.h, vl81697; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01698; CHECK-NEXT: umaxv h0, p0, z0.h1699; CHECK-NEXT: fmov w0, s01700; CHECK-NEXT: ret1701;1702; NONEON-NOSVE-LABEL: umaxv_v8i16:1703; NONEON-NOSVE: // %bb.0:1704; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!1705; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161706; NONEON-NOSVE-NEXT: ldrh w8, [sp, #2]1707; NONEON-NOSVE-NEXT: ldrh w9, [sp]1708; NONEON-NOSVE-NEXT: ldrh w10, [sp, #4]1709; NONEON-NOSVE-NEXT: cmp w9, w81710; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi1711; NONEON-NOSVE-NEXT: ldrh w9, [sp, #6]1712; NONEON-NOSVE-NEXT: cmp w8, w101713; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1714; NONEON-NOSVE-NEXT: ldrh w10, [sp, #8]1715; NONEON-NOSVE-NEXT: cmp w8, w91716; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1717; NONEON-NOSVE-NEXT: ldrh w9, [sp, #10]1718; NONEON-NOSVE-NEXT: cmp w8, w101719; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1720; NONEON-NOSVE-NEXT: ldrh w10, [sp, #12]1721; NONEON-NOSVE-NEXT: cmp w8, w91722; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1723; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]1724; NONEON-NOSVE-NEXT: cmp w8, w101725; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1726; NONEON-NOSVE-NEXT: cmp w8, w91727; NONEON-NOSVE-NEXT: csel w0, w8, w9, hi1728; NONEON-NOSVE-NEXT: add sp, sp, #161729; NONEON-NOSVE-NEXT: ret1730 %res = call i16 @llvm.vector.reduce.umax.v8i16(<8 x i16> %a)1731 ret i16 %res1732}1733 1734define i16 @umaxv_v16i16(ptr %a) {1735; CHECK-LABEL: umaxv_v16i16:1736; CHECK: // %bb.0:1737; CHECK-NEXT: ldp q1, q0, [x0]1738; CHECK-NEXT: ptrue p0.h, vl81739; CHECK-NEXT: umax z0.h, p0/m, z0.h, z1.h1740; CHECK-NEXT: umaxv h0, p0, z0.h1741; CHECK-NEXT: fmov w0, s01742; CHECK-NEXT: ret1743;1744; NONEON-NOSVE-LABEL: umaxv_v16i16:1745; NONEON-NOSVE: // %bb.0:1746; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1747; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1748; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321749; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]1750; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2]1751; NONEON-NOSVE-NEXT: ldrh w10, [sp, #16]1752; NONEON-NOSVE-NEXT: ldrh w11, [sp]1753; NONEON-NOSVE-NEXT: cmp w9, w81754; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi1755; NONEON-NOSVE-NEXT: cmp w11, w101756; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1757; NONEON-NOSVE-NEXT: ldrh w10, [sp, #20]1758; NONEON-NOSVE-NEXT: ldrh w11, [sp, #4]1759; NONEON-NOSVE-NEXT: cmp w9, w81760; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi1761; NONEON-NOSVE-NEXT: cmp w11, w101762; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1763; NONEON-NOSVE-NEXT: ldrh w10, [sp, #22]1764; NONEON-NOSVE-NEXT: ldrh w11, [sp, #6]1765; NONEON-NOSVE-NEXT: cmp w8, w91766; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1767; NONEON-NOSVE-NEXT: cmp w11, w101768; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1769; NONEON-NOSVE-NEXT: ldrh w10, [sp, #24]1770; NONEON-NOSVE-NEXT: ldrh w11, [sp, #8]1771; NONEON-NOSVE-NEXT: cmp w8, w91772; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1773; NONEON-NOSVE-NEXT: cmp w11, w101774; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1775; NONEON-NOSVE-NEXT: ldrh w10, [sp, #26]1776; NONEON-NOSVE-NEXT: ldrh w11, [sp, #10]1777; NONEON-NOSVE-NEXT: cmp w8, w91778; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1779; NONEON-NOSVE-NEXT: cmp w11, w101780; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1781; NONEON-NOSVE-NEXT: ldrh w10, [sp, #28]1782; NONEON-NOSVE-NEXT: ldrh w11, [sp, #12]1783; NONEON-NOSVE-NEXT: cmp w8, w91784; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1785; NONEON-NOSVE-NEXT: cmp w11, w101786; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1787; NONEON-NOSVE-NEXT: ldrh w10, [sp, #30]1788; NONEON-NOSVE-NEXT: ldrh w11, [sp, #14]1789; NONEON-NOSVE-NEXT: cmp w8, w91790; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1791; NONEON-NOSVE-NEXT: cmp w11, w101792; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1793; NONEON-NOSVE-NEXT: cmp w8, w91794; NONEON-NOSVE-NEXT: csel w0, w8, w9, hi1795; NONEON-NOSVE-NEXT: add sp, sp, #321796; NONEON-NOSVE-NEXT: ret1797 %op = load <16 x i16>, ptr %a1798 %res = call i16 @llvm.vector.reduce.umax.v16i16(<16 x i16> %op)1799 ret i16 %res1800}1801 1802define i32 @umaxv_v2i32(<2 x i32> %a) {1803; CHECK-LABEL: umaxv_v2i32:1804; CHECK: // %bb.0:1805; CHECK-NEXT: ptrue p0.s, vl21806; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01807; CHECK-NEXT: umaxv s0, p0, z0.s1808; CHECK-NEXT: fmov w0, s01809; CHECK-NEXT: ret1810;1811; NONEON-NOSVE-LABEL: umaxv_v2i32:1812; NONEON-NOSVE: // %bb.0:1813; NONEON-NOSVE-NEXT: sub sp, sp, #161814; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161815; NONEON-NOSVE-NEXT: str d0, [sp, #8]1816; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]1817; NONEON-NOSVE-NEXT: cmp w9, w81818; NONEON-NOSVE-NEXT: csel w0, w9, w8, hi1819; NONEON-NOSVE-NEXT: add sp, sp, #161820; NONEON-NOSVE-NEXT: ret1821 %res = call i32 @llvm.vector.reduce.umax.v2i32(<2 x i32> %a)1822 ret i32 %res1823}1824 1825define i32 @umaxv_v4i32(<4 x i32> %a) {1826; CHECK-LABEL: umaxv_v4i32:1827; CHECK: // %bb.0:1828; CHECK-NEXT: ptrue p0.s, vl41829; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01830; CHECK-NEXT: umaxv s0, p0, z0.s1831; CHECK-NEXT: fmov w0, s01832; CHECK-NEXT: ret1833;1834; NONEON-NOSVE-LABEL: umaxv_v4i32:1835; NONEON-NOSVE: // %bb.0:1836; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!1837; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161838; NONEON-NOSVE-NEXT: ldp w9, w8, [sp]1839; NONEON-NOSVE-NEXT: cmp w9, w81840; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi1841; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #8]1842; NONEON-NOSVE-NEXT: cmp w8, w101843; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1844; NONEON-NOSVE-NEXT: cmp w8, w91845; NONEON-NOSVE-NEXT: csel w0, w8, w9, hi1846; NONEON-NOSVE-NEXT: add sp, sp, #161847; NONEON-NOSVE-NEXT: ret1848 %res = call i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> %a)1849 ret i32 %res1850}1851 1852define i32 @umaxv_v8i32(ptr %a) {1853; CHECK-LABEL: umaxv_v8i32:1854; CHECK: // %bb.0:1855; CHECK-NEXT: ldp q1, q0, [x0]1856; CHECK-NEXT: ptrue p0.s, vl41857; CHECK-NEXT: umax z0.s, p0/m, z0.s, z1.s1858; CHECK-NEXT: umaxv s0, p0, z0.s1859; CHECK-NEXT: fmov w0, s01860; CHECK-NEXT: ret1861;1862; NONEON-NOSVE-LABEL: umaxv_v8i32:1863; NONEON-NOSVE: // %bb.0:1864; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1865; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1866; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321867; NONEON-NOSVE-NEXT: ldp w11, w8, [sp]1868; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #16]1869; NONEON-NOSVE-NEXT: cmp w8, w91870; NONEON-NOSVE-NEXT: csel w8, w8, w9, hi1871; NONEON-NOSVE-NEXT: cmp w11, w101872; NONEON-NOSVE-NEXT: csel w9, w11, w10, hi1873; NONEON-NOSVE-NEXT: cmp w9, w81874; NONEON-NOSVE-NEXT: ldp w11, w12, [sp, #8]1875; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi1876; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #24]1877; NONEON-NOSVE-NEXT: cmp w11, w101878; NONEON-NOSVE-NEXT: csel w10, w11, w10, hi1879; NONEON-NOSVE-NEXT: cmp w8, w101880; NONEON-NOSVE-NEXT: csel w8, w8, w10, hi1881; NONEON-NOSVE-NEXT: cmp w12, w91882; NONEON-NOSVE-NEXT: csel w9, w12, w9, hi1883; NONEON-NOSVE-NEXT: cmp w8, w91884; NONEON-NOSVE-NEXT: csel w0, w8, w9, hi1885; NONEON-NOSVE-NEXT: add sp, sp, #321886; NONEON-NOSVE-NEXT: ret1887 %op = load <8 x i32>, ptr %a1888 %res = call i32 @llvm.vector.reduce.umax.v8i32(<8 x i32> %op)1889 ret i32 %res1890}1891 1892; No NEON 64-bit vector UMAXV support. Use SVE.1893define i64 @umaxv_v2i64(<2 x i64> %a) {1894; CHECK-LABEL: umaxv_v2i64:1895; CHECK: // %bb.0:1896; CHECK-NEXT: ptrue p0.d, vl21897; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01898; CHECK-NEXT: umaxv d0, p0, z0.d1899; CHECK-NEXT: fmov x0, d01900; CHECK-NEXT: ret1901;1902; NONEON-NOSVE-LABEL: umaxv_v2i64:1903; NONEON-NOSVE: // %bb.0:1904; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!1905; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161906; NONEON-NOSVE-NEXT: ldp x9, x8, [sp], #161907; NONEON-NOSVE-NEXT: cmp x9, x81908; NONEON-NOSVE-NEXT: csel x0, x9, x8, hi1909; NONEON-NOSVE-NEXT: ret1910 %res = call i64 @llvm.vector.reduce.umax.v2i64(<2 x i64> %a)1911 ret i64 %res1912}1913 1914define i64 @umaxv_v4i64(ptr %a) {1915; CHECK-LABEL: umaxv_v4i64:1916; CHECK: // %bb.0:1917; CHECK-NEXT: ldp q1, q0, [x0]1918; CHECK-NEXT: ptrue p0.d, vl21919; CHECK-NEXT: umax z0.d, p0/m, z0.d, z1.d1920; CHECK-NEXT: umaxv d0, p0, z0.d1921; CHECK-NEXT: fmov x0, d01922; CHECK-NEXT: ret1923;1924; NONEON-NOSVE-LABEL: umaxv_v4i64:1925; NONEON-NOSVE: // %bb.0:1926; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1927; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1928; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321929; NONEON-NOSVE-NEXT: ldp x8, x10, [sp, #8]1930; NONEON-NOSVE-NEXT: ldr x9, [sp, #24]1931; NONEON-NOSVE-NEXT: ldr x11, [sp], #321932; NONEON-NOSVE-NEXT: cmp x8, x91933; NONEON-NOSVE-NEXT: csel x8, x8, x9, hi1934; NONEON-NOSVE-NEXT: cmp x11, x101935; NONEON-NOSVE-NEXT: csel x9, x11, x10, hi1936; NONEON-NOSVE-NEXT: cmp x9, x81937; NONEON-NOSVE-NEXT: csel x0, x9, x8, hi1938; NONEON-NOSVE-NEXT: ret1939 %op = load <4 x i64>, ptr %a1940 %res = call i64 @llvm.vector.reduce.umax.v4i64(<4 x i64> %op)1941 ret i64 %res1942}1943 1944;1945; UMINV1946;1947 1948define i8 @uminv_v8i8(<8 x i8> %a) {1949; CHECK-LABEL: uminv_v8i8:1950; CHECK: // %bb.0:1951; CHECK-NEXT: ptrue p0.b, vl81952; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01953; CHECK-NEXT: uminv b0, p0, z0.b1954; CHECK-NEXT: fmov w0, s01955; CHECK-NEXT: ret1956;1957; NONEON-NOSVE-LABEL: uminv_v8i8:1958; NONEON-NOSVE: // %bb.0:1959; NONEON-NOSVE-NEXT: sub sp, sp, #161960; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161961; NONEON-NOSVE-NEXT: str d0, [sp, #8]1962; NONEON-NOSVE-NEXT: ldrb w8, [sp, #9]1963; NONEON-NOSVE-NEXT: ldrb w9, [sp, #8]1964; NONEON-NOSVE-NEXT: ldrb w10, [sp, #10]1965; NONEON-NOSVE-NEXT: cmp w9, w81966; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo1967; NONEON-NOSVE-NEXT: ldrb w9, [sp, #11]1968; NONEON-NOSVE-NEXT: cmp w8, w101969; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo1970; NONEON-NOSVE-NEXT: ldrb w10, [sp, #12]1971; NONEON-NOSVE-NEXT: cmp w8, w91972; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo1973; NONEON-NOSVE-NEXT: ldrb w9, [sp, #13]1974; NONEON-NOSVE-NEXT: cmp w8, w101975; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo1976; NONEON-NOSVE-NEXT: ldrb w10, [sp, #14]1977; NONEON-NOSVE-NEXT: cmp w8, w91978; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo1979; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]1980; NONEON-NOSVE-NEXT: cmp w8, w101981; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo1982; NONEON-NOSVE-NEXT: cmp w8, w91983; NONEON-NOSVE-NEXT: csel w0, w8, w9, lo1984; NONEON-NOSVE-NEXT: add sp, sp, #161985; NONEON-NOSVE-NEXT: ret1986 %res = call i8 @llvm.vector.reduce.umin.v8i8(<8 x i8> %a)1987 ret i8 %res1988}1989 1990define i8 @uminv_v16i8(<16 x i8> %a) {1991; CHECK-LABEL: uminv_v16i8:1992; CHECK: // %bb.0:1993; CHECK-NEXT: ptrue p0.b, vl161994; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01995; CHECK-NEXT: uminv b0, p0, z0.b1996; CHECK-NEXT: fmov w0, s01997; CHECK-NEXT: ret1998;1999; NONEON-NOSVE-LABEL: uminv_v16i8:2000; NONEON-NOSVE: // %bb.0:2001; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!2002; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 162003; NONEON-NOSVE-NEXT: ldrb w8, [sp, #1]2004; NONEON-NOSVE-NEXT: ldrb w9, [sp]2005; NONEON-NOSVE-NEXT: ldrb w10, [sp, #2]2006; NONEON-NOSVE-NEXT: cmp w9, w82007; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo2008; NONEON-NOSVE-NEXT: ldrb w9, [sp, #3]2009; NONEON-NOSVE-NEXT: cmp w8, w102010; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2011; NONEON-NOSVE-NEXT: ldrb w10, [sp, #4]2012; NONEON-NOSVE-NEXT: cmp w8, w92013; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2014; NONEON-NOSVE-NEXT: ldrb w9, [sp, #5]2015; NONEON-NOSVE-NEXT: cmp w8, w102016; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2017; NONEON-NOSVE-NEXT: ldrb w10, [sp, #6]2018; NONEON-NOSVE-NEXT: cmp w8, w92019; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2020; NONEON-NOSVE-NEXT: ldrb w9, [sp, #7]2021; NONEON-NOSVE-NEXT: cmp w8, w102022; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2023; NONEON-NOSVE-NEXT: ldrb w10, [sp, #8]2024; NONEON-NOSVE-NEXT: cmp w8, w92025; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2026; NONEON-NOSVE-NEXT: ldrb w9, [sp, #9]2027; NONEON-NOSVE-NEXT: cmp w8, w102028; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2029; NONEON-NOSVE-NEXT: ldrb w10, [sp, #10]2030; NONEON-NOSVE-NEXT: cmp w8, w92031; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2032; NONEON-NOSVE-NEXT: ldrb w9, [sp, #11]2033; NONEON-NOSVE-NEXT: cmp w8, w102034; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2035; NONEON-NOSVE-NEXT: ldrb w10, [sp, #12]2036; NONEON-NOSVE-NEXT: cmp w8, w92037; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2038; NONEON-NOSVE-NEXT: ldrb w9, [sp, #13]2039; NONEON-NOSVE-NEXT: cmp w8, w102040; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2041; NONEON-NOSVE-NEXT: ldrb w10, [sp, #14]2042; NONEON-NOSVE-NEXT: cmp w8, w92043; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2044; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]2045; NONEON-NOSVE-NEXT: cmp w8, w102046; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2047; NONEON-NOSVE-NEXT: cmp w8, w92048; NONEON-NOSVE-NEXT: csel w0, w8, w9, lo2049; NONEON-NOSVE-NEXT: add sp, sp, #162050; NONEON-NOSVE-NEXT: ret2051 %res = call i8 @llvm.vector.reduce.umin.v16i8(<16 x i8> %a)2052 ret i8 %res2053}2054 2055define i8 @uminv_v32i8(ptr %a) {2056; CHECK-LABEL: uminv_v32i8:2057; CHECK: // %bb.0:2058; CHECK-NEXT: ldp q1, q0, [x0]2059; CHECK-NEXT: ptrue p0.b, vl162060; CHECK-NEXT: umin z0.b, p0/m, z0.b, z1.b2061; CHECK-NEXT: uminv b0, p0, z0.b2062; CHECK-NEXT: fmov w0, s02063; CHECK-NEXT: ret2064;2065; NONEON-NOSVE-LABEL: uminv_v32i8:2066; NONEON-NOSVE: // %bb.0:2067; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]2068; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!2069; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 322070; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]2071; NONEON-NOSVE-NEXT: ldrb w9, [sp, #1]2072; NONEON-NOSVE-NEXT: ldrb w10, [sp, #16]2073; NONEON-NOSVE-NEXT: ldrb w11, [sp]2074; NONEON-NOSVE-NEXT: cmp w9, w82075; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo2076; NONEON-NOSVE-NEXT: cmp w11, w102077; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2078; NONEON-NOSVE-NEXT: ldrb w10, [sp, #18]2079; NONEON-NOSVE-NEXT: ldrb w11, [sp, #2]2080; NONEON-NOSVE-NEXT: cmp w9, w82081; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo2082; NONEON-NOSVE-NEXT: cmp w11, w102083; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2084; NONEON-NOSVE-NEXT: ldrb w10, [sp, #19]2085; NONEON-NOSVE-NEXT: ldrb w11, [sp, #3]2086; NONEON-NOSVE-NEXT: cmp w8, w92087; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2088; NONEON-NOSVE-NEXT: cmp w11, w102089; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2090; NONEON-NOSVE-NEXT: ldrb w10, [sp, #20]2091; NONEON-NOSVE-NEXT: ldrb w11, [sp, #4]2092; NONEON-NOSVE-NEXT: cmp w8, w92093; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2094; NONEON-NOSVE-NEXT: cmp w11, w102095; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2096; NONEON-NOSVE-NEXT: ldrb w10, [sp, #21]2097; NONEON-NOSVE-NEXT: ldrb w11, [sp, #5]2098; NONEON-NOSVE-NEXT: cmp w8, w92099; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2100; NONEON-NOSVE-NEXT: cmp w11, w102101; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2102; NONEON-NOSVE-NEXT: ldrb w10, [sp, #22]2103; NONEON-NOSVE-NEXT: ldrb w11, [sp, #6]2104; NONEON-NOSVE-NEXT: cmp w8, w92105; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2106; NONEON-NOSVE-NEXT: cmp w11, w102107; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2108; NONEON-NOSVE-NEXT: ldrb w10, [sp, #23]2109; NONEON-NOSVE-NEXT: ldrb w11, [sp, #7]2110; NONEON-NOSVE-NEXT: cmp w8, w92111; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2112; NONEON-NOSVE-NEXT: cmp w11, w102113; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2114; NONEON-NOSVE-NEXT: ldrb w10, [sp, #24]2115; NONEON-NOSVE-NEXT: ldrb w11, [sp, #8]2116; NONEON-NOSVE-NEXT: cmp w8, w92117; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2118; NONEON-NOSVE-NEXT: cmp w11, w102119; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2120; NONEON-NOSVE-NEXT: ldrb w10, [sp, #25]2121; NONEON-NOSVE-NEXT: ldrb w11, [sp, #9]2122; NONEON-NOSVE-NEXT: cmp w8, w92123; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2124; NONEON-NOSVE-NEXT: cmp w11, w102125; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2126; NONEON-NOSVE-NEXT: ldrb w10, [sp, #26]2127; NONEON-NOSVE-NEXT: ldrb w11, [sp, #10]2128; NONEON-NOSVE-NEXT: cmp w8, w92129; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2130; NONEON-NOSVE-NEXT: cmp w11, w102131; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2132; NONEON-NOSVE-NEXT: ldrb w10, [sp, #27]2133; NONEON-NOSVE-NEXT: ldrb w11, [sp, #11]2134; NONEON-NOSVE-NEXT: cmp w8, w92135; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2136; NONEON-NOSVE-NEXT: cmp w11, w102137; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2138; NONEON-NOSVE-NEXT: ldrb w10, [sp, #28]2139; NONEON-NOSVE-NEXT: ldrb w11, [sp, #12]2140; NONEON-NOSVE-NEXT: cmp w8, w92141; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2142; NONEON-NOSVE-NEXT: cmp w11, w102143; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2144; NONEON-NOSVE-NEXT: ldrb w10, [sp, #29]2145; NONEON-NOSVE-NEXT: ldrb w11, [sp, #13]2146; NONEON-NOSVE-NEXT: cmp w8, w92147; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2148; NONEON-NOSVE-NEXT: cmp w11, w102149; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2150; NONEON-NOSVE-NEXT: ldrb w10, [sp, #30]2151; NONEON-NOSVE-NEXT: ldrb w11, [sp, #14]2152; NONEON-NOSVE-NEXT: cmp w8, w92153; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2154; NONEON-NOSVE-NEXT: cmp w11, w102155; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2156; NONEON-NOSVE-NEXT: ldrb w10, [sp, #31]2157; NONEON-NOSVE-NEXT: ldrb w11, [sp, #15]2158; NONEON-NOSVE-NEXT: cmp w8, w92159; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2160; NONEON-NOSVE-NEXT: cmp w11, w102161; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2162; NONEON-NOSVE-NEXT: cmp w8, w92163; NONEON-NOSVE-NEXT: csel w0, w8, w9, lo2164; NONEON-NOSVE-NEXT: add sp, sp, #322165; NONEON-NOSVE-NEXT: ret2166 %op = load <32 x i8>, ptr %a2167 %res = call i8 @llvm.vector.reduce.umin.v32i8(<32 x i8> %op)2168 ret i8 %res2169}2170 2171define i16 @uminv_v4i16(<4 x i16> %a) {2172; CHECK-LABEL: uminv_v4i16:2173; CHECK: // %bb.0:2174; CHECK-NEXT: ptrue p0.h, vl42175; CHECK-NEXT: // kill: def $d0 killed $d0 def $z02176; CHECK-NEXT: uminv h0, p0, z0.h2177; CHECK-NEXT: fmov w0, s02178; CHECK-NEXT: ret2179;2180; NONEON-NOSVE-LABEL: uminv_v4i16:2181; NONEON-NOSVE: // %bb.0:2182; NONEON-NOSVE-NEXT: sub sp, sp, #162183; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 162184; NONEON-NOSVE-NEXT: str d0, [sp, #8]2185; NONEON-NOSVE-NEXT: ldrh w8, [sp, #10]2186; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]2187; NONEON-NOSVE-NEXT: ldrh w10, [sp, #12]2188; NONEON-NOSVE-NEXT: cmp w9, w82189; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo2190; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]2191; NONEON-NOSVE-NEXT: cmp w8, w102192; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2193; NONEON-NOSVE-NEXT: cmp w8, w92194; NONEON-NOSVE-NEXT: csel w0, w8, w9, lo2195; NONEON-NOSVE-NEXT: add sp, sp, #162196; NONEON-NOSVE-NEXT: ret2197 %res = call i16 @llvm.vector.reduce.umin.v4i16(<4 x i16> %a)2198 ret i16 %res2199}2200 2201define i16 @uminv_v8i16(<8 x i16> %a) {2202; CHECK-LABEL: uminv_v8i16:2203; CHECK: // %bb.0:2204; CHECK-NEXT: ptrue p0.h, vl82205; CHECK-NEXT: // kill: def $q0 killed $q0 def $z02206; CHECK-NEXT: uminv h0, p0, z0.h2207; CHECK-NEXT: fmov w0, s02208; CHECK-NEXT: ret2209;2210; NONEON-NOSVE-LABEL: uminv_v8i16:2211; NONEON-NOSVE: // %bb.0:2212; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!2213; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 162214; NONEON-NOSVE-NEXT: ldrh w8, [sp, #2]2215; NONEON-NOSVE-NEXT: ldrh w9, [sp]2216; NONEON-NOSVE-NEXT: ldrh w10, [sp, #4]2217; NONEON-NOSVE-NEXT: cmp w9, w82218; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo2219; NONEON-NOSVE-NEXT: ldrh w9, [sp, #6]2220; NONEON-NOSVE-NEXT: cmp w8, w102221; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2222; NONEON-NOSVE-NEXT: ldrh w10, [sp, #8]2223; NONEON-NOSVE-NEXT: cmp w8, w92224; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2225; NONEON-NOSVE-NEXT: ldrh w9, [sp, #10]2226; NONEON-NOSVE-NEXT: cmp w8, w102227; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2228; NONEON-NOSVE-NEXT: ldrh w10, [sp, #12]2229; NONEON-NOSVE-NEXT: cmp w8, w92230; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2231; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]2232; NONEON-NOSVE-NEXT: cmp w8, w102233; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2234; NONEON-NOSVE-NEXT: cmp w8, w92235; NONEON-NOSVE-NEXT: csel w0, w8, w9, lo2236; NONEON-NOSVE-NEXT: add sp, sp, #162237; NONEON-NOSVE-NEXT: ret2238 %res = call i16 @llvm.vector.reduce.umin.v8i16(<8 x i16> %a)2239 ret i16 %res2240}2241 2242define i16 @uminv_v16i16(ptr %a) {2243; CHECK-LABEL: uminv_v16i16:2244; CHECK: // %bb.0:2245; CHECK-NEXT: ldp q1, q0, [x0]2246; CHECK-NEXT: ptrue p0.h, vl82247; CHECK-NEXT: umin z0.h, p0/m, z0.h, z1.h2248; CHECK-NEXT: uminv h0, p0, z0.h2249; CHECK-NEXT: fmov w0, s02250; CHECK-NEXT: ret2251;2252; NONEON-NOSVE-LABEL: uminv_v16i16:2253; NONEON-NOSVE: // %bb.0:2254; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]2255; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!2256; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 322257; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]2258; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2]2259; NONEON-NOSVE-NEXT: ldrh w10, [sp, #16]2260; NONEON-NOSVE-NEXT: ldrh w11, [sp]2261; NONEON-NOSVE-NEXT: cmp w9, w82262; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo2263; NONEON-NOSVE-NEXT: cmp w11, w102264; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2265; NONEON-NOSVE-NEXT: ldrh w10, [sp, #20]2266; NONEON-NOSVE-NEXT: ldrh w11, [sp, #4]2267; NONEON-NOSVE-NEXT: cmp w9, w82268; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo2269; NONEON-NOSVE-NEXT: cmp w11, w102270; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2271; NONEON-NOSVE-NEXT: ldrh w10, [sp, #22]2272; NONEON-NOSVE-NEXT: ldrh w11, [sp, #6]2273; NONEON-NOSVE-NEXT: cmp w8, w92274; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2275; NONEON-NOSVE-NEXT: cmp w11, w102276; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2277; NONEON-NOSVE-NEXT: ldrh w10, [sp, #24]2278; NONEON-NOSVE-NEXT: ldrh w11, [sp, #8]2279; NONEON-NOSVE-NEXT: cmp w8, w92280; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2281; NONEON-NOSVE-NEXT: cmp w11, w102282; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2283; NONEON-NOSVE-NEXT: ldrh w10, [sp, #26]2284; NONEON-NOSVE-NEXT: ldrh w11, [sp, #10]2285; NONEON-NOSVE-NEXT: cmp w8, w92286; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2287; NONEON-NOSVE-NEXT: cmp w11, w102288; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2289; NONEON-NOSVE-NEXT: ldrh w10, [sp, #28]2290; NONEON-NOSVE-NEXT: ldrh w11, [sp, #12]2291; NONEON-NOSVE-NEXT: cmp w8, w92292; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2293; NONEON-NOSVE-NEXT: cmp w11, w102294; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2295; NONEON-NOSVE-NEXT: ldrh w10, [sp, #30]2296; NONEON-NOSVE-NEXT: ldrh w11, [sp, #14]2297; NONEON-NOSVE-NEXT: cmp w8, w92298; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2299; NONEON-NOSVE-NEXT: cmp w11, w102300; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2301; NONEON-NOSVE-NEXT: cmp w8, w92302; NONEON-NOSVE-NEXT: csel w0, w8, w9, lo2303; NONEON-NOSVE-NEXT: add sp, sp, #322304; NONEON-NOSVE-NEXT: ret2305 %op = load <16 x i16>, ptr %a2306 %res = call i16 @llvm.vector.reduce.umin.v16i16(<16 x i16> %op)2307 ret i16 %res2308}2309 2310define i32 @uminv_v2i32(<2 x i32> %a) {2311; CHECK-LABEL: uminv_v2i32:2312; CHECK: // %bb.0:2313; CHECK-NEXT: ptrue p0.s, vl22314; CHECK-NEXT: // kill: def $d0 killed $d0 def $z02315; CHECK-NEXT: uminv s0, p0, z0.s2316; CHECK-NEXT: fmov w0, s02317; CHECK-NEXT: ret2318;2319; NONEON-NOSVE-LABEL: uminv_v2i32:2320; NONEON-NOSVE: // %bb.0:2321; NONEON-NOSVE-NEXT: sub sp, sp, #162322; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 162323; NONEON-NOSVE-NEXT: str d0, [sp, #8]2324; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]2325; NONEON-NOSVE-NEXT: cmp w9, w82326; NONEON-NOSVE-NEXT: csel w0, w9, w8, lo2327; NONEON-NOSVE-NEXT: add sp, sp, #162328; NONEON-NOSVE-NEXT: ret2329 %res = call i32 @llvm.vector.reduce.umin.v2i32(<2 x i32> %a)2330 ret i32 %res2331}2332 2333define i32 @uminv_v4i32(<4 x i32> %a) {2334; CHECK-LABEL: uminv_v4i32:2335; CHECK: // %bb.0:2336; CHECK-NEXT: ptrue p0.s, vl42337; CHECK-NEXT: // kill: def $q0 killed $q0 def $z02338; CHECK-NEXT: uminv s0, p0, z0.s2339; CHECK-NEXT: fmov w0, s02340; CHECK-NEXT: ret2341;2342; NONEON-NOSVE-LABEL: uminv_v4i32:2343; NONEON-NOSVE: // %bb.0:2344; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!2345; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 162346; NONEON-NOSVE-NEXT: ldp w9, w8, [sp]2347; NONEON-NOSVE-NEXT: cmp w9, w82348; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo2349; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #8]2350; NONEON-NOSVE-NEXT: cmp w8, w102351; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2352; NONEON-NOSVE-NEXT: cmp w8, w92353; NONEON-NOSVE-NEXT: csel w0, w8, w9, lo2354; NONEON-NOSVE-NEXT: add sp, sp, #162355; NONEON-NOSVE-NEXT: ret2356 %res = call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %a)2357 ret i32 %res2358}2359 2360define i32 @uminv_v8i32(ptr %a) {2361; CHECK-LABEL: uminv_v8i32:2362; CHECK: // %bb.0:2363; CHECK-NEXT: ldp q1, q0, [x0]2364; CHECK-NEXT: ptrue p0.s, vl42365; CHECK-NEXT: umin z0.s, p0/m, z0.s, z1.s2366; CHECK-NEXT: uminv s0, p0, z0.s2367; CHECK-NEXT: fmov w0, s02368; CHECK-NEXT: ret2369;2370; NONEON-NOSVE-LABEL: uminv_v8i32:2371; NONEON-NOSVE: // %bb.0:2372; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]2373; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!2374; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 322375; NONEON-NOSVE-NEXT: ldp w11, w8, [sp]2376; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #16]2377; NONEON-NOSVE-NEXT: cmp w8, w92378; NONEON-NOSVE-NEXT: csel w8, w8, w9, lo2379; NONEON-NOSVE-NEXT: cmp w11, w102380; NONEON-NOSVE-NEXT: csel w9, w11, w10, lo2381; NONEON-NOSVE-NEXT: cmp w9, w82382; NONEON-NOSVE-NEXT: ldp w11, w12, [sp, #8]2383; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo2384; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #24]2385; NONEON-NOSVE-NEXT: cmp w11, w102386; NONEON-NOSVE-NEXT: csel w10, w11, w10, lo2387; NONEON-NOSVE-NEXT: cmp w8, w102388; NONEON-NOSVE-NEXT: csel w8, w8, w10, lo2389; NONEON-NOSVE-NEXT: cmp w12, w92390; NONEON-NOSVE-NEXT: csel w9, w12, w9, lo2391; NONEON-NOSVE-NEXT: cmp w8, w92392; NONEON-NOSVE-NEXT: csel w0, w8, w9, lo2393; NONEON-NOSVE-NEXT: add sp, sp, #322394; NONEON-NOSVE-NEXT: ret2395 %op = load <8 x i32>, ptr %a2396 %res = call i32 @llvm.vector.reduce.umin.v8i32(<8 x i32> %op)2397 ret i32 %res2398}2399 2400; No NEON 64-bit vector UMINV support. Use SVE.2401define i64 @uminv_v2i64(<2 x i64> %a) {2402; CHECK-LABEL: uminv_v2i64:2403; CHECK: // %bb.0:2404; CHECK-NEXT: ptrue p0.d, vl22405; CHECK-NEXT: // kill: def $q0 killed $q0 def $z02406; CHECK-NEXT: uminv d0, p0, z0.d2407; CHECK-NEXT: fmov x0, d02408; CHECK-NEXT: ret2409;2410; NONEON-NOSVE-LABEL: uminv_v2i64:2411; NONEON-NOSVE: // %bb.0:2412; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!2413; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 162414; NONEON-NOSVE-NEXT: ldp x9, x8, [sp], #162415; NONEON-NOSVE-NEXT: cmp x9, x82416; NONEON-NOSVE-NEXT: csel x0, x9, x8, lo2417; NONEON-NOSVE-NEXT: ret2418 %res = call i64 @llvm.vector.reduce.umin.v2i64(<2 x i64> %a)2419 ret i64 %res2420}2421 2422define i64 @uminv_v4i64(ptr %a) {2423; CHECK-LABEL: uminv_v4i64:2424; CHECK: // %bb.0:2425; CHECK-NEXT: ldp q1, q0, [x0]2426; CHECK-NEXT: ptrue p0.d, vl22427; CHECK-NEXT: umin z0.d, p0/m, z0.d, z1.d2428; CHECK-NEXT: uminv d0, p0, z0.d2429; CHECK-NEXT: fmov x0, d02430; CHECK-NEXT: ret2431;2432; NONEON-NOSVE-LABEL: uminv_v4i64:2433; NONEON-NOSVE: // %bb.0:2434; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]2435; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!2436; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 322437; NONEON-NOSVE-NEXT: ldp x8, x10, [sp, #8]2438; NONEON-NOSVE-NEXT: ldr x9, [sp, #24]2439; NONEON-NOSVE-NEXT: ldr x11, [sp], #322440; NONEON-NOSVE-NEXT: cmp x8, x92441; NONEON-NOSVE-NEXT: csel x8, x8, x9, lo2442; NONEON-NOSVE-NEXT: cmp x11, x102443; NONEON-NOSVE-NEXT: csel x9, x11, x10, lo2444; NONEON-NOSVE-NEXT: cmp x9, x82445; NONEON-NOSVE-NEXT: csel x0, x9, x8, lo2446; NONEON-NOSVE-NEXT: ret2447 %op = load <4 x i64>, ptr %a2448 %res = call i64 @llvm.vector.reduce.umin.v4i64(<4 x i64> %op)2449 ret i64 %res2450}2451 2452declare i8 @llvm.vector.reduce.add.v8i8(<8 x i8>)2453declare i8 @llvm.vector.reduce.add.v16i8(<16 x i8>)2454declare i8 @llvm.vector.reduce.add.v32i8(<32 x i8>)2455 2456declare i16 @llvm.vector.reduce.add.v4i16(<4 x i16>)2457declare i16 @llvm.vector.reduce.add.v8i16(<8 x i16>)2458declare i16 @llvm.vector.reduce.add.v16i16(<16 x i16>)2459 2460declare i32 @llvm.vector.reduce.add.v2i32(<2 x i32>)2461declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>)2462declare i32 @llvm.vector.reduce.add.v8i32(<8 x i32>)2463 2464declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64>)2465declare i64 @llvm.vector.reduce.add.v4i64(<4 x i64>)2466 2467declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)2468declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)2469declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)2470 2471declare i16 @llvm.vector.reduce.smax.v4i16(<4 x i16>)2472declare i16 @llvm.vector.reduce.smax.v8i16(<8 x i16>)2473declare i16 @llvm.vector.reduce.smax.v16i16(<16 x i16>)2474 2475declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)2476declare i32 @llvm.vector.reduce.smax.v4i32(<4 x i32>)2477declare i32 @llvm.vector.reduce.smax.v8i32(<8 x i32>)2478 2479declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)2480declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)2481 2482declare i8 @llvm.vector.reduce.smin.v8i8(<8 x i8>)2483declare i8 @llvm.vector.reduce.smin.v16i8(<16 x i8>)2484declare i8 @llvm.vector.reduce.smin.v32i8(<32 x i8>)2485 2486declare i16 @llvm.vector.reduce.smin.v4i16(<4 x i16>)2487declare i16 @llvm.vector.reduce.smin.v8i16(<8 x i16>)2488declare i16 @llvm.vector.reduce.smin.v16i16(<16 x i16>)2489 2490declare i32 @llvm.vector.reduce.smin.v2i32(<2 x i32>)2491declare i32 @llvm.vector.reduce.smin.v4i32(<4 x i32>)2492declare i32 @llvm.vector.reduce.smin.v8i32(<8 x i32>)2493 2494declare i64 @llvm.vector.reduce.smin.v2i64(<2 x i64>)2495declare i64 @llvm.vector.reduce.smin.v4i64(<4 x i64>)2496 2497declare i8 @llvm.vector.reduce.umax.v8i8(<8 x i8>)2498declare i8 @llvm.vector.reduce.umax.v16i8(<16 x i8>)2499declare i8 @llvm.vector.reduce.umax.v32i8(<32 x i8>)2500 2501declare i16 @llvm.vector.reduce.umax.v4i16(<4 x i16>)2502declare i16 @llvm.vector.reduce.umax.v8i16(<8 x i16>)2503declare i16 @llvm.vector.reduce.umax.v16i16(<16 x i16>)2504 2505declare i32 @llvm.vector.reduce.umax.v2i32(<2 x i32>)2506declare i32 @llvm.vector.reduce.umax.v4i32(<4 x i32>)2507declare i32 @llvm.vector.reduce.umax.v8i32(<8 x i32>)2508 2509declare i64 @llvm.vector.reduce.umax.v2i64(<2 x i64>)2510declare i64 @llvm.vector.reduce.umax.v4i64(<4 x i64>)2511 2512declare i8 @llvm.vector.reduce.umin.v8i8(<8 x i8>)2513declare i8 @llvm.vector.reduce.umin.v16i8(<16 x i8>)2514declare i8 @llvm.vector.reduce.umin.v32i8(<32 x i8>)2515 2516declare i16 @llvm.vector.reduce.umin.v4i16(<4 x i16>)2517declare i16 @llvm.vector.reduce.umin.v8i16(<8 x i16>)2518declare i16 @llvm.vector.reduce.umin.v16i16(<16 x i16>)2519 2520declare i32 @llvm.vector.reduce.umin.v2i32(<2 x i32>)2521declare i32 @llvm.vector.reduce.umin.v4i32(<4 x i32>)2522declare i32 @llvm.vector.reduce.umin.v8i32(<8 x i32>)2523 2524declare i64 @llvm.vector.reduce.umin.v2i64(<2 x i64>)2525declare i64 @llvm.vector.reduce.umin.v4i64(<4 x i64>)2526