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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mattr=+sve -force-streaming-compatible < %s | FileCheck %s3; RUN: llc -mattr=+sme -force-streaming < %s | FileCheck %s4; RUN: llc -force-streaming-compatible < %s | FileCheck %s --check-prefix=NONEON-NOSVE5 6 7target triple = "aarch64-unknown-linux-gnu"8 9;10; ANDV11;12 13define i8 @andv_v4i8(<4 x i8> %a) {14; CHECK-LABEL: andv_v4i8:15; CHECK: // %bb.0:16; CHECK-NEXT: ptrue p0.h, vl417; CHECK-NEXT: // kill: def $d0 killed $d0 def $z018; CHECK-NEXT: andv h0, p0, z0.h19; CHECK-NEXT: fmov w0, s020; CHECK-NEXT: ret21;22; NONEON-NOSVE-LABEL: andv_v4i8:23; NONEON-NOSVE: // %bb.0:24; NONEON-NOSVE-NEXT: sub sp, sp, #1625; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1626; NONEON-NOSVE-NEXT: str d0, [sp, #8]27; NONEON-NOSVE-NEXT: ldrh w8, [sp, #14]28; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]29; NONEON-NOSVE-NEXT: ldrh w10, [sp, #10]30; NONEON-NOSVE-NEXT: ldrh w11, [sp, #8]31; NONEON-NOSVE-NEXT: and w8, w9, w832; NONEON-NOSVE-NEXT: and w10, w11, w1033; NONEON-NOSVE-NEXT: and w0, w10, w834; NONEON-NOSVE-NEXT: add sp, sp, #1635; NONEON-NOSVE-NEXT: ret36 %res = call i8 @llvm.vector.reduce.and.v4i8(<4 x i8> %a)37 ret i8 %res38}39 40define i8 @andv_v8i8(<8 x i8> %a) {41; CHECK-LABEL: andv_v8i8:42; CHECK: // %bb.0:43; CHECK-NEXT: ptrue p0.b, vl844; CHECK-NEXT: // kill: def $d0 killed $d0 def $z045; CHECK-NEXT: andv b0, p0, z0.b46; CHECK-NEXT: fmov w0, s047; CHECK-NEXT: ret48;49; NONEON-NOSVE-LABEL: andv_v8i8:50; NONEON-NOSVE: // %bb.0:51; NONEON-NOSVE-NEXT: sub sp, sp, #1652; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1653; NONEON-NOSVE-NEXT: str d0, [sp, #8]54; NONEON-NOSVE-NEXT: ldrb w8, [sp, #13]55; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12]56; NONEON-NOSVE-NEXT: ldrb w10, [sp, #11]57; NONEON-NOSVE-NEXT: ldrb w11, [sp, #10]58; NONEON-NOSVE-NEXT: ldrb w12, [sp, #9]59; NONEON-NOSVE-NEXT: ldrb w13, [sp, #8]60; NONEON-NOSVE-NEXT: ldrb w14, [sp, #14]61; NONEON-NOSVE-NEXT: and w8, w9, w862; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]63; NONEON-NOSVE-NEXT: and w12, w13, w1264; NONEON-NOSVE-NEXT: and w10, w11, w1065; NONEON-NOSVE-NEXT: and w10, w12, w1066; NONEON-NOSVE-NEXT: and w8, w8, w1467; NONEON-NOSVE-NEXT: and w8, w10, w868; NONEON-NOSVE-NEXT: and w0, w8, w969; NONEON-NOSVE-NEXT: add sp, sp, #1670; NONEON-NOSVE-NEXT: ret71 %res = call i8 @llvm.vector.reduce.and.v8i8(<8 x i8> %a)72 ret i8 %res73}74 75define i8 @andv_v16i8(<16 x i8> %a) {76; CHECK-LABEL: andv_v16i8:77; CHECK: // %bb.0:78; CHECK-NEXT: ptrue p0.b, vl1679; CHECK-NEXT: // kill: def $q0 killed $q0 def $z080; CHECK-NEXT: andv b0, p0, z0.b81; CHECK-NEXT: fmov w0, s082; CHECK-NEXT: ret83;84; NONEON-NOSVE-LABEL: andv_v16i8:85; NONEON-NOSVE: // %bb.0:86; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!87; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 1688; NONEON-NOSVE-NEXT: ldrb w9, [sp, #5]89; NONEON-NOSVE-NEXT: ldrb w10, [sp, #1]90; NONEON-NOSVE-NEXT: ldrb w11, [sp]91; NONEON-NOSVE-NEXT: ldrb w12, [sp, #4]92; NONEON-NOSVE-NEXT: ldrb w13, [sp, #3]93; NONEON-NOSVE-NEXT: ldrb w14, [sp, #2]94; NONEON-NOSVE-NEXT: and w10, w11, w1095; NONEON-NOSVE-NEXT: ldrb w8, [sp, #12]96; NONEON-NOSVE-NEXT: ldrb w15, [sp, #8]97; NONEON-NOSVE-NEXT: and w11, w14, w1398; NONEON-NOSVE-NEXT: and w9, w12, w999; NONEON-NOSVE-NEXT: ldrb w16, [sp, #6]100; NONEON-NOSVE-NEXT: ldrb w12, [sp, #7]101; NONEON-NOSVE-NEXT: and w10, w10, w11102; NONEON-NOSVE-NEXT: ldrb w13, [sp, #11]103; NONEON-NOSVE-NEXT: ldrb w11, [sp, #13]104; NONEON-NOSVE-NEXT: and w9, w9, w16105; NONEON-NOSVE-NEXT: ldrb w14, [sp, #9]106; NONEON-NOSVE-NEXT: and w12, w12, w15107; NONEON-NOSVE-NEXT: ldrb w15, [sp, #14]108; NONEON-NOSVE-NEXT: and w8, w13, w8109; NONEON-NOSVE-NEXT: ldrb w16, [sp, #10]110; NONEON-NOSVE-NEXT: ldrb w13, [sp, #15]111; NONEON-NOSVE-NEXT: and w12, w12, w14112; NONEON-NOSVE-NEXT: and w8, w8, w11113; NONEON-NOSVE-NEXT: and w9, w10, w9114; NONEON-NOSVE-NEXT: and w10, w12, w16115; NONEON-NOSVE-NEXT: and w8, w8, w15116; NONEON-NOSVE-NEXT: and w9, w9, w10117; NONEON-NOSVE-NEXT: and w8, w8, w13118; NONEON-NOSVE-NEXT: and w0, w9, w8119; NONEON-NOSVE-NEXT: add sp, sp, #16120; NONEON-NOSVE-NEXT: ret121 %res = call i8 @llvm.vector.reduce.and.v16i8(<16 x i8> %a)122 ret i8 %res123}124 125define i8 @andv_v32i8(ptr %a) {126; CHECK-LABEL: andv_v32i8:127; CHECK: // %bb.0:128; CHECK-NEXT: ldp q1, q0, [x0]129; CHECK-NEXT: ptrue p0.b, vl16130; CHECK-NEXT: and z0.d, z1.d, z0.d131; CHECK-NEXT: andv b0, p0, z0.b132; CHECK-NEXT: fmov w0, s0133; CHECK-NEXT: ret134;135; NONEON-NOSVE-LABEL: andv_v32i8:136; NONEON-NOSVE: // %bb.0:137; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]138; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!139; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32140; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]141; NONEON-NOSVE-NEXT: ldrb w9, [sp, #1]142; NONEON-NOSVE-NEXT: ldrb w10, [sp, #16]143; NONEON-NOSVE-NEXT: ldrb w11, [sp]144; NONEON-NOSVE-NEXT: ldrb w12, [sp, #18]145; NONEON-NOSVE-NEXT: ldrb w13, [sp, #2]146; NONEON-NOSVE-NEXT: and w8, w9, w8147; NONEON-NOSVE-NEXT: ldrb w14, [sp, #19]148; NONEON-NOSVE-NEXT: ldrb w15, [sp, #3]149; NONEON-NOSVE-NEXT: and w9, w11, w10150; NONEON-NOSVE-NEXT: and w10, w13, w12151; NONEON-NOSVE-NEXT: ldrb w12, [sp, #21]152; NONEON-NOSVE-NEXT: ldrb w13, [sp, #5]153; NONEON-NOSVE-NEXT: and w11, w15, w14154; NONEON-NOSVE-NEXT: and w8, w9, w8155; NONEON-NOSVE-NEXT: ldrb w16, [sp, #20]156; NONEON-NOSVE-NEXT: ldrb w17, [sp, #4]157; NONEON-NOSVE-NEXT: and w9, w10, w11158; NONEON-NOSVE-NEXT: and w10, w13, w12159; NONEON-NOSVE-NEXT: ldrb w11, [sp, #22]160; NONEON-NOSVE-NEXT: ldrb w12, [sp, #6]161; NONEON-NOSVE-NEXT: and w14, w17, w16162; NONEON-NOSVE-NEXT: ldrb w13, [sp, #23]163; NONEON-NOSVE-NEXT: ldrb w15, [sp, #8]164; NONEON-NOSVE-NEXT: and w10, w14, w10165; NONEON-NOSVE-NEXT: ldrb w14, [sp, #7]166; NONEON-NOSVE-NEXT: and w11, w12, w11167; NONEON-NOSVE-NEXT: ldrb w12, [sp, #24]168; NONEON-NOSVE-NEXT: and w8, w8, w9169; NONEON-NOSVE-NEXT: and w9, w10, w11170; NONEON-NOSVE-NEXT: and w10, w14, w13171; NONEON-NOSVE-NEXT: ldrb w13, [sp, #9]172; NONEON-NOSVE-NEXT: and w8, w8, w9173; NONEON-NOSVE-NEXT: and w11, w15, w12174; NONEON-NOSVE-NEXT: ldrb w12, [sp, #25]175; NONEON-NOSVE-NEXT: ldrb w14, [sp, #26]176; NONEON-NOSVE-NEXT: and w9, w10, w11177; NONEON-NOSVE-NEXT: ldrb w11, [sp, #27]178; NONEON-NOSVE-NEXT: ldrb w15, [sp, #10]179; NONEON-NOSVE-NEXT: and w10, w13, w12180; NONEON-NOSVE-NEXT: ldrb w12, [sp, #11]181; NONEON-NOSVE-NEXT: ldrb w13, [sp, #12]182; NONEON-NOSVE-NEXT: and w9, w9, w10183; NONEON-NOSVE-NEXT: ldrb w10, [sp, #28]184; NONEON-NOSVE-NEXT: ldrb w16, [sp, #14]185; NONEON-NOSVE-NEXT: and w11, w12, w11186; NONEON-NOSVE-NEXT: ldrb w12, [sp, #29]187; NONEON-NOSVE-NEXT: ldrb w17, [sp, #15]188; NONEON-NOSVE-NEXT: and w10, w13, w10189; NONEON-NOSVE-NEXT: ldrb w13, [sp, #13]190; NONEON-NOSVE-NEXT: and w14, w15, w14191; NONEON-NOSVE-NEXT: and w10, w11, w10192; NONEON-NOSVE-NEXT: ldrb w11, [sp, #30]193; NONEON-NOSVE-NEXT: and w9, w9, w14194; NONEON-NOSVE-NEXT: and w12, w13, w12195; NONEON-NOSVE-NEXT: ldrb w13, [sp, #31]196; NONEON-NOSVE-NEXT: and w8, w8, w9197; NONEON-NOSVE-NEXT: and w10, w10, w12198; NONEON-NOSVE-NEXT: and w11, w16, w11199; NONEON-NOSVE-NEXT: and w10, w10, w11200; NONEON-NOSVE-NEXT: and w11, w17, w13201; NONEON-NOSVE-NEXT: and w9, w10, w11202; NONEON-NOSVE-NEXT: and w0, w8, w9203; NONEON-NOSVE-NEXT: add sp, sp, #32204; NONEON-NOSVE-NEXT: ret205 %op = load <32 x i8>, ptr %a206 %res = call i8 @llvm.vector.reduce.and.v32i8(<32 x i8> %op)207 ret i8 %res208}209 210define i16 @andv_v2i16(<2 x i16> %a) {211; CHECK-LABEL: andv_v2i16:212; CHECK: // %bb.0:213; CHECK-NEXT: ptrue p0.s, vl2214; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0215; CHECK-NEXT: andv s0, p0, z0.s216; CHECK-NEXT: fmov w0, s0217; CHECK-NEXT: ret218;219; NONEON-NOSVE-LABEL: andv_v2i16:220; NONEON-NOSVE: // %bb.0:221; NONEON-NOSVE-NEXT: sub sp, sp, #16222; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16223; NONEON-NOSVE-NEXT: str d0, [sp, #8]224; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]225; NONEON-NOSVE-NEXT: and w0, w9, w8226; NONEON-NOSVE-NEXT: add sp, sp, #16227; NONEON-NOSVE-NEXT: ret228 %res = call i16 @llvm.vector.reduce.and.v2i16(<2 x i16> %a)229 ret i16 %res230}231 232define i16 @andv_v4i16(<4 x i16> %a) {233; CHECK-LABEL: andv_v4i16:234; CHECK: // %bb.0:235; CHECK-NEXT: ptrue p0.h, vl4236; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0237; CHECK-NEXT: andv h0, p0, z0.h238; CHECK-NEXT: fmov w0, s0239; CHECK-NEXT: ret240;241; NONEON-NOSVE-LABEL: andv_v4i16:242; NONEON-NOSVE: // %bb.0:243; NONEON-NOSVE-NEXT: sub sp, sp, #16244; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16245; NONEON-NOSVE-NEXT: str d0, [sp, #8]246; NONEON-NOSVE-NEXT: ldrh w8, [sp, #14]247; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]248; NONEON-NOSVE-NEXT: ldrh w10, [sp, #10]249; NONEON-NOSVE-NEXT: ldrh w11, [sp, #8]250; NONEON-NOSVE-NEXT: and w8, w9, w8251; NONEON-NOSVE-NEXT: and w10, w11, w10252; NONEON-NOSVE-NEXT: and w0, w10, w8253; NONEON-NOSVE-NEXT: add sp, sp, #16254; NONEON-NOSVE-NEXT: ret255 %res = call i16 @llvm.vector.reduce.and.v4i16(<4 x i16> %a)256 ret i16 %res257}258 259define i16 @andv_v8i16(<8 x i16> %a) {260; CHECK-LABEL: andv_v8i16:261; CHECK: // %bb.0:262; CHECK-NEXT: ptrue p0.h, vl8263; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0264; CHECK-NEXT: andv h0, p0, z0.h265; CHECK-NEXT: fmov w0, s0266; CHECK-NEXT: ret267;268; NONEON-NOSVE-LABEL: andv_v8i16:269; NONEON-NOSVE: // %bb.0:270; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!271; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16272; NONEON-NOSVE-NEXT: ldrh w8, [sp, #10]273; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]274; NONEON-NOSVE-NEXT: ldrh w10, [sp, #6]275; NONEON-NOSVE-NEXT: ldrh w11, [sp, #4]276; NONEON-NOSVE-NEXT: ldrh w12, [sp, #2]277; NONEON-NOSVE-NEXT: ldrh w13, [sp]278; NONEON-NOSVE-NEXT: and w8, w9, w8279; NONEON-NOSVE-NEXT: ldrh w14, [sp, #12]280; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]281; NONEON-NOSVE-NEXT: and w12, w13, w12282; NONEON-NOSVE-NEXT: and w10, w11, w10283; NONEON-NOSVE-NEXT: and w10, w12, w10284; NONEON-NOSVE-NEXT: and w8, w8, w14285; NONEON-NOSVE-NEXT: and w8, w10, w8286; NONEON-NOSVE-NEXT: and w0, w8, w9287; NONEON-NOSVE-NEXT: add sp, sp, #16288; NONEON-NOSVE-NEXT: ret289 %res = call i16 @llvm.vector.reduce.and.v8i16(<8 x i16> %a)290 ret i16 %res291}292 293define i16 @andv_v16i16(ptr %a) {294; CHECK-LABEL: andv_v16i16:295; CHECK: // %bb.0:296; CHECK-NEXT: ldp q1, q0, [x0]297; CHECK-NEXT: ptrue p0.h, vl8298; CHECK-NEXT: and z0.d, z1.d, z0.d299; CHECK-NEXT: andv h0, p0, z0.h300; CHECK-NEXT: fmov w0, s0301; CHECK-NEXT: ret302;303; NONEON-NOSVE-LABEL: andv_v16i16:304; NONEON-NOSVE: // %bb.0:305; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]306; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!307; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32308; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]309; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2]310; NONEON-NOSVE-NEXT: ldrh w10, [sp, #16]311; NONEON-NOSVE-NEXT: ldrh w11, [sp]312; NONEON-NOSVE-NEXT: ldrh w12, [sp, #20]313; NONEON-NOSVE-NEXT: ldrh w13, [sp, #4]314; NONEON-NOSVE-NEXT: and w8, w9, w8315; NONEON-NOSVE-NEXT: ldrh w14, [sp, #22]316; NONEON-NOSVE-NEXT: ldrh w15, [sp, #6]317; NONEON-NOSVE-NEXT: and w9, w11, w10318; NONEON-NOSVE-NEXT: and w12, w13, w12319; NONEON-NOSVE-NEXT: ldrh w10, [sp, #26]320; NONEON-NOSVE-NEXT: ldrh w11, [sp, #10]321; NONEON-NOSVE-NEXT: and w13, w15, w14322; NONEON-NOSVE-NEXT: and w8, w9, w8323; NONEON-NOSVE-NEXT: ldrh w16, [sp, #24]324; NONEON-NOSVE-NEXT: ldrh w17, [sp, #8]325; NONEON-NOSVE-NEXT: and w9, w12, w13326; NONEON-NOSVE-NEXT: and w10, w11, w10327; NONEON-NOSVE-NEXT: ldrh w11, [sp, #28]328; NONEON-NOSVE-NEXT: ldrh w15, [sp, #12]329; NONEON-NOSVE-NEXT: and w14, w17, w16330; NONEON-NOSVE-NEXT: ldrh w12, [sp, #30]331; NONEON-NOSVE-NEXT: ldrh w13, [sp, #14]332; NONEON-NOSVE-NEXT: and w10, w14, w10333; NONEON-NOSVE-NEXT: and w11, w15, w11334; NONEON-NOSVE-NEXT: and w8, w8, w9335; NONEON-NOSVE-NEXT: and w9, w10, w11336; NONEON-NOSVE-NEXT: and w8, w8, w9337; NONEON-NOSVE-NEXT: and w9, w13, w12338; NONEON-NOSVE-NEXT: and w0, w8, w9339; NONEON-NOSVE-NEXT: add sp, sp, #32340; NONEON-NOSVE-NEXT: ret341 %op = load <16 x i16>, ptr %a342 %res = call i16 @llvm.vector.reduce.and.v16i16(<16 x i16> %op)343 ret i16 %res344}345 346define i32 @andv_v2i32(<2 x i32> %a) {347; CHECK-LABEL: andv_v2i32:348; CHECK: // %bb.0:349; CHECK-NEXT: ptrue p0.s, vl2350; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0351; CHECK-NEXT: andv s0, p0, z0.s352; CHECK-NEXT: fmov w0, s0353; CHECK-NEXT: ret354;355; NONEON-NOSVE-LABEL: andv_v2i32:356; NONEON-NOSVE: // %bb.0:357; NONEON-NOSVE-NEXT: sub sp, sp, #16358; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16359; NONEON-NOSVE-NEXT: str d0, [sp, #8]360; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]361; NONEON-NOSVE-NEXT: and w0, w9, w8362; NONEON-NOSVE-NEXT: add sp, sp, #16363; NONEON-NOSVE-NEXT: ret364 %res = call i32 @llvm.vector.reduce.and.v2i32(<2 x i32> %a)365 ret i32 %res366}367 368define i32 @andv_v4i32(<4 x i32> %a) {369; CHECK-LABEL: andv_v4i32:370; CHECK: // %bb.0:371; CHECK-NEXT: ptrue p0.s, vl4372; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0373; CHECK-NEXT: andv s0, p0, z0.s374; CHECK-NEXT: fmov w0, s0375; CHECK-NEXT: ret376;377; NONEON-NOSVE-LABEL: andv_v4i32:378; NONEON-NOSVE: // %bb.0:379; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!380; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16381; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]382; NONEON-NOSVE-NEXT: ldp w11, w10, [sp], #16383; NONEON-NOSVE-NEXT: and w10, w11, w10384; NONEON-NOSVE-NEXT: and w8, w9, w8385; NONEON-NOSVE-NEXT: and w0, w10, w8386; NONEON-NOSVE-NEXT: ret387 %res = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %a)388 ret i32 %res389}390 391define i32 @andv_v8i32(ptr %a) {392; CHECK-LABEL: andv_v8i32:393; CHECK: // %bb.0:394; CHECK-NEXT: ldp q1, q0, [x0]395; CHECK-NEXT: ptrue p0.s, vl4396; CHECK-NEXT: and z0.d, z1.d, z0.d397; CHECK-NEXT: andv s0, p0, z0.s398; CHECK-NEXT: fmov w0, s0399; CHECK-NEXT: ret400;401; NONEON-NOSVE-LABEL: andv_v8i32:402; NONEON-NOSVE: // %bb.0:403; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]404; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!405; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32406; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #16]407; NONEON-NOSVE-NEXT: ldp w11, w10, [sp]408; NONEON-NOSVE-NEXT: ldp w12, w13, [sp, #24]409; NONEON-NOSVE-NEXT: ldp w14, w15, [sp, #8]410; NONEON-NOSVE-NEXT: and w8, w10, w8411; NONEON-NOSVE-NEXT: and w9, w11, w9412; NONEON-NOSVE-NEXT: and w8, w9, w8413; NONEON-NOSVE-NEXT: and w10, w14, w12414; NONEON-NOSVE-NEXT: and w11, w15, w13415; NONEON-NOSVE-NEXT: and w9, w10, w11416; NONEON-NOSVE-NEXT: and w0, w8, w9417; NONEON-NOSVE-NEXT: add sp, sp, #32418; NONEON-NOSVE-NEXT: ret419 %op = load <8 x i32>, ptr %a420 %res = call i32 @llvm.vector.reduce.and.v8i32(<8 x i32> %op)421 ret i32 %res422}423 424define i64 @andv_v2i64(<2 x i64> %a) {425; CHECK-LABEL: andv_v2i64:426; CHECK: // %bb.0:427; CHECK-NEXT: ptrue p0.d, vl2428; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0429; CHECK-NEXT: andv d0, p0, z0.d430; CHECK-NEXT: fmov x0, d0431; CHECK-NEXT: ret432;433; NONEON-NOSVE-LABEL: andv_v2i64:434; NONEON-NOSVE: // %bb.0:435; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!436; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16437; NONEON-NOSVE-NEXT: ldp x9, x8, [sp], #16438; NONEON-NOSVE-NEXT: and x0, x9, x8439; NONEON-NOSVE-NEXT: ret440 %res = call i64 @llvm.vector.reduce.and.v2i64(<2 x i64> %a)441 ret i64 %res442}443 444define i64 @andv_v4i64(ptr %a) {445; CHECK-LABEL: andv_v4i64:446; CHECK: // %bb.0:447; CHECK-NEXT: ldp q1, q0, [x0]448; CHECK-NEXT: ptrue p0.d, vl2449; CHECK-NEXT: and z0.d, z1.d, z0.d450; CHECK-NEXT: andv d0, p0, z0.d451; CHECK-NEXT: fmov x0, d0452; CHECK-NEXT: ret453;454; NONEON-NOSVE-LABEL: andv_v4i64:455; NONEON-NOSVE: // %bb.0:456; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]457; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!458; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32459; NONEON-NOSVE-NEXT: ldp x9, x8, [sp, #16]460; NONEON-NOSVE-NEXT: ldp x11, x10, [sp], #32461; NONEON-NOSVE-NEXT: and x8, x10, x8462; NONEON-NOSVE-NEXT: and x9, x11, x9463; NONEON-NOSVE-NEXT: and x0, x9, x8464; NONEON-NOSVE-NEXT: ret465 %op = load <4 x i64>, ptr %a466 %res = call i64 @llvm.vector.reduce.and.v4i64(<4 x i64> %op)467 ret i64 %res468}469 470;471; EORV472;473 474define i8 @eorv_v4i8(<4 x i8> %a) {475; CHECK-LABEL: eorv_v4i8:476; CHECK: // %bb.0:477; CHECK-NEXT: ptrue p0.h, vl4478; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0479; CHECK-NEXT: eorv h0, p0, z0.h480; CHECK-NEXT: fmov w0, s0481; CHECK-NEXT: ret482;483; NONEON-NOSVE-LABEL: eorv_v4i8:484; NONEON-NOSVE: // %bb.0:485; NONEON-NOSVE-NEXT: sub sp, sp, #16486; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16487; NONEON-NOSVE-NEXT: str d0, [sp, #8]488; NONEON-NOSVE-NEXT: ldrh w8, [sp, #14]489; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]490; NONEON-NOSVE-NEXT: ldrh w10, [sp, #10]491; NONEON-NOSVE-NEXT: ldrh w11, [sp, #8]492; NONEON-NOSVE-NEXT: eor w8, w9, w8493; NONEON-NOSVE-NEXT: eor w10, w11, w10494; NONEON-NOSVE-NEXT: eor w0, w10, w8495; NONEON-NOSVE-NEXT: add sp, sp, #16496; NONEON-NOSVE-NEXT: ret497 %res = call i8 @llvm.vector.reduce.xor.v4i8(<4 x i8> %a)498 ret i8 %res499}500 501define i8 @eorv_v8i8(<8 x i8> %a) {502; CHECK-LABEL: eorv_v8i8:503; CHECK: // %bb.0:504; CHECK-NEXT: ptrue p0.b, vl8505; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0506; CHECK-NEXT: eorv b0, p0, z0.b507; CHECK-NEXT: fmov w0, s0508; CHECK-NEXT: ret509;510; NONEON-NOSVE-LABEL: eorv_v8i8:511; NONEON-NOSVE: // %bb.0:512; NONEON-NOSVE-NEXT: sub sp, sp, #16513; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16514; NONEON-NOSVE-NEXT: str d0, [sp, #8]515; NONEON-NOSVE-NEXT: ldrb w8, [sp, #13]516; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12]517; NONEON-NOSVE-NEXT: ldrb w10, [sp, #11]518; NONEON-NOSVE-NEXT: ldrb w11, [sp, #10]519; NONEON-NOSVE-NEXT: ldrb w12, [sp, #9]520; NONEON-NOSVE-NEXT: ldrb w13, [sp, #8]521; NONEON-NOSVE-NEXT: ldrb w14, [sp, #14]522; NONEON-NOSVE-NEXT: eor w8, w9, w8523; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]524; NONEON-NOSVE-NEXT: eor w12, w13, w12525; NONEON-NOSVE-NEXT: eor w10, w11, w10526; NONEON-NOSVE-NEXT: eor w10, w12, w10527; NONEON-NOSVE-NEXT: eor w8, w8, w14528; NONEON-NOSVE-NEXT: eor w8, w10, w8529; NONEON-NOSVE-NEXT: eor w0, w8, w9530; NONEON-NOSVE-NEXT: add sp, sp, #16531; NONEON-NOSVE-NEXT: ret532 %res = call i8 @llvm.vector.reduce.xor.v8i8(<8 x i8> %a)533 ret i8 %res534}535 536define i8 @eorv_v16i8(<16 x i8> %a) {537; CHECK-LABEL: eorv_v16i8:538; CHECK: // %bb.0:539; CHECK-NEXT: ptrue p0.b, vl16540; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0541; CHECK-NEXT: eorv b0, p0, z0.b542; CHECK-NEXT: fmov w0, s0543; CHECK-NEXT: ret544;545; NONEON-NOSVE-LABEL: eorv_v16i8:546; NONEON-NOSVE: // %bb.0:547; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!548; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16549; NONEON-NOSVE-NEXT: ldrb w9, [sp, #5]550; NONEON-NOSVE-NEXT: ldrb w10, [sp, #1]551; NONEON-NOSVE-NEXT: ldrb w11, [sp]552; NONEON-NOSVE-NEXT: ldrb w12, [sp, #4]553; NONEON-NOSVE-NEXT: ldrb w13, [sp, #3]554; NONEON-NOSVE-NEXT: ldrb w14, [sp, #2]555; NONEON-NOSVE-NEXT: eor w10, w11, w10556; NONEON-NOSVE-NEXT: ldrb w8, [sp, #12]557; NONEON-NOSVE-NEXT: ldrb w15, [sp, #8]558; NONEON-NOSVE-NEXT: eor w11, w14, w13559; NONEON-NOSVE-NEXT: eor w9, w12, w9560; NONEON-NOSVE-NEXT: ldrb w16, [sp, #6]561; NONEON-NOSVE-NEXT: ldrb w12, [sp, #7]562; NONEON-NOSVE-NEXT: eor w10, w10, w11563; NONEON-NOSVE-NEXT: ldrb w13, [sp, #11]564; NONEON-NOSVE-NEXT: ldrb w11, [sp, #13]565; NONEON-NOSVE-NEXT: eor w9, w9, w16566; NONEON-NOSVE-NEXT: ldrb w14, [sp, #9]567; NONEON-NOSVE-NEXT: eor w12, w12, w15568; NONEON-NOSVE-NEXT: ldrb w15, [sp, #14]569; NONEON-NOSVE-NEXT: eor w8, w13, w8570; NONEON-NOSVE-NEXT: ldrb w16, [sp, #10]571; NONEON-NOSVE-NEXT: ldrb w13, [sp, #15]572; NONEON-NOSVE-NEXT: eor w12, w12, w14573; NONEON-NOSVE-NEXT: eor w8, w8, w11574; NONEON-NOSVE-NEXT: eor w9, w10, w9575; NONEON-NOSVE-NEXT: eor w10, w12, w16576; NONEON-NOSVE-NEXT: eor w8, w8, w15577; NONEON-NOSVE-NEXT: eor w9, w9, w10578; NONEON-NOSVE-NEXT: eor w8, w8, w13579; NONEON-NOSVE-NEXT: eor w0, w9, w8580; NONEON-NOSVE-NEXT: add sp, sp, #16581; NONEON-NOSVE-NEXT: ret582 %res = call i8 @llvm.vector.reduce.xor.v16i8(<16 x i8> %a)583 ret i8 %res584}585 586define i8 @eorv_v32i8(ptr %a) {587; CHECK-LABEL: eorv_v32i8:588; CHECK: // %bb.0:589; CHECK-NEXT: ldp q1, q0, [x0]590; CHECK-NEXT: ptrue p0.b, vl16591; CHECK-NEXT: eor z0.d, z1.d, z0.d592; CHECK-NEXT: eorv b0, p0, z0.b593; CHECK-NEXT: fmov w0, s0594; CHECK-NEXT: ret595;596; NONEON-NOSVE-LABEL: eorv_v32i8:597; NONEON-NOSVE: // %bb.0:598; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]599; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!600; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32601; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]602; NONEON-NOSVE-NEXT: ldrb w9, [sp, #1]603; NONEON-NOSVE-NEXT: ldrb w10, [sp, #16]604; NONEON-NOSVE-NEXT: ldrb w11, [sp]605; NONEON-NOSVE-NEXT: ldrb w12, [sp, #18]606; NONEON-NOSVE-NEXT: ldrb w13, [sp, #2]607; NONEON-NOSVE-NEXT: eor w8, w9, w8608; NONEON-NOSVE-NEXT: ldrb w14, [sp, #19]609; NONEON-NOSVE-NEXT: ldrb w15, [sp, #3]610; NONEON-NOSVE-NEXT: eor w9, w11, w10611; NONEON-NOSVE-NEXT: eor w10, w13, w12612; NONEON-NOSVE-NEXT: ldrb w12, [sp, #21]613; NONEON-NOSVE-NEXT: ldrb w13, [sp, #5]614; NONEON-NOSVE-NEXT: eor w11, w15, w14615; NONEON-NOSVE-NEXT: eor w8, w9, w8616; NONEON-NOSVE-NEXT: ldrb w16, [sp, #20]617; NONEON-NOSVE-NEXT: ldrb w17, [sp, #4]618; NONEON-NOSVE-NEXT: eor w9, w10, w11619; NONEON-NOSVE-NEXT: eor w10, w13, w12620; NONEON-NOSVE-NEXT: ldrb w11, [sp, #22]621; NONEON-NOSVE-NEXT: ldrb w12, [sp, #6]622; NONEON-NOSVE-NEXT: eor w14, w17, w16623; NONEON-NOSVE-NEXT: ldrb w13, [sp, #23]624; NONEON-NOSVE-NEXT: ldrb w15, [sp, #8]625; NONEON-NOSVE-NEXT: eor w10, w14, w10626; NONEON-NOSVE-NEXT: ldrb w14, [sp, #7]627; NONEON-NOSVE-NEXT: eor w11, w12, w11628; NONEON-NOSVE-NEXT: ldrb w12, [sp, #24]629; NONEON-NOSVE-NEXT: eor w8, w8, w9630; NONEON-NOSVE-NEXT: eor w9, w10, w11631; NONEON-NOSVE-NEXT: eor w10, w14, w13632; NONEON-NOSVE-NEXT: ldrb w13, [sp, #9]633; NONEON-NOSVE-NEXT: eor w8, w8, w9634; NONEON-NOSVE-NEXT: eor w11, w15, w12635; NONEON-NOSVE-NEXT: ldrb w12, [sp, #25]636; NONEON-NOSVE-NEXT: ldrb w14, [sp, #26]637; NONEON-NOSVE-NEXT: eor w9, w10, w11638; NONEON-NOSVE-NEXT: ldrb w11, [sp, #27]639; NONEON-NOSVE-NEXT: ldrb w15, [sp, #10]640; NONEON-NOSVE-NEXT: eor w10, w13, w12641; NONEON-NOSVE-NEXT: ldrb w12, [sp, #11]642; NONEON-NOSVE-NEXT: ldrb w13, [sp, #12]643; NONEON-NOSVE-NEXT: eor w9, w9, w10644; NONEON-NOSVE-NEXT: ldrb w10, [sp, #28]645; NONEON-NOSVE-NEXT: ldrb w16, [sp, #14]646; NONEON-NOSVE-NEXT: eor w11, w12, w11647; NONEON-NOSVE-NEXT: ldrb w12, [sp, #29]648; NONEON-NOSVE-NEXT: ldrb w17, [sp, #15]649; NONEON-NOSVE-NEXT: eor w10, w13, w10650; NONEON-NOSVE-NEXT: ldrb w13, [sp, #13]651; NONEON-NOSVE-NEXT: eor w14, w15, w14652; NONEON-NOSVE-NEXT: eor w10, w11, w10653; NONEON-NOSVE-NEXT: ldrb w11, [sp, #30]654; NONEON-NOSVE-NEXT: eor w9, w9, w14655; NONEON-NOSVE-NEXT: eor w12, w13, w12656; NONEON-NOSVE-NEXT: ldrb w13, [sp, #31]657; NONEON-NOSVE-NEXT: eor w8, w8, w9658; NONEON-NOSVE-NEXT: eor w10, w10, w12659; NONEON-NOSVE-NEXT: eor w11, w16, w11660; NONEON-NOSVE-NEXT: eor w10, w10, w11661; NONEON-NOSVE-NEXT: eor w11, w17, w13662; NONEON-NOSVE-NEXT: eor w9, w10, w11663; NONEON-NOSVE-NEXT: eor w0, w8, w9664; NONEON-NOSVE-NEXT: add sp, sp, #32665; NONEON-NOSVE-NEXT: ret666 %op = load <32 x i8>, ptr %a667 %res = call i8 @llvm.vector.reduce.xor.v32i8(<32 x i8> %op)668 ret i8 %res669}670 671define i16 @eorv_v2i16(<2 x i16> %a) {672; CHECK-LABEL: eorv_v2i16:673; CHECK: // %bb.0:674; CHECK-NEXT: ptrue p0.s, vl2675; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0676; CHECK-NEXT: eorv s0, p0, z0.s677; CHECK-NEXT: fmov w0, s0678; CHECK-NEXT: ret679;680; NONEON-NOSVE-LABEL: eorv_v2i16:681; NONEON-NOSVE: // %bb.0:682; NONEON-NOSVE-NEXT: sub sp, sp, #16683; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16684; NONEON-NOSVE-NEXT: str d0, [sp, #8]685; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]686; NONEON-NOSVE-NEXT: eor w0, w9, w8687; NONEON-NOSVE-NEXT: add sp, sp, #16688; NONEON-NOSVE-NEXT: ret689 %res = call i16 @llvm.vector.reduce.xor.v2i16(<2 x i16> %a)690 ret i16 %res691}692 693define i16 @eorv_v4i16(<4 x i16> %a) {694; CHECK-LABEL: eorv_v4i16:695; CHECK: // %bb.0:696; CHECK-NEXT: ptrue p0.h, vl4697; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0698; CHECK-NEXT: eorv h0, p0, z0.h699; CHECK-NEXT: fmov w0, s0700; CHECK-NEXT: ret701;702; NONEON-NOSVE-LABEL: eorv_v4i16:703; NONEON-NOSVE: // %bb.0:704; NONEON-NOSVE-NEXT: sub sp, sp, #16705; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16706; NONEON-NOSVE-NEXT: str d0, [sp, #8]707; NONEON-NOSVE-NEXT: ldrh w8, [sp, #14]708; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]709; NONEON-NOSVE-NEXT: ldrh w10, [sp, #10]710; NONEON-NOSVE-NEXT: ldrh w11, [sp, #8]711; NONEON-NOSVE-NEXT: eor w8, w9, w8712; NONEON-NOSVE-NEXT: eor w10, w11, w10713; NONEON-NOSVE-NEXT: eor w0, w10, w8714; NONEON-NOSVE-NEXT: add sp, sp, #16715; NONEON-NOSVE-NEXT: ret716 %res = call i16 @llvm.vector.reduce.xor.v4i16(<4 x i16> %a)717 ret i16 %res718}719 720define i16 @eorv_v8i16(<8 x i16> %a) {721; CHECK-LABEL: eorv_v8i16:722; CHECK: // %bb.0:723; CHECK-NEXT: ptrue p0.h, vl8724; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0725; CHECK-NEXT: eorv h0, p0, z0.h726; CHECK-NEXT: fmov w0, s0727; CHECK-NEXT: ret728;729; NONEON-NOSVE-LABEL: eorv_v8i16:730; NONEON-NOSVE: // %bb.0:731; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!732; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16733; NONEON-NOSVE-NEXT: ldrh w8, [sp, #10]734; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]735; NONEON-NOSVE-NEXT: ldrh w10, [sp, #6]736; NONEON-NOSVE-NEXT: ldrh w11, [sp, #4]737; NONEON-NOSVE-NEXT: ldrh w12, [sp, #2]738; NONEON-NOSVE-NEXT: ldrh w13, [sp]739; NONEON-NOSVE-NEXT: eor w8, w9, w8740; NONEON-NOSVE-NEXT: ldrh w14, [sp, #12]741; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]742; NONEON-NOSVE-NEXT: eor w12, w13, w12743; NONEON-NOSVE-NEXT: eor w10, w11, w10744; NONEON-NOSVE-NEXT: eor w10, w12, w10745; NONEON-NOSVE-NEXT: eor w8, w8, w14746; NONEON-NOSVE-NEXT: eor w8, w10, w8747; NONEON-NOSVE-NEXT: eor w0, w8, w9748; NONEON-NOSVE-NEXT: add sp, sp, #16749; NONEON-NOSVE-NEXT: ret750 %res = call i16 @llvm.vector.reduce.xor.v8i16(<8 x i16> %a)751 ret i16 %res752}753 754define i16 @eorv_v16i16(ptr %a) {755; CHECK-LABEL: eorv_v16i16:756; CHECK: // %bb.0:757; CHECK-NEXT: ldp q1, q0, [x0]758; CHECK-NEXT: ptrue p0.h, vl8759; CHECK-NEXT: eor z0.d, z1.d, z0.d760; CHECK-NEXT: eorv h0, p0, z0.h761; CHECK-NEXT: fmov w0, s0762; CHECK-NEXT: ret763;764; NONEON-NOSVE-LABEL: eorv_v16i16:765; NONEON-NOSVE: // %bb.0:766; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]767; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!768; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32769; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]770; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2]771; NONEON-NOSVE-NEXT: ldrh w10, [sp, #16]772; NONEON-NOSVE-NEXT: ldrh w11, [sp]773; NONEON-NOSVE-NEXT: ldrh w12, [sp, #20]774; NONEON-NOSVE-NEXT: ldrh w13, [sp, #4]775; NONEON-NOSVE-NEXT: eor w8, w9, w8776; NONEON-NOSVE-NEXT: ldrh w14, [sp, #22]777; NONEON-NOSVE-NEXT: ldrh w15, [sp, #6]778; NONEON-NOSVE-NEXT: eor w9, w11, w10779; NONEON-NOSVE-NEXT: eor w12, w13, w12780; NONEON-NOSVE-NEXT: ldrh w10, [sp, #26]781; NONEON-NOSVE-NEXT: ldrh w11, [sp, #10]782; NONEON-NOSVE-NEXT: eor w13, w15, w14783; NONEON-NOSVE-NEXT: eor w8, w9, w8784; NONEON-NOSVE-NEXT: ldrh w16, [sp, #24]785; NONEON-NOSVE-NEXT: ldrh w17, [sp, #8]786; NONEON-NOSVE-NEXT: eor w9, w12, w13787; NONEON-NOSVE-NEXT: eor w10, w11, w10788; NONEON-NOSVE-NEXT: ldrh w11, [sp, #28]789; NONEON-NOSVE-NEXT: ldrh w15, [sp, #12]790; NONEON-NOSVE-NEXT: eor w14, w17, w16791; NONEON-NOSVE-NEXT: ldrh w12, [sp, #30]792; NONEON-NOSVE-NEXT: ldrh w13, [sp, #14]793; NONEON-NOSVE-NEXT: eor w10, w14, w10794; NONEON-NOSVE-NEXT: eor w11, w15, w11795; NONEON-NOSVE-NEXT: eor w8, w8, w9796; NONEON-NOSVE-NEXT: eor w9, w10, w11797; NONEON-NOSVE-NEXT: eor w8, w8, w9798; NONEON-NOSVE-NEXT: eor w9, w13, w12799; NONEON-NOSVE-NEXT: eor w0, w8, w9800; NONEON-NOSVE-NEXT: add sp, sp, #32801; NONEON-NOSVE-NEXT: ret802 %op = load <16 x i16>, ptr %a803 %res = call i16 @llvm.vector.reduce.xor.v16i16(<16 x i16> %op)804 ret i16 %res805}806 807define i32 @eorv_v2i32(<2 x i32> %a) {808; CHECK-LABEL: eorv_v2i32:809; CHECK: // %bb.0:810; CHECK-NEXT: ptrue p0.s, vl2811; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0812; CHECK-NEXT: eorv s0, p0, z0.s813; CHECK-NEXT: fmov w0, s0814; CHECK-NEXT: ret815;816; NONEON-NOSVE-LABEL: eorv_v2i32:817; NONEON-NOSVE: // %bb.0:818; NONEON-NOSVE-NEXT: sub sp, sp, #16819; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16820; NONEON-NOSVE-NEXT: str d0, [sp, #8]821; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]822; NONEON-NOSVE-NEXT: eor w0, w9, w8823; NONEON-NOSVE-NEXT: add sp, sp, #16824; NONEON-NOSVE-NEXT: ret825 %res = call i32 @llvm.vector.reduce.xor.v2i32(<2 x i32> %a)826 ret i32 %res827}828 829define i32 @eorv_v4i32(<4 x i32> %a) {830; CHECK-LABEL: eorv_v4i32:831; CHECK: // %bb.0:832; CHECK-NEXT: ptrue p0.s, vl4833; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0834; CHECK-NEXT: eorv s0, p0, z0.s835; CHECK-NEXT: fmov w0, s0836; CHECK-NEXT: ret837;838; NONEON-NOSVE-LABEL: eorv_v4i32:839; NONEON-NOSVE: // %bb.0:840; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!841; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16842; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]843; NONEON-NOSVE-NEXT: ldp w11, w10, [sp], #16844; NONEON-NOSVE-NEXT: eor w10, w11, w10845; NONEON-NOSVE-NEXT: eor w8, w9, w8846; NONEON-NOSVE-NEXT: eor w0, w10, w8847; NONEON-NOSVE-NEXT: ret848 %res = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> %a)849 ret i32 %res850}851 852define i32 @eorv_v8i32(ptr %a) {853; CHECK-LABEL: eorv_v8i32:854; CHECK: // %bb.0:855; CHECK-NEXT: ldp q1, q0, [x0]856; CHECK-NEXT: ptrue p0.s, vl4857; CHECK-NEXT: eor z0.d, z1.d, z0.d858; CHECK-NEXT: eorv s0, p0, z0.s859; CHECK-NEXT: fmov w0, s0860; CHECK-NEXT: ret861;862; NONEON-NOSVE-LABEL: eorv_v8i32:863; NONEON-NOSVE: // %bb.0:864; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]865; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!866; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32867; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #16]868; NONEON-NOSVE-NEXT: ldp w11, w10, [sp]869; NONEON-NOSVE-NEXT: ldp w12, w13, [sp, #24]870; NONEON-NOSVE-NEXT: ldp w14, w15, [sp, #8]871; NONEON-NOSVE-NEXT: eor w8, w10, w8872; NONEON-NOSVE-NEXT: eor w9, w11, w9873; NONEON-NOSVE-NEXT: eor w8, w9, w8874; NONEON-NOSVE-NEXT: eor w10, w14, w12875; NONEON-NOSVE-NEXT: eor w11, w15, w13876; NONEON-NOSVE-NEXT: eor w9, w10, w11877; NONEON-NOSVE-NEXT: eor w0, w8, w9878; NONEON-NOSVE-NEXT: add sp, sp, #32879; NONEON-NOSVE-NEXT: ret880 %op = load <8 x i32>, ptr %a881 %res = call i32 @llvm.vector.reduce.xor.v8i32(<8 x i32> %op)882 ret i32 %res883}884 885define i64 @eorv_v2i64(<2 x i64> %a) {886; CHECK-LABEL: eorv_v2i64:887; CHECK: // %bb.0:888; CHECK-NEXT: ptrue p0.d, vl2889; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0890; CHECK-NEXT: eorv d0, p0, z0.d891; CHECK-NEXT: fmov x0, d0892; CHECK-NEXT: ret893;894; NONEON-NOSVE-LABEL: eorv_v2i64:895; NONEON-NOSVE: // %bb.0:896; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!897; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16898; NONEON-NOSVE-NEXT: ldp x9, x8, [sp], #16899; NONEON-NOSVE-NEXT: eor x0, x9, x8900; NONEON-NOSVE-NEXT: ret901 %res = call i64 @llvm.vector.reduce.xor.v2i64(<2 x i64> %a)902 ret i64 %res903}904 905define i64 @eorv_v4i64(ptr %a) {906; CHECK-LABEL: eorv_v4i64:907; CHECK: // %bb.0:908; CHECK-NEXT: ldp q1, q0, [x0]909; CHECK-NEXT: ptrue p0.d, vl2910; CHECK-NEXT: eor z0.d, z1.d, z0.d911; CHECK-NEXT: eorv d0, p0, z0.d912; CHECK-NEXT: fmov x0, d0913; CHECK-NEXT: ret914;915; NONEON-NOSVE-LABEL: eorv_v4i64:916; NONEON-NOSVE: // %bb.0:917; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]918; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!919; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32920; NONEON-NOSVE-NEXT: ldp x9, x8, [sp, #16]921; NONEON-NOSVE-NEXT: ldp x11, x10, [sp], #32922; NONEON-NOSVE-NEXT: eor x8, x10, x8923; NONEON-NOSVE-NEXT: eor x9, x11, x9924; NONEON-NOSVE-NEXT: eor x0, x9, x8925; NONEON-NOSVE-NEXT: ret926 %op = load <4 x i64>, ptr %a927 %res = call i64 @llvm.vector.reduce.xor.v4i64(<4 x i64> %op)928 ret i64 %res929}930 931;932; ORV933;934 935define i8 @orv_v4i8(<4 x i8> %a) {936; CHECK-LABEL: orv_v4i8:937; CHECK: // %bb.0:938; CHECK-NEXT: ptrue p0.h, vl4939; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0940; CHECK-NEXT: orv h0, p0, z0.h941; CHECK-NEXT: fmov w0, s0942; CHECK-NEXT: ret943;944; NONEON-NOSVE-LABEL: orv_v4i8:945; NONEON-NOSVE: // %bb.0:946; NONEON-NOSVE-NEXT: sub sp, sp, #16947; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16948; NONEON-NOSVE-NEXT: str d0, [sp, #8]949; NONEON-NOSVE-NEXT: ldrh w8, [sp, #14]950; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]951; NONEON-NOSVE-NEXT: ldrh w10, [sp, #10]952; NONEON-NOSVE-NEXT: ldrh w11, [sp, #8]953; NONEON-NOSVE-NEXT: orr w8, w9, w8954; NONEON-NOSVE-NEXT: orr w10, w11, w10955; NONEON-NOSVE-NEXT: orr w0, w10, w8956; NONEON-NOSVE-NEXT: add sp, sp, #16957; NONEON-NOSVE-NEXT: ret958 %res = call i8 @llvm.vector.reduce.or.v4i8(<4 x i8> %a)959 ret i8 %res960}961 962define i8 @orv_v8i8(<8 x i8> %a) {963; CHECK-LABEL: orv_v8i8:964; CHECK: // %bb.0:965; CHECK-NEXT: ptrue p0.b, vl8966; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0967; CHECK-NEXT: orv b0, p0, z0.b968; CHECK-NEXT: fmov w0, s0969; CHECK-NEXT: ret970;971; NONEON-NOSVE-LABEL: orv_v8i8:972; NONEON-NOSVE: // %bb.0:973; NONEON-NOSVE-NEXT: sub sp, sp, #16974; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16975; NONEON-NOSVE-NEXT: str d0, [sp, #8]976; NONEON-NOSVE-NEXT: ldrb w8, [sp, #13]977; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12]978; NONEON-NOSVE-NEXT: ldrb w10, [sp, #11]979; NONEON-NOSVE-NEXT: ldrb w11, [sp, #10]980; NONEON-NOSVE-NEXT: ldrb w12, [sp, #9]981; NONEON-NOSVE-NEXT: ldrb w13, [sp, #8]982; NONEON-NOSVE-NEXT: ldrb w14, [sp, #14]983; NONEON-NOSVE-NEXT: orr w8, w9, w8984; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]985; NONEON-NOSVE-NEXT: orr w12, w13, w12986; NONEON-NOSVE-NEXT: orr w10, w11, w10987; NONEON-NOSVE-NEXT: orr w10, w12, w10988; NONEON-NOSVE-NEXT: orr w8, w8, w14989; NONEON-NOSVE-NEXT: orr w8, w10, w8990; NONEON-NOSVE-NEXT: orr w0, w8, w9991; NONEON-NOSVE-NEXT: add sp, sp, #16992; NONEON-NOSVE-NEXT: ret993 %res = call i8 @llvm.vector.reduce.or.v8i8(<8 x i8> %a)994 ret i8 %res995}996 997define i8 @orv_v16i8(<16 x i8> %a) {998; CHECK-LABEL: orv_v16i8:999; CHECK: // %bb.0:1000; CHECK-NEXT: ptrue p0.b, vl161001; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01002; CHECK-NEXT: orv b0, p0, z0.b1003; CHECK-NEXT: fmov w0, s01004; CHECK-NEXT: ret1005;1006; NONEON-NOSVE-LABEL: orv_v16i8:1007; NONEON-NOSVE: // %bb.0:1008; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!1009; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161010; NONEON-NOSVE-NEXT: ldrb w9, [sp, #5]1011; NONEON-NOSVE-NEXT: ldrb w10, [sp, #1]1012; NONEON-NOSVE-NEXT: ldrb w11, [sp]1013; NONEON-NOSVE-NEXT: ldrb w12, [sp, #4]1014; NONEON-NOSVE-NEXT: ldrb w13, [sp, #3]1015; NONEON-NOSVE-NEXT: ldrb w14, [sp, #2]1016; NONEON-NOSVE-NEXT: orr w10, w11, w101017; NONEON-NOSVE-NEXT: ldrb w8, [sp, #12]1018; NONEON-NOSVE-NEXT: ldrb w15, [sp, #8]1019; NONEON-NOSVE-NEXT: orr w11, w14, w131020; NONEON-NOSVE-NEXT: orr w9, w12, w91021; NONEON-NOSVE-NEXT: ldrb w16, [sp, #6]1022; NONEON-NOSVE-NEXT: ldrb w12, [sp, #7]1023; NONEON-NOSVE-NEXT: orr w10, w10, w111024; NONEON-NOSVE-NEXT: ldrb w13, [sp, #11]1025; NONEON-NOSVE-NEXT: ldrb w11, [sp, #13]1026; NONEON-NOSVE-NEXT: orr w9, w9, w161027; NONEON-NOSVE-NEXT: ldrb w14, [sp, #9]1028; NONEON-NOSVE-NEXT: orr w12, w12, w151029; NONEON-NOSVE-NEXT: ldrb w15, [sp, #14]1030; NONEON-NOSVE-NEXT: orr w8, w13, w81031; NONEON-NOSVE-NEXT: ldrb w16, [sp, #10]1032; NONEON-NOSVE-NEXT: ldrb w13, [sp, #15]1033; NONEON-NOSVE-NEXT: orr w12, w12, w141034; NONEON-NOSVE-NEXT: orr w8, w8, w111035; NONEON-NOSVE-NEXT: orr w9, w10, w91036; NONEON-NOSVE-NEXT: orr w10, w12, w161037; NONEON-NOSVE-NEXT: orr w8, w8, w151038; NONEON-NOSVE-NEXT: orr w9, w9, w101039; NONEON-NOSVE-NEXT: orr w8, w8, w131040; NONEON-NOSVE-NEXT: orr w0, w9, w81041; NONEON-NOSVE-NEXT: add sp, sp, #161042; NONEON-NOSVE-NEXT: ret1043 %res = call i8 @llvm.vector.reduce.or.v16i8(<16 x i8> %a)1044 ret i8 %res1045}1046 1047define i8 @orv_v32i8(ptr %a) {1048; CHECK-LABEL: orv_v32i8:1049; CHECK: // %bb.0:1050; CHECK-NEXT: ldp q1, q0, [x0]1051; CHECK-NEXT: ptrue p0.b, vl161052; CHECK-NEXT: orr z0.d, z1.d, z0.d1053; CHECK-NEXT: orv b0, p0, z0.b1054; CHECK-NEXT: fmov w0, s01055; CHECK-NEXT: ret1056;1057; NONEON-NOSVE-LABEL: orv_v32i8:1058; NONEON-NOSVE: // %bb.0:1059; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1060; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1061; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321062; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]1063; NONEON-NOSVE-NEXT: ldrb w9, [sp, #1]1064; NONEON-NOSVE-NEXT: ldrb w10, [sp, #16]1065; NONEON-NOSVE-NEXT: ldrb w11, [sp]1066; NONEON-NOSVE-NEXT: ldrb w12, [sp, #18]1067; NONEON-NOSVE-NEXT: ldrb w13, [sp, #2]1068; NONEON-NOSVE-NEXT: orr w8, w9, w81069; NONEON-NOSVE-NEXT: ldrb w14, [sp, #19]1070; NONEON-NOSVE-NEXT: ldrb w15, [sp, #3]1071; NONEON-NOSVE-NEXT: orr w9, w11, w101072; NONEON-NOSVE-NEXT: orr w10, w13, w121073; NONEON-NOSVE-NEXT: ldrb w12, [sp, #21]1074; NONEON-NOSVE-NEXT: ldrb w13, [sp, #5]1075; NONEON-NOSVE-NEXT: orr w11, w15, w141076; NONEON-NOSVE-NEXT: orr w8, w9, w81077; NONEON-NOSVE-NEXT: ldrb w16, [sp, #20]1078; NONEON-NOSVE-NEXT: ldrb w17, [sp, #4]1079; NONEON-NOSVE-NEXT: orr w9, w10, w111080; NONEON-NOSVE-NEXT: orr w10, w13, w121081; NONEON-NOSVE-NEXT: ldrb w11, [sp, #22]1082; NONEON-NOSVE-NEXT: ldrb w12, [sp, #6]1083; NONEON-NOSVE-NEXT: orr w14, w17, w161084; NONEON-NOSVE-NEXT: ldrb w13, [sp, #23]1085; NONEON-NOSVE-NEXT: ldrb w15, [sp, #8]1086; NONEON-NOSVE-NEXT: orr w10, w14, w101087; NONEON-NOSVE-NEXT: ldrb w14, [sp, #7]1088; NONEON-NOSVE-NEXT: orr w11, w12, w111089; NONEON-NOSVE-NEXT: ldrb w12, [sp, #24]1090; NONEON-NOSVE-NEXT: orr w8, w8, w91091; NONEON-NOSVE-NEXT: orr w9, w10, w111092; NONEON-NOSVE-NEXT: orr w10, w14, w131093; NONEON-NOSVE-NEXT: ldrb w13, [sp, #9]1094; NONEON-NOSVE-NEXT: orr w8, w8, w91095; NONEON-NOSVE-NEXT: orr w11, w15, w121096; NONEON-NOSVE-NEXT: ldrb w12, [sp, #25]1097; NONEON-NOSVE-NEXT: ldrb w14, [sp, #26]1098; NONEON-NOSVE-NEXT: orr w9, w10, w111099; NONEON-NOSVE-NEXT: ldrb w11, [sp, #27]1100; NONEON-NOSVE-NEXT: ldrb w15, [sp, #10]1101; NONEON-NOSVE-NEXT: orr w10, w13, w121102; NONEON-NOSVE-NEXT: ldrb w12, [sp, #11]1103; NONEON-NOSVE-NEXT: ldrb w13, [sp, #12]1104; NONEON-NOSVE-NEXT: orr w9, w9, w101105; NONEON-NOSVE-NEXT: ldrb w10, [sp, #28]1106; NONEON-NOSVE-NEXT: ldrb w16, [sp, #14]1107; NONEON-NOSVE-NEXT: orr w11, w12, w111108; NONEON-NOSVE-NEXT: ldrb w12, [sp, #29]1109; NONEON-NOSVE-NEXT: ldrb w17, [sp, #15]1110; NONEON-NOSVE-NEXT: orr w10, w13, w101111; NONEON-NOSVE-NEXT: ldrb w13, [sp, #13]1112; NONEON-NOSVE-NEXT: orr w14, w15, w141113; NONEON-NOSVE-NEXT: orr w10, w11, w101114; NONEON-NOSVE-NEXT: ldrb w11, [sp, #30]1115; NONEON-NOSVE-NEXT: orr w9, w9, w141116; NONEON-NOSVE-NEXT: orr w12, w13, w121117; NONEON-NOSVE-NEXT: ldrb w13, [sp, #31]1118; NONEON-NOSVE-NEXT: orr w8, w8, w91119; NONEON-NOSVE-NEXT: orr w10, w10, w121120; NONEON-NOSVE-NEXT: orr w11, w16, w111121; NONEON-NOSVE-NEXT: orr w10, w10, w111122; NONEON-NOSVE-NEXT: orr w11, w17, w131123; NONEON-NOSVE-NEXT: orr w9, w10, w111124; NONEON-NOSVE-NEXT: orr w0, w8, w91125; NONEON-NOSVE-NEXT: add sp, sp, #321126; NONEON-NOSVE-NEXT: ret1127 %op = load <32 x i8>, ptr %a1128 %res = call i8 @llvm.vector.reduce.or.v32i8(<32 x i8> %op)1129 ret i8 %res1130}1131 1132define i16 @orv_v2i16(<2 x i16> %a) {1133; CHECK-LABEL: orv_v2i16:1134; CHECK: // %bb.0:1135; CHECK-NEXT: ptrue p0.s, vl21136; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01137; CHECK-NEXT: orv s0, p0, z0.s1138; CHECK-NEXT: fmov w0, s01139; CHECK-NEXT: ret1140;1141; NONEON-NOSVE-LABEL: orv_v2i16:1142; NONEON-NOSVE: // %bb.0:1143; NONEON-NOSVE-NEXT: sub sp, sp, #161144; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161145; NONEON-NOSVE-NEXT: str d0, [sp, #8]1146; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]1147; NONEON-NOSVE-NEXT: orr w0, w9, w81148; NONEON-NOSVE-NEXT: add sp, sp, #161149; NONEON-NOSVE-NEXT: ret1150 %res = call i16 @llvm.vector.reduce.or.v2i16(<2 x i16> %a)1151 ret i16 %res1152}1153 1154define i16 @orv_v4i16(<4 x i16> %a) {1155; CHECK-LABEL: orv_v4i16:1156; CHECK: // %bb.0:1157; CHECK-NEXT: ptrue p0.h, vl41158; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01159; CHECK-NEXT: orv h0, p0, z0.h1160; CHECK-NEXT: fmov w0, s01161; CHECK-NEXT: ret1162;1163; NONEON-NOSVE-LABEL: orv_v4i16:1164; NONEON-NOSVE: // %bb.0:1165; NONEON-NOSVE-NEXT: sub sp, sp, #161166; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161167; NONEON-NOSVE-NEXT: str d0, [sp, #8]1168; NONEON-NOSVE-NEXT: ldrh w8, [sp, #14]1169; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]1170; NONEON-NOSVE-NEXT: ldrh w10, [sp, #10]1171; NONEON-NOSVE-NEXT: ldrh w11, [sp, #8]1172; NONEON-NOSVE-NEXT: orr w8, w9, w81173; NONEON-NOSVE-NEXT: orr w10, w11, w101174; NONEON-NOSVE-NEXT: orr w0, w10, w81175; NONEON-NOSVE-NEXT: add sp, sp, #161176; NONEON-NOSVE-NEXT: ret1177 %res = call i16 @llvm.vector.reduce.or.v4i16(<4 x i16> %a)1178 ret i16 %res1179}1180 1181define i16 @orv_v8i16(<8 x i16> %a) {1182; CHECK-LABEL: orv_v8i16:1183; CHECK: // %bb.0:1184; CHECK-NEXT: ptrue p0.h, vl81185; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01186; CHECK-NEXT: orv h0, p0, z0.h1187; CHECK-NEXT: fmov w0, s01188; CHECK-NEXT: ret1189;1190; NONEON-NOSVE-LABEL: orv_v8i16:1191; NONEON-NOSVE: // %bb.0:1192; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!1193; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161194; NONEON-NOSVE-NEXT: ldrh w8, [sp, #10]1195; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]1196; NONEON-NOSVE-NEXT: ldrh w10, [sp, #6]1197; NONEON-NOSVE-NEXT: ldrh w11, [sp, #4]1198; NONEON-NOSVE-NEXT: ldrh w12, [sp, #2]1199; NONEON-NOSVE-NEXT: ldrh w13, [sp]1200; NONEON-NOSVE-NEXT: orr w8, w9, w81201; NONEON-NOSVE-NEXT: ldrh w14, [sp, #12]1202; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]1203; NONEON-NOSVE-NEXT: orr w12, w13, w121204; NONEON-NOSVE-NEXT: orr w10, w11, w101205; NONEON-NOSVE-NEXT: orr w10, w12, w101206; NONEON-NOSVE-NEXT: orr w8, w8, w141207; NONEON-NOSVE-NEXT: orr w8, w10, w81208; NONEON-NOSVE-NEXT: orr w0, w8, w91209; NONEON-NOSVE-NEXT: add sp, sp, #161210; NONEON-NOSVE-NEXT: ret1211 %res = call i16 @llvm.vector.reduce.or.v8i16(<8 x i16> %a)1212 ret i16 %res1213}1214 1215define i16 @orv_v16i16(ptr %a) {1216; CHECK-LABEL: orv_v16i16:1217; CHECK: // %bb.0:1218; CHECK-NEXT: ldp q1, q0, [x0]1219; CHECK-NEXT: ptrue p0.h, vl81220; CHECK-NEXT: orr z0.d, z1.d, z0.d1221; CHECK-NEXT: orv h0, p0, z0.h1222; CHECK-NEXT: fmov w0, s01223; CHECK-NEXT: ret1224;1225; NONEON-NOSVE-LABEL: orv_v16i16:1226; NONEON-NOSVE: // %bb.0:1227; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1228; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1229; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321230; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]1231; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2]1232; NONEON-NOSVE-NEXT: ldrh w10, [sp, #16]1233; NONEON-NOSVE-NEXT: ldrh w11, [sp]1234; NONEON-NOSVE-NEXT: ldrh w12, [sp, #20]1235; NONEON-NOSVE-NEXT: ldrh w13, [sp, #4]1236; NONEON-NOSVE-NEXT: orr w8, w9, w81237; NONEON-NOSVE-NEXT: ldrh w14, [sp, #22]1238; NONEON-NOSVE-NEXT: ldrh w15, [sp, #6]1239; NONEON-NOSVE-NEXT: orr w9, w11, w101240; NONEON-NOSVE-NEXT: orr w12, w13, w121241; NONEON-NOSVE-NEXT: ldrh w10, [sp, #26]1242; NONEON-NOSVE-NEXT: ldrh w11, [sp, #10]1243; NONEON-NOSVE-NEXT: orr w13, w15, w141244; NONEON-NOSVE-NEXT: orr w8, w9, w81245; NONEON-NOSVE-NEXT: ldrh w16, [sp, #24]1246; NONEON-NOSVE-NEXT: ldrh w17, [sp, #8]1247; NONEON-NOSVE-NEXT: orr w9, w12, w131248; NONEON-NOSVE-NEXT: orr w10, w11, w101249; NONEON-NOSVE-NEXT: ldrh w11, [sp, #28]1250; NONEON-NOSVE-NEXT: ldrh w15, [sp, #12]1251; NONEON-NOSVE-NEXT: orr w14, w17, w161252; NONEON-NOSVE-NEXT: ldrh w12, [sp, #30]1253; NONEON-NOSVE-NEXT: ldrh w13, [sp, #14]1254; NONEON-NOSVE-NEXT: orr w10, w14, w101255; NONEON-NOSVE-NEXT: orr w11, w15, w111256; NONEON-NOSVE-NEXT: orr w8, w8, w91257; NONEON-NOSVE-NEXT: orr w9, w10, w111258; NONEON-NOSVE-NEXT: orr w8, w8, w91259; NONEON-NOSVE-NEXT: orr w9, w13, w121260; NONEON-NOSVE-NEXT: orr w0, w8, w91261; NONEON-NOSVE-NEXT: add sp, sp, #321262; NONEON-NOSVE-NEXT: ret1263 %op = load <16 x i16>, ptr %a1264 %res = call i16 @llvm.vector.reduce.or.v16i16(<16 x i16> %op)1265 ret i16 %res1266}1267 1268define i32 @orv_v2i32(<2 x i32> %a) {1269; CHECK-LABEL: orv_v2i32:1270; CHECK: // %bb.0:1271; CHECK-NEXT: ptrue p0.s, vl21272; CHECK-NEXT: // kill: def $d0 killed $d0 def $z01273; CHECK-NEXT: orv s0, p0, z0.s1274; CHECK-NEXT: fmov w0, s01275; CHECK-NEXT: ret1276;1277; NONEON-NOSVE-LABEL: orv_v2i32:1278; NONEON-NOSVE: // %bb.0:1279; NONEON-NOSVE-NEXT: sub sp, sp, #161280; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161281; NONEON-NOSVE-NEXT: str d0, [sp, #8]1282; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]1283; NONEON-NOSVE-NEXT: orr w0, w9, w81284; NONEON-NOSVE-NEXT: add sp, sp, #161285; NONEON-NOSVE-NEXT: ret1286 %res = call i32 @llvm.vector.reduce.or.v2i32(<2 x i32> %a)1287 ret i32 %res1288}1289 1290define i32 @orv_v4i32(<4 x i32> %a) {1291; CHECK-LABEL: orv_v4i32:1292; CHECK: // %bb.0:1293; CHECK-NEXT: ptrue p0.s, vl41294; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01295; CHECK-NEXT: orv s0, p0, z0.s1296; CHECK-NEXT: fmov w0, s01297; CHECK-NEXT: ret1298;1299; NONEON-NOSVE-LABEL: orv_v4i32:1300; NONEON-NOSVE: // %bb.0:1301; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!1302; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161303; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8]1304; NONEON-NOSVE-NEXT: ldp w11, w10, [sp], #161305; NONEON-NOSVE-NEXT: orr w10, w11, w101306; NONEON-NOSVE-NEXT: orr w8, w9, w81307; NONEON-NOSVE-NEXT: orr w0, w10, w81308; NONEON-NOSVE-NEXT: ret1309 %res = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %a)1310 ret i32 %res1311}1312 1313define i32 @orv_v8i32(ptr %a) {1314; CHECK-LABEL: orv_v8i32:1315; CHECK: // %bb.0:1316; CHECK-NEXT: ldp q1, q0, [x0]1317; CHECK-NEXT: ptrue p0.s, vl41318; CHECK-NEXT: orr z0.d, z1.d, z0.d1319; CHECK-NEXT: orv s0, p0, z0.s1320; CHECK-NEXT: fmov w0, s01321; CHECK-NEXT: ret1322;1323; NONEON-NOSVE-LABEL: orv_v8i32:1324; NONEON-NOSVE: // %bb.0:1325; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1326; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1327; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321328; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #16]1329; NONEON-NOSVE-NEXT: ldp w11, w10, [sp]1330; NONEON-NOSVE-NEXT: ldp w12, w13, [sp, #24]1331; NONEON-NOSVE-NEXT: ldp w14, w15, [sp, #8]1332; NONEON-NOSVE-NEXT: orr w8, w10, w81333; NONEON-NOSVE-NEXT: orr w9, w11, w91334; NONEON-NOSVE-NEXT: orr w8, w9, w81335; NONEON-NOSVE-NEXT: orr w10, w14, w121336; NONEON-NOSVE-NEXT: orr w11, w15, w131337; NONEON-NOSVE-NEXT: orr w9, w10, w111338; NONEON-NOSVE-NEXT: orr w0, w8, w91339; NONEON-NOSVE-NEXT: add sp, sp, #321340; NONEON-NOSVE-NEXT: ret1341 %op = load <8 x i32>, ptr %a1342 %res = call i32 @llvm.vector.reduce.or.v8i32(<8 x i32> %op)1343 ret i32 %res1344}1345 1346define i64 @orv_v2i64(<2 x i64> %a) {1347; CHECK-LABEL: orv_v2i64:1348; CHECK: // %bb.0:1349; CHECK-NEXT: ptrue p0.d, vl21350; CHECK-NEXT: // kill: def $q0 killed $q0 def $z01351; CHECK-NEXT: orv d0, p0, z0.d1352; CHECK-NEXT: fmov x0, d01353; CHECK-NEXT: ret1354;1355; NONEON-NOSVE-LABEL: orv_v2i64:1356; NONEON-NOSVE: // %bb.0:1357; NONEON-NOSVE-NEXT: str q0, [sp, #-16]!1358; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 161359; NONEON-NOSVE-NEXT: ldp x9, x8, [sp], #161360; NONEON-NOSVE-NEXT: orr x0, x9, x81361; NONEON-NOSVE-NEXT: ret1362 %res = call i64 @llvm.vector.reduce.or.v2i64(<2 x i64> %a)1363 ret i64 %res1364}1365 1366define i64 @orv_v4i64(ptr %a) {1367; CHECK-LABEL: orv_v4i64:1368; CHECK: // %bb.0:1369; CHECK-NEXT: ldp q1, q0, [x0]1370; CHECK-NEXT: ptrue p0.d, vl21371; CHECK-NEXT: orr z0.d, z1.d, z0.d1372; CHECK-NEXT: orv d0, p0, z0.d1373; CHECK-NEXT: fmov x0, d01374; CHECK-NEXT: ret1375;1376; NONEON-NOSVE-LABEL: orv_v4i64:1377; NONEON-NOSVE: // %bb.0:1378; NONEON-NOSVE-NEXT: ldp q1, q0, [x0]1379; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-32]!1380; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 321381; NONEON-NOSVE-NEXT: ldp x9, x8, [sp, #16]1382; NONEON-NOSVE-NEXT: ldp x11, x10, [sp], #321383; NONEON-NOSVE-NEXT: orr x8, x10, x81384; NONEON-NOSVE-NEXT: orr x9, x11, x91385; NONEON-NOSVE-NEXT: orr x0, x9, x81386; NONEON-NOSVE-NEXT: ret1387 %op = load <4 x i64>, ptr %a1388 %res = call i64 @llvm.vector.reduce.or.v4i64(<4 x i64> %op)1389 ret i64 %res1390}1391 1392declare i8 @llvm.vector.reduce.and.v4i8(<4 x i8>)1393declare i8 @llvm.vector.reduce.and.v8i8(<8 x i8>)1394declare i8 @llvm.vector.reduce.and.v16i8(<16 x i8>)1395declare i8 @llvm.vector.reduce.and.v32i8(<32 x i8>)1396 1397declare i16 @llvm.vector.reduce.and.v2i16(<2 x i16>)1398declare i16 @llvm.vector.reduce.and.v4i16(<4 x i16>)1399declare i16 @llvm.vector.reduce.and.v8i16(<8 x i16>)1400declare i16 @llvm.vector.reduce.and.v16i16(<16 x i16>)1401 1402declare i32 @llvm.vector.reduce.and.v2i32(<2 x i32>)1403declare i32 @llvm.vector.reduce.and.v4i32(<4 x i32>)1404declare i32 @llvm.vector.reduce.and.v8i32(<8 x i32>)1405 1406declare i64 @llvm.vector.reduce.and.v2i64(<2 x i64>)1407declare i64 @llvm.vector.reduce.and.v4i64(<4 x i64>)1408 1409declare i8 @llvm.vector.reduce.or.v4i8(<4 x i8>)1410declare i8 @llvm.vector.reduce.or.v8i8(<8 x i8>)1411declare i8 @llvm.vector.reduce.or.v16i8(<16 x i8>)1412declare i8 @llvm.vector.reduce.or.v32i8(<32 x i8>)1413 1414declare i16 @llvm.vector.reduce.or.v2i16(<2 x i16>)1415declare i16 @llvm.vector.reduce.or.v4i16(<4 x i16>)1416declare i16 @llvm.vector.reduce.or.v8i16(<8 x i16>)1417declare i16 @llvm.vector.reduce.or.v16i16(<16 x i16>)1418 1419declare i32 @llvm.vector.reduce.or.v2i32(<2 x i32>)1420declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>)1421declare i32 @llvm.vector.reduce.or.v8i32(<8 x i32>)1422 1423declare i64 @llvm.vector.reduce.or.v2i64(<2 x i64>)1424declare i64 @llvm.vector.reduce.or.v4i64(<4 x i64>)1425 1426declare i8 @llvm.vector.reduce.xor.v4i8(<4 x i8>)1427declare i8 @llvm.vector.reduce.xor.v8i8(<8 x i8>)1428declare i8 @llvm.vector.reduce.xor.v16i8(<16 x i8>)1429declare i8 @llvm.vector.reduce.xor.v32i8(<32 x i8>)1430 1431declare i16 @llvm.vector.reduce.xor.v2i16(<2 x i16>)1432declare i16 @llvm.vector.reduce.xor.v4i16(<4 x i16>)1433declare i16 @llvm.vector.reduce.xor.v8i16(<8 x i16>)1434declare i16 @llvm.vector.reduce.xor.v16i16(<16 x i16>)1435 1436declare i32 @llvm.vector.reduce.xor.v2i32(<2 x i32>)1437declare i32 @llvm.vector.reduce.xor.v4i32(<4 x i32>)1438declare i32 @llvm.vector.reduce.xor.v8i32(<8 x i32>)1439 1440declare i64 @llvm.vector.reduce.xor.v2i64(<2 x i64>)1441declare i64 @llvm.vector.reduce.xor.v4i64(<4 x i64>)1442