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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mattr=+sve -force-streaming-compatible < %s | FileCheck %s3; RUN: llc -mattr=+sme -force-streaming < %s | FileCheck %s4; RUN: llc -force-streaming-compatible < %s | FileCheck %s --check-prefix=NONEON-NOSVE5 6 7target triple = "aarch64-unknown-linux-gnu"8 9define void @store_v4i8(ptr %a) {10; CHECK-LABEL: store_v4i8:11; CHECK: // %bb.0:12; CHECK-NEXT: mov z0.h, #0 // =0x013; CHECK-NEXT: ptrue p0.h, vl414; CHECK-NEXT: st1b { z0.h }, p0, [x0]15; CHECK-NEXT: ret16;17; NONEON-NOSVE-LABEL: store_v4i8:18; NONEON-NOSVE: // %bb.0:19; NONEON-NOSVE-NEXT: str wzr, [x0]20; NONEON-NOSVE-NEXT: ret21 store <4 x i8> zeroinitializer, ptr %a22 ret void23}24 25define void @store_v8i8(ptr %a) {26; CHECK-LABEL: store_v8i8:27; CHECK: // %bb.0:28; CHECK-NEXT: mov z0.b, #0 // =0x029; CHECK-NEXT: str d0, [x0]30; CHECK-NEXT: ret31;32; NONEON-NOSVE-LABEL: store_v8i8:33; NONEON-NOSVE: // %bb.0:34; NONEON-NOSVE-NEXT: adrp x8, .LCPI1_035; NONEON-NOSVE-NEXT: ldr d0, [x8, :lo12:.LCPI1_0]36; NONEON-NOSVE-NEXT: str d0, [x0]37; NONEON-NOSVE-NEXT: ret38 store <8 x i8> zeroinitializer, ptr %a39 ret void40}41 42define void @store_v16i8(ptr %a) {43; CHECK-LABEL: store_v16i8:44; CHECK: // %bb.0:45; CHECK-NEXT: mov z0.b, #0 // =0x046; CHECK-NEXT: str q0, [x0]47; CHECK-NEXT: ret48;49; NONEON-NOSVE-LABEL: store_v16i8:50; NONEON-NOSVE: // %bb.0:51; NONEON-NOSVE-NEXT: adrp x8, .LCPI2_052; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI2_0]53; NONEON-NOSVE-NEXT: str q0, [x0]54; NONEON-NOSVE-NEXT: ret55 store <16 x i8> zeroinitializer, ptr %a56 ret void57}58 59define void @store_v32i8(ptr %a) {60; CHECK-LABEL: store_v32i8:61; CHECK: // %bb.0:62; CHECK-NEXT: mov z0.b, #0 // =0x063; CHECK-NEXT: stp q0, q0, [x0]64; CHECK-NEXT: ret65;66; NONEON-NOSVE-LABEL: store_v32i8:67; NONEON-NOSVE: // %bb.0:68; NONEON-NOSVE-NEXT: adrp x8, .LCPI3_069; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI3_0]70; NONEON-NOSVE-NEXT: stp q0, q0, [x0]71; NONEON-NOSVE-NEXT: ret72 store <32 x i8> zeroinitializer, ptr %a73 ret void74}75 76define void @store_v2i16(ptr %a) {77; CHECK-LABEL: store_v2i16:78; CHECK: // %bb.0:79; CHECK-NEXT: mov z0.s, #0 // =0x080; CHECK-NEXT: ptrue p0.s, vl281; CHECK-NEXT: st1h { z0.s }, p0, [x0]82; CHECK-NEXT: ret83;84; NONEON-NOSVE-LABEL: store_v2i16:85; NONEON-NOSVE: // %bb.0:86; NONEON-NOSVE-NEXT: str wzr, [x0]87; NONEON-NOSVE-NEXT: ret88 store <2 x i16> zeroinitializer, ptr %a89 ret void90}91 92define void @store_v2f16(ptr %a) {93; CHECK-LABEL: store_v2f16:94; CHECK: // %bb.0:95; CHECK-NEXT: mov z0.h, #0 // =0x096; CHECK-NEXT: str s0, [x0]97; CHECK-NEXT: ret98;99; NONEON-NOSVE-LABEL: store_v2f16:100; NONEON-NOSVE: // %bb.0:101; NONEON-NOSVE-NEXT: sub sp, sp, #16102; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16103; NONEON-NOSVE-NEXT: adrp x8, .LCPI5_0104; NONEON-NOSVE-NEXT: ldr d0, [x8, :lo12:.LCPI5_0]105; NONEON-NOSVE-NEXT: str d0, [sp, #8]106; NONEON-NOSVE-NEXT: ldr w8, [sp, #8]107; NONEON-NOSVE-NEXT: str w8, [x0]108; NONEON-NOSVE-NEXT: add sp, sp, #16109; NONEON-NOSVE-NEXT: ret110 store <2 x half> zeroinitializer, ptr %a111 ret void112}113 114define void @store_v4i16(ptr %a) {115; CHECK-LABEL: store_v4i16:116; CHECK: // %bb.0:117; CHECK-NEXT: mov z0.h, #0 // =0x0118; CHECK-NEXT: str d0, [x0]119; CHECK-NEXT: ret120;121; NONEON-NOSVE-LABEL: store_v4i16:122; NONEON-NOSVE: // %bb.0:123; NONEON-NOSVE-NEXT: adrp x8, .LCPI6_0124; NONEON-NOSVE-NEXT: ldr d0, [x8, :lo12:.LCPI6_0]125; NONEON-NOSVE-NEXT: str d0, [x0]126; NONEON-NOSVE-NEXT: ret127 store <4 x i16> zeroinitializer, ptr %a128 ret void129}130 131define void @store_v4f16(ptr %a) {132; CHECK-LABEL: store_v4f16:133; CHECK: // %bb.0:134; CHECK-NEXT: mov z0.h, #0 // =0x0135; CHECK-NEXT: str d0, [x0]136; CHECK-NEXT: ret137;138; NONEON-NOSVE-LABEL: store_v4f16:139; NONEON-NOSVE: // %bb.0:140; NONEON-NOSVE-NEXT: adrp x8, .LCPI7_0141; NONEON-NOSVE-NEXT: ldr d0, [x8, :lo12:.LCPI7_0]142; NONEON-NOSVE-NEXT: str d0, [x0]143; NONEON-NOSVE-NEXT: ret144 store <4 x half> zeroinitializer, ptr %a145 ret void146}147 148define void @store_v8i16(ptr %a) {149; CHECK-LABEL: store_v8i16:150; CHECK: // %bb.0:151; CHECK-NEXT: mov z0.h, #0 // =0x0152; CHECK-NEXT: str q0, [x0]153; CHECK-NEXT: ret154;155; NONEON-NOSVE-LABEL: store_v8i16:156; NONEON-NOSVE: // %bb.0:157; NONEON-NOSVE-NEXT: adrp x8, .LCPI8_0158; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI8_0]159; NONEON-NOSVE-NEXT: str q0, [x0]160; NONEON-NOSVE-NEXT: ret161 store <8 x i16> zeroinitializer, ptr %a162 ret void163}164 165define void @store_v8f16(ptr %a) {166; CHECK-LABEL: store_v8f16:167; CHECK: // %bb.0:168; CHECK-NEXT: mov z0.h, #0 // =0x0169; CHECK-NEXT: str q0, [x0]170; CHECK-NEXT: ret171;172; NONEON-NOSVE-LABEL: store_v8f16:173; NONEON-NOSVE: // %bb.0:174; NONEON-NOSVE-NEXT: adrp x8, .LCPI9_0175; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI9_0]176; NONEON-NOSVE-NEXT: str q0, [x0]177; NONEON-NOSVE-NEXT: ret178 store <8 x half> zeroinitializer, ptr %a179 ret void180}181 182define void @store_v16i16(ptr %a) {183; CHECK-LABEL: store_v16i16:184; CHECK: // %bb.0:185; CHECK-NEXT: mov z0.h, #0 // =0x0186; CHECK-NEXT: stp q0, q0, [x0]187; CHECK-NEXT: ret188;189; NONEON-NOSVE-LABEL: store_v16i16:190; NONEON-NOSVE: // %bb.0:191; NONEON-NOSVE-NEXT: adrp x8, .LCPI10_0192; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI10_0]193; NONEON-NOSVE-NEXT: stp q0, q0, [x0]194; NONEON-NOSVE-NEXT: ret195 store <16 x i16> zeroinitializer, ptr %a196 ret void197}198 199define void @store_v16f16(ptr %a) {200; CHECK-LABEL: store_v16f16:201; CHECK: // %bb.0:202; CHECK-NEXT: mov z0.h, #0 // =0x0203; CHECK-NEXT: stp q0, q0, [x0]204; CHECK-NEXT: ret205;206; NONEON-NOSVE-LABEL: store_v16f16:207; NONEON-NOSVE: // %bb.0:208; NONEON-NOSVE-NEXT: adrp x8, .LCPI11_0209; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI11_0]210; NONEON-NOSVE-NEXT: stp q0, q0, [x0]211; NONEON-NOSVE-NEXT: ret212 store <16 x half> zeroinitializer, ptr %a213 ret void214}215 216define void @store_v2i32(ptr %a) {217; CHECK-LABEL: store_v2i32:218; CHECK: // %bb.0:219; CHECK-NEXT: str xzr, [x0]220; CHECK-NEXT: ret221;222; NONEON-NOSVE-LABEL: store_v2i32:223; NONEON-NOSVE: // %bb.0:224; NONEON-NOSVE-NEXT: str xzr, [x0]225; NONEON-NOSVE-NEXT: ret226 store <2 x i32> zeroinitializer, ptr %a227 ret void228}229 230define void @store_v2f32(ptr %a) {231; CHECK-LABEL: store_v2f32:232; CHECK: // %bb.0:233; CHECK-NEXT: str xzr, [x0]234; CHECK-NEXT: ret235;236; NONEON-NOSVE-LABEL: store_v2f32:237; NONEON-NOSVE: // %bb.0:238; NONEON-NOSVE-NEXT: str xzr, [x0]239; NONEON-NOSVE-NEXT: ret240 store <2 x float> zeroinitializer, ptr %a241 ret void242}243 244define void @store_v4i32(ptr %a) {245; CHECK-LABEL: store_v4i32:246; CHECK: // %bb.0:247; CHECK-NEXT: stp xzr, xzr, [x0]248; CHECK-NEXT: ret249;250; NONEON-NOSVE-LABEL: store_v4i32:251; NONEON-NOSVE: // %bb.0:252; NONEON-NOSVE-NEXT: stp xzr, xzr, [x0]253; NONEON-NOSVE-NEXT: ret254 store <4 x i32> zeroinitializer, ptr %a255 ret void256}257 258define void @store_v4f32(ptr %a) {259; CHECK-LABEL: store_v4f32:260; CHECK: // %bb.0:261; CHECK-NEXT: stp xzr, xzr, [x0]262; CHECK-NEXT: ret263;264; NONEON-NOSVE-LABEL: store_v4f32:265; NONEON-NOSVE: // %bb.0:266; NONEON-NOSVE-NEXT: stp xzr, xzr, [x0]267; NONEON-NOSVE-NEXT: ret268 store <4 x float> zeroinitializer, ptr %a269 ret void270}271 272define void @store_v8i32(ptr %a) {273; CHECK-LABEL: store_v8i32:274; CHECK: // %bb.0:275; CHECK-NEXT: mov z0.s, #0 // =0x0276; CHECK-NEXT: stp q0, q0, [x0]277; CHECK-NEXT: ret278;279; NONEON-NOSVE-LABEL: store_v8i32:280; NONEON-NOSVE: // %bb.0:281; NONEON-NOSVE-NEXT: adrp x8, .LCPI16_0282; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI16_0]283; NONEON-NOSVE-NEXT: stp q0, q0, [x0]284; NONEON-NOSVE-NEXT: ret285 store <8 x i32> zeroinitializer, ptr %a286 ret void287}288 289define void @store_v8f32(ptr %a) {290; CHECK-LABEL: store_v8f32:291; CHECK: // %bb.0:292; CHECK-NEXT: mov z0.s, #0 // =0x0293; CHECK-NEXT: stp q0, q0, [x0]294; CHECK-NEXT: ret295;296; NONEON-NOSVE-LABEL: store_v8f32:297; NONEON-NOSVE: // %bb.0:298; NONEON-NOSVE-NEXT: adrp x8, .LCPI17_0299; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI17_0]300; NONEON-NOSVE-NEXT: stp q0, q0, [x0]301; NONEON-NOSVE-NEXT: ret302 store <8 x float> zeroinitializer, ptr %a303 ret void304}305 306define void @store_v1i64(ptr %a) {307; CHECK-LABEL: store_v1i64:308; CHECK: // %bb.0:309; CHECK-NEXT: mov z0.d, #0 // =0x0310; CHECK-NEXT: str d0, [x0]311; CHECK-NEXT: ret312;313; NONEON-NOSVE-LABEL: store_v1i64:314; NONEON-NOSVE: // %bb.0:315; NONEON-NOSVE-NEXT: sub sp, sp, #16316; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16317; NONEON-NOSVE-NEXT: str xzr, [sp, #8]318; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]319; NONEON-NOSVE-NEXT: str d0, [x0]320; NONEON-NOSVE-NEXT: add sp, sp, #16321; NONEON-NOSVE-NEXT: ret322 store <1 x i64> zeroinitializer, ptr %a323 ret void324}325 326define void @store_v1f64(ptr %a) {327; CHECK-LABEL: store_v1f64:328; CHECK: // %bb.0:329; CHECK-NEXT: fmov d0, xzr330; CHECK-NEXT: str d0, [x0]331; CHECK-NEXT: ret332;333; NONEON-NOSVE-LABEL: store_v1f64:334; NONEON-NOSVE: // %bb.0:335; NONEON-NOSVE-NEXT: sub sp, sp, #16336; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16337; NONEON-NOSVE-NEXT: str xzr, [sp, #8]338; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]339; NONEON-NOSVE-NEXT: str d0, [x0]340; NONEON-NOSVE-NEXT: add sp, sp, #16341; NONEON-NOSVE-NEXT: ret342 store <1 x double> zeroinitializer, ptr %a343 ret void344}345 346define void @store_v2i64(ptr %a) {347; CHECK-LABEL: store_v2i64:348; CHECK: // %bb.0:349; CHECK-NEXT: stp xzr, xzr, [x0]350; CHECK-NEXT: ret351;352; NONEON-NOSVE-LABEL: store_v2i64:353; NONEON-NOSVE: // %bb.0:354; NONEON-NOSVE-NEXT: stp xzr, xzr, [x0]355; NONEON-NOSVE-NEXT: ret356 store <2 x i64> zeroinitializer, ptr %a357 ret void358}359 360define void @store_v2f64(ptr %a) {361; CHECK-LABEL: store_v2f64:362; CHECK: // %bb.0:363; CHECK-NEXT: stp xzr, xzr, [x0]364; CHECK-NEXT: ret365;366; NONEON-NOSVE-LABEL: store_v2f64:367; NONEON-NOSVE: // %bb.0:368; NONEON-NOSVE-NEXT: stp xzr, xzr, [x0]369; NONEON-NOSVE-NEXT: ret370 store <2 x double> zeroinitializer, ptr %a371 ret void372}373 374define void @store_v4i64(ptr %a) {375; CHECK-LABEL: store_v4i64:376; CHECK: // %bb.0:377; CHECK-NEXT: mov z0.d, #0 // =0x0378; CHECK-NEXT: stp q0, q0, [x0]379; CHECK-NEXT: ret380;381; NONEON-NOSVE-LABEL: store_v4i64:382; NONEON-NOSVE: // %bb.0:383; NONEON-NOSVE-NEXT: adrp x8, .LCPI22_0384; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI22_0]385; NONEON-NOSVE-NEXT: stp q0, q0, [x0]386; NONEON-NOSVE-NEXT: ret387 store <4 x i64> zeroinitializer, ptr %a388 ret void389}390 391define void @store_v4f64(ptr %a) {392; CHECK-LABEL: store_v4f64:393; CHECK: // %bb.0:394; CHECK-NEXT: mov z0.d, #0 // =0x0395; CHECK-NEXT: stp q0, q0, [x0]396; CHECK-NEXT: ret397;398; NONEON-NOSVE-LABEL: store_v4f64:399; NONEON-NOSVE: // %bb.0:400; NONEON-NOSVE-NEXT: adrp x8, .LCPI23_0401; NONEON-NOSVE-NEXT: ldr q0, [x8, :lo12:.LCPI23_0]402; NONEON-NOSVE-NEXT: stp q0, q0, [x0]403; NONEON-NOSVE-NEXT: ret404 store <4 x double> zeroinitializer, ptr %a405 ret void406}407