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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mattr=+sve < %s | FileCheck %s3 4target triple = "aarch64-unknown-linux-gnu"5 6; Fold (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)).7define i64 @combine_add_vscale_i64() nounwind {8; CHECK-LABEL: combine_add_vscale_i64:9; CHECK: // %bb.0:10; CHECK-NEXT: cntd x011; CHECK-NEXT: ret12 %vscale = call i64 @llvm.vscale.i64()13 %add = add i64 %vscale, %vscale14 ret i64 %add15}16 17define i32 @combine_add_vscale_i32() nounwind {18; CHECK-LABEL: combine_add_vscale_i32:19; CHECK: // %bb.0:20; CHECK-NEXT: cntd x021; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x022; CHECK-NEXT: ret23 %vscale = call i32 @llvm.vscale.i32()24 %add = add i32 %vscale, %vscale25 ret i32 %add26}27 28; Fold (mul (vscale * C0), C1) to (vscale * (C0 * C1)).29; In this test, C0 = 1, C1 = 32.30define i64 @combine_mul_vscale_i64() nounwind {31; CHECK-LABEL: combine_mul_vscale_i64:32; CHECK: // %bb.0:33; CHECK-NEXT: rdvl x0, #234; CHECK-NEXT: ret35 %vscale = call i64 @llvm.vscale.i64()36 %mul = mul i64 %vscale, 3237 ret i64 %mul38}39 40define i32 @combine_mul_vscale_i32() nounwind {41; CHECK-LABEL: combine_mul_vscale_i32:42; CHECK: // %bb.0:43; CHECK-NEXT: rdvl x0, #344; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x045; CHECK-NEXT: ret46 %vscale = call i32 @llvm.vscale.i32()47 %mul = mul i32 %vscale, 4848 ret i32 %mul49}50 51; Canonicalize (sub X, (vscale * C)) to (add X, (vscale * -C))52define i64 @combine_sub_vscale_i64(i64 %in) nounwind {53; CHECK-LABEL: combine_sub_vscale_i64:54; CHECK: // %bb.0:55; CHECK-NEXT: rdvl x8, #-156; CHECK-NEXT: asr x8, x8, #457; CHECK-NEXT: add x0, x0, x858; CHECK-NEXT: ret59 %vscale = call i64 @llvm.vscale.i64()60 %sub = sub i64 %in, %vscale61 ret i64 %sub62}63 64define i32 @combine_sub_vscale_i32(i32 %in) nounwind {65; CHECK-LABEL: combine_sub_vscale_i32:66; CHECK: // %bb.0:67; CHECK-NEXT: rdvl x8, #-168; CHECK-NEXT: asr x8, x8, #469; CHECK-NEXT: add w0, w0, w870; CHECK-NEXT: ret71 %vscale = call i32 @llvm.vscale.i32()72 %sub = sub i32 %in, %vscale73 ret i32 %sub74}75 76; Tests of multiple uses of vscale when canonicalize77; (sub X, (vscale * C)) to (add X, (vscale * -C))78define i64 @multiple_uses_sub_vscale_i64(i64 %x, i64 %y) nounwind {79; CHECK-LABEL: multiple_uses_sub_vscale_i64:80; CHECK: // %bb.0:81; CHECK-NEXT: rdvl x8, #182; CHECK-NEXT: lsr x8, x8, #483; CHECK-NEXT: sub x9, x0, x884; CHECK-NEXT: add x8, x1, x885; CHECK-NEXT: mul x0, x9, x886; CHECK-NEXT: ret87 %vscale = call i64 @llvm.vscale.i64()88 %sub = sub i64 %x, %vscale89 %add = add i64 %y, %vscale90 %res = mul i64 %sub, %add91 ret i64 %res92}93 94; Fold (shl (vscale * C0), C1) to (vscale * (C0 << C1)).95; C0 = 1 , C1 = 496; At IR level, %shl = 2^4 * VSCALE.97; At Assembly level, the output of RDVL is also 2^4 * VSCALE.98; Hence, the immediate for RDVL is #1.99define i64 @combine_shl_vscale_i64() nounwind {100; CHECK-LABEL: combine_shl_vscale_i64:101; CHECK: // %bb.0:102; CHECK-NEXT: rdvl x0, #1103; CHECK-NEXT: ret104 %vscale = call i64 @llvm.vscale.i64()105 %shl = shl i64 %vscale, 4106 ret i64 %shl107}108 109define i32 @combine_shl_vscale_i32() nounwind {110; CHECK-LABEL: combine_shl_vscale_i32:111; CHECK: // %bb.0:112; CHECK-NEXT: rdvl x0, #1113; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0114; CHECK-NEXT: ret115 %vscale = call i32 @llvm.vscale.i32()116 %shl = shl i32 %vscale, 4117 ret i32 %shl118}119 120define i64 @combine_shl_mul_vscale(i64 %a) nounwind {121; CHECK-LABEL: combine_shl_mul_vscale:122; CHECK: // %bb.0:123; CHECK-NEXT: cnth x8124; CHECK-NEXT: mul x0, x0, x8125; CHECK-NEXT: ret126 %vscale = tail call i64 @llvm.vscale.i64()127 %mul = mul i64 %a, %vscale128 %shl = shl i64 %mul, 3129 ret i64 %shl130}131 132define i64 @combine_shl_mul_vscale_commuted(i64 %a) nounwind {133; CHECK-LABEL: combine_shl_mul_vscale_commuted:134; CHECK: // %bb.0:135; CHECK-NEXT: cnth x8136; CHECK-NEXT: mul x0, x0, x8137; CHECK-NEXT: ret138 %vscale = tail call i64 @llvm.vscale.i64()139 %mul = mul i64 %vscale, %a140 %shl = shl i64 %mul, 3141 ret i64 %shl142}143 144declare i32 @llvm.vscale.i32()145declare i64 @llvm.vscale.i64()146