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1; RUN: llc -mtriple aarch64 -mattr=+sve -asm-verbose=0 < %s | FileCheck %s2; RUN: opt -mtriple=aarch64 -passes="require<profile-summary>,function(codegenprepare)" -S < %s | llc -mtriple=aarch64 -mattr=+sve -asm-verbose=0 | FileCheck %s3 4;5; RDVL6;7 8define i8 @rdvl_i8() nounwind {9; CHECK-LABEL: rdvl_i8:10; CHECK: rdvl x0, #111; CHECK-NEXT: ret12 %vscale = call i8 @llvm.vscale.i8()13 %1 = mul nsw i8 %vscale, 1614 ret i8 %115}16 17define i16 @rdvl_i16() nounwind {18; CHECK-LABEL: rdvl_i16:19; CHECK: rdvl x0, #120; CHECK-NEXT: ret21 %vscale = call i16 @llvm.vscale.i16()22 %1 = mul nsw i16 %vscale, 1623 ret i16 %124}25 26define i32 @rdvl_i32() nounwind {27; CHECK-LABEL: rdvl_i32:28; CHECK: rdvl x0, #129; CHECK-NEXT: ret30 %vscale = call i32 @llvm.vscale.i32()31 %1 = mul nsw i32 %vscale, 1632 ret i32 %133}34 35define i64 @rdvl_i64() nounwind {36; CHECK-LABEL: rdvl_i64:37; CHECK: rdvl x0, #138; CHECK-NEXT: ret39 %vscale = call i64 @llvm.vscale.i64()40 %1 = mul nsw i64 %vscale, 1641 ret i64 %142}43 44define i32 @rdvl_const() nounwind {45; CHECK-LABEL: rdvl_const:46; CHECK: rdvl x0, #147; CHECK-NEXT: ret48 %vscale.ptr = getelementptr <vscale x 1 x i8>, ptr null, i64 149 %vscale.int = ptrtoint ptr %vscale.ptr to i3250 %vscale.scaled = mul nsw i32 %vscale.int, 1651 ret i32 %vscale.scaled52}53 54define i32 @vscale_1() nounwind {55; CHECK-LABEL: vscale_1:56; CHECK: rdvl [[TMP:x[0-9]+]], #157; CHECK-NEXT: lsr x0, [[TMP]], #458; CHECK-NEXT: ret59 %vscale = call i32 @llvm.vscale.i32()60 ret i32 %vscale61}62 63define i32 @vscale_neg1() nounwind {64; CHECK-LABEL: vscale_neg1:65; CHECK: rdvl [[TMP:x[0-9]+]], #-166; CHECK-NEXT: asr x0, [[TMP]], #467; CHECK-NEXT: ret68 %vscale = call i32 @llvm.vscale.i32()69 %neg = mul nsw i32 -1, %vscale70 ret i32 %neg71}72 73define i32 @rdvl_3() nounwind {74; CHECK-LABEL: rdvl_3:75; CHECK: rdvl [[VL_B:x[0-9]+]], #176; CHECK-NEXT: mov w[[MUL:[0-9]+]], #377; CHECK-NEXT: lsr [[VL_Q:x[0-9]+]], [[VL_B]], #478; CHECK-NEXT: mul x0, [[VL_Q]], x[[MUL]]79; CHECK-NEXT: ret80 %vscale = call i32 @llvm.vscale.i32()81 %1 = mul nsw i32 %vscale, 382 ret i32 %183}84 85define i32 @rdvl_min() nounwind {86; CHECK-LABEL: rdvl_min:87; CHECK: rdvl x0, #-3288; CHECK-NEXT: ret89 %vscale = call i32 @llvm.vscale.i32()90 %1 = mul nsw i32 %vscale, -51291 ret i32 %192}93 94define i32 @rdvl_max() nounwind {95; CHECK-LABEL: rdvl_max:96; CHECK: rdvl x0, #3197; CHECK-NEXT: ret98 %vscale = call i32 @llvm.vscale.i32()99 %1 = mul nsw i32 %vscale, 496100 ret i32 %1101}102 103define i1 @rdvl_i1() {104; CHECK-LABEL: rdvl_i1:105; CHECK: rdvl x8, #-1106; CHECK-NEXT: asr x8, x8, #4107; CHECK-NEXT: and w0, w8, #0x1108; CHECK-NEXT: ret109 %a = tail call i64 @llvm.vscale.i64()110 %b = trunc i64 %a to i1111 ret i1 %b112}113 114;115; CNTH116;117 118define i32 @cnth() nounwind {119; CHECK-LABEL: cnth:120; CHECK: cnth x0{{$}}121; CHECK-NEXT: ret122 %vscale = call i32 @llvm.vscale.i32()123 %1 = shl nsw i32 %vscale, 3124 ret i32 %1125}126 127define i32 @cnth_max() nounwind {128; CHECK-LABEL: cnth_max:129; CHECK: cnth x0, all, mul #15130; CHECK-NEXT: ret131 %vscale = call i32 @llvm.vscale.i32()132 %1 = mul nsw i32 %vscale, 120133 ret i32 %1134}135 136define i32 @cnth_neg() nounwind {137; CHECK-LABEL: cnth_neg:138; CHECK: cnth [[CNT:x[0-9]+]]139; CHECK: neg x0, [[CNT]]140; CHECK-NEXT: ret141 %vscale = call i32 @llvm.vscale.i32()142 %1 = mul nsw i32 %vscale, -8143 ret i32 %1144}145 146;147; CNTW148;149 150define i32 @cntw() nounwind {151; CHECK-LABEL: cntw:152; CHECK: cntw x0{{$}}153; CHECK-NEXT: ret154 %vscale = call i32 @llvm.vscale.i32()155 %1 = shl nsw i32 %vscale, 2156 ret i32 %1157}158 159define i32 @cntw_max() nounwind {160; CHECK-LABEL: cntw_max:161; CHECK: cntw x0, all, mul #15162; CHECK-NEXT: ret163 %vscale = call i32 @llvm.vscale.i32()164 %1 = mul nsw i32 %vscale, 60165 ret i32 %1166}167 168define i32 @cntw_neg() nounwind {169; CHECK-LABEL: cntw_neg:170; CHECK: cntw [[CNT:x[0-9]+]]171; CHECK: neg x0, [[CNT]]172; CHECK-NEXT: ret173 %vscale = call i32 @llvm.vscale.i32()174 %1 = mul nsw i32 %vscale, -4175 ret i32 %1176}177 178;179; CNTD180;181 182define i32 @cntd() nounwind {183; CHECK-LABEL: cntd:184; CHECK: cntd x0{{$}}185; CHECK-NEXT: ret186 %vscale = call i32 @llvm.vscale.i32()187 %1 = shl nsw i32 %vscale, 1188 ret i32 %1189}190 191define i32 @cntd_max() nounwind {192; CHECK-LABEL: cntd_max:193; CHECK: cntd x0, all, mul #15194; CHECK-NEXT: ret195 %vscale = call i32 @llvm.vscale.i32()196 %1 = mul nsw i32 %vscale, 30197 ret i32 %1198}199 200define i32 @cntd_neg() nounwind {201; CHECK-LABEL: cntd_neg:202; CHECK: cntd [[CNT:x[0-9]+]]203; CHECK: neg x0, [[CNT]]204; CHECK-NEXT: ret205 %vscale = call i32 @llvm.vscale.i32()206 %1 = mul nsw i32 %vscale, -2207 ret i32 %1208}209 210declare i8 @llvm.vscale.i8()211declare i16 @llvm.vscale.i16()212declare i32 @llvm.vscale.i32()213declare i64 @llvm.vscale.i64()214