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1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s2 3;4; ADCLB (vector, long, unpredicated)5;6define <vscale x 4 x i32> @adclb_i32(<vscale x 4 x i32> %a,7 <vscale x 4 x i32> %b,8 <vscale x 4 x i32> %c) {9; CHECK-LABEL: adclb_i3210; CHECK: adclb z0.s, z1.s, z2.s11; CHECK-NEXT: ret12 %res = call <vscale x 4 x i32> @llvm.aarch64.sve.adclb.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c)13 ret <vscale x 4 x i32> %res14}15 16define <vscale x 2 x i64> @adclb_i64(<vscale x 2 x i64> %a,17 <vscale x 2 x i64> %b,18 <vscale x 2 x i64> %c) {19; CHECK-LABEL: adclb_i6420; CHECK: adclb z0.d, z1.d, z2.d21; CHECK-NEXT: ret22 %res = call <vscale x 2 x i64> @llvm.aarch64.sve.adclb.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c)23 ret <vscale x 2 x i64> %res24}25 26;27; ADCLT (vector, long, unpredicated)28;29define <vscale x 4 x i32> @adclt_i32(<vscale x 4 x i32> %a,30 <vscale x 4 x i32> %b,31 <vscale x 4 x i32> %c) {32; CHECK-LABEL: adclt_i3233; CHECK: adclt z0.s, z1.s, z2.s34; CHECK-NEXT: ret35 %res = call <vscale x 4 x i32> @llvm.aarch64.sve.adclt.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c)36 ret <vscale x 4 x i32> %res37}38 39define <vscale x 2 x i64> @adclt_i64(<vscale x 2 x i64> %a,40 <vscale x 2 x i64> %b,41 <vscale x 2 x i64> %c) {42; CHECK-LABEL: adclt_i6443; CHECK: adclt z0.d, z1.d, z2.d44; CHECK-NEXT: ret45 %res = call <vscale x 2 x i64> @llvm.aarch64.sve.adclt.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c)46 ret <vscale x 2 x i64> %res47}48 49;50; SBCLB (vector, long, unpredicated)51;52define <vscale x 4 x i32> @sbclb_i32(<vscale x 4 x i32> %a,53 <vscale x 4 x i32> %b,54 <vscale x 4 x i32> %c) {55; CHECK-LABEL: sbclb_i3256; CHECK: sbclb z0.s, z1.s, z2.s57; CHECK-NEXT: ret58 %res = call <vscale x 4 x i32> @llvm.aarch64.sve.sbclb.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c)59 ret <vscale x 4 x i32> %res60}61 62define <vscale x 2 x i64> @sbclb_i64(<vscale x 2 x i64> %a,63 <vscale x 2 x i64> %b,64 <vscale x 2 x i64> %c) {65; CHECK-LABEL: sbclb_i6466; CHECK: sbclb z0.d, z1.d, z2.d67; CHECK-NEXT: ret68 %res = call <vscale x 2 x i64> @llvm.aarch64.sve.sbclb.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c)69 ret <vscale x 2 x i64> %res70}71 72;73; SBCLT (vector, long, unpredicated)74;75define <vscale x 4 x i32> @sbclt_i32(<vscale x 4 x i32> %a,76 <vscale x 4 x i32> %b,77 <vscale x 4 x i32> %c) {78; CHECK-LABEL: sbclt_i3279; CHECK: sbclt z0.s, z1.s, z2.s80; CHECK-NEXT: ret81 %res = call <vscale x 4 x i32> @llvm.aarch64.sve.sbclt.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c)82 ret <vscale x 4 x i32> %res83}84 85define <vscale x 2 x i64> @sbclt_i64(<vscale x 2 x i64> %a,86 <vscale x 2 x i64> %b,87 <vscale x 2 x i64> %c) {88; CHECK-LABEL: sbclt_i6489; CHECK: sbclt z0.d, z1.d, z2.d90; CHECK-NEXT: ret91 %res = call <vscale x 2 x i64> @llvm.aarch64.sve.sbclt.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c)92 ret <vscale x 2 x i64> %res93}94 95declare <vscale x 4 x i32> @llvm.aarch64.sve.adclb.nxv4i32(<vscale x 4 x i32>,<vscale x 4 x i32>,<vscale x 4 x i32>)96declare <vscale x 2 x i64> @llvm.aarch64.sve.adclb.nxv2i64(<vscale x 2 x i64>,<vscale x 2 x i64>,<vscale x 2 x i64>)97declare <vscale x 4 x i32> @llvm.aarch64.sve.adclt.nxv4i32(<vscale x 4 x i32>,<vscale x 4 x i32>,<vscale x 4 x i32>)98declare <vscale x 2 x i64> @llvm.aarch64.sve.adclt.nxv2i64(<vscale x 2 x i64>,<vscale x 2 x i64>,<vscale x 2 x i64>)99declare <vscale x 4 x i32> @llvm.aarch64.sve.sbclb.nxv4i32(<vscale x 4 x i32>,<vscale x 4 x i32>,<vscale x 4 x i32>)100declare <vscale x 2 x i64> @llvm.aarch64.sve.sbclb.nxv2i64(<vscale x 2 x i64>,<vscale x 2 x i64>,<vscale x 2 x i64>)101declare <vscale x 4 x i32> @llvm.aarch64.sve.sbclt.nxv4i32(<vscale x 4 x i32>,<vscale x 4 x i32>,<vscale x 4 x i32>)102declare <vscale x 2 x i64> @llvm.aarch64.sve.sbclt.nxv2i64(<vscale x 2 x i64>,<vscale x 2 x i64>,<vscale x 2 x i64>)103