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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s3; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve,+sme < %s | FileCheck %s4; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -force-streaming < %s | FileCheck %s5 6;7; FCVTLT8;9 10define <vscale x 4 x float> @fcvtlt_f32_f16(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 8 x half> %b) {11; CHECK-LABEL: fcvtlt_f32_f16:12; CHECK: // %bb.0:13; CHECK-NEXT: fcvtlt z0.s, p0/m, z1.h14; CHECK-NEXT: ret15 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcvtlt.f32f16(<vscale x 4 x float> %a,16 <vscale x 4 x i1> %pg,17 <vscale x 8 x half> %b)18 ret <vscale x 4 x float> %out19}20 21define <vscale x 2 x double> @fcvtlt_f64_f32(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 4 x float> %b) {22; CHECK-LABEL: fcvtlt_f64_f32:23; CHECK: // %bb.0:24; CHECK-NEXT: fcvtlt z0.d, p0/m, z1.s25; CHECK-NEXT: ret26 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fcvtlt.f64f32(<vscale x 2 x double> %a,27 <vscale x 2 x i1> %pg,28 <vscale x 4 x float> %b)29 ret <vscale x 2 x double> %out30}31 32;33; FCVTNT34;35 36define <vscale x 8 x half> @fcvtnt_f16_f32(<vscale x 8 x half> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {37; CHECK-LABEL: fcvtnt_f16_f32:38; CHECK: // %bb.0:39; CHECK-NEXT: fcvtnt z0.h, p0/m, z1.s40; CHECK-NEXT: ret41 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fcvtnt.f16f32(<vscale x 8 x half> %a,42 <vscale x 4 x i1> %pg,43 <vscale x 4 x float> %b)44 ret <vscale x 8 x half> %out45}46 47define <vscale x 4 x float> @fcvtnt_f32_f64(<vscale x 4 x float> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {48; CHECK-LABEL: fcvtnt_f32_f64:49; CHECK: // %bb.0:50; CHECK-NEXT: fcvtnt z0.s, p0/m, z1.d51; CHECK-NEXT: ret52 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcvtnt.f32f64(<vscale x 4 x float> %a,53 <vscale x 2 x i1> %pg,54 <vscale x 2 x double> %b)55 ret <vscale x 4 x float> %out56}57 58;59; FCVTX60;61 62define <vscale x 4 x float> @fcvtx_f32_f64(<vscale x 4 x float> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {63; CHECK-LABEL: fcvtx_f32_f64:64; CHECK: // %bb.0:65; CHECK-NEXT: fcvtx z0.s, p0/m, z1.d66; CHECK-NEXT: ret67 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcvtx.f32f64(<vscale x 4 x float> %a,68 <vscale x 2 x i1> %pg,69 <vscale x 2 x double> %b)70 ret <vscale x 4 x float> %out71}72 73;74; FCVTXNT75;76 77define <vscale x 4 x float> @fcvtxnt_f32_f64(<vscale x 4 x float> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {78; CHECK-LABEL: fcvtxnt_f32_f64:79; CHECK: // %bb.0:80; CHECK-NEXT: fcvtxnt z0.s, p0/m, z1.d81; CHECK-NEXT: ret82 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcvtxnt.f32f64(<vscale x 4 x float> %a,83 <vscale x 2 x i1> %pg,84 <vscale x 2 x double> %b)85 ret <vscale x 4 x float> %out86}87 88declare <vscale x 4 x float> @llvm.aarch64.sve.fcvtlt.f32f16(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 8 x half>)89declare <vscale x 2 x double> @llvm.aarch64.sve.fcvtlt.f64f32(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 4 x float>)90declare <vscale x 8 x half> @llvm.aarch64.sve.fcvtnt.f16f32(<vscale x 8 x half>, <vscale x 4 x i1>, <vscale x 4 x float>)91declare <vscale x 4 x float> @llvm.aarch64.sve.fcvtnt.f32f64(<vscale x 4 x float>, <vscale x 2 x i1>, <vscale x 2 x double>)92declare <vscale x 4 x float> @llvm.aarch64.sve.fcvtx.f32f64(<vscale x 4 x float>, <vscale x 2 x i1>, <vscale x 2 x double>)93declare <vscale x 4 x float> @llvm.aarch64.sve.fcvtxnt.f32f64(<vscale x 4 x float>, <vscale x 2 x i1>, <vscale x 2 x double>)94