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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s3; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve,+sme < %s | FileCheck %s4; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -force-streaming < %s | FileCheck %s5 6;7; WHILEGE8;9 10define <vscale x 16 x i1> @whilege_b_ww(i32 %a, i32 %b) {11; CHECK-LABEL: whilege_b_ww:12; CHECK: // %bb.0:13; CHECK-NEXT: whilege p0.b, w0, w114; CHECK-NEXT: ret15 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilege.nxv16i1.i32(i32 %a, i32 %b)16 ret <vscale x 16 x i1> %out17}18 19define <vscale x 16 x i1> @whilege_b_xx(i64 %a, i64 %b) {20; CHECK-LABEL: whilege_b_xx:21; CHECK: // %bb.0:22; CHECK-NEXT: whilege p0.b, x0, x123; CHECK-NEXT: ret24 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilege.nxv16i1.i64(i64 %a, i64 %b)25 ret <vscale x 16 x i1> %out26}27 28define <vscale x 8 x i1> @whilege_h_ww(i32 %a, i32 %b) {29; CHECK-LABEL: whilege_h_ww:30; CHECK: // %bb.0:31; CHECK-NEXT: whilege p0.h, w0, w132; CHECK-NEXT: ret33 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilege.nxv8i1.i32(i32 %a, i32 %b)34 ret <vscale x 8 x i1> %out35}36 37define <vscale x 8 x i1> @whilege_h_xx(i64 %a, i64 %b) {38; CHECK-LABEL: whilege_h_xx:39; CHECK: // %bb.0:40; CHECK-NEXT: whilege p0.h, x0, x141; CHECK-NEXT: ret42 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilege.nxv8i1.i64(i64 %a, i64 %b)43 ret <vscale x 8 x i1> %out44}45 46define <vscale x 4 x i1> @whilege_s_ww(i32 %a, i32 %b) {47; CHECK-LABEL: whilege_s_ww:48; CHECK: // %bb.0:49; CHECK-NEXT: whilege p0.s, w0, w150; CHECK-NEXT: ret51 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilege.nxv4i1.i32(i32 %a, i32 %b)52 ret <vscale x 4 x i1> %out53}54 55define <vscale x 4 x i1> @whilege_s_xx(i64 %a, i64 %b) {56; CHECK-LABEL: whilege_s_xx:57; CHECK: // %bb.0:58; CHECK-NEXT: whilege p0.s, x0, x159; CHECK-NEXT: ret60 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilege.nxv4i1.i64(i64 %a, i64 %b)61 ret <vscale x 4 x i1> %out62}63 64define <vscale x 2 x i1> @whilege_d_ww(i32 %a, i32 %b) {65; CHECK-LABEL: whilege_d_ww:66; CHECK: // %bb.0:67; CHECK-NEXT: whilege p0.d, w0, w168; CHECK-NEXT: ret69 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilege.nxv2i1.i32(i32 %a, i32 %b)70 ret <vscale x 2 x i1> %out71}72 73define <vscale x 2 x i1> @whilege_d_xx(i64 %a, i64 %b) {74; CHECK-LABEL: whilege_d_xx:75; CHECK: // %bb.0:76; CHECK-NEXT: whilege p0.d, x0, x177; CHECK-NEXT: ret78 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilege.nxv2i1.i64(i64 %a, i64 %b)79 ret <vscale x 2 x i1> %out80}81 82; Ensure we don't convert constant decrementing while instructions to ptrue.83define <vscale x 16 x i1> @whilege_b_ii() {84; CHECK-LABEL: whilege_b_ii:85; CHECK: // %bb.0: // %entry86; CHECK-NEXT: mov w8, #-2 // =0xfffffffe87; CHECK-NEXT: mov w9, #3 // =0x388; CHECK-NEXT: whilege p0.b, w9, w889; CHECK-NEXT: ret90entry:91 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilege.nxv16i1.i32(i32 3, i32 -2)92 ret <vscale x 16 x i1> %out93}94 95;96; WHILEHS97;98 99define <vscale x 16 x i1> @whilehs_b_ww(i32 %a, i32 %b) {100; CHECK-LABEL: whilehs_b_ww:101; CHECK: // %bb.0:102; CHECK-NEXT: whilehs p0.b, w0, w1103; CHECK-NEXT: ret104 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilehs.nxv16i1.i32(i32 %a, i32 %b)105 ret <vscale x 16 x i1> %out106}107 108define <vscale x 16 x i1> @whilehs_b_xx(i64 %a, i64 %b) {109; CHECK-LABEL: whilehs_b_xx:110; CHECK: // %bb.0:111; CHECK-NEXT: whilehs p0.b, x0, x1112; CHECK-NEXT: ret113 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64 %a, i64 %b)114 ret <vscale x 16 x i1> %out115}116 117define <vscale x 8 x i1> @whilehs_h_ww(i32 %a, i32 %b) {118; CHECK-LABEL: whilehs_h_ww:119; CHECK: // %bb.0:120; CHECK-NEXT: whilehs p0.h, w0, w1121; CHECK-NEXT: ret122 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilehs.nxv8i1.i32(i32 %a, i32 %b)123 ret <vscale x 8 x i1> %out124}125 126define <vscale x 8 x i1> @whilehs_h_xx(i64 %a, i64 %b) {127; CHECK-LABEL: whilehs_h_xx:128; CHECK: // %bb.0:129; CHECK-NEXT: whilehs p0.h, x0, x1130; CHECK-NEXT: ret131 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilehs.nxv8i1.i64(i64 %a, i64 %b)132 ret <vscale x 8 x i1> %out133}134 135define <vscale x 4 x i1> @whilehs_s_ww(i32 %a, i32 %b) {136; CHECK-LABEL: whilehs_s_ww:137; CHECK: // %bb.0:138; CHECK-NEXT: whilehs p0.s, w0, w1139; CHECK-NEXT: ret140 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilehs.nxv4i1.i32(i32 %a, i32 %b)141 ret <vscale x 4 x i1> %out142}143 144define <vscale x 4 x i1> @whilehs_s_xx(i64 %a, i64 %b) {145; CHECK-LABEL: whilehs_s_xx:146; CHECK: // %bb.0:147; CHECK-NEXT: whilehs p0.s, x0, x1148; CHECK-NEXT: ret149 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilehs.nxv4i1.i64(i64 %a, i64 %b)150 ret <vscale x 4 x i1> %out151}152 153define <vscale x 2 x i1> @whilehs_d_ww(i32 %a, i32 %b) {154; CHECK-LABEL: whilehs_d_ww:155; CHECK: // %bb.0:156; CHECK-NEXT: whilehs p0.d, w0, w1157; CHECK-NEXT: ret158 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilehs.nxv2i1.i32(i32 %a, i32 %b)159 ret <vscale x 2 x i1> %out160}161 162define <vscale x 2 x i1> @whilehs_d_xx(i64 %a, i64 %b) {163; CHECK-LABEL: whilehs_d_xx:164; CHECK: // %bb.0:165; CHECK-NEXT: whilehs p0.d, x0, x1166; CHECK-NEXT: ret167 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilehs.nxv2i1.i64(i64 %a, i64 %b)168 ret <vscale x 2 x i1> %out169}170 171; Ensure we don't convert constant decrementing while instructions to ptrue.172define <vscale x 16 x i1> @whilehs_b_ii() {173; CHECK-LABEL: whilehs_b_ii:174; CHECK: // %bb.0: // %entry175; CHECK-NEXT: mov w8, #2 // =0x2176; CHECK-NEXT: mov w9, #8 // =0x8177; CHECK-NEXT: whilehs p0.b, x9, x8178; CHECK-NEXT: ret179entry:180 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64 8, i64 2)181 ret <vscale x 16 x i1> %out182}183 184;185; WHILEGT186;187 188define <vscale x 16 x i1> @whilegt_b_ww(i32 %a, i32 %b) {189; CHECK-LABEL: whilegt_b_ww:190; CHECK: // %bb.0:191; CHECK-NEXT: whilegt p0.b, w0, w1192; CHECK-NEXT: ret193 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32 %a, i32 %b)194 ret <vscale x 16 x i1> %out195}196 197define <vscale x 16 x i1> @whilegt_b_xx(i64 %a, i64 %b) {198; CHECK-LABEL: whilegt_b_xx:199; CHECK: // %bb.0:200; CHECK-NEXT: whilegt p0.b, x0, x1201; CHECK-NEXT: ret202 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilegt.nxv16i1.i64(i64 %a, i64 %b)203 ret <vscale x 16 x i1> %out204}205 206define <vscale x 8 x i1> @whilegt_h_ww(i32 %a, i32 %b) {207; CHECK-LABEL: whilegt_h_ww:208; CHECK: // %bb.0:209; CHECK-NEXT: whilegt p0.h, w0, w1210; CHECK-NEXT: ret211 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilegt.nxv8i1.i32(i32 %a, i32 %b)212 ret <vscale x 8 x i1> %out213}214 215define <vscale x 8 x i1> @whilegt_h_xx(i64 %a, i64 %b) {216; CHECK-LABEL: whilegt_h_xx:217; CHECK: // %bb.0:218; CHECK-NEXT: whilegt p0.h, x0, x1219; CHECK-NEXT: ret220 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilegt.nxv8i1.i64(i64 %a, i64 %b)221 ret <vscale x 8 x i1> %out222}223 224define <vscale x 4 x i1> @whilegt_s_ww(i32 %a, i32 %b) {225; CHECK-LABEL: whilegt_s_ww:226; CHECK: // %bb.0:227; CHECK-NEXT: whilegt p0.s, w0, w1228; CHECK-NEXT: ret229 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilegt.nxv4i1.i32(i32 %a, i32 %b)230 ret <vscale x 4 x i1> %out231}232 233define <vscale x 4 x i1> @whilegt_s_xx(i64 %a, i64 %b) {234; CHECK-LABEL: whilegt_s_xx:235; CHECK: // %bb.0:236; CHECK-NEXT: whilegt p0.s, x0, x1237; CHECK-NEXT: ret238 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilegt.nxv4i1.i64(i64 %a, i64 %b)239 ret <vscale x 4 x i1> %out240}241 242define <vscale x 2 x i1> @whilegt_d_ww(i32 %a, i32 %b) {243; CHECK-LABEL: whilegt_d_ww:244; CHECK: // %bb.0:245; CHECK-NEXT: whilegt p0.d, w0, w1246; CHECK-NEXT: ret247 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilegt.nxv2i1.i32(i32 %a, i32 %b)248 ret <vscale x 2 x i1> %out249}250 251define <vscale x 2 x i1> @whilegt_d_xx(i64 %a, i64 %b) {252; CHECK-LABEL: whilegt_d_xx:253; CHECK: // %bb.0:254; CHECK-NEXT: whilegt p0.d, x0, x1255; CHECK-NEXT: ret256 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilegt.nxv2i1.i64(i64 %a, i64 %b)257 ret <vscale x 2 x i1> %out258}259 260; Ensure we don't convert constant decrementing while instructions to ptrue.261define <vscale x 16 x i1> @whilegt_b_ii() {262; CHECK-LABEL: whilegt_b_ii:263; CHECK: // %bb.0: // %entry264; CHECK-NEXT: mov w8, #-2 // =0xfffffffe265; CHECK-NEXT: mov w9, #3 // =0x3266; CHECK-NEXT: whilegt p0.b, w9, w8267; CHECK-NEXT: ret268entry:269 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32 3, i32 -2)270 ret <vscale x 16 x i1> %out271}272 273;274; WHILEHI275;276 277define <vscale x 16 x i1> @whilehi_b_ww(i32 %a, i32 %b) {278; CHECK-LABEL: whilehi_b_ww:279; CHECK: // %bb.0:280; CHECK-NEXT: whilehi p0.b, w0, w1281; CHECK-NEXT: ret282 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilehi.nxv16i1.i32(i32 %a, i32 %b)283 ret <vscale x 16 x i1> %out284}285 286define <vscale x 16 x i1> @whilehi_b_xx(i64 %a, i64 %b) {287; CHECK-LABEL: whilehi_b_xx:288; CHECK: // %bb.0:289; CHECK-NEXT: whilehi p0.b, x0, x1290; CHECK-NEXT: ret291 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64 %a, i64 %b)292 ret <vscale x 16 x i1> %out293}294 295define <vscale x 8 x i1> @whilehi_h_ww(i32 %a, i32 %b) {296; CHECK-LABEL: whilehi_h_ww:297; CHECK: // %bb.0:298; CHECK-NEXT: whilehi p0.h, w0, w1299; CHECK-NEXT: ret300 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilehi.nxv8i1.i32(i32 %a, i32 %b)301 ret <vscale x 8 x i1> %out302}303 304define <vscale x 8 x i1> @whilehi_h_xx(i64 %a, i64 %b) {305; CHECK-LABEL: whilehi_h_xx:306; CHECK: // %bb.0:307; CHECK-NEXT: whilehi p0.h, x0, x1308; CHECK-NEXT: ret309 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilehi.nxv8i1.i64(i64 %a, i64 %b)310 ret <vscale x 8 x i1> %out311}312 313define <vscale x 4 x i1> @whilehi_s_ww(i32 %a, i32 %b) {314; CHECK-LABEL: whilehi_s_ww:315; CHECK: // %bb.0:316; CHECK-NEXT: whilehi p0.s, w0, w1317; CHECK-NEXT: ret318 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilehi.nxv4i1.i32(i32 %a, i32 %b)319 ret <vscale x 4 x i1> %out320}321 322define <vscale x 4 x i1> @whilehi_s_xx(i64 %a, i64 %b) {323; CHECK-LABEL: whilehi_s_xx:324; CHECK: // %bb.0:325; CHECK-NEXT: whilehi p0.s, x0, x1326; CHECK-NEXT: ret327 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilehi.nxv4i1.i64(i64 %a, i64 %b)328 ret <vscale x 4 x i1> %out329}330 331define <vscale x 2 x i1> @whilehi_d_ww(i32 %a, i32 %b) {332; CHECK-LABEL: whilehi_d_ww:333; CHECK: // %bb.0:334; CHECK-NEXT: whilehi p0.d, w0, w1335; CHECK-NEXT: ret336 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilehi.nxv2i1.i32(i32 %a, i32 %b)337 ret <vscale x 2 x i1> %out338}339 340define <vscale x 2 x i1> @whilehi_d_xx(i64 %a, i64 %b) {341; CHECK-LABEL: whilehi_d_xx:342; CHECK: // %bb.0:343; CHECK-NEXT: whilehi p0.d, x0, x1344; CHECK-NEXT: ret345 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilehi.nxv2i1.i64(i64 %a, i64 %b)346 ret <vscale x 2 x i1> %out347}348 349; Ensure we don't convert constant decrementing while instructions to ptrue.350define <vscale x 16 x i1> @whilehi_b_ii() {351; CHECK-LABEL: whilehi_b_ii:352; CHECK: // %bb.0: // %entry353; CHECK-NEXT: mov w8, #2 // =0x2354; CHECK-NEXT: mov w9, #8 // =0x8355; CHECK-NEXT: whilehi p0.b, x9, x8356; CHECK-NEXT: ret357entry:358 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64 8, i64 2)359 ret <vscale x 16 x i1> %out360}361 362declare <vscale x 16 x i1> @llvm.aarch64.sve.whilege.nxv16i1.i32(i32, i32)363declare <vscale x 16 x i1> @llvm.aarch64.sve.whilege.nxv16i1.i64(i64, i64)364declare <vscale x 8 x i1> @llvm.aarch64.sve.whilege.nxv8i1.i32(i32, i32)365declare <vscale x 8 x i1> @llvm.aarch64.sve.whilege.nxv8i1.i64(i64, i64)366declare <vscale x 4 x i1> @llvm.aarch64.sve.whilege.nxv4i1.i32(i32, i32)367declare <vscale x 4 x i1> @llvm.aarch64.sve.whilege.nxv4i1.i64(i64, i64)368declare <vscale x 2 x i1> @llvm.aarch64.sve.whilege.nxv2i1.i32(i32, i32)369declare <vscale x 2 x i1> @llvm.aarch64.sve.whilege.nxv2i1.i64(i64, i64)370 371declare <vscale x 16 x i1> @llvm.aarch64.sve.whilehs.nxv16i1.i32(i32, i32)372declare <vscale x 16 x i1> @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64, i64)373declare <vscale x 8 x i1> @llvm.aarch64.sve.whilehs.nxv8i1.i32(i32, i32)374declare <vscale x 8 x i1> @llvm.aarch64.sve.whilehs.nxv8i1.i64(i64, i64)375declare <vscale x 4 x i1> @llvm.aarch64.sve.whilehs.nxv4i1.i32(i32, i32)376declare <vscale x 4 x i1> @llvm.aarch64.sve.whilehs.nxv4i1.i64(i64, i64)377declare <vscale x 2 x i1> @llvm.aarch64.sve.whilehs.nxv2i1.i32(i32, i32)378declare <vscale x 2 x i1> @llvm.aarch64.sve.whilehs.nxv2i1.i64(i64, i64)379 380declare <vscale x 16 x i1> @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32, i32)381declare <vscale x 16 x i1> @llvm.aarch64.sve.whilegt.nxv16i1.i64(i64, i64)382declare <vscale x 8 x i1> @llvm.aarch64.sve.whilegt.nxv8i1.i32(i32, i32)383declare <vscale x 8 x i1> @llvm.aarch64.sve.whilegt.nxv8i1.i64(i64, i64)384declare <vscale x 4 x i1> @llvm.aarch64.sve.whilegt.nxv4i1.i32(i32, i32)385declare <vscale x 4 x i1> @llvm.aarch64.sve.whilegt.nxv4i1.i64(i64, i64)386declare <vscale x 2 x i1> @llvm.aarch64.sve.whilegt.nxv2i1.i32(i32, i32)387declare <vscale x 2 x i1> @llvm.aarch64.sve.whilegt.nxv2i1.i64(i64, i64)388 389declare <vscale x 16 x i1> @llvm.aarch64.sve.whilehi.nxv16i1.i32(i32, i32)390declare <vscale x 16 x i1> @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64, i64)391declare <vscale x 8 x i1> @llvm.aarch64.sve.whilehi.nxv8i1.i32(i32, i32)392declare <vscale x 8 x i1> @llvm.aarch64.sve.whilehi.nxv8i1.i64(i64, i64)393declare <vscale x 4 x i1> @llvm.aarch64.sve.whilehi.nxv4i1.i32(i32, i32)394declare <vscale x 4 x i1> @llvm.aarch64.sve.whilehi.nxv4i1.i64(i64, i64)395declare <vscale x 2 x i1> @llvm.aarch64.sve.whilehi.nxv2i1.i32(i32, i32)396declare <vscale x 2 x i1> @llvm.aarch64.sve.whilehi.nxv2i1.i64(i64, i64)397