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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s3; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve,+sme < %s | FileCheck %s4; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -force-streaming < %s | FileCheck %s5 6;7; SADALP8;9 10define <vscale x 8 x i16> @sadalp_i8(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 16 x i8> %b) {11; CHECK-LABEL: sadalp_i8:12; CHECK: // %bb.0:13; CHECK-NEXT: sadalp z0.h, p0/m, z1.b14; CHECK-NEXT: ret15 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.sadalp.nxv8i16(<vscale x 8 x i1> %pg,16 <vscale x 8 x i16> %a,17 <vscale x 16 x i8> %b)18 ret <vscale x 8 x i16> %out19}20 21define <vscale x 4 x i32> @sadalp_i16(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 8 x i16> %b) {22; CHECK-LABEL: sadalp_i16:23; CHECK: // %bb.0:24; CHECK-NEXT: sadalp z0.s, p0/m, z1.h25; CHECK-NEXT: ret26 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.sadalp.nxv4i32(<vscale x 4 x i1> %pg,27 <vscale x 4 x i32> %a,28 <vscale x 8 x i16> %b)29 ret <vscale x 4 x i32> %out30}31 32define <vscale x 2 x i64> @sadalp_i32(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 4 x i32> %b) {33; CHECK-LABEL: sadalp_i32:34; CHECK: // %bb.0:35; CHECK-NEXT: sadalp z0.d, p0/m, z1.s36; CHECK-NEXT: ret37 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.sadalp.nxv2i64(<vscale x 2 x i1> %pg,38 <vscale x 2 x i64> %a,39 <vscale x 4 x i32> %b)40 ret <vscale x 2 x i64> %out41}42 43;44; UADALP45;46 47define <vscale x 8 x i16> @uadalp_i8(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 16 x i8> %b) {48; CHECK-LABEL: uadalp_i8:49; CHECK: // %bb.0:50; CHECK-NEXT: uadalp z0.h, p0/m, z1.b51; CHECK-NEXT: ret52 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.uadalp.nxv8i16(<vscale x 8 x i1> %pg,53 <vscale x 8 x i16> %a,54 <vscale x 16 x i8> %b)55 ret <vscale x 8 x i16> %out56}57 58define <vscale x 4 x i32> @uadalp_i16(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 8 x i16> %b) {59; CHECK-LABEL: uadalp_i16:60; CHECK: // %bb.0:61; CHECK-NEXT: uadalp z0.s, p0/m, z1.h62; CHECK-NEXT: ret63 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.uadalp.nxv4i32(<vscale x 4 x i1> %pg,64 <vscale x 4 x i32> %a,65 <vscale x 8 x i16> %b)66 ret <vscale x 4 x i32> %out67}68 69define <vscale x 2 x i64> @uadalp_i32(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 4 x i32> %b) {70; CHECK-LABEL: uadalp_i32:71; CHECK: // %bb.0:72; CHECK-NEXT: uadalp z0.d, p0/m, z1.s73; CHECK-NEXT: ret74 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uadalp.nxv2i64(<vscale x 2 x i1> %pg,75 <vscale x 2 x i64> %a,76 <vscale x 4 x i32> %b)77 ret <vscale x 2 x i64> %out78}79 80declare <vscale x 8 x i16> @llvm.aarch64.sve.sadalp.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 16 x i8>)81declare <vscale x 4 x i32> @llvm.aarch64.sve.sadalp.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 8 x i16>)82declare <vscale x 2 x i64> @llvm.aarch64.sve.sadalp.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 4 x i32>)83 84declare <vscale x 8 x i16> @llvm.aarch64.sve.uadalp.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 16 x i8>)85declare <vscale x 4 x i32> @llvm.aarch64.sve.uadalp.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 8 x i16>)86declare <vscale x 2 x i64> @llvm.aarch64.sve.uadalp.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 4 x i32>)87