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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2p1 < %s | FileCheck %s3; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve,+sme2p1 < %s | FileCheck %s4; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme2p1 -force-streaming < %s | FileCheck %s5; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme,+sve2p1 -force-streaming < %s | FileCheck %s6 7;8; ST2Q9;10define void @st2q_ss_i8(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i1> %pred, ptr %addr, i64 %offset) {11; CHECK-LABEL: st2q_ss_i8:12; CHECK: // %bb.0:13; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z114; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z115; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, x1, lsl #4]16; CHECK-NEXT: ret17 %1 = getelementptr i128, ptr %addr, i64 %offset18 call void @llvm.aarch64.sve.st2q.nxv16i8(<vscale x 16 x i8>%v0, <vscale x 16 x i8> %v1 ,19 <vscale x 16 x i1> %pred,20 ptr %1)21 ret void22}23 24define void @st2q_ss_i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1, <vscale x 8 x i1> %pred, ptr %addr, i64 %offset) {25; CHECK-LABEL: st2q_ss_i16:26; CHECK: // %bb.0:27; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z128; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z129; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, x1, lsl #4]30; CHECK-NEXT: ret31 %1 = getelementptr i128, ptr %addr, i64 %offset32 call void @llvm.aarch64.sve.st2q.nxv8i16(<vscale x 8 x i16> %v0,33 <vscale x 8 x i16> %v1,34 <vscale x 8 x i1> %pred,35 ptr %1)36 ret void37}38 39define void @st2q_ss_i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1, <vscale x 4 x i1> %pred, ptr %addr, i64 %offset) {40; CHECK-LABEL: st2q_ss_i32:41; CHECK: // %bb.0:42; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z143; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z144; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, x1, lsl #4]45; CHECK-NEXT: ret46 %1 = getelementptr i128, ptr %addr, i64 %offset47 call void @llvm.aarch64.sve.st2q.nxv4i32(<vscale x 4 x i32> %v0,48 <vscale x 4 x i32> %v1,49 <vscale x 4 x i1> %pred,50 ptr %1)51 ret void52}53 54define void @st2q_ss_i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1, <vscale x 2 x i1> %pred, ptr %addr, i64 %offset) {55; CHECK-LABEL: st2q_ss_i64:56; CHECK: // %bb.0:57; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z158; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z159; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, x1, lsl #4]60; CHECK-NEXT: ret61 %1 = getelementptr i128, ptr %addr, i64 %offset62 call void @llvm.aarch64.sve.st2q.nxv2i64(<vscale x 2 x i64> %v0,63 <vscale x 2 x i64> %v1,64 <vscale x 2 x i1> %pred,65 ptr %1)66 ret void67}68 69define void @st2q_ss_f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1, <vscale x 8 x i1> %pred, ptr %addr, i64 %offset) {70; CHECK-LABEL: st2q_ss_f16:71; CHECK: // %bb.0:72; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z173; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z174; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, x1, lsl #4]75; CHECK-NEXT: ret76 %1 = getelementptr i128, ptr %addr, i64 %offset77 call void @llvm.aarch64.sve.st2q.nxv8f16(<vscale x 8 x half> %v0,78 <vscale x 8 x half> %v1,79 <vscale x 8 x i1> %pred,80 ptr %1)81 ret void82}83 84define void @st2q_ss_f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1, <vscale x 4 x i1> %pred, ptr %addr, i64 %offset) {85; CHECK-LABEL: st2q_ss_f32:86; CHECK: // %bb.0:87; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z188; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z189; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, x1, lsl #4]90; CHECK-NEXT: ret91 %1 = getelementptr i128, ptr %addr, i64 %offset92 call void @llvm.aarch64.sve.st2q.nxv4f32(<vscale x 4 x float> %v0,93 <vscale x 4 x float> %v1,94 <vscale x 4 x i1> %pred,95 ptr %1)96 ret void97}98 99define void @st2q_ss_f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1, <vscale x 2 x i1> %pred, ptr %addr, i64 %offset) {100; CHECK-LABEL: st2q_ss_f64:101; CHECK: // %bb.0:102; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1103; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1104; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, x1, lsl #4]105; CHECK-NEXT: ret106 %1 = getelementptr i128, ptr %addr, i64 %offset107 call void @llvm.aarch64.sve.st2q.nxv2f64(<vscale x 2 x double> %v0,108 <vscale x 2 x double> %v1,109 <vscale x 2 x i1> %pred,110 ptr %1)111 ret void112}113 114define void @st2q_ss_bf16(<vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat> %v1, <vscale x 8 x i1> %pred, ptr %addr, i64 %offset) {115; CHECK-LABEL: st2q_ss_bf16:116; CHECK: // %bb.0:117; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1118; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1119; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, x1, lsl #4]120; CHECK-NEXT: ret121 %1 = getelementptr i128, ptr %addr, i64 %offset122 call void @llvm.aarch64.sve.st2q.nxv8bf16(<vscale x 8 x bfloat> %v0,123 <vscale x 8 x bfloat> %v1,124 <vscale x 8 x i1> %pred,125 ptr %1)126 ret void127}128 129 130define void @st2q_si_i8_off16(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i1> %pred, ptr %addr) {131; CHECK-LABEL: st2q_si_i8_off16:132; CHECK: // %bb.0:133; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1134; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1135; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, #-16, mul vl]136; CHECK-NEXT: ret137 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 -16138 call void @llvm.aarch64.sve.st2q.nxv16i8(<vscale x 16 x i8> %v0,139 <vscale x 16 x i8> %v1,140 <vscale x 16 x i1> %pred,141 ptr %base)142 ret void143}144 145define void @st2q_si_i8_off14(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i1> %pred, ptr %addr) {146; CHECK-LABEL: st2q_si_i8_off14:147; CHECK: // %bb.0:148; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1149; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1150; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, #14, mul vl]151; CHECK-NEXT: ret152 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 14153 call void @llvm.aarch64.sve.st2q.nxv16i8(<vscale x 16 x i8> %v0,154 <vscale x 16 x i8> %v1,155 <vscale x 16 x i1> %pred,156 ptr %base)157 ret void158}159 160define void @st2q_si_i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1, <vscale x 8 x i1> %pred, ptr %base) {161; CHECK-LABEL: st2q_si_i16:162; CHECK: // %bb.0:163; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1164; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1165; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, #14, mul vl]166; CHECK-NEXT: ret167 %gep = getelementptr <vscale x 8 x i16>, ptr %base, i64 14168 call void @llvm.aarch64.sve.st2q.nxv8i16(<vscale x 8 x i16> %v0,169 <vscale x 8 x i16> %v1,170 <vscale x 8 x i1> %pred,171 ptr %gep)172 ret void173}174 175define void @st2q_si_i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1, <vscale x 4 x i1> %pred, ptr %base) {176; CHECK-LABEL: st2q_si_i32:177; CHECK: // %bb.0:178; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1179; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1180; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, #14, mul vl]181; CHECK-NEXT: ret182 %gep = getelementptr <vscale x 4 x i32>, ptr %base, i64 14183 call void @llvm.aarch64.sve.st2q.nxv4i32(<vscale x 4 x i32> %v0,184 <vscale x 4 x i32> %v1,185 <vscale x 4 x i1> %pred,186 ptr %gep)187 ret void188}189 190define void @st2q_si_i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1, <vscale x 2 x i1> %pred, ptr %base) {191; CHECK-LABEL: st2q_si_i64:192; CHECK: // %bb.0:193; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1194; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1195; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, #14, mul vl]196; CHECK-NEXT: ret197 %gep = getelementptr <vscale x 2 x i64>, ptr %base, i64 14198 call void @llvm.aarch64.sve.st2q.nxv2i64(<vscale x 2 x i64> %v0,199 <vscale x 2 x i64> %v1,200 <vscale x 2 x i1> %pred,201 ptr %gep)202 ret void203}204 205define void @st2q_si_f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1, <vscale x 8 x i1> %pred, ptr %base) {206; CHECK-LABEL: st2q_si_f16:207; CHECK: // %bb.0:208; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1209; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1210; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, #14, mul vl]211; CHECK-NEXT: ret212 %gep = getelementptr <vscale x 8 x half>, ptr %base, i64 14213 call void @llvm.aarch64.sve.st2q.nxv8f16(<vscale x 8 x half> %v0,214 <vscale x 8 x half> %v1,215 <vscale x 8 x i1> %pred,216 ptr %gep)217 ret void218}219 220define void @st2q_si_f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1, <vscale x 4 x i1> %pred, ptr %base) {221; CHECK-LABEL: st2q_si_f32:222; CHECK: // %bb.0:223; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1224; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1225; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, #14, mul vl]226; CHECK-NEXT: ret227 %gep = getelementptr <vscale x 4 x float>, ptr %base, i64 14228 call void @llvm.aarch64.sve.st2q.nxv4f32(<vscale x 4 x float> %v0,229 <vscale x 4 x float> %v1,230 <vscale x 4 x i1> %pred,231 ptr %gep)232 ret void233}234 235define void @st2q_si_f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1, <vscale x 2 x i1> %pred, ptr %base) {236; CHECK-LABEL: st2q_si_f64:237; CHECK: // %bb.0:238; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1239; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1240; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, #14, mul vl]241; CHECK-NEXT: ret242 %gep= getelementptr <vscale x 2 x double>, ptr %base, i64 14243 call void @llvm.aarch64.sve.st2q.nxv2f64(<vscale x 2 x double> %v0,244 <vscale x 2 x double> %v1,245 <vscale x 2 x i1> %pred,246 ptr %gep)247 ret void248}249 250define void @st2q_si_bf16(<vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat> %v1, <vscale x 8 x i1> %pred, ptr %base) {251; CHECK-LABEL: st2q_si_bf16:252; CHECK: // %bb.0:253; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1254; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1255; CHECK-NEXT: st2q { z0.q, z1.q }, p0, [x0, #14, mul vl]256; CHECK-NEXT: ret257 %gep = getelementptr <vscale x 8 x bfloat>, ptr %base, i64 14258 call void @llvm.aarch64.sve.st2q.nxv8bf16(<vscale x 8 x bfloat> %v0,259 <vscale x 8 x bfloat> %v1,260 <vscale x 8 x i1> %pred,261 ptr %gep)262 ret void263}264 265 266;267; ST3Q268;269define void @st3q_ss_i8(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i1> %pred, ptr %addr, i64 %offset) {270; CHECK-LABEL: st3q_ss_i8:271; CHECK: // %bb.0:272; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2273; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2274; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2275; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, x1, lsl #4]276; CHECK-NEXT: ret277 %1 = getelementptr i128, ptr %addr, i64 %offset278 call void @llvm.aarch64.sve.st3q.nxv16i8(<vscale x 16 x i8>%v0,279 <vscale x 16 x i8> %v1,280 <vscale x 16 x i8> %v2,281 <vscale x 16 x i1> %pred,282 ptr %1)283 ret void284}285 286define void @st3q_ss_i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1, <vscale x 8 x i16> %v2, <vscale x 8 x i1> %pred, ptr %addr, i64 %offset) {287; CHECK-LABEL: st3q_ss_i16:288; CHECK: // %bb.0:289; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2290; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2291; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2292; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, x1, lsl #4]293; CHECK-NEXT: ret294 %1 = getelementptr i128, ptr %addr, i64 %offset295 call void @llvm.aarch64.sve.st3q.nxv8i16(<vscale x 8 x i16> %v0,296 <vscale x 8 x i16> %v1,297 <vscale x 8 x i16> %v2,298 <vscale x 8 x i1> %pred,299 ptr %1)300 ret void301}302 303define void @st3q_ss_i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1, <vscale x 4 x i32> %v2, <vscale x 4 x i1> %pred, ptr %addr, i64 %offset) {304; CHECK-LABEL: st3q_ss_i32:305; CHECK: // %bb.0:306; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2307; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2308; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2309; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, x1, lsl #4]310; CHECK-NEXT: ret311 %1 = getelementptr i128, ptr %addr, i64 %offset312 call void @llvm.aarch64.sve.st3q.nxv4i32(<vscale x 4 x i32> %v0,313 <vscale x 4 x i32> %v1,314 <vscale x 4 x i32> %v2,315 <vscale x 4 x i1> %pred,316 ptr %1)317 ret void318}319 320define void @st3q_ss_i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1, <vscale x 2 x i64> %v2, <vscale x 2 x i1> %pred, ptr %addr, i64 %offset) {321; CHECK-LABEL: st3q_ss_i64:322; CHECK: // %bb.0:323; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2324; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2325; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2326; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, x1, lsl #4]327; CHECK-NEXT: ret328 %1 = getelementptr i128, ptr %addr, i64 %offset329 call void @llvm.aarch64.sve.st3q.nxv2i64(<vscale x 2 x i64> %v0,330 <vscale x 2 x i64> %v1,331 <vscale x 2 x i64> %v2,332 <vscale x 2 x i1> %pred,333 ptr %1)334 ret void335}336 337define void @st3q_ss_f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1, <vscale x 8 x half> %v2, <vscale x 8 x i1> %pred, ptr %addr, i64 %offset) {338; CHECK-LABEL: st3q_ss_f16:339; CHECK: // %bb.0:340; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2341; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2342; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2343; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, x1, lsl #4]344; CHECK-NEXT: ret345 %1 = getelementptr i128, ptr %addr, i64 %offset346 call void @llvm.aarch64.sve.st3q.nxv8f16(<vscale x 8 x half> %v0,347 <vscale x 8 x half> %v1,348 <vscale x 8 x half> %v2,349 <vscale x 8 x i1> %pred,350 ptr %1)351 ret void352}353 354define void @st3q_ss_f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1, <vscale x 4 x float> %v2, <vscale x 4 x i1> %pred, ptr %addr, i64 %offset) {355; CHECK-LABEL: st3q_ss_f32:356; CHECK: // %bb.0:357; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2358; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2359; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2360; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, x1, lsl #4]361; CHECK-NEXT: ret362 %1 = getelementptr i128, ptr %addr, i64 %offset363 call void @llvm.aarch64.sve.st3q.nxv4f32(<vscale x 4 x float> %v0,364 <vscale x 4 x float> %v1,365 <vscale x 4 x float> %v2,366 <vscale x 4 x i1> %pred,367 ptr %1)368 ret void369}370 371define void @st3q_ss_f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1, <vscale x 2 x double> %v2, <vscale x 2 x i1> %pred, ptr %addr, i64 %offset) {372; CHECK-LABEL: st3q_ss_f64:373; CHECK: // %bb.0:374; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2375; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2376; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2377; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, x1, lsl #4]378; CHECK-NEXT: ret379 %1 = getelementptr i128, ptr %addr, i64 %offset380 call void @llvm.aarch64.sve.st3q.nxv2f64(<vscale x 2 x double> %v0,381 <vscale x 2 x double> %v1,382 <vscale x 2 x double> %v2,383 <vscale x 2 x i1> %pred,384 ptr %1)385 ret void386}387 388define void @st3q_ss_bf16(<vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat> %v1, <vscale x 8 x bfloat> %v2, <vscale x 8 x i1> %pred, ptr %addr, i64 %offset) {389; CHECK-LABEL: st3q_ss_bf16:390; CHECK: // %bb.0:391; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2392; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2393; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2394; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, x1, lsl #4]395; CHECK-NEXT: ret396 %1 = getelementptr i128, ptr %addr, i64 %offset397 call void @llvm.aarch64.sve.st3q.nxv8bf16(<vscale x 8 x bfloat> %v0,398 <vscale x 8 x bfloat> %v1,399 <vscale x 8 x bfloat> %v2,400 <vscale x 8 x i1> %pred,401 ptr %1)402 ret void403}404 405define void @st3q_si_i8_off24(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i1> %pred, ptr %addr) {406; CHECK-LABEL: st3q_si_i8_off24:407; CHECK: // %bb.0:408; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2409; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2410; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2411; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, #-24, mul vl]412; CHECK-NEXT: ret413 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 -24414 call void @llvm.aarch64.sve.st3q.nxv16i8(<vscale x 16 x i8> %v0,415 <vscale x 16 x i8> %v1,416 <vscale x 16 x i8> %v2,417 <vscale x 16 x i1> %pred,418 ptr %base)419 ret void420}421 422define void @st3q_si_i8_off21(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i1> %pred, ptr %addr) {423; CHECK-LABEL: st3q_si_i8_off21:424; CHECK: // %bb.0:425; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2426; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2427; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2428; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, #21, mul vl]429; CHECK-NEXT: ret430 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 21431 call void @llvm.aarch64.sve.st3q.nxv16i8(<vscale x 16 x i8> %v0,432 <vscale x 16 x i8> %v1,433 <vscale x 16 x i8> %v2,434 <vscale x 16 x i1> %pred,435 ptr %base)436 ret void437}438 439define void @st3q_si_i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1, <vscale x 8 x i16> %v2, <vscale x 8 x i1> %pred, ptr %addr) {440; CHECK-LABEL: st3q_si_i16:441; CHECK: // %bb.0:442; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2443; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2444; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2445; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, #21, mul vl]446; CHECK-NEXT: ret447 %base = getelementptr <vscale x 8 x i16>, ptr %addr, i64 21448 call void @llvm.aarch64.sve.st3q.nxv8i16(<vscale x 8 x i16> %v0,449 <vscale x 8 x i16> %v1,450 <vscale x 8 x i16> %v2,451 <vscale x 8 x i1> %pred,452 ptr %base)453 ret void454}455 456define void @st3q_si_i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1, <vscale x 4 x i32> %v2, <vscale x 4 x i1> %pred, ptr %addr) {457; CHECK-LABEL: st3q_si_i32:458; CHECK: // %bb.0:459; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2460; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2461; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2462; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, #21, mul vl]463; CHECK-NEXT: ret464 %base = getelementptr <vscale x 4 x i32>, ptr %addr, i64 21465 call void @llvm.aarch64.sve.st3q.nxv4i32(<vscale x 4 x i32> %v0,466 <vscale x 4 x i32> %v1,467 <vscale x 4 x i32> %v2,468 <vscale x 4 x i1> %pred,469 ptr %base)470 ret void471}472 473define void @st3q_si_i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1,<vscale x 2 x i64> %v2, <vscale x 2 x i1> %pred, ptr %addr) {474; CHECK-LABEL: st3q_si_i64:475; CHECK: // %bb.0:476; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2477; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2478; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2479; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, #21, mul vl]480; CHECK-NEXT: ret481 %base = getelementptr <vscale x 2 x i64>, ptr %addr, i64 21482 call void @llvm.aarch64.sve.st3q.nxv2i64(<vscale x 2 x i64> %v0,483 <vscale x 2 x i64> %v1,484 <vscale x 2 x i64> %v2,485 <vscale x 2 x i1> %pred,486 ptr %base)487 ret void488}489 490define void @st3q_si_f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1, <vscale x 8 x half> %v2, <vscale x 8 x i1> %pred, ptr %addr) {491; CHECK-LABEL: st3q_si_f16:492; CHECK: // %bb.0:493; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2494; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2495; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2496; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, #21, mul vl]497; CHECK-NEXT: ret498 %base = getelementptr <vscale x 8 x half>, ptr %addr, i64 21499 call void @llvm.aarch64.sve.st3q.nxv8f16(<vscale x 8 x half> %v0,500 <vscale x 8 x half> %v1,501 <vscale x 8 x half> %v2,502 <vscale x 8 x i1> %pred,503 ptr %base)504 ret void505}506 507define void @st3q_si_f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1, <vscale x 4 x float> %v2, <vscale x 4 x i1> %pred, ptr %addr) {508; CHECK-LABEL: st3q_si_f32:509; CHECK: // %bb.0:510; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2511; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2512; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2513; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, #21, mul vl]514; CHECK-NEXT: ret515 %base = getelementptr <vscale x 4 x float>, ptr %addr, i64 21516 call void @llvm.aarch64.sve.st3q.nxv4f32(<vscale x 4 x float> %v0,517 <vscale x 4 x float> %v1,518 <vscale x 4 x float> %v2,519 <vscale x 4 x i1> %pred,520 ptr %base)521 ret void522}523 524define void @st3q_si_f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1, <vscale x 2 x double> %v2, <vscale x 2 x i1> %pred, ptr %addr) {525; CHECK-LABEL: st3q_si_f64:526; CHECK: // %bb.0:527; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2528; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2529; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2530; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, #21, mul vl]531; CHECK-NEXT: ret532 %base = getelementptr <vscale x 2 x double>, ptr %addr, i64 21533 call void @llvm.aarch64.sve.st3q.nxv2f64(<vscale x 2 x double> %v0,534 <vscale x 2 x double> %v1,535 <vscale x 2 x double> %v2,536 <vscale x 2 x i1> %pred,537 ptr %base)538 ret void539}540 541define void @st3q_si_bf16(<vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat> %v1, <vscale x 8 x bfloat> %v2, <vscale x 8 x i1> %pred, ptr %addr) {542; CHECK-LABEL: st3q_si_bf16:543; CHECK: // %bb.0:544; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2545; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2546; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2547; CHECK-NEXT: st3q { z0.q - z2.q }, p0, [x0, #21, mul vl]548; CHECK-NEXT: ret549 %base = getelementptr <vscale x 8 x bfloat>, ptr %addr, i64 21550 call void @llvm.aarch64.sve.st3q.nxv8bf16(<vscale x 8 x bfloat> %v0,551 <vscale x 8 x bfloat> %v1,552 <vscale x 8 x bfloat> %v2,553 <vscale x 8 x i1> %pred,554 ptr %base)555 ret void556}557 558;559; ST4Q560;561define void @st4q_ss_i8(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2,<vscale x 16 x i8> %v3, <vscale x 16 x i1> %pred, ptr %addr, i64 %offset) {562; CHECK-LABEL: st4q_ss_i8:563; CHECK: // %bb.0:564; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3565; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3566; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3567; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3568; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, x1, lsl #4]569; CHECK-NEXT: ret570 %1 = getelementptr i128, ptr %addr, i64 %offset571 call void @llvm.aarch64.sve.st4q.nxv16i8(<vscale x 16 x i8>%v0,572 <vscale x 16 x i8> %v1,573 <vscale x 16 x i8> %v2,574 <vscale x 16 x i8> %v3,575 <vscale x 16 x i1> %pred,576 ptr %1)577 ret void578}579 580define void @st4q_ss_i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1, <vscale x 8 x i16> %v2, <vscale x 8 x i16> %v3, <vscale x 8 x i1> %pred, ptr %addr, i64 %offset) {581; CHECK-LABEL: st4q_ss_i16:582; CHECK: // %bb.0:583; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3584; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3585; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3586; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3587; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, x1, lsl #4]588; CHECK-NEXT: ret589 %1 = getelementptr i128, ptr %addr, i64 %offset590 call void @llvm.aarch64.sve.st4q.nxv8i16(<vscale x 8 x i16> %v0,591 <vscale x 8 x i16> %v1,592 <vscale x 8 x i16> %v2,593 <vscale x 8 x i16> %v3,594 <vscale x 8 x i1> %pred,595 ptr %1)596 ret void597}598 599define void @st4q_ss_i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1, <vscale x 4 x i32> %v2, <vscale x 4 x i32> %v3, <vscale x 4 x i1> %pred, ptr %addr, i64 %offset) {600; CHECK-LABEL: st4q_ss_i32:601; CHECK: // %bb.0:602; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3603; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3604; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3605; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3606; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, x1, lsl #4]607; CHECK-NEXT: ret608 %1 = getelementptr i128, ptr %addr, i64 %offset609 call void @llvm.aarch64.sve.st4q.nxv4i32(<vscale x 4 x i32> %v0,610 <vscale x 4 x i32> %v1,611 <vscale x 4 x i32> %v2,612 <vscale x 4 x i32> %v3,613 <vscale x 4 x i1> %pred,614 ptr %1)615 ret void616}617 618define void @st4q_ss_i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1, <vscale x 2 x i64> %v2, <vscale x 2 x i64> %v3, <vscale x 2 x i1> %pred, ptr %addr, i64 %offset) {619; CHECK-LABEL: st4q_ss_i64:620; CHECK: // %bb.0:621; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3622; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3623; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3624; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3625; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, x1, lsl #4]626; CHECK-NEXT: ret627 %1 = getelementptr i128, ptr %addr, i64 %offset628 call void @llvm.aarch64.sve.st4q.nxv2i64(<vscale x 2 x i64> %v0,629 <vscale x 2 x i64> %v1,630 <vscale x 2 x i64> %v2,631 <vscale x 2 x i64> %v3,632 <vscale x 2 x i1> %pred,633 ptr %1)634 ret void635}636 637define void @st4q_ss_f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1, <vscale x 8 x half> %v2, <vscale x 8 x half> %v3, <vscale x 8 x i1> %pred, ptr %addr, i64 %offset) {638; CHECK-LABEL: st4q_ss_f16:639; CHECK: // %bb.0:640; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3641; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3642; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3643; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3644; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, x1, lsl #4]645; CHECK-NEXT: ret646 %1 = getelementptr i128, ptr %addr, i64 %offset647 call void @llvm.aarch64.sve.st4q.nxv8f16(<vscale x 8 x half> %v0,648 <vscale x 8 x half> %v1,649 <vscale x 8 x half> %v2,650 <vscale x 8 x half> %v3,651 <vscale x 8 x i1> %pred,652 ptr %1)653 ret void654}655 656define void @st4q_ss_f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1, <vscale x 4 x float> %v2, <vscale x 4 x float> %v3, <vscale x 4 x i1> %pred, ptr %addr, i64 %offset) {657; CHECK-LABEL: st4q_ss_f32:658; CHECK: // %bb.0:659; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3660; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3661; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3662; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3663; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, x1, lsl #4]664; CHECK-NEXT: ret665 %1 = getelementptr i128, ptr %addr, i64 %offset666 call void @llvm.aarch64.sve.st4q.nxv4f32(<vscale x 4 x float> %v0,667 <vscale x 4 x float> %v1,668 <vscale x 4 x float> %v2,669 <vscale x 4 x float> %v3,670 <vscale x 4 x i1> %pred,671 ptr %1)672 ret void673}674 675define void @st4q_ss_f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1, <vscale x 2 x double> %v2, <vscale x 2 x double> %v3, <vscale x 2 x i1> %pred, ptr %addr, i64 %offset) {676; CHECK-LABEL: st4q_ss_f64:677; CHECK: // %bb.0:678; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3679; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3680; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3681; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3682; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, x1, lsl #4]683; CHECK-NEXT: ret684 %1 = getelementptr i128, ptr %addr, i64 %offset685 call void @llvm.aarch64.sve.st4q.nxv2f64(<vscale x 2 x double> %v0,686 <vscale x 2 x double> %v1,687 <vscale x 2 x double> %v2,688 <vscale x 2 x double> %v3,689 <vscale x 2 x i1> %pred,690 ptr %1)691 ret void692}693 694define void @st4q_ss_bf16(<vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat> %v1, <vscale x 8 x bfloat> %v2, <vscale x 8 x bfloat> %v3, <vscale x 8 x i1> %pred, ptr %addr, i64 %offset) {695; CHECK-LABEL: st4q_ss_bf16:696; CHECK: // %bb.0:697; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3698; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3699; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3700; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3701; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, x1, lsl #4]702; CHECK-NEXT: ret703 %1 = getelementptr i128, ptr %addr, i64 %offset704 call void @llvm.aarch64.sve.st4q.nxv8bf16(<vscale x 8 x bfloat> %v0,705 <vscale x 8 x bfloat> %v1,706 <vscale x 8 x bfloat> %v2,707 <vscale x 8 x bfloat> %v3,708 <vscale x 8 x i1> %pred,709 ptr %1)710 ret void711}712 713define void @st4q_si_i8_off32(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2,<vscale x 16 x i8> %v3, <vscale x 16 x i1> %pred, ptr %addr) {714; CHECK-LABEL: st4q_si_i8_off32:715; CHECK: // %bb.0:716; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3717; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3718; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3719; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3720; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, #-32, mul vl]721; CHECK-NEXT: ret722 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 -32723 call void @llvm.aarch64.sve.st4q.nxv16i8(<vscale x 16 x i8> %v0,724 <vscale x 16 x i8> %v1,725 <vscale x 16 x i8> %v2,726 <vscale x 16 x i8> %v3,727 <vscale x 16 x i1> %pred,728 ptr %base)729 ret void730}731 732define void @st4q_si_i8_off28(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2,<vscale x 16 x i8> %v3, <vscale x 16 x i1> %pred, ptr %addr) {733; CHECK-LABEL: st4q_si_i8_off28:734; CHECK: // %bb.0:735; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3736; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3737; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3738; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3739; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, #28, mul vl]740; CHECK-NEXT: ret741 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 28742 call void @llvm.aarch64.sve.st4q.nxv16i8(<vscale x 16 x i8> %v0,743 <vscale x 16 x i8> %v1,744 <vscale x 16 x i8> %v2,745 <vscale x 16 x i8> %v3,746 <vscale x 16 x i1> %pred,747 ptr %base)748 ret void749}750 751define void @st4q_si_i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1, <vscale x 8 x i16> %v2, <vscale x 8 x i16> %v3, <vscale x 8 x i1> %pred, ptr %addr) {752; CHECK-LABEL: st4q_si_i16:753; CHECK: // %bb.0:754; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3755; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3756; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3757; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3758; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, #28, mul vl]759; CHECK-NEXT: ret760 %base = getelementptr <vscale x 8 x i16>, ptr %addr, i64 28761 call void @llvm.aarch64.sve.st4q.nxv8i16(<vscale x 8 x i16> %v0,762 <vscale x 8 x i16> %v1,763 <vscale x 8 x i16> %v2,764 <vscale x 8 x i16> %v3,765 <vscale x 8 x i1> %pred,766 ptr %base)767 ret void768}769 770define void @st4q_si_i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1, <vscale x 4 x i32> %v2, <vscale x 4 x i32> %v3, <vscale x 4 x i1> %pred, ptr %addr) {771; CHECK-LABEL: st4q_si_i32:772; CHECK: // %bb.0:773; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3774; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3775; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3776; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3777; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, #28, mul vl]778; CHECK-NEXT: ret779 %base1 = getelementptr <vscale x 4 x i32>, ptr %addr, i64 28780 call void @llvm.aarch64.sve.st4q.nxv4i32(<vscale x 4 x i32> %v0,781 <vscale x 4 x i32> %v1,782 <vscale x 4 x i32> %v2,783 <vscale x 4 x i32> %v3,784 <vscale x 4 x i1> %pred,785 ptr %base1)786 ret void787}788 789define void @st4q_si_i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1, <vscale x 2 x i64> %v2, <vscale x 2 x i64> %v3, <vscale x 2 x i1> %pred, ptr %addr) {790; CHECK-LABEL: st4q_si_i64:791; CHECK: // %bb.0:792; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3793; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3794; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3795; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3796; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, #28, mul vl]797; CHECK-NEXT: ret798 %base = getelementptr <vscale x 2 x i64>, ptr %addr, i64 28799 call void @llvm.aarch64.sve.st4q.nxv2i64(<vscale x 2 x i64> %v0,800 <vscale x 2 x i64> %v1,801 <vscale x 2 x i64> %v2,802 <vscale x 2 x i64> %v3,803 <vscale x 2 x i1> %pred,804 ptr %base)805 ret void806}807 808define void @st4q_si_f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1, <vscale x 8 x half> %v2, <vscale x 8 x half> %v3, <vscale x 8 x i1> %pred, ptr %addr) {809; CHECK-LABEL: st4q_si_f16:810; CHECK: // %bb.0:811; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3812; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3813; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3814; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3815; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, #28, mul vl]816; CHECK-NEXT: ret817 %base = getelementptr <vscale x 8 x half>, ptr %addr, i64 28818 call void @llvm.aarch64.sve.st4q.nxv8f16(<vscale x 8 x half> %v0,819 <vscale x 8 x half> %v1,820 <vscale x 8 x half> %v2,821 <vscale x 8 x half> %v3,822 <vscale x 8 x i1> %pred,823 ptr %base)824 ret void825}826 827define void @st4q_si_f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1, <vscale x 4 x float> %v2,<vscale x 4 x float> %v3, <vscale x 4 x i1> %pred, ptr %addr) {828; CHECK-LABEL: st4q_si_f32:829; CHECK: // %bb.0:830; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3831; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3832; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3833; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3834; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, #28, mul vl]835; CHECK-NEXT: ret836 %base = getelementptr <vscale x 4 x float>, ptr %addr, i64 28837 call void @llvm.aarch64.sve.st4q.nxv4f32(<vscale x 4 x float> %v0,838 <vscale x 4 x float> %v1,839 <vscale x 4 x float> %v2,840 <vscale x 4 x float> %v3,841 <vscale x 4 x i1> %pred,842 ptr %base)843 ret void844}845 846define void @st4q_si_f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1, <vscale x 2 x double> %v2, <vscale x 2 x double> %v3, <vscale x 2 x i1> %pred, ptr %addr) {847; CHECK-LABEL: st4q_si_f64:848; CHECK: // %bb.0:849; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3850; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3851; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3852; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3853; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, #28, mul vl]854; CHECK-NEXT: ret855 %base = getelementptr <vscale x 2 x double>, ptr %addr, i64 28856 call void @llvm.aarch64.sve.st4q.nxv2f64(<vscale x 2 x double> %v0,857 <vscale x 2 x double> %v1,858 <vscale x 2 x double> %v2,859 <vscale x 2 x double> %v3,860 <vscale x 2 x i1> %pred,861 ptr %base)862 ret void863}864 865define void @st4q_si_bf16(<vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat> %v1, <vscale x 8 x bfloat> %v2, <vscale x 8 x bfloat> %v3, <vscale x 8 x i1> %pred, ptr %addr) {866; CHECK-LABEL: st4q_si_bf16:867; CHECK: // %bb.0:868; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3869; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3870; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3871; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3872; CHECK-NEXT: st4q { z0.q - z3.q }, p0, [x0, #28, mul vl]873; CHECK-NEXT: ret874 %base = getelementptr <vscale x 8 x bfloat>, ptr %addr, i64 28875 call void @llvm.aarch64.sve.st4q.nxv8bf16(<vscale x 8 x bfloat> %v0,876 <vscale x 8 x bfloat> %v1,877 <vscale x 8 x bfloat> %v2,878 <vscale x 8 x bfloat> %v3,879 <vscale x 8 x i1> %pred,880 ptr %base)881 ret void882}883 884 885declare void @llvm.aarch64.sve.st2q.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i1>, ptr)886declare void @llvm.aarch64.sve.st2q.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i1>, ptr)887declare void @llvm.aarch64.sve.st2q.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i1>, ptr)888declare void @llvm.aarch64.sve.st2q.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i1>, ptr)889 890declare void @llvm.aarch64.sve.st2q.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x i1>, ptr)891declare void @llvm.aarch64.sve.st2q.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>, ptr)892declare void @llvm.aarch64.sve.st2q.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>, ptr)893declare void @llvm.aarch64.sve.st2q.nxv8bf16(<vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x i1>, ptr)894 895declare void @llvm.aarch64.sve.st3q.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>,<vscale x 16 x i8>, <vscale x 16 x i1>, ptr)896declare void @llvm.aarch64.sve.st3q.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i1>, ptr)897declare void @llvm.aarch64.sve.st3q.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i1>, ptr)898declare void @llvm.aarch64.sve.st3q.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i1>, ptr)899 900declare void @llvm.aarch64.sve.st3q.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x i1>, ptr)901declare void @llvm.aarch64.sve.st3q.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>, ptr)902declare void @llvm.aarch64.sve.st3q.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>, ptr)903declare void @llvm.aarch64.sve.st3q.nxv8bf16(<vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x i1>, ptr)904 905declare void @llvm.aarch64.sve.st4q.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>,<vscale x 16 x i1>, ptr)906declare void @llvm.aarch64.sve.st4q.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i1>, ptr)907declare void @llvm.aarch64.sve.st4q.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>,<vscale x 4 x i1>, ptr)908declare void @llvm.aarch64.sve.st4q.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i1>, ptr)909 910declare void @llvm.aarch64.sve.st4q.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x i1>, ptr)911declare void @llvm.aarch64.sve.st4q.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>, ptr)912declare void @llvm.aarch64.sve.st4q.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>, ptr)913declare void @llvm.aarch64.sve.st4q.nxv8bf16(<vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x i1>, ptr)914