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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2p1,+bf16 < %s | FileCheck %s3 4;5; ST1Q: vector base + unscaled offset6; e.g. st1q { z0.q }, p0, [z1.d, x0]7;8 9define void @sst1_scatter_u64base_offset_i8(<vscale x 16 x i8> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {10; CHECK-LABEL: sst1_scatter_u64base_offset_i8:11; CHECK: // %bb.0:12; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]13; CHECK-NEXT: ret14 call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv16i8.nxv2i64(<vscale x 16 x i8> %data,15 <vscale x 1 x i1> %pg,16 <vscale x 2 x i64> %b,17 i64 %offset)18 ret void19}20 21define void @sst1_scatter_u64base_offset_i16(<vscale x 8 x i16> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {22; CHECK-LABEL: sst1_scatter_u64base_offset_i16:23; CHECK: // %bb.0:24; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]25; CHECK-NEXT: ret26 call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8i16.nxv2i64(<vscale x 8 x i16> %data,27 <vscale x 1 x i1> %pg,28 <vscale x 2 x i64> %b,29 i64 %offset)30 ret void31}32 33define void @sst1_scatter_u64base_offset_i32(<vscale x 4 x i32> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {34; CHECK-LABEL: sst1_scatter_u64base_offset_i32:35; CHECK: // %bb.0:36; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]37; CHECK-NEXT: ret38 call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv4i32.nxv2i64(<vscale x 4 x i32> %data,39 <vscale x 1 x i1> %pg,40 <vscale x 2 x i64> %b,41 i64 %offset)42 ret void43}44 45define void @sst1_scatter_u64base_offset_i64(<vscale x 2 x i64> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {46; CHECK-LABEL: sst1_scatter_u64base_offset_i64:47; CHECK: // %bb.0:48; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]49; CHECK-NEXT: ret50 call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64> %data,51 <vscale x 1 x i1> %pg,52 <vscale x 2 x i64> %b,53 i64 %offset)54 ret void55}56 57define void @sst1_scatter_u64base_offset_f16(<vscale x 8 x half> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %base, i64 %offset) {58; CHECK-LABEL: sst1_scatter_u64base_offset_f16:59; CHECK: // %bb.0:60; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]61; CHECK-NEXT: ret62 call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8f16.nxv2i64(<vscale x 8 x half> %data,63 <vscale x 1 x i1> %pg,64 <vscale x 2 x i64> %base,65 i64 %offset)66 ret void67}68 69define void @sst1_scatter_u64base_offset_f32(<vscale x 4 x float> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {70; CHECK-LABEL: sst1_scatter_u64base_offset_f32:71; CHECK: // %bb.0:72; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]73; CHECK-NEXT: ret74 call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv4f32.nxv2i64(<vscale x 4 x float> %data,75 <vscale x 1 x i1> %pg,76 <vscale x 2 x i64> %b,77 i64 %offset)78 ret void79}80 81define void @sst1_scatter_u64base_offset_f64(<vscale x 2 x double> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {82; CHECK-LABEL: sst1_scatter_u64base_offset_f64:83; CHECK: // %bb.0:84; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]85; CHECK-NEXT: ret86 call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double> %data,87 <vscale x 1 x i1> %pg,88 <vscale x 2 x i64> %b,89 i64 %offset)90 ret void91}92 93define void @sst1_scatter_u64base_offset_bf16(<vscale x 8 x bfloat> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {94; CHECK-LABEL: sst1_scatter_u64base_offset_bf16:95; CHECK: // %bb.0:96; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]97; CHECK-NEXT: ret98 call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8bf16.nxv2i64(<vscale x 8 x bfloat> %data,99 <vscale x 1 x i1> %pg,100 <vscale x 2 x i64> %b,101 i64 %offset)102 ret void103}104 105define void @test_svst1q_scatter_u64offset_s8(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 16 x i8> %data) {106; CHECK-LABEL: test_svst1q_scatter_u64offset_s8:107; CHECK: // %bb.0: // %entry108; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]109; CHECK-NEXT: ret110entry:111 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv16i8(<vscale x 16 x i8> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)112 ret void113}114 115define void @test_svst1q_scatter_u64offset_u8(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 16 x i8> %data) {116; CHECK-LABEL: test_svst1q_scatter_u64offset_u8:117; CHECK: // %bb.0: // %entry118; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]119; CHECK-NEXT: ret120entry:121 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv16i8(<vscale x 16 x i8> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)122 ret void123}124 125define void @test_svst1q_scatter_u64offset_s16(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 8 x i16> %data) {126; CHECK-LABEL: test_svst1q_scatter_u64offset_s16:127; CHECK: // %bb.0: // %entry128; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]129; CHECK-NEXT: ret130entry:131 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8i16(<vscale x 8 x i16> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)132 ret void133}134 135define void @test_svst1q_scatter_u64offset_u16(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 8 x i16> %data) {136; CHECK-LABEL: test_svst1q_scatter_u64offset_u16:137; CHECK: // %bb.0: // %entry138; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]139; CHECK-NEXT: ret140entry:141 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8i16(<vscale x 8 x i16> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)142 ret void143}144 145define void @test_svst1q_scatter_u64offset_s32(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 4 x i32> %data) {146; CHECK-LABEL: test_svst1q_scatter_u64offset_s32:147; CHECK: // %bb.0: // %entry148; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]149; CHECK-NEXT: ret150entry:151 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv4i32(<vscale x 4 x i32> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)152 ret void153}154 155define void @test_svst1q_scatter_u64offset_u32(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 4 x i32> %data) {156; CHECK-LABEL: test_svst1q_scatter_u64offset_u32:157; CHECK: // %bb.0: // %entry158; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]159; CHECK-NEXT: ret160entry:161 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv4i32(<vscale x 4 x i32> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)162 ret void163}164 165define void @test_svst1q_scatter_u64offset_s64(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 2 x i64> %data) {166; CHECK-LABEL: test_svst1q_scatter_u64offset_s64:167; CHECK: // %bb.0: // %entry168; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]169; CHECK-NEXT: ret170entry:171 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv2i64(<vscale x 2 x i64> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)172 ret void173}174 175define void @test_svst1q_scatter_u64offset_u64(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 2 x i64> %data) {176; CHECK-LABEL: test_svst1q_scatter_u64offset_u64:177; CHECK: // %bb.0: // %entry178; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]179; CHECK-NEXT: ret180entry:181 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv2i64(<vscale x 2 x i64> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)182 ret void183}184 185define void @test_svst1q_scatter_u64offset_bf16(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 8 x bfloat> %data) {186; CHECK-LABEL: test_svst1q_scatter_u64offset_bf16:187; CHECK: // %bb.0: // %entry188; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]189; CHECK-NEXT: ret190entry:191 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8bf16(<vscale x 8 x bfloat> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)192 ret void193}194 195define void @test_svst1q_scatter_u64offset_f16(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 8 x half> %data) {196; CHECK-LABEL: test_svst1q_scatter_u64offset_f16:197; CHECK: // %bb.0: // %entry198; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]199; CHECK-NEXT: ret200entry:201 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8f16(<vscale x 8 x half> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)202 ret void203}204 205define void @test_svst1q_scatter_u64offset_f32(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 4 x float> %data) {206; CHECK-LABEL: test_svst1q_scatter_u64offset_f32:207; CHECK: // %bb.0: // %entry208; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]209; CHECK-NEXT: ret210entry:211 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv4f32(<vscale x 4 x float> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)212 ret void213}214 215define void @test_svst1q_scatter_u64offset_f64(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 2 x double> %data) {216; CHECK-LABEL: test_svst1q_scatter_u64offset_f64:217; CHECK: // %bb.0: // %entry218; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]219; CHECK-NEXT: ret220entry:221 tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv2f64(<vscale x 2 x double> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)222 ret void223}224 225declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv16i8.nxv2i64(<vscale x 16 x i8>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)226declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8i16.nxv2i64(<vscale x 8 x i16>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)227declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv4i32.nxv2i64(<vscale x 4 x i32>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)228declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)229declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8f16.nxv2i64(<vscale x 8 x half>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)230declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv4f32.nxv2i64(<vscale x 4 x float>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)231declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)232declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8bf16.nxv2i64(<vscale x 8 x bfloat>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)233declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv16i8(<vscale x 16 x i8>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)234declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8i16(<vscale x 8 x i16>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)235declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv4i32(<vscale x 4 x i32>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)236declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv2i64(<vscale x 2 x i64>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)237declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8bf16(<vscale x 8 x bfloat>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)238declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8f16(<vscale x 8 x half>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)239declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv4f32(<vscale x 4 x float>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)240declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv2f64(<vscale x 2 x double>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)241