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1; RUN: llc -verify-machineinstrs -mtriple=aarch64-apple-ios -o - %s | FileCheck %s2; RUN: llc -O0 -fast-isel -verify-machineinstrs -mtriple=aarch64-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-O03; RUN: llc -verify-machineinstrs -mtriple=arm64_32-apple-ios -o - %s | FileCheck %s4; RUN: llc -O0 -fast-isel -verify-machineinstrs -mtriple=arm64_32-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-O05 6; CHECK-LABEL: test17; CHECK: bl _gen8; CHECK: sxth [[TMP:w.*]], w09; CHECK: add w0, [[TMP]], w1, sxtb10; CHECK-O0-LABEL: test111; CHECK-O0: bl _gen12; CHECK-O0: sxth [[TMP:w.*]], w013; CHECK-O0: add {{w[0-9]+}}, [[TMP]], w1, sxtb14define i16 @test1(i32) {15entry:16 %call = call swiftcc { i16, i8 } @gen(i32 %0)17 %v3 = extractvalue { i16, i8 } %call, 018 %v1 = sext i16 %v3 to i3219 %v5 = extractvalue { i16, i8 } %call, 120 %v2 = sext i8 %v5 to i3221 %add = add nsw i32 %v1, %v222 %conv = trunc i32 %add to i1623 ret i16 %conv24}25 26declare swiftcc { i16, i8 } @gen(i32)27 28; CHECK-LABEL: test229; CHECK: bl _gen230; CHECK: add [[TMP:x.*]], x0, x131; CHECK: add [[TMP2:x.*]], x2, x332; CHECK: add [[TMP]], [[TMP]], [[TMP2]]33; CHECK: add x0, [[TMP]], x434; CHECK-O0-LABEL: test235; CHECK-O0: bl _gen236; CHECK-O0: add [[TMP:x.*]], x0, x137; CHECK-O0: add [[TMP]], [[TMP]], x238; CHECK-O0: add [[TMP]], [[TMP]], x339; CHECK-O0: add x0, [[TMP]], x440 41define i64 @test2(i64 %key) {42entry:43 %key.addr = alloca i64, align 444 store i64 %key, ptr %key.addr, align 445 %0 = load i64, ptr %key.addr, align 446 %call = call swiftcc { i64, i64, i64, i64, i64 } @gen2(i64 %0)47 48 %v3 = extractvalue { i64, i64, i64, i64, i64 } %call, 049 %v5 = extractvalue { i64, i64, i64, i64, i64 } %call, 150 %v6 = extractvalue { i64, i64, i64, i64, i64 } %call, 251 %v7 = extractvalue { i64, i64, i64, i64, i64 } %call, 352 %v8 = extractvalue { i64, i64, i64, i64, i64 } %call, 453 54 %add = add nsw i64 %v3, %v555 %add1 = add nsw i64 %add, %v656 %add2 = add nsw i64 %add1, %v757 %add3 = add nsw i64 %add2, %v858 ret i64 %add359}60; CHECK-LABEL: gen2:61; CHECK: mov x1, x062; CHECK: mov x2, x063; CHECK: mov x3, x064; CHECK: mov x4, x065; CHECK: ret66define swiftcc { i64, i64, i64, i64, i64 } @gen2(i64 %key) {67 %Y = insertvalue { i64, i64, i64, i64, i64 } undef, i64 %key, 068 %Z = insertvalue { i64, i64, i64, i64, i64 } %Y, i64 %key, 169 %Z2 = insertvalue { i64, i64, i64, i64, i64 } %Z, i64 %key, 270 %Z3 = insertvalue { i64, i64, i64, i64, i64 } %Z2, i64 %key, 371 %Z4 = insertvalue { i64, i64, i64, i64, i64 } %Z3, i64 %key, 472 ret { i64, i64, i64, i64, i64 } %Z473}74 75; CHECK-LABEL: test376; CHECK: bl _gen377; CHECK: add [[TMP:w.*]], w0, w178; CHECK: add [[TMP2:w.*]], w2, w379; CHECK: add w0, [[TMP]], [[TMP2]]80; CHECK-O0-LABEL: test381; CHECK-O0: bl _gen382; CHECK-O0: add [[TMP:w.*]], w0, w183; CHECK-O0: add [[TMP]], [[TMP]], w284; CHECK-O0: add w0, [[TMP]], w385define i32 @test3(i32) {86entry:87 %call = call swiftcc { i32, i32, i32, i32 } @gen3(i32 %0)88 89 %v3 = extractvalue { i32, i32, i32, i32 } %call, 090 %v5 = extractvalue { i32, i32, i32, i32 } %call, 191 %v6 = extractvalue { i32, i32, i32, i32 } %call, 292 %v7 = extractvalue { i32, i32, i32, i32 } %call, 393 94 %add = add nsw i32 %v3, %v595 %add1 = add nsw i32 %add, %v696 %add2 = add nsw i32 %add1, %v797 ret i32 %add298}99 100declare swiftcc { i32, i32, i32, i32 } @gen3(i32 %key)101 102; CHECK-LABEL: test4103; CHECK: bl _gen4104; CHECK: fadd s0, s0, s1105; CHECK: fadd s0, s0, s2106; CHECK: fadd s0, s0, s3107; CHECK-O0-LABEL: test4108; CHECK-O0: bl _gen4109; CHECK-O0: fadd s0, s0, s1110; CHECK-O0: fadd s0, s0, s2111; CHECK-O0: fadd s0, s0, s3112define float @test4(float) {113entry:114 %call = call swiftcc { float, float, float, float } @gen4(float %0)115 116 %v3 = extractvalue { float, float, float, float } %call, 0117 %v5 = extractvalue { float, float, float, float } %call, 1118 %v6 = extractvalue { float, float, float, float } %call, 2119 %v7 = extractvalue { float, float, float, float } %call, 3120 121 %add = fadd float %v3, %v5122 %add1 = fadd float %add, %v6123 %add2 = fadd float %add1, %v7124 ret float %add2125}126 127declare swiftcc { float, float, float, float } @gen4(float %key)128 129; CHECK-LABEL: test5130; CHECK: bl _gen5131; CHECK: fadd d0, d0, d1132; CHECK: fadd d0, d0, d2133; CHECK: fadd d0, d0, d3134; CHECK-O0-LABEL: test5135; CHECK-O0: bl _gen5136; CHECK-O0: fadd d0, d0, d1137; CHECK-O0: fadd d0, d0, d2138; CHECK-O0: fadd d0, d0, d3139define swiftcc double @test5(){140entry:141 %call = call swiftcc { double, double, double, double } @gen5()142 143 %v3 = extractvalue { double, double, double, double } %call, 0144 %v5 = extractvalue { double, double, double, double } %call, 1145 %v6 = extractvalue { double, double, double, double } %call, 2146 %v7 = extractvalue { double, double, double, double } %call, 3147 148 %add = fadd double %v3, %v5149 %add1 = fadd double %add, %v6150 %add2 = fadd double %add1, %v7151 ret double %add2152}153 154declare swiftcc { double, double, double, double } @gen5()155 156; CHECK-LABEL: test6157; CHECK: bl _gen6158; CHECK-DAG: fadd d0, d0, d1159; CHECK-DAG: fadd d0, d0, d2160; CHECK-DAG: fadd d0, d0, d3161; CHECK-DAG: add [[TMP:w.*]], w0, w1162; CHECK-DAG: add [[TMP2:w.*]], w2, w3163; CHECK-DAG: add w0, [[TMP]], [[TMP2]]164; CHECK-O0-LABEL: test6165; CHECK-O0: bl _gen6166; CHECK-O0-DAG: fadd d0, d0, d1167; CHECK-O0-DAG: fadd d0, d0, d2168; CHECK-O0-DAG: fadd d0, d0, d3169; CHECK-O0-DAG: add [[TMP:w.*]], w0, w1170; CHECK-O0-DAG: add [[TMP]], [[TMP]], w2171; CHECK-O0-DAG: add w0, [[TMP]], w3172define swiftcc { double, i32 } @test6() {173entry:174 %call = call swiftcc { double, double, double, double, i32, i32, i32, i32 } @gen6()175 176 %v3 = extractvalue { double, double, double, double, i32, i32, i32, i32 } %call, 0177 %v5 = extractvalue { double, double, double, double, i32, i32, i32, i32 } %call, 1178 %v6 = extractvalue { double, double, double, double, i32, i32, i32, i32 } %call, 2179 %v7 = extractvalue { double, double, double, double, i32, i32, i32, i32 } %call, 3180 %v3.i = extractvalue { double, double, double, double, i32, i32, i32, i32 } %call, 4181 %v5.i = extractvalue { double, double, double, double, i32, i32, i32, i32 } %call, 5182 %v6.i = extractvalue { double, double, double, double, i32, i32, i32, i32 } %call, 6183 %v7.i = extractvalue { double, double, double, double, i32, i32, i32, i32 } %call, 7184 185 %add = fadd double %v3, %v5186 %add1 = fadd double %add, %v6187 %add2 = fadd double %add1, %v7188 189 %add.i = add nsw i32 %v3.i, %v5.i190 %add1.i = add nsw i32 %add.i, %v6.i191 %add2.i = add nsw i32 %add1.i, %v7.i192 193 %Y = insertvalue { double, i32 } undef, double %add2, 0194 %Z = insertvalue { double, i32 } %Y, i32 %add2.i, 1195 ret { double, i32} %Z196}197 198declare swiftcc { double, double, double, double, i32, i32, i32, i32 } @gen6()199 200; CHECK-LABEL: _gen7201; CHECK-DAG: mov w1, w0202; CHECK-DAG: mov w2, w0203; CHECK-DAG: mov w3, w0204; CHECK: ret205; CHECK-O0-LABEL: _gen7206; CHECK-O0: mov w3, w0207; CHECK-O0: mov w0, w3208; CHECK-O0: mov w1, w3209; CHECK-O0: mov w2, w3210define swiftcc { i32, i32, i32, i32 } @gen7(i32 %key) {211 %v0 = insertvalue { i32, i32, i32, i32 } undef, i32 %key, 0212 %v1 = insertvalue { i32, i32, i32, i32 } %v0, i32 %key, 1213 %v2 = insertvalue { i32, i32, i32, i32 } %v1, i32 %key, 2214 %v3 = insertvalue { i32, i32, i32, i32 } %v2, i32 %key, 3215 ret { i32, i32, i32, i32 } %v3216}217 218; CHECK-LABEL: _gen9219; CHECK: mov w1, w0220; CHECK: mov w2, w0221; CHECK: mov w3, w0222; CHECK: ret223; CHECK-O0-LABEL: _gen9224; CHECK-O0: mov w3, w0225; CHECK-O0: mov w0, w3226; CHECK-O0: mov w1, w3227; CHECK-O0: mov w2, w3228define swiftcc { i8, i8, i8, i8 } @gen9(i8 %key) {229 %v0 = insertvalue { i8, i8, i8, i8 } undef, i8 %key, 0230 %v1 = insertvalue { i8, i8, i8, i8 } %v0, i8 %key, 1231 %v2 = insertvalue { i8, i8, i8, i8 } %v1, i8 %key, 2232 %v3 = insertvalue { i8, i8, i8, i8 } %v2, i8 %key, 3233 ret { i8, i8, i8, i8 } %v3234}235 236; CHECK-LABEL: _gen10237; CHECK: fmov d1, d0238; CHECK: fmov d2, d0239; CHECK: mov w1, w0240; CHECK: fmov d3, d0241; CHECK: mov w2, w0242; CHECK: mov w3, w0243; CHECK: ret244define swiftcc { double, double, double, double, i32, i32, i32, i32 } @gen10(double %keyd, i32 %keyi) {245 %v0 = insertvalue { double, double, double, double, i32, i32, i32, i32 } undef, double %keyd, 0246 %v1 = insertvalue { double, double, double, double, i32, i32, i32, i32 } %v0, double %keyd, 1247 %v2 = insertvalue { double, double, double, double, i32, i32, i32, i32 } %v1, double %keyd, 2248 %v3 = insertvalue { double, double, double, double, i32, i32, i32, i32 } %v2, double %keyd, 3249 %v4 = insertvalue { double, double, double, double, i32, i32, i32, i32 } %v3, i32 %keyi, 4250 %v5 = insertvalue { double, double, double, double, i32, i32, i32, i32 } %v4, i32 %keyi, 5251 %v6 = insertvalue { double, double, double, double, i32, i32, i32, i32 } %v5, i32 %keyi, 6252 %v7 = insertvalue { double, double, double, double, i32, i32, i32, i32 } %v6, i32 %keyi, 7253 ret { double, double, double, double, i32, i32, i32, i32 } %v7254}255 256; CHECK-LABEL: _test11257; CHECK: bl _gen11258; CHECK: fadd.4s v0, v0, v1259; CHECK: fadd.4s v0, v0, v2260; CHECK: fadd.4s v0, v0, v3261define swiftcc <4 x float> @test11() {262entry:263 %call = call swiftcc { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @gen11()264 265 %v3 = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %call, 0266 %v5 = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %call, 1267 %v6 = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %call, 2268 %v7 = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %call, 3269 270 %add = fadd <4 x float> %v3, %v5271 %add1 = fadd <4 x float> %add, %v6272 %add2 = fadd <4 x float> %add1, %v7273 ret <4 x float> %add2274}275 276declare swiftcc { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @gen11()277 278; CHECK-LABEL: _test12279; CHECK: fadd.4s v0, v0, v1280; CHECK: fmov s1, s3281; CHECK: fadd.4s v0, v0, v2282define swiftcc { <4 x float>, float } @test12() #0 {283entry:284 %call = call swiftcc { <4 x float>, <4 x float>, <4 x float>, float } @gen12()285 286 %v3 = extractvalue { <4 x float>, <4 x float>, <4 x float>, float } %call, 0287 %v5 = extractvalue { <4 x float>, <4 x float>, <4 x float>, float } %call, 1288 %v6 = extractvalue { <4 x float>, <4 x float>, <4 x float>, float } %call, 2289 %v8 = extractvalue { <4 x float>, <4 x float>, <4 x float>, float } %call, 3290 291 %add = fadd <4 x float> %v3, %v5292 %add1 = fadd <4 x float> %add, %v6293 %res.0 = insertvalue { <4 x float>, float } undef, <4 x float> %add1, 0294 %res = insertvalue { <4 x float>, float } %res.0, float %v8, 1295 ret { <4 x float>, float } %res296}297 298declare swiftcc { <4 x float>, <4 x float>, <4 x float>, float } @gen12()299