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1; RUN: llc < %s -mtriple arm64-apple-darwin -aarch64-enable-ldst-opt=false -disable-post-ra -asm-verbose=false | FileCheck %s2; Disable the load/store optimizer to avoid having LDP/STPs and simplify checks.3 4target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"5 6; Check that we don't try to tail-call with an sret-demoted return.7 8declare i1024 @test_sret() #09 10; CHECK-LABEL: _test_call_sret:11; CHECK: mov x[[CALLERX8NUM:[0-9]+]], x812; CHECK: mov x8, sp13; CHECK-NEXT: bl _test_sret14; CHECK: ldr [[CALLERSRET1:q[0-9]+]], [sp]15; CHECK: str [[CALLERSRET1:q[0-9]+]], [x[[CALLERX8NUM]]]16; CHECK: ret17define i1024 @test_call_sret() #0 {18 %a = call i1024 @test_sret()19 ret i1024 %a20}21 22; CHECK-LABEL: _test_tailcall_sret:23; CHECK: mov x[[CALLERX8NUM:[0-9]+]], x824; CHECK: mov x8, sp25; CHECK-NEXT: bl _test_sret26; CHECK: ldr [[CALLERSRET1:q[0-9]+]], [sp]27; CHECK: str [[CALLERSRET1:q[0-9]+]], [x[[CALLERX8NUM]]]28; CHECK: ret29define i1024 @test_tailcall_sret() #0 {30 %a = tail call i1024 @test_sret()31 ret i1024 %a32}33 34; CHECK-LABEL: _test_indirect_tailcall_sret:35; CHECK: mov x[[CALLERX8NUM:[0-9]+]], x836; CHECK: mov x8, sp37; CHECK-NEXT: blr x038; CHECK: ldr [[CALLERSRET1:q[0-9]+]], [sp]39; CHECK: str [[CALLERSRET1:q[0-9]+]], [x[[CALLERX8NUM]]]40; CHECK: ret41define i1024 @test_indirect_tailcall_sret(ptr %f) #0 {42 %a = tail call i1024 %f()43 ret i1024 %a44}45 46attributes #0 = { nounwind }47