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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc < %s -mtriple=aarch64-- -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define i32 @func(i32 %x, i32 %y) nounwind {6; CHECK-SD-LABEL: func:7; CHECK-SD: // %bb.0:8; CHECK-SD-NEXT: adds w8, w0, w19; CHECK-SD-NEXT: csinv w0, w8, wzr, lo10; CHECK-SD-NEXT: ret11;12; CHECK-GI-LABEL: func:13; CHECK-GI: // %bb.0:14; CHECK-GI-NEXT: adds w8, w0, w115; CHECK-GI-NEXT: cset w9, hs16; CHECK-GI-NEXT: tst w9, #0x117; CHECK-GI-NEXT: csinv w0, w8, wzr, eq18; CHECK-GI-NEXT: ret19 %tmp = call i32 @llvm.uadd.sat.i32(i32 %x, i32 %y);20 ret i32 %tmp;21}22 23define i64 @func2(i64 %x, i64 %y) nounwind {24; CHECK-SD-LABEL: func2:25; CHECK-SD: // %bb.0:26; CHECK-SD-NEXT: adds x8, x0, x127; CHECK-SD-NEXT: csinv x0, x8, xzr, lo28; CHECK-SD-NEXT: ret29;30; CHECK-GI-LABEL: func2:31; CHECK-GI: // %bb.0:32; CHECK-GI-NEXT: adds x8, x0, x133; CHECK-GI-NEXT: cset w9, hs34; CHECK-GI-NEXT: tst w9, #0x135; CHECK-GI-NEXT: csinv x0, x8, xzr, eq36; CHECK-GI-NEXT: ret37 %tmp = call i64 @llvm.uadd.sat.i64(i64 %x, i64 %y);38 ret i64 %tmp;39}40 41define i16 @func16(i16 %x, i16 %y) nounwind {42; CHECK-SD-LABEL: func16:43; CHECK-SD: // %bb.0:44; CHECK-SD-NEXT: and w8, w0, #0xffff45; CHECK-SD-NEXT: mov w9, #65535 // =0xffff46; CHECK-SD-NEXT: add w8, w8, w1, uxth47; CHECK-SD-NEXT: cmp w8, w948; CHECK-SD-NEXT: csel w0, w8, w9, lo49; CHECK-SD-NEXT: ret50;51; CHECK-GI-LABEL: func16:52; CHECK-GI: // %bb.0:53; CHECK-GI-NEXT: and w8, w1, #0xffff54; CHECK-GI-NEXT: add w8, w8, w0, uxth55; CHECK-GI-NEXT: cmp w8, w8, uxth56; CHECK-GI-NEXT: csinv w0, w8, wzr, eq57; CHECK-GI-NEXT: ret58 %tmp = call i16 @llvm.uadd.sat.i16(i16 %x, i16 %y);59 ret i16 %tmp;60}61 62define i8 @func8(i8 %x, i8 %y) nounwind {63; CHECK-SD-LABEL: func8:64; CHECK-SD: // %bb.0:65; CHECK-SD-NEXT: and w9, w0, #0xff66; CHECK-SD-NEXT: mov w8, #255 // =0xff67; CHECK-SD-NEXT: add w9, w9, w1, uxtb68; CHECK-SD-NEXT: cmp w9, #25569; CHECK-SD-NEXT: csel w0, w9, w8, lo70; CHECK-SD-NEXT: ret71;72; CHECK-GI-LABEL: func8:73; CHECK-GI: // %bb.0:74; CHECK-GI-NEXT: and w8, w1, #0xff75; CHECK-GI-NEXT: add w8, w8, w0, uxtb76; CHECK-GI-NEXT: cmp w8, w8, uxtb77; CHECK-GI-NEXT: csinv w0, w8, wzr, eq78; CHECK-GI-NEXT: ret79 %tmp = call i8 @llvm.uadd.sat.i8(i8 %x, i8 %y);80 ret i8 %tmp;81}82 83define i4 @func3(i4 %x, i4 %y) nounwind {84; CHECK-SD-LABEL: func3:85; CHECK-SD: // %bb.0:86; CHECK-SD-NEXT: and w9, w1, #0xf87; CHECK-SD-NEXT: and w10, w0, #0xf88; CHECK-SD-NEXT: mov w8, #15 // =0xf89; CHECK-SD-NEXT: add w9, w10, w990; CHECK-SD-NEXT: cmp w9, #1591; CHECK-SD-NEXT: csel w0, w9, w8, lo92; CHECK-SD-NEXT: ret93;94; CHECK-GI-LABEL: func3:95; CHECK-GI: // %bb.0:96; CHECK-GI-NEXT: and w9, w0, #0xf97; CHECK-GI-NEXT: and w10, w1, #0xf98; CHECK-GI-NEXT: mov w8, #15 // =0xf99; CHECK-GI-NEXT: add w9, w9, w10100; CHECK-GI-NEXT: and w10, w9, #0xf101; CHECK-GI-NEXT: cmp w9, w10102; CHECK-GI-NEXT: csel w0, w8, w9, ne103; CHECK-GI-NEXT: ret104 %tmp = call i4 @llvm.uadd.sat.i4(i4 %x, i4 %y);105 ret i4 %tmp;106}107;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:108; CHECK: {{.*}}109