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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s3 4; PR317545 6; The overflow check may be against the input rather than the sum.7 8define i1 @uaddo_i64_increment_alt(i64 %x, ptr %p) {9; CHECK-LABEL: uaddo_i64_increment_alt:10; CHECK: // %bb.0:11; CHECK-NEXT: adds x8, x0, #112; CHECK-NEXT: cset w0, hs13; CHECK-NEXT: str x8, [x1]14; CHECK-NEXT: ret15 %a = add i64 %x, 116 store i64 %a, ptr %p17 %ov = icmp eq i64 %x, -118 ret i1 %ov19}20 21; Make sure insertion is done correctly based on dominance.22 23define i1 @uaddo_i64_increment_alt_dom(i64 %x, ptr %p) {24; CHECK-LABEL: uaddo_i64_increment_alt_dom:25; CHECK: // %bb.0:26; CHECK-NEXT: adds x8, x0, #127; CHECK-NEXT: cset w0, hs28; CHECK-NEXT: str x8, [x1]29; CHECK-NEXT: ret30 %ov = icmp eq i64 %x, -131 %a = add i64 %x, 132 store i64 %a, ptr %p33 ret i1 %ov34}35 36; The overflow check may be against the input rather than the sum.37 38define i1 @uaddo_i64_decrement_alt(i64 %x, ptr %p) {39; CHECK-LABEL: uaddo_i64_decrement_alt:40; CHECK: // %bb.0:41; CHECK-NEXT: subs x8, x0, #142; CHECK-NEXT: cset w0, hs43; CHECK-NEXT: str x8, [x1]44; CHECK-NEXT: ret45 %a = add i64 %x, -146 store i64 %a, ptr %p47 %ov = icmp ne i64 %x, 048 ret i1 %ov49}50 51; Make sure insertion is done correctly based on dominance.52 53define i1 @uaddo_i64_decrement_alt_dom(i64 %x, ptr %p) {54; CHECK-LABEL: uaddo_i64_decrement_alt_dom:55; CHECK: // %bb.0:56; CHECK-NEXT: subs x8, x0, #157; CHECK-NEXT: cset w0, hs58; CHECK-NEXT: str x8, [x1]59; CHECK-NEXT: ret60 %ov = icmp ne i64 %x, 061 %a = add i64 %x, -162 store i64 %a, ptr %p63 ret i1 %ov64}65 66