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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define i8 @ucmp.8.8(i8 %x, i8 %y) nounwind {6; CHECK-SD-LABEL: ucmp.8.8:7; CHECK-SD: // %bb.0:8; CHECK-SD-NEXT: and w8, w0, #0xff9; CHECK-SD-NEXT: cmp w8, w1, uxtb10; CHECK-SD-NEXT: cset w8, hi11; CHECK-SD-NEXT: csinv w0, w8, wzr, hs12; CHECK-SD-NEXT: ret13;14; CHECK-GI-LABEL: ucmp.8.8:15; CHECK-GI: // %bb.0:16; CHECK-GI-NEXT: and w8, w0, #0xff17; CHECK-GI-NEXT: and w9, w1, #0xff18; CHECK-GI-NEXT: cmp w8, w919; CHECK-GI-NEXT: cset w8, hi20; CHECK-GI-NEXT: csinv w0, w8, wzr, hs21; CHECK-GI-NEXT: ret22 %1 = call i8 @llvm.ucmp(i8 %x, i8 %y)23 ret i8 %124}25 26define i8 @ucmp.8.16(i16 %x, i16 %y) nounwind {27; CHECK-SD-LABEL: ucmp.8.16:28; CHECK-SD: // %bb.0:29; CHECK-SD-NEXT: and w8, w0, #0xffff30; CHECK-SD-NEXT: cmp w8, w1, uxth31; CHECK-SD-NEXT: cset w8, hi32; CHECK-SD-NEXT: csinv w0, w8, wzr, hs33; CHECK-SD-NEXT: ret34;35; CHECK-GI-LABEL: ucmp.8.16:36; CHECK-GI: // %bb.0:37; CHECK-GI-NEXT: and w8, w0, #0xffff38; CHECK-GI-NEXT: and w9, w1, #0xffff39; CHECK-GI-NEXT: cmp w8, w940; CHECK-GI-NEXT: cset w8, hi41; CHECK-GI-NEXT: csinv w0, w8, wzr, hs42; CHECK-GI-NEXT: ret43 %1 = call i8 @llvm.ucmp(i16 %x, i16 %y)44 ret i8 %145}46 47define i8 @ucmp.8.32(i32 %x, i32 %y) nounwind {48; CHECK-LABEL: ucmp.8.32:49; CHECK: // %bb.0:50; CHECK-NEXT: cmp w0, w151; CHECK-NEXT: cset w8, hi52; CHECK-NEXT: csinv w0, w8, wzr, hs53; CHECK-NEXT: ret54 %1 = call i8 @llvm.ucmp(i32 %x, i32 %y)55 ret i8 %156}57 58define i8 @ucmp.8.64(i64 %x, i64 %y) nounwind {59; CHECK-LABEL: ucmp.8.64:60; CHECK: // %bb.0:61; CHECK-NEXT: cmp x0, x162; CHECK-NEXT: cset w8, hi63; CHECK-NEXT: csinv w0, w8, wzr, hs64; CHECK-NEXT: ret65 %1 = call i8 @llvm.ucmp(i64 %x, i64 %y)66 ret i8 %167}68 69define i8 @ucmp.8.128(i128 %x, i128 %y) nounwind {70; CHECK-SD-LABEL: ucmp.8.128:71; CHECK-SD: // %bb.0:72; CHECK-SD-NEXT: cmp x2, x073; CHECK-SD-NEXT: sbcs xzr, x3, x174; CHECK-SD-NEXT: cset w8, lo75; CHECK-SD-NEXT: cmp x0, x276; CHECK-SD-NEXT: sbcs xzr, x1, x377; CHECK-SD-NEXT: csinv w0, w8, wzr, hs78; CHECK-SD-NEXT: ret79;80; CHECK-GI-LABEL: ucmp.8.128:81; CHECK-GI: // %bb.0:82; CHECK-GI-NEXT: cmp x0, x283; CHECK-GI-NEXT: cset w8, hi84; CHECK-GI-NEXT: cmp x1, x385; CHECK-GI-NEXT: cset w9, hi86; CHECK-GI-NEXT: csel w8, w8, w9, eq87; CHECK-GI-NEXT: cmp x0, x288; CHECK-GI-NEXT: cset w9, lo89; CHECK-GI-NEXT: cmp x1, x390; CHECK-GI-NEXT: cset w10, lo91; CHECK-GI-NEXT: csel w9, w9, w10, eq92; CHECK-GI-NEXT: tst w8, #0x193; CHECK-GI-NEXT: cset w8, ne94; CHECK-GI-NEXT: tst w9, #0x195; CHECK-GI-NEXT: csinv w0, w8, wzr, eq96; CHECK-GI-NEXT: ret97 %1 = call i8 @llvm.ucmp(i128 %x, i128 %y)98 ret i8 %199}100 101define i32 @ucmp.32.32(i32 %x, i32 %y) nounwind {102; CHECK-LABEL: ucmp.32.32:103; CHECK: // %bb.0:104; CHECK-NEXT: cmp w0, w1105; CHECK-NEXT: cset w8, hi106; CHECK-NEXT: csinv w0, w8, wzr, hs107; CHECK-NEXT: ret108 %1 = call i32 @llvm.ucmp(i32 %x, i32 %y)109 ret i32 %1110}111 112define i32 @ucmp.32.64(i64 %x, i64 %y) nounwind {113; CHECK-LABEL: ucmp.32.64:114; CHECK: // %bb.0:115; CHECK-NEXT: cmp x0, x1116; CHECK-NEXT: cset w8, hi117; CHECK-NEXT: csinv w0, w8, wzr, hs118; CHECK-NEXT: ret119 %1 = call i32 @llvm.ucmp(i64 %x, i64 %y)120 ret i32 %1121}122 123define i64 @ucmp.64.64(i64 %x, i64 %y) nounwind {124; CHECK-LABEL: ucmp.64.64:125; CHECK: // %bb.0:126; CHECK-NEXT: cmp x0, x1127; CHECK-NEXT: cset x8, hi128; CHECK-NEXT: csinv x0, x8, xzr, hs129; CHECK-NEXT: ret130 %1 = call i64 @llvm.ucmp(i64 %x, i64 %y)131 ret i64 %1132}133 134define <1 x i64> @ucmp.1.64.65(<1 x i65> %x, <1 x i65> %y) {135; CHECK-SD-LABEL: ucmp.1.64.65:136; CHECK-SD: // %bb.0:137; CHECK-SD-NEXT: and x8, x1, #0x1138; CHECK-SD-NEXT: and x9, x3, #0x1139; CHECK-SD-NEXT: cmp x2, x0140; CHECK-SD-NEXT: sbcs xzr, x9, x8141; CHECK-SD-NEXT: cset x10, lo142; CHECK-SD-NEXT: cmp x0, x2143; CHECK-SD-NEXT: sbcs xzr, x8, x9144; CHECK-SD-NEXT: csinv x8, x10, xzr, hs145; CHECK-SD-NEXT: fmov d0, x8146; CHECK-SD-NEXT: ret147;148; CHECK-GI-LABEL: ucmp.1.64.65:149; CHECK-GI: // %bb.0:150; CHECK-GI-NEXT: and x8, x1, #0x1151; CHECK-GI-NEXT: and x9, x3, #0x1152; CHECK-GI-NEXT: cmp x0, x2153; CHECK-GI-NEXT: cset w10, hi154; CHECK-GI-NEXT: cmp x8, x9155; CHECK-GI-NEXT: cset w11, hi156; CHECK-GI-NEXT: csel w10, w10, w11, eq157; CHECK-GI-NEXT: cmp x0, x2158; CHECK-GI-NEXT: cset w11, lo159; CHECK-GI-NEXT: cmp x8, x9160; CHECK-GI-NEXT: cset w8, lo161; CHECK-GI-NEXT: csel w8, w11, w8, eq162; CHECK-GI-NEXT: tst w10, #0x1163; CHECK-GI-NEXT: cset x9, ne164; CHECK-GI-NEXT: tst w8, #0x1165; CHECK-GI-NEXT: csinv x8, x9, xzr, eq166; CHECK-GI-NEXT: fmov d0, x8167; CHECK-GI-NEXT: ret168 %1 = call <1 x i64> @llvm.ucmp(<1 x i65> %x, <1 x i65> %y)169 ret <1 x i64> %1170}171 172define <8 x i8> @u_v8i8(<8 x i8> %a, <8 x i8> %b) {173; CHECK-LABEL: u_v8i8:174; CHECK: // %bb.0: // %entry175; CHECK-NEXT: cmhi v2.8b, v0.8b, v1.8b176; CHECK-NEXT: cmhi v0.8b, v1.8b, v0.8b177; CHECK-NEXT: sub v0.8b, v0.8b, v2.8b178; CHECK-NEXT: ret179entry:180 %c = call <8 x i8> @llvm.ucmp(<8 x i8> %a, <8 x i8> %b)181 ret <8 x i8> %c182}183 184define <16 x i8> @u_v16i8(<16 x i8> %a, <16 x i8> %b) {185; CHECK-LABEL: u_v16i8:186; CHECK: // %bb.0: // %entry187; CHECK-NEXT: cmhi v2.16b, v0.16b, v1.16b188; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b189; CHECK-NEXT: sub v0.16b, v0.16b, v2.16b190; CHECK-NEXT: ret191entry:192 %c = call <16 x i8> @llvm.ucmp(<16 x i8> %a, <16 x i8> %b)193 ret <16 x i8> %c194}195 196define <4 x i16> @u_v4i16(<4 x i16> %a, <4 x i16> %b) {197; CHECK-LABEL: u_v4i16:198; CHECK: // %bb.0: // %entry199; CHECK-NEXT: cmhi v2.4h, v0.4h, v1.4h200; CHECK-NEXT: cmhi v0.4h, v1.4h, v0.4h201; CHECK-NEXT: sub v0.4h, v0.4h, v2.4h202; CHECK-NEXT: ret203entry:204 %c = call <4 x i16> @llvm.ucmp(<4 x i16> %a, <4 x i16> %b)205 ret <4 x i16> %c206}207 208define <8 x i16> @u_v8i16(<8 x i16> %a, <8 x i16> %b) {209; CHECK-LABEL: u_v8i16:210; CHECK: // %bb.0: // %entry211; CHECK-NEXT: cmhi v2.8h, v0.8h, v1.8h212; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h213; CHECK-NEXT: sub v0.8h, v0.8h, v2.8h214; CHECK-NEXT: ret215entry:216 %c = call <8 x i16> @llvm.ucmp(<8 x i16> %a, <8 x i16> %b)217 ret <8 x i16> %c218}219 220define <16 x i16> @u_v16i16(<16 x i16> %a, <16 x i16> %b) {221; CHECK-SD-LABEL: u_v16i16:222; CHECK-SD: // %bb.0: // %entry223; CHECK-SD-NEXT: cmhi v4.8h, v1.8h, v3.8h224; CHECK-SD-NEXT: cmhi v5.8h, v0.8h, v2.8h225; CHECK-SD-NEXT: cmhi v0.8h, v2.8h, v0.8h226; CHECK-SD-NEXT: cmhi v1.8h, v3.8h, v1.8h227; CHECK-SD-NEXT: sub v0.8h, v0.8h, v5.8h228; CHECK-SD-NEXT: sub v1.8h, v1.8h, v4.8h229; CHECK-SD-NEXT: ret230;231; CHECK-GI-LABEL: u_v16i16:232; CHECK-GI: // %bb.0: // %entry233; CHECK-GI-NEXT: cmhi v4.8h, v0.8h, v2.8h234; CHECK-GI-NEXT: cmhi v5.8h, v1.8h, v3.8h235; CHECK-GI-NEXT: cmhi v0.8h, v2.8h, v0.8h236; CHECK-GI-NEXT: cmhi v1.8h, v3.8h, v1.8h237; CHECK-GI-NEXT: sub v0.8h, v0.8h, v4.8h238; CHECK-GI-NEXT: sub v1.8h, v1.8h, v5.8h239; CHECK-GI-NEXT: ret240entry:241 %c = call <16 x i16> @llvm.ucmp(<16 x i16> %a, <16 x i16> %b)242 ret <16 x i16> %c243}244 245define <2 x i32> @u_v2i32(<2 x i32> %a, <2 x i32> %b) {246; CHECK-LABEL: u_v2i32:247; CHECK: // %bb.0: // %entry248; CHECK-NEXT: cmhi v2.2s, v0.2s, v1.2s249; CHECK-NEXT: cmhi v0.2s, v1.2s, v0.2s250; CHECK-NEXT: sub v0.2s, v0.2s, v2.2s251; CHECK-NEXT: ret252entry:253 %c = call <2 x i32> @llvm.ucmp(<2 x i32> %a, <2 x i32> %b)254 ret <2 x i32> %c255}256 257define <4 x i32> @u_v4i32(<4 x i32> %a, <4 x i32> %b) {258; CHECK-LABEL: u_v4i32:259; CHECK: // %bb.0: // %entry260; CHECK-NEXT: cmhi v2.4s, v0.4s, v1.4s261; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s262; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s263; CHECK-NEXT: ret264entry:265 %c = call <4 x i32> @llvm.ucmp(<4 x i32> %a, <4 x i32> %b)266 ret <4 x i32> %c267}268 269define <8 x i32> @u_v8i32(<8 x i32> %a, <8 x i32> %b) {270; CHECK-SD-LABEL: u_v8i32:271; CHECK-SD: // %bb.0: // %entry272; CHECK-SD-NEXT: cmhi v4.4s, v1.4s, v3.4s273; CHECK-SD-NEXT: cmhi v5.4s, v0.4s, v2.4s274; CHECK-SD-NEXT: cmhi v0.4s, v2.4s, v0.4s275; CHECK-SD-NEXT: cmhi v1.4s, v3.4s, v1.4s276; CHECK-SD-NEXT: sub v0.4s, v0.4s, v5.4s277; CHECK-SD-NEXT: sub v1.4s, v1.4s, v4.4s278; CHECK-SD-NEXT: ret279;280; CHECK-GI-LABEL: u_v8i32:281; CHECK-GI: // %bb.0: // %entry282; CHECK-GI-NEXT: cmhi v4.4s, v0.4s, v2.4s283; CHECK-GI-NEXT: cmhi v5.4s, v1.4s, v3.4s284; CHECK-GI-NEXT: cmhi v0.4s, v2.4s, v0.4s285; CHECK-GI-NEXT: cmhi v1.4s, v3.4s, v1.4s286; CHECK-GI-NEXT: sub v0.4s, v0.4s, v4.4s287; CHECK-GI-NEXT: sub v1.4s, v1.4s, v5.4s288; CHECK-GI-NEXT: ret289entry:290 %c = call <8 x i32> @llvm.ucmp(<8 x i32> %a, <8 x i32> %b)291 ret <8 x i32> %c292}293 294define <2 x i64> @u_v2i64(<2 x i64> %a, <2 x i64> %b) {295; CHECK-LABEL: u_v2i64:296; CHECK: // %bb.0: // %entry297; CHECK-NEXT: cmhi v2.2d, v0.2d, v1.2d298; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d299; CHECK-NEXT: sub v0.2d, v0.2d, v2.2d300; CHECK-NEXT: ret301entry:302 %c = call <2 x i64> @llvm.ucmp(<2 x i64> %a, <2 x i64> %b)303 ret <2 x i64> %c304}305 306define <4 x i64> @u_v4i64(<4 x i64> %a, <4 x i64> %b) {307; CHECK-SD-LABEL: u_v4i64:308; CHECK-SD: // %bb.0: // %entry309; CHECK-SD-NEXT: cmhi v4.2d, v1.2d, v3.2d310; CHECK-SD-NEXT: cmhi v5.2d, v0.2d, v2.2d311; CHECK-SD-NEXT: cmhi v0.2d, v2.2d, v0.2d312; CHECK-SD-NEXT: cmhi v1.2d, v3.2d, v1.2d313; CHECK-SD-NEXT: sub v0.2d, v0.2d, v5.2d314; CHECK-SD-NEXT: sub v1.2d, v1.2d, v4.2d315; CHECK-SD-NEXT: ret316;317; CHECK-GI-LABEL: u_v4i64:318; CHECK-GI: // %bb.0: // %entry319; CHECK-GI-NEXT: cmhi v4.2d, v0.2d, v2.2d320; CHECK-GI-NEXT: cmhi v5.2d, v1.2d, v3.2d321; CHECK-GI-NEXT: cmhi v0.2d, v2.2d, v0.2d322; CHECK-GI-NEXT: cmhi v1.2d, v3.2d, v1.2d323; CHECK-GI-NEXT: sub v0.2d, v0.2d, v4.2d324; CHECK-GI-NEXT: sub v1.2d, v1.2d, v5.2d325; CHECK-GI-NEXT: ret326entry:327 %c = call <4 x i64> @llvm.ucmp(<4 x i64> %a, <4 x i64> %b)328 ret <4 x i64> %c329}330 331define <16 x i8> @signOf_neon(<8 x i16> %s0_lo, <8 x i16> %s0_hi, <8 x i16> %s1_lo, <8 x i16> %s1_hi) {332; CHECK-SD-LABEL: signOf_neon:333; CHECK-SD: // %bb.0: // %entry334; CHECK-SD-NEXT: cmhi v4.8h, v1.8h, v3.8h335; CHECK-SD-NEXT: cmhi v1.8h, v3.8h, v1.8h336; CHECK-SD-NEXT: cmhi v3.8h, v0.8h, v2.8h337; CHECK-SD-NEXT: cmhi v0.8h, v2.8h, v0.8h338; CHECK-SD-NEXT: sub v1.8h, v1.8h, v4.8h339; CHECK-SD-NEXT: sub v0.8h, v0.8h, v3.8h340; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v1.16b341; CHECK-SD-NEXT: ret342;343; CHECK-GI-LABEL: signOf_neon:344; CHECK-GI: // %bb.0: // %entry345; CHECK-GI-NEXT: cmhi v4.8h, v0.8h, v2.8h346; CHECK-GI-NEXT: cmhi v5.8h, v1.8h, v3.8h347; CHECK-GI-NEXT: cmhi v0.8h, v2.8h, v0.8h348; CHECK-GI-NEXT: cmhi v1.8h, v3.8h, v1.8h349; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b350; CHECK-GI-NEXT: uzp1 v1.16b, v4.16b, v5.16b351; CHECK-GI-NEXT: sub v0.16b, v0.16b, v1.16b352; CHECK-GI-NEXT: ret353entry:354 %0 = shufflevector <8 x i16> %s0_lo, <8 x i16> %s0_hi, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>355 %1 = shufflevector <8 x i16> %s1_lo, <8 x i16> %s1_hi, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>356 %or.i = tail call <16 x i8> @llvm.ucmp.v16i8.v16i16(<16 x i16> %0, <16 x i16> %1)357 ret <16 x i8> %or.i358}359