161 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s3 4define i32 @func(i32 %x, i32 %y) nounwind {5; CHECK-LABEL: func:6; CHECK: // %bb.0:7; CHECK-NEXT: umull x8, w0, w18; CHECK-NEXT: lsr x9, x8, #329; CHECK-NEXT: extr w0, w9, w8, #210; CHECK-NEXT: ret11 %tmp = call i32 @llvm.umul.fix.i32(i32 %x, i32 %y, i32 2)12 ret i32 %tmp13}14 15define i64 @func2(i64 %x, i64 %y) nounwind {16; CHECK-LABEL: func2:17; CHECK: // %bb.0:18; CHECK-NEXT: mul x8, x0, x119; CHECK-NEXT: umulh x9, x0, x120; CHECK-NEXT: extr x0, x9, x8, #221; CHECK-NEXT: ret22 %tmp = call i64 @llvm.umul.fix.i64(i64 %x, i64 %y, i32 2)23 ret i64 %tmp24}25 26define i4 @func3(i4 %x, i4 %y) nounwind {27; CHECK-LABEL: func3:28; CHECK: // %bb.0:29; CHECK-NEXT: and w8, w1, #0xf30; CHECK-NEXT: and w9, w0, #0xf31; CHECK-NEXT: mul w8, w9, w832; CHECK-NEXT: lsr w0, w8, #233; CHECK-NEXT: ret34 %tmp = call i4 @llvm.umul.fix.i4(i4 %x, i4 %y, i32 2)35 ret i4 %tmp36}37 38;; These result in regular integer multiplication39define i32 @func4(i32 %x, i32 %y) nounwind {40; CHECK-LABEL: func4:41; CHECK: // %bb.0:42; CHECK-NEXT: mul w0, w0, w143; CHECK-NEXT: ret44 %tmp = call i32 @llvm.umul.fix.i32(i32 %x, i32 %y, i32 0)45 ret i32 %tmp46}47 48define i64 @func5(i64 %x, i64 %y) nounwind {49; CHECK-LABEL: func5:50; CHECK: // %bb.0:51; CHECK-NEXT: mul x0, x0, x152; CHECK-NEXT: ret53 %tmp = call i64 @llvm.umul.fix.i64(i64 %x, i64 %y, i32 0)54 ret i64 %tmp55}56 57define i4 @func6(i4 %x, i4 %y) nounwind {58; CHECK-LABEL: func6:59; CHECK: // %bb.0:60; CHECK-NEXT: and w8, w1, #0xf61; CHECK-NEXT: and w9, w0, #0xf62; CHECK-NEXT: mul w0, w9, w863; CHECK-NEXT: ret64 %tmp = call i4 @llvm.umul.fix.i4(i4 %x, i4 %y, i32 0)65 ret i4 %tmp66}67 68define i64 @func7(i64 %x, i64 %y) nounwind {69; CHECK-LABEL: func7:70; CHECK: // %bb.0:71; CHECK-NEXT: mul x8, x0, x172; CHECK-NEXT: umulh x9, x0, x173; CHECK-NEXT: extr x0, x9, x8, #3274; CHECK-NEXT: ret75 %tmp = call i64 @llvm.umul.fix.i64(i64 %x, i64 %y, i32 32)76 ret i64 %tmp77}78 79define i64 @func8(i64 %x, i64 %y) nounwind {80; CHECK-LABEL: func8:81; CHECK: // %bb.0:82; CHECK-NEXT: mul x8, x0, x183; CHECK-NEXT: umulh x9, x0, x184; CHECK-NEXT: extr x0, x9, x8, #6385; CHECK-NEXT: ret86 %tmp = call i64 @llvm.umul.fix.i64(i64 %x, i64 %y, i32 63)87 ret i64 %tmp88}89 90define i64 @func9(i64 %x, i64 %y) nounwind {91; CHECK-LABEL: func9:92; CHECK: // %bb.0:93; CHECK-NEXT: umulh x0, x0, x194; CHECK-NEXT: ret95 %tmp = call i64 @llvm.umul.fix.i64(i64 %x, i64 %y, i32 64)96 ret i64 %tmp97}98 99define <2 x i32> @vec(<2 x i32> %x, <2 x i32> %y) nounwind {100; CHECK-LABEL: vec:101; CHECK: // %bb.0:102; CHECK-NEXT: mul v0.2s, v0.2s, v1.2s103; CHECK-NEXT: ret104 %tmp = call <2 x i32> @llvm.umul.fix.v2i32(<2 x i32> %x, <2 x i32> %y, i32 0)105 ret <2 x i32> %tmp106}107 108define <4 x i32> @vec2(<4 x i32> %x, <4 x i32> %y) nounwind {109; CHECK-LABEL: vec2:110; CHECK: // %bb.0:111; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s112; CHECK-NEXT: ret113 %tmp = call <4 x i32> @llvm.umul.fix.v4i32(<4 x i32> %x, <4 x i32> %y, i32 0)114 ret <4 x i32> %tmp115}116 117define <4 x i64> @vec3(<4 x i64> %x, <4 x i64> %y) nounwind {118; CHECK-LABEL: vec3:119; CHECK: // %bb.0:120; CHECK-NEXT: mov x8, v2.d[1]121; CHECK-NEXT: mov x9, v0.d[1]122; CHECK-NEXT: fmov x10, d2123; CHECK-NEXT: fmov x11, d0124; CHECK-NEXT: mov x14, v3.d[1]125; CHECK-NEXT: mov x15, v1.d[1]126; CHECK-NEXT: mul x12, x11, x10127; CHECK-NEXT: mul x13, x9, x8128; CHECK-NEXT: umulh x8, x9, x8129; CHECK-NEXT: umulh x9, x11, x10130; CHECK-NEXT: fmov x10, d3131; CHECK-NEXT: fmov x11, d1132; CHECK-NEXT: mul x16, x11, x10133; CHECK-NEXT: extr x8, x8, x13, #32134; CHECK-NEXT: umulh x10, x11, x10135; CHECK-NEXT: extr x9, x9, x12, #32136; CHECK-NEXT: mul x11, x15, x14137; CHECK-NEXT: fmov d0, x9138; CHECK-NEXT: umulh x14, x15, x14139; CHECK-NEXT: extr x10, x10, x16, #32140; CHECK-NEXT: mov v0.d[1], x8141; CHECK-NEXT: fmov d1, x10142; CHECK-NEXT: extr x11, x14, x11, #32143; CHECK-NEXT: mov v1.d[1], x11144; CHECK-NEXT: ret145 %tmp = call <4 x i64> @llvm.umul.fix.v4i64(<4 x i64> %x, <4 x i64> %y, i32 32)146 ret <4 x i64> %tmp147}148 149define <4 x i16> @widemul(<4 x i16> %x, <4 x i16> %y) nounwind {150; CHECK-LABEL: widemul:151; CHECK: // %bb.0:152; CHECK-NEXT: umull v0.4s, v0.4h, v1.4h153; CHECK-NEXT: shrn v1.4h, v0.4s, #16154; CHECK-NEXT: xtn v2.4h, v0.4s155; CHECK-NEXT: shl v0.4h, v1.4h, #12156; CHECK-NEXT: usra v0.4h, v2.4h, #4157; CHECK-NEXT: ret158 %tmp = call <4 x i16> @llvm.umul.fix.v4i16(<4 x i16> %x, <4 x i16> %y, i32 4)159 ret <4 x i16> %tmp160}161