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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s3 4; ============================================================================ ;5; Various cases with %x and/or %y being a constant6; ============================================================================ ;7 8define <4 x i32> @out_constant_varx_mone(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {9; CHECK-LABEL: out_constant_varx_mone:10; CHECK: // %bb.0:11; CHECK-NEXT: and v0.16b, v2.16b, v0.16b12; CHECK-NEXT: orn v0.16b, v0.16b, v2.16b13; CHECK-NEXT: ret14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>15 %mx = and <4 x i32> %mask, %x16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>17 %r = or <4 x i32> %mx, %my18 ret <4 x i32> %r19}20 21define <4 x i32> @in_constant_varx_mone(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {22; CHECK-LABEL: in_constant_varx_mone:23; CHECK: // %bb.0:24; CHECK-NEXT: bic v0.16b, v2.16b, v0.16b25; CHECK-NEXT: mvn v0.16b, v0.16b26; CHECK-NEXT: ret27 %n0 = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1> ; %x28 %n1 = and <4 x i32> %n0, %mask29 %r = xor <4 x i32> %n1, <i32 -1, i32 -1, i32 -1, i32 -1>30 ret <4 x i32> %r31}32 33; This is not a canonical form. Testing for completeness only.34define <4 x i32> @out_constant_varx_mone_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {35; CHECK-LABEL: out_constant_varx_mone_invmask:36; CHECK: // %bb.0:37; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b38; CHECK-NEXT: ret39 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>40 %mx = and <4 x i32> %notmask, %x41 %my = and <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>42 %r = or <4 x i32> %mx, %my43 ret <4 x i32> %r44}45 46; This is not a canonical form. Testing for completeness only.47define <4 x i32> @in_constant_varx_mone_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {48; CHECK-LABEL: in_constant_varx_mone_invmask:49; CHECK: // %bb.0:50; CHECK-NEXT: mvn v0.16b, v0.16b51; CHECK-NEXT: bic v0.16b, v0.16b, v2.16b52; CHECK-NEXT: mvn v0.16b, v0.16b53; CHECK-NEXT: ret54 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>55 %n0 = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1> ; %x56 %n1 = and <4 x i32> %n0, %notmask57 %r = xor <4 x i32> %n1, <i32 -1, i32 -1, i32 -1, i32 -1>58 ret <4 x i32> %r59}60 61define <4 x i32> @out_constant_varx_42(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {62; CHECK-LABEL: out_constant_varx_42:63; CHECK: // %bb.0:64; CHECK-NEXT: movi v1.4s, #4265; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b66; CHECK-NEXT: ret67 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>68 %mx = and <4 x i32> %mask, %x69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>70 %r = or <4 x i32> %mx, %my71 ret <4 x i32> %r72}73 74define <4 x i32> @in_constant_varx_42(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {75; CHECK-LABEL: in_constant_varx_42:76; CHECK: // %bb.0:77; CHECK-NEXT: movi v1.4s, #4278; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b79; CHECK-NEXT: ret80 %n0 = xor <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42> ; %x81 %n1 = and <4 x i32> %n0, %mask82 %r = xor <4 x i32> %n1, <i32 42, i32 42, i32 42, i32 42>83 ret <4 x i32> %r84}85 86; This is not a canonical form. Testing for completeness only.87define <4 x i32> @out_constant_varx_42_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {88; CHECK-LABEL: out_constant_varx_42_invmask:89; CHECK: // %bb.0:90; CHECK-NEXT: movi v1.4s, #4291; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b92; CHECK-NEXT: ret93 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>94 %mx = and <4 x i32> %notmask, %x95 %my = and <4 x i32> %mask, <i32 42, i32 42, i32 42, i32 42>96 %r = or <4 x i32> %mx, %my97 ret <4 x i32> %r98}99 100; This is not a canonical form. Testing for completeness only.101define <4 x i32> @in_constant_varx_42_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {102; CHECK-LABEL: in_constant_varx_42_invmask:103; CHECK: // %bb.0:104; CHECK-NEXT: movi v1.4s, #42105; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b106; CHECK-NEXT: ret107 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>108 %n0 = xor <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42> ; %x109 %n1 = and <4 x i32> %n0, %notmask110 %r = xor <4 x i32> %n1, <i32 42, i32 42, i32 42, i32 42>111 ret <4 x i32> %r112}113 114define <4 x i32> @out_constant_mone_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {115; CHECK-LABEL: out_constant_mone_vary:116; CHECK: // %bb.0:117; CHECK-NEXT: orr v0.16b, v1.16b, v2.16b118; CHECK-NEXT: ret119 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>120 %mx = and <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>121 %my = and <4 x i32> %notmask, %y122 %r = or <4 x i32> %mx, %my123 ret <4 x i32> %r124}125 126define <4 x i32> @in_constant_mone_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {127; CHECK-LABEL: in_constant_mone_vary:128; CHECK: // %bb.0:129; CHECK-NEXT: orr v0.16b, v2.16b, v1.16b130; CHECK-NEXT: ret131 %n0 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %y ; %x132 %n1 = and <4 x i32> %n0, %mask133 %r = xor <4 x i32> %n1, %y134 ret <4 x i32> %r135}136 137; This is not a canonical form. Testing for completeness only.138define <4 x i32> @out_constant_mone_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {139; CHECK-LABEL: out_constant_mone_vary_invmask:140; CHECK: // %bb.0:141; CHECK-NEXT: and v0.16b, v2.16b, v1.16b142; CHECK-NEXT: orn v0.16b, v0.16b, v2.16b143; CHECK-NEXT: ret144 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>145 %mx = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>146 %my = and <4 x i32> %mask, %y147 %r = or <4 x i32> %mx, %my148 ret <4 x i32> %r149}150 151; This is not a canonical form. Testing for completeness only.152define <4 x i32> @in_constant_mone_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {153; CHECK-LABEL: in_constant_mone_vary_invmask:154; CHECK: // %bb.0:155; CHECK-NEXT: orn v0.16b, v1.16b, v2.16b156; CHECK-NEXT: ret157 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>158 %n0 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %y ; %x159 %n1 = and <4 x i32> %n0, %notmask160 %r = xor <4 x i32> %n1, %y161 ret <4 x i32> %r162}163 164define <4 x i32> @out_constant_42_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {165; CHECK-LABEL: out_constant_42_vary:166; CHECK: // %bb.0:167; CHECK-NEXT: movi v0.4s, #42168; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b169; CHECK-NEXT: ret170 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>171 %mx = and <4 x i32> %mask, <i32 42, i32 42, i32 42, i32 42>172 %my = and <4 x i32> %notmask, %y173 %r = or <4 x i32> %mx, %my174 ret <4 x i32> %r175}176 177define <4 x i32> @in_constant_42_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {178; CHECK-LABEL: in_constant_42_vary:179; CHECK: // %bb.0:180; CHECK-NEXT: movi v0.4s, #42181; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b182; CHECK-NEXT: ret183 %n0 = xor <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %y ; %x184 %n1 = and <4 x i32> %n0, %mask185 %r = xor <4 x i32> %n1, %y186 ret <4 x i32> %r187}188 189; This is not a canonical form. Testing for completeness only.190define <4 x i32> @out_constant_42_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {191; CHECK-LABEL: out_constant_42_vary_invmask:192; CHECK: // %bb.0:193; CHECK-NEXT: movi v0.4s, #42194; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b195; CHECK-NEXT: ret196 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>197 %mx = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>198 %my = and <4 x i32> %mask, %y199 %r = or <4 x i32> %mx, %my200 ret <4 x i32> %r201}202 203; This is not a canonical form. Testing for completeness only.204define <4 x i32> @in_constant_42_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {205; CHECK-LABEL: in_constant_42_vary_invmask:206; CHECK: // %bb.0:207; CHECK-NEXT: movi v0.4s, #42208; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b209; CHECK-NEXT: ret210 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>211 %n0 = xor <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %y ; %x212 %n1 = and <4 x i32> %n0, %notmask213 %r = xor <4 x i32> %n1, %y214 ret <4 x i32> %r215}216