682 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s3 4; Odd+Even divisors5define <4 x i32> @test_urem_odd_even(<4 x i32> %X) nounwind {6; CHECK-LABEL: test_urem_odd_even:7; CHECK: // %bb.0:8; CHECK-NEXT: adrp x8, .LCPI0_09; CHECK-NEXT: adrp x9, .LCPI0_210; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI0_0]11; CHECK-NEXT: adrp x8, .LCPI0_112; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI0_2]13; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s14; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI0_1]15; CHECK-NEXT: adrp x8, .LCPI0_316; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s17; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s18; CHECK-NEXT: movi v2.4s, #119; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b20; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI0_3]21; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s22; CHECK-NEXT: and v0.16b, v0.16b, v2.16b23; CHECK-NEXT: ret24 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 25, i32 100>25 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>26 %ret = zext <4 x i1> %cmp to <4 x i32>27 ret <4 x i32> %ret28}29 30;==============================================================================;31 32; One all-ones divisor in odd divisor33define <4 x i32> @test_urem_odd_allones_eq(<4 x i32> %X) nounwind {34; CHECK-LABEL: test_urem_odd_allones_eq:35; CHECK: // %bb.0:36; CHECK-NEXT: adrp x8, .LCPI1_037; CHECK-NEXT: movi v2.4s, #138; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI1_0]39; CHECK-NEXT: adrp x8, .LCPI1_140; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s41; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI1_1]42; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s43; CHECK-NEXT: and v0.16b, v0.16b, v2.16b44; CHECK-NEXT: ret45 %urem = urem <4 x i32> %X, <i32 5, i32 5, i32 4294967295, i32 5>46 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>47 %ret = zext <4 x i1> %cmp to <4 x i32>48 ret <4 x i32> %ret49}50define <4 x i32> @test_urem_odd_allones_ne(<4 x i32> %X) nounwind {51; CHECK-LABEL: test_urem_odd_allones_ne:52; CHECK: // %bb.0:53; CHECK-NEXT: adrp x8, .LCPI2_054; CHECK-NEXT: movi v2.4s, #155; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI2_0]56; CHECK-NEXT: adrp x8, .LCPI2_157; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s58; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI2_1]59; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s60; CHECK-NEXT: and v0.16b, v0.16b, v2.16b61; CHECK-NEXT: ret62 %urem = urem <4 x i32> %X, <i32 5, i32 5, i32 4294967295, i32 5>63 %cmp = icmp ne <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>64 %ret = zext <4 x i1> %cmp to <4 x i32>65 ret <4 x i32> %ret66}67 68; One all-ones divisor in even divisor69define <4 x i32> @test_urem_even_allones_eq(<4 x i32> %X) nounwind {70; CHECK-LABEL: test_urem_even_allones_eq:71; CHECK: // %bb.0:72; CHECK-NEXT: adrp x8, .LCPI3_073; CHECK-NEXT: adrp x9, .LCPI3_274; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI3_0]75; CHECK-NEXT: adrp x8, .LCPI3_176; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI3_2]77; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s78; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI3_1]79; CHECK-NEXT: adrp x8, .LCPI3_380; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s81; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s82; CHECK-NEXT: movi v2.4s, #183; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b84; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI3_3]85; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s86; CHECK-NEXT: and v0.16b, v0.16b, v2.16b87; CHECK-NEXT: ret88 %urem = urem <4 x i32> %X, <i32 14, i32 14, i32 4294967295, i32 14>89 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>90 %ret = zext <4 x i1> %cmp to <4 x i32>91 ret <4 x i32> %ret92}93define <4 x i32> @test_urem_even_allones_ne(<4 x i32> %X) nounwind {94; CHECK-LABEL: test_urem_even_allones_ne:95; CHECK: // %bb.0:96; CHECK-NEXT: adrp x8, .LCPI4_097; CHECK-NEXT: adrp x9, .LCPI4_298; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI4_0]99; CHECK-NEXT: adrp x8, .LCPI4_1100; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI4_2]101; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s102; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI4_1]103; CHECK-NEXT: adrp x8, .LCPI4_3104; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s105; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s106; CHECK-NEXT: movi v2.4s, #1107; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b108; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI4_3]109; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s110; CHECK-NEXT: and v0.16b, v0.16b, v2.16b111; CHECK-NEXT: ret112 %urem = urem <4 x i32> %X, <i32 14, i32 14, i32 4294967295, i32 14>113 %cmp = icmp ne <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>114 %ret = zext <4 x i1> %cmp to <4 x i32>115 ret <4 x i32> %ret116}117 118; One all-ones divisor in odd+even divisor119define <4 x i32> @test_urem_odd_even_allones_eq(<4 x i32> %X) nounwind {120; CHECK-LABEL: test_urem_odd_even_allones_eq:121; CHECK: // %bb.0:122; CHECK-NEXT: adrp x8, .LCPI5_0123; CHECK-NEXT: adrp x9, .LCPI5_2124; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI5_0]125; CHECK-NEXT: adrp x8, .LCPI5_1126; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI5_2]127; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s128; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI5_1]129; CHECK-NEXT: adrp x8, .LCPI5_3130; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s131; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s132; CHECK-NEXT: movi v2.4s, #1133; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b134; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI5_3]135; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s136; CHECK-NEXT: and v0.16b, v0.16b, v2.16b137; CHECK-NEXT: ret138 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 4294967295, i32 100>139 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>140 %ret = zext <4 x i1> %cmp to <4 x i32>141 ret <4 x i32> %ret142}143define <4 x i32> @test_urem_odd_even_allones_ne(<4 x i32> %X) nounwind {144; CHECK-LABEL: test_urem_odd_even_allones_ne:145; CHECK: // %bb.0:146; CHECK-NEXT: adrp x8, .LCPI6_0147; CHECK-NEXT: adrp x9, .LCPI6_2148; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI6_0]149; CHECK-NEXT: adrp x8, .LCPI6_1150; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI6_2]151; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s152; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI6_1]153; CHECK-NEXT: adrp x8, .LCPI6_3154; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s155; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s156; CHECK-NEXT: movi v2.4s, #1157; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b158; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI6_3]159; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s160; CHECK-NEXT: and v0.16b, v0.16b, v2.16b161; CHECK-NEXT: ret162 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 4294967295, i32 100>163 %cmp = icmp ne <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>164 %ret = zext <4 x i1> %cmp to <4 x i32>165 ret <4 x i32> %ret166}167 168;------------------------------------------------------------------------------;169 170; One power-of-two divisor in odd divisor171define <4 x i32> @test_urem_odd_poweroftwo(<4 x i32> %X) nounwind {172; CHECK-LABEL: test_urem_odd_poweroftwo:173; CHECK: // %bb.0:174; CHECK-NEXT: adrp x8, .LCPI7_0175; CHECK-NEXT: adrp x9, .LCPI7_2176; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI7_0]177; CHECK-NEXT: adrp x8, .LCPI7_1178; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI7_2]179; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s180; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI7_1]181; CHECK-NEXT: adrp x8, .LCPI7_3182; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s183; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s184; CHECK-NEXT: movi v2.4s, #1185; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b186; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI7_3]187; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s188; CHECK-NEXT: and v0.16b, v0.16b, v2.16b189; CHECK-NEXT: ret190 %urem = urem <4 x i32> %X, <i32 5, i32 5, i32 16, i32 5>191 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>192 %ret = zext <4 x i1> %cmp to <4 x i32>193 ret <4 x i32> %ret194}195 196; One power-of-two divisor in even divisor197define <4 x i32> @test_urem_even_poweroftwo(<4 x i32> %X) nounwind {198; CHECK-LABEL: test_urem_even_poweroftwo:199; CHECK: // %bb.0:200; CHECK-NEXT: adrp x8, .LCPI8_0201; CHECK-NEXT: adrp x9, .LCPI8_2202; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI8_0]203; CHECK-NEXT: adrp x8, .LCPI8_1204; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI8_2]205; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s206; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI8_1]207; CHECK-NEXT: adrp x8, .LCPI8_3208; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s209; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s210; CHECK-NEXT: movi v2.4s, #1211; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b212; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI8_3]213; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s214; CHECK-NEXT: and v0.16b, v0.16b, v2.16b215; CHECK-NEXT: ret216 %urem = urem <4 x i32> %X, <i32 14, i32 14, i32 16, i32 14>217 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>218 %ret = zext <4 x i1> %cmp to <4 x i32>219 ret <4 x i32> %ret220}221 222; One power-of-two divisor in odd+even divisor223define <4 x i32> @test_urem_odd_even_poweroftwo(<4 x i32> %X) nounwind {224; CHECK-LABEL: test_urem_odd_even_poweroftwo:225; CHECK: // %bb.0:226; CHECK-NEXT: adrp x8, .LCPI9_0227; CHECK-NEXT: adrp x9, .LCPI9_2228; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI9_0]229; CHECK-NEXT: adrp x8, .LCPI9_1230; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI9_2]231; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s232; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI9_1]233; CHECK-NEXT: adrp x8, .LCPI9_3234; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s235; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s236; CHECK-NEXT: movi v2.4s, #1237; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b238; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI9_3]239; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s240; CHECK-NEXT: and v0.16b, v0.16b, v2.16b241; CHECK-NEXT: ret242 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 16, i32 100>243 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>244 %ret = zext <4 x i1> %cmp to <4 x i32>245 ret <4 x i32> %ret246}247 248;------------------------------------------------------------------------------;249 250; One one divisor in odd divisor251define <4 x i32> @test_urem_odd_one(<4 x i32> %X) nounwind {252; CHECK-LABEL: test_urem_odd_one:253; CHECK: // %bb.0:254; CHECK-NEXT: mov w8, #52429 // =0xcccd255; CHECK-NEXT: movi v2.4s, #1256; CHECK-NEXT: movk w8, #52428, lsl #16257; CHECK-NEXT: dup v1.4s, w8258; CHECK-NEXT: adrp x8, .LCPI10_0259; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s260; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI10_0]261; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s262; CHECK-NEXT: and v0.16b, v0.16b, v2.16b263; CHECK-NEXT: ret264 %urem = urem <4 x i32> %X, <i32 5, i32 5, i32 1, i32 5>265 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>266 %ret = zext <4 x i1> %cmp to <4 x i32>267 ret <4 x i32> %ret268}269 270; One one divisor in even divisor271define <4 x i32> @test_urem_even_one(<4 x i32> %X) nounwind {272; CHECK-LABEL: test_urem_even_one:273; CHECK: // %bb.0:274; CHECK-NEXT: mov w8, #28087 // =0x6db7275; CHECK-NEXT: movi v2.4s, #1276; CHECK-NEXT: movk w8, #46811, lsl #16277; CHECK-NEXT: dup v1.4s, w8278; CHECK-NEXT: adrp x8, .LCPI11_0279; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s280; CHECK-NEXT: shl v1.4s, v0.4s, #31281; CHECK-NEXT: usra v1.4s, v0.4s, #1282; CHECK-NEXT: ldr q0, [x8, :lo12:.LCPI11_0]283; CHECK-NEXT: cmhs v0.4s, v0.4s, v1.4s284; CHECK-NEXT: and v0.16b, v0.16b, v2.16b285; CHECK-NEXT: ret286 %urem = urem <4 x i32> %X, <i32 14, i32 14, i32 1, i32 14>287 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>288 %ret = zext <4 x i1> %cmp to <4 x i32>289 ret <4 x i32> %ret290}291 292; One one divisor in odd+even divisor293define <4 x i32> @test_urem_odd_even_one(<4 x i32> %X) nounwind {294; CHECK-LABEL: test_urem_odd_even_one:295; CHECK: // %bb.0:296; CHECK-NEXT: adrp x8, .LCPI12_0297; CHECK-NEXT: adrp x9, .LCPI12_2298; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI12_0]299; CHECK-NEXT: adrp x8, .LCPI12_1300; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI12_2]301; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s302; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI12_1]303; CHECK-NEXT: adrp x8, .LCPI12_3304; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s305; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s306; CHECK-NEXT: movi v2.4s, #1307; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b308; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI12_3]309; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s310; CHECK-NEXT: and v0.16b, v0.16b, v2.16b311; CHECK-NEXT: ret312 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 1, i32 100>313 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>314 %ret = zext <4 x i1> %cmp to <4 x i32>315 ret <4 x i32> %ret316}317 318;------------------------------------------------------------------------------;319 320; One INT_MIN divisor in odd divisor321define <4 x i32> @test_urem_odd_INT_MIN(<4 x i32> %X) nounwind {322; CHECK-LABEL: test_urem_odd_INT_MIN:323; CHECK: // %bb.0:324; CHECK-NEXT: adrp x8, .LCPI13_0325; CHECK-NEXT: adrp x9, .LCPI13_2326; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI13_0]327; CHECK-NEXT: adrp x8, .LCPI13_1328; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI13_2]329; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s330; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI13_1]331; CHECK-NEXT: adrp x8, .LCPI13_3332; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s333; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s334; CHECK-NEXT: movi v2.4s, #1335; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b336; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI13_3]337; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s338; CHECK-NEXT: and v0.16b, v0.16b, v2.16b339; CHECK-NEXT: ret340 %urem = urem <4 x i32> %X, <i32 5, i32 5, i32 2147483648, i32 5>341 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>342 %ret = zext <4 x i1> %cmp to <4 x i32>343 ret <4 x i32> %ret344}345 346; One INT_MIN divisor in even divisor347define <4 x i32> @test_urem_even_INT_MIN(<4 x i32> %X) nounwind {348; CHECK-LABEL: test_urem_even_INT_MIN:349; CHECK: // %bb.0:350; CHECK-NEXT: adrp x8, .LCPI14_0351; CHECK-NEXT: adrp x9, .LCPI14_2352; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI14_0]353; CHECK-NEXT: adrp x8, .LCPI14_1354; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI14_2]355; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s356; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI14_1]357; CHECK-NEXT: adrp x8, .LCPI14_3358; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s359; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s360; CHECK-NEXT: movi v2.4s, #1361; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b362; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI14_3]363; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s364; CHECK-NEXT: and v0.16b, v0.16b, v2.16b365; CHECK-NEXT: ret366 %urem = urem <4 x i32> %X, <i32 14, i32 14, i32 2147483648, i32 14>367 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>368 %ret = zext <4 x i1> %cmp to <4 x i32>369 ret <4 x i32> %ret370}371 372; One INT_MIN divisor in odd+even divisor373define <4 x i32> @test_urem_odd_even_INT_MIN(<4 x i32> %X) nounwind {374; CHECK-LABEL: test_urem_odd_even_INT_MIN:375; CHECK: // %bb.0:376; CHECK-NEXT: adrp x8, .LCPI15_0377; CHECK-NEXT: adrp x9, .LCPI15_2378; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI15_0]379; CHECK-NEXT: adrp x8, .LCPI15_1380; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI15_2]381; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s382; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI15_1]383; CHECK-NEXT: adrp x8, .LCPI15_3384; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s385; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s386; CHECK-NEXT: movi v2.4s, #1387; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b388; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI15_3]389; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s390; CHECK-NEXT: and v0.16b, v0.16b, v2.16b391; CHECK-NEXT: ret392 %urem = urem <4 x i32> %X, <i32 5, i32 14, i32 2147483648, i32 100>393 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>394 %ret = zext <4 x i1> %cmp to <4 x i32>395 ret <4 x i32> %ret396}397 398;==============================================================================;399 400; One all-ones divisor and power-of-two divisor divisor in odd divisor401define <4 x i32> @test_urem_odd_allones_and_poweroftwo(<4 x i32> %X) nounwind {402; CHECK-LABEL: test_urem_odd_allones_and_poweroftwo:403; CHECK: // %bb.0:404; CHECK-NEXT: adrp x8, .LCPI16_0405; CHECK-NEXT: adrp x9, .LCPI16_2406; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI16_0]407; CHECK-NEXT: adrp x8, .LCPI16_1408; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI16_2]409; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s410; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI16_1]411; CHECK-NEXT: adrp x8, .LCPI16_3412; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s413; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s414; CHECK-NEXT: movi v2.4s, #1415; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b416; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI16_3]417; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s418; CHECK-NEXT: and v0.16b, v0.16b, v2.16b419; CHECK-NEXT: ret420 %urem = urem <4 x i32> %X, <i32 5, i32 4294967295, i32 16, i32 5>421 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>422 %ret = zext <4 x i1> %cmp to <4 x i32>423 ret <4 x i32> %ret424}425 426; One all-ones divisor and power-of-two divisor divisor in even divisor427define <4 x i32> @test_urem_even_allones_and_poweroftwo(<4 x i32> %X) nounwind {428; CHECK-LABEL: test_urem_even_allones_and_poweroftwo:429; CHECK: // %bb.0:430; CHECK-NEXT: adrp x8, .LCPI17_0431; CHECK-NEXT: adrp x9, .LCPI17_2432; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI17_0]433; CHECK-NEXT: adrp x8, .LCPI17_1434; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI17_2]435; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s436; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI17_1]437; CHECK-NEXT: adrp x8, .LCPI17_3438; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s439; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s440; CHECK-NEXT: movi v2.4s, #1441; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b442; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI17_3]443; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s444; CHECK-NEXT: and v0.16b, v0.16b, v2.16b445; CHECK-NEXT: ret446 %urem = urem <4 x i32> %X, <i32 14, i32 4294967295, i32 16, i32 14>447 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>448 %ret = zext <4 x i1> %cmp to <4 x i32>449 ret <4 x i32> %ret450}451 452; One all-ones divisor and power-of-two divisor divisor in odd+even divisor453define <4 x i32> @test_urem_odd_even_allones_and_poweroftwo(<4 x i32> %X) nounwind {454; CHECK-LABEL: test_urem_odd_even_allones_and_poweroftwo:455; CHECK: // %bb.0:456; CHECK-NEXT: adrp x8, .LCPI18_0457; CHECK-NEXT: adrp x9, .LCPI18_2458; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI18_0]459; CHECK-NEXT: adrp x8, .LCPI18_1460; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI18_2]461; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s462; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI18_1]463; CHECK-NEXT: adrp x8, .LCPI18_3464; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s465; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s466; CHECK-NEXT: movi v2.4s, #1467; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b468; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI18_3]469; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s470; CHECK-NEXT: and v0.16b, v0.16b, v2.16b471; CHECK-NEXT: ret472 %urem = urem <4 x i32> %X, <i32 5, i32 4294967295, i32 16, i32 100>473 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>474 %ret = zext <4 x i1> %cmp to <4 x i32>475 ret <4 x i32> %ret476}477 478;------------------------------------------------------------------------------;479 480; One all-ones divisor and one one divisor in odd divisor481define <4 x i32> @test_urem_odd_allones_and_one(<4 x i32> %X) nounwind {482; CHECK-LABEL: test_urem_odd_allones_and_one:483; CHECK: // %bb.0:484; CHECK-NEXT: adrp x8, .LCPI19_0485; CHECK-NEXT: movi v2.4s, #1486; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI19_0]487; CHECK-NEXT: adrp x8, .LCPI19_1488; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s489; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI19_1]490; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s491; CHECK-NEXT: and v0.16b, v0.16b, v2.16b492; CHECK-NEXT: ret493 %urem = urem <4 x i32> %X, <i32 5, i32 4294967295, i32 1, i32 5>494 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>495 %ret = zext <4 x i1> %cmp to <4 x i32>496 ret <4 x i32> %ret497}498 499; One all-ones divisor and one one divisor in even divisor500define <4 x i32> @test_urem_even_allones_and_one(<4 x i32> %X) nounwind {501; CHECK-LABEL: test_urem_even_allones_and_one:502; CHECK: // %bb.0:503; CHECK-NEXT: adrp x8, .LCPI20_0504; CHECK-NEXT: adrp x9, .LCPI20_2505; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI20_0]506; CHECK-NEXT: adrp x8, .LCPI20_1507; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI20_2]508; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s509; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI20_1]510; CHECK-NEXT: adrp x8, .LCPI20_3511; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s512; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s513; CHECK-NEXT: movi v2.4s, #1514; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b515; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI20_3]516; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s517; CHECK-NEXT: and v0.16b, v0.16b, v2.16b518; CHECK-NEXT: ret519 %urem = urem <4 x i32> %X, <i32 14, i32 4294967295, i32 1, i32 14>520 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>521 %ret = zext <4 x i1> %cmp to <4 x i32>522 ret <4 x i32> %ret523}524 525; One all-ones divisor and one one divisor in odd+even divisor526define <4 x i32> @test_urem_odd_even_allones_and_one(<4 x i32> %X) nounwind {527; CHECK-LABEL: test_urem_odd_even_allones_and_one:528; CHECK: // %bb.0:529; CHECK-NEXT: adrp x8, .LCPI21_0530; CHECK-NEXT: adrp x9, .LCPI21_2531; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI21_0]532; CHECK-NEXT: adrp x8, .LCPI21_1533; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI21_2]534; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s535; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI21_1]536; CHECK-NEXT: adrp x8, .LCPI21_3537; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s538; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s539; CHECK-NEXT: movi v2.4s, #1540; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b541; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI21_3]542; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s543; CHECK-NEXT: and v0.16b, v0.16b, v2.16b544; CHECK-NEXT: ret545 %urem = urem <4 x i32> %X, <i32 5, i32 4294967295, i32 1, i32 100>546 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>547 %ret = zext <4 x i1> %cmp to <4 x i32>548 ret <4 x i32> %ret549}550 551;------------------------------------------------------------------------------;552 553; One power-of-two divisor divisor and one divisor in odd divisor554define <4 x i32> @test_urem_odd_poweroftwo_and_one(<4 x i32> %X) nounwind {555; CHECK-LABEL: test_urem_odd_poweroftwo_and_one:556; CHECK: // %bb.0:557; CHECK-NEXT: adrp x8, .LCPI22_0558; CHECK-NEXT: adrp x9, .LCPI22_2559; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI22_0]560; CHECK-NEXT: adrp x8, .LCPI22_1561; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI22_2]562; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s563; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI22_1]564; CHECK-NEXT: adrp x8, .LCPI22_3565; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s566; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s567; CHECK-NEXT: movi v2.4s, #1568; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b569; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI22_3]570; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s571; CHECK-NEXT: and v0.16b, v0.16b, v2.16b572; CHECK-NEXT: ret573 %urem = urem <4 x i32> %X, <i32 5, i32 16, i32 1, i32 5>574 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>575 %ret = zext <4 x i1> %cmp to <4 x i32>576 ret <4 x i32> %ret577}578 579; One power-of-two divisor divisor and one divisor in even divisor580define <4 x i32> @test_urem_even_poweroftwo_and_one(<4 x i32> %X) nounwind {581; CHECK-LABEL: test_urem_even_poweroftwo_and_one:582; CHECK: // %bb.0:583; CHECK-NEXT: adrp x8, .LCPI23_0584; CHECK-NEXT: adrp x9, .LCPI23_2585; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI23_0]586; CHECK-NEXT: adrp x8, .LCPI23_1587; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI23_2]588; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s589; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI23_1]590; CHECK-NEXT: adrp x8, .LCPI23_3591; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s592; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s593; CHECK-NEXT: movi v2.4s, #1594; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b595; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI23_3]596; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s597; CHECK-NEXT: and v0.16b, v0.16b, v2.16b598; CHECK-NEXT: ret599 %urem = urem <4 x i32> %X, <i32 14, i32 16, i32 1, i32 14>600 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>601 %ret = zext <4 x i1> %cmp to <4 x i32>602 ret <4 x i32> %ret603}604 605; One power-of-two divisor divisor and one divisor in odd+even divisor606define <4 x i32> @test_urem_odd_even_poweroftwo_and_one(<4 x i32> %X) nounwind {607; CHECK-LABEL: test_urem_odd_even_poweroftwo_and_one:608; CHECK: // %bb.0:609; CHECK-NEXT: adrp x8, .LCPI24_0610; CHECK-NEXT: adrp x9, .LCPI24_2611; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI24_0]612; CHECK-NEXT: adrp x8, .LCPI24_1613; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI24_2]614; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s615; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI24_1]616; CHECK-NEXT: adrp x8, .LCPI24_3617; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s618; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s619; CHECK-NEXT: movi v2.4s, #1620; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b621; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI24_3]622; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s623; CHECK-NEXT: and v0.16b, v0.16b, v2.16b624; CHECK-NEXT: ret625 %urem = urem <4 x i32> %X, <i32 5, i32 16, i32 1, i32 100>626 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>627 %ret = zext <4 x i1> %cmp to <4 x i32>628 ret <4 x i32> %ret629}630 631;------------------------------------------------------------------------------;632 633define <4 x i32> @test_urem_odd_allones_and_poweroftwo_and_one(<4 x i32> %X) nounwind {634; CHECK-LABEL: test_urem_odd_allones_and_poweroftwo_and_one:635; CHECK: // %bb.0:636; CHECK-NEXT: adrp x8, .LCPI25_0637; CHECK-NEXT: adrp x9, .LCPI25_2638; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI25_0]639; CHECK-NEXT: adrp x8, .LCPI25_1640; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI25_2]641; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s642; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI25_1]643; CHECK-NEXT: adrp x8, .LCPI25_3644; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s645; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s646; CHECK-NEXT: movi v2.4s, #1647; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b648; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI25_3]649; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s650; CHECK-NEXT: and v0.16b, v0.16b, v2.16b651; CHECK-NEXT: ret652 %urem = urem <4 x i32> %X, <i32 5, i32 4294967295, i32 16, i32 1>653 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>654 %ret = zext <4 x i1> %cmp to <4 x i32>655 ret <4 x i32> %ret656}657 658define <4 x i32> @test_urem_even_allones_and_poweroftwo_and_one(<4 x i32> %X) nounwind {659; CHECK-LABEL: test_urem_even_allones_and_poweroftwo_and_one:660; CHECK: // %bb.0:661; CHECK-NEXT: adrp x8, .LCPI26_0662; CHECK-NEXT: adrp x9, .LCPI26_2663; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI26_0]664; CHECK-NEXT: adrp x8, .LCPI26_1665; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI26_2]666; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s667; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI26_1]668; CHECK-NEXT: adrp x8, .LCPI26_3669; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s670; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s671; CHECK-NEXT: movi v2.4s, #1672; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b673; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI26_3]674; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s675; CHECK-NEXT: and v0.16b, v0.16b, v2.16b676; CHECK-NEXT: ret677 %urem = urem <4 x i32> %X, <i32 14, i32 4294967295, i32 16, i32 1>678 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 0, i32 0, i32 0>679 %ret = zext <4 x i1> %cmp to <4 x i32>680 ret <4 x i32> %ret681}682