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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-unknown-unknown -O3 -cgp-icmp-eq2icmp-st -verify-machineinstrs < %s | FileCheck %s3 4; Test cases are generated from:5; long long NAME(PARAM a, PARAM b) {6; if (LHS > RHS)7; return b;8; if (LHS < RHS)9; return a;\10; return a * b;11; }12; Please note funtion name is defined as <PARAM>_<LHS>_<RHS>. Take ll_a_op_b__113; for example. ll is PARAM, a_op_b (i.e., a << b) is LHS, _1 (i.e., -1) is RHS.14 15target datalayout = "e-m:e-i64:64-n32:64"16 17define i64 @ll_a_op_b__2(i64 %a, i64 %b) {18; CHECK-LABEL: ll_a_op_b__2:19; CHECK: // %bb.0: // %entry20; CHECK-NEXT: lsl x8, x0, x121; CHECK-NEXT: cmn x8, #222; CHECK-NEXT: csinc x8, x1, xzr, eq23; CHECK-NEXT: mul x8, x8, x024; CHECK-NEXT: csel x0, x1, x8, gt25; CHECK-NEXT: ret26entry:27 %shl = shl i64 %a, %b28 %cmp = icmp sgt i64 %shl, -229 br i1 %cmp, label %return, label %if.end30 31if.end: ; preds = %entry32 %cmp2 = icmp eq i64 %shl, -233 %mul = select i1 %cmp2, i64 %b, i64 134 %spec.select = mul nsw i64 %mul, %a35 ret i64 %spec.select36 37return: ; preds = %entry38 ret i64 %b39}40 41define i64 @ll_a_op_b__1(i64 %a, i64 %b) {42; CHECK-LABEL: ll_a_op_b__1:43; CHECK: // %bb.0: // %entry44; CHECK-NEXT: lsl x8, x0, x145; CHECK-NEXT: cmn x8, #146; CHECK-NEXT: csinc x8, x1, xzr, eq47; CHECK-NEXT: mul x8, x8, x048; CHECK-NEXT: csel x0, x1, x8, gt49; CHECK-NEXT: ret50entry:51 %shl = shl i64 %a, %b52 %cmp = icmp sgt i64 %shl, -153 br i1 %cmp, label %return, label %if.end54 55if.end: ; preds = %entry56 %cmp2 = icmp eq i64 %shl, -157 %mul = select i1 %cmp2, i64 %b, i64 158 %spec.select = mul nsw i64 %mul, %a59 ret i64 %spec.select60 61return: ; preds = %entry62 ret i64 %b63}64 65define i64 @ll_a_op_b_0(i64 %a, i64 %b) {66; CHECK-LABEL: ll_a_op_b_0:67; CHECK: // %bb.0: // %entry68; CHECK-NEXT: lsl x8, x0, x169; CHECK-NEXT: cmp x8, #070; CHECK-NEXT: csinc x8, x1, xzr, eq71; CHECK-NEXT: mul x8, x8, x072; CHECK-NEXT: csel x0, x1, x8, gt73; CHECK-NEXT: ret74entry:75 %shl = shl i64 %a, %b76 %cmp = icmp sgt i64 %shl, 077 br i1 %cmp, label %return, label %if.end78 79if.end: ; preds = %entry80 %cmp2 = icmp eq i64 %shl, 081 %mul = select i1 %cmp2, i64 %b, i64 182 %spec.select = mul nsw i64 %mul, %a83 ret i64 %spec.select84 85return: ; preds = %entry86 ret i64 %b87}88 89define i64 @ll_a_op_b_1(i64 %a, i64 %b) {90; CHECK-LABEL: ll_a_op_b_1:91; CHECK: // %bb.0: // %entry92; CHECK-NEXT: lsl x8, x0, x193; CHECK-NEXT: cmp x8, #194; CHECK-NEXT: csinc x8, x1, xzr, eq95; CHECK-NEXT: mul x8, x8, x096; CHECK-NEXT: csel x0, x1, x8, gt97; CHECK-NEXT: ret98entry:99 %shl = shl i64 %a, %b100 %cmp = icmp sgt i64 %shl, 1101 br i1 %cmp, label %return, label %if.end102 103if.end: ; preds = %entry104 %cmp2 = icmp eq i64 %shl, 1105 %mul = select i1 %cmp2, i64 %b, i64 1106 %spec.select = mul nsw i64 %mul, %a107 ret i64 %spec.select108 109return: ; preds = %entry110 ret i64 %b111}112 113define i64 @ll_a_op_b_2(i64 %a, i64 %b) {114; CHECK-LABEL: ll_a_op_b_2:115; CHECK: // %bb.0: // %entry116; CHECK-NEXT: lsl x8, x0, x1117; CHECK-NEXT: cmp x8, #2118; CHECK-NEXT: csinc x8, x1, xzr, eq119; CHECK-NEXT: mul x8, x8, x0120; CHECK-NEXT: csel x0, x1, x8, gt121; CHECK-NEXT: ret122entry:123 %shl = shl i64 %a, %b124 %cmp = icmp sgt i64 %shl, 2125 br i1 %cmp, label %return, label %if.end126 127if.end: ; preds = %entry128 %cmp2 = icmp eq i64 %shl, 2129 %mul = select i1 %cmp2, i64 %b, i64 1130 %spec.select = mul nsw i64 %mul, %a131 ret i64 %spec.select132 133return: ; preds = %entry134 ret i64 %b135}136 137define i64 @ll_a__2(i64 %a, i64 %b) {138; CHECK-LABEL: ll_a__2:139; CHECK: // %bb.0: // %entry140; CHECK-NEXT: cmn x0, #2141; CHECK-NEXT: csinc x8, x1, xzr, eq142; CHECK-NEXT: mul x8, x8, x0143; CHECK-NEXT: csel x0, x1, x8, gt144; CHECK-NEXT: ret145entry:146 %cmp = icmp sgt i64 %a, -2147 br i1 %cmp, label %return, label %if.end148 149if.end: ; preds = %entry150 %cmp1 = icmp eq i64 %a, -2151 %mul = select i1 %cmp1, i64 %b, i64 1152 %spec.select = mul nsw i64 %mul, %a153 ret i64 %spec.select154 155return: ; preds = %entry156 ret i64 %b157}158 159define i64 @ll_a__1(i64 %a, i64 %b) {160; CHECK-LABEL: ll_a__1:161; CHECK: // %bb.0: // %entry162; CHECK-NEXT: cmn x0, #1163; CHECK-NEXT: csinc x8, x1, xzr, eq164; CHECK-NEXT: mul x8, x8, x0165; CHECK-NEXT: csel x0, x1, x8, gt166; CHECK-NEXT: ret167entry:168 %cmp = icmp sgt i64 %a, -1169 br i1 %cmp, label %return, label %if.end170 171if.end: ; preds = %entry172 %cmp1 = icmp eq i64 %a, -1173 %mul = select i1 %cmp1, i64 %b, i64 1174 %spec.select = mul nsw i64 %mul, %a175 ret i64 %spec.select176 177return: ; preds = %entry178 ret i64 %b179}180 181define i64 @ll_a_0(i64 %a, i64 %b) {182; CHECK-LABEL: ll_a_0:183; CHECK: // %bb.0: // %entry184; CHECK-NEXT: cmp x0, #0185; CHECK-NEXT: csinc x8, x1, xzr, eq186; CHECK-NEXT: mul x8, x8, x0187; CHECK-NEXT: csel x0, x1, x8, gt188; CHECK-NEXT: ret189entry:190 %cmp = icmp sgt i64 %a, 0191 br i1 %cmp, label %return, label %if.end192 193if.end: ; preds = %entry194 %cmp1 = icmp eq i64 %a, 0195 %mul = select i1 %cmp1, i64 %b, i64 1196 %spec.select = mul nsw i64 %mul, %a197 ret i64 %spec.select198 199return: ; preds = %entry200 ret i64 %b201}202 203define i64 @ll_a_1(i64 %a, i64 %b) {204; CHECK-LABEL: ll_a_1:205; CHECK: // %bb.0: // %entry206; CHECK-NEXT: cmp x0, #1207; CHECK-NEXT: csinc x8, x1, xzr, eq208; CHECK-NEXT: mul x8, x8, x0209; CHECK-NEXT: csel x0, x1, x8, gt210; CHECK-NEXT: ret211entry:212 %cmp = icmp sgt i64 %a, 1213 br i1 %cmp, label %return, label %if.end214 215if.end: ; preds = %entry216 %cmp1 = icmp eq i64 %a, 1217 %mul = select i1 %cmp1, i64 %b, i64 1218 %spec.select = mul nsw i64 %mul, %a219 ret i64 %spec.select220 221return: ; preds = %entry222 ret i64 %b223}224 225define i64 @ll_a_2(i64 %a, i64 %b) {226; CHECK-LABEL: ll_a_2:227; CHECK: // %bb.0: // %entry228; CHECK-NEXT: cmp x0, #2229; CHECK-NEXT: csinc x8, x1, xzr, eq230; CHECK-NEXT: mul x8, x8, x0231; CHECK-NEXT: csel x0, x1, x8, gt232; CHECK-NEXT: ret233entry:234 %cmp = icmp sgt i64 %a, 2235 br i1 %cmp, label %return, label %if.end236 237if.end: ; preds = %entry238 %cmp1 = icmp eq i64 %a, 2239 %mul = select i1 %cmp1, i64 %b, i64 1240 %spec.select = mul nsw i64 %mul, %a241 ret i64 %spec.select242 243return: ; preds = %entry244 ret i64 %b245}246 247define i64 @i_a_op_b__2(i32 signext %a, i32 signext %b) {248; CHECK-LABEL: i_a_op_b__2:249; CHECK: // %bb.0: // %entry250; CHECK-NEXT: lsl w8, w0, w1251; CHECK-NEXT: cmn w8, #2252; CHECK-NEXT: csinc w8, w1, wzr, eq253; CHECK-NEXT: mul w8, w8, w0254; CHECK-NEXT: csel w8, w1, w8, gt255; CHECK-NEXT: sxtw x0, w8256; CHECK-NEXT: ret257entry:258 %shl = shl i32 %a, %b259 %cmp = icmp sgt i32 %shl, -2260 br i1 %cmp, label %return, label %if.end261 262if.end: ; preds = %entry263 %cmp2 = icmp eq i32 %shl, -2264 %mul = select i1 %cmp2, i32 %b, i32 1265 %spec.select = mul nsw i32 %mul, %a266 br label %return267 268return: ; preds = %if.end, %entry269 %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]270 %retval.0 = sext i32 %retval.0.in to i64271 ret i64 %retval.0272}273 274define i64 @i_a_op_b__1(i32 signext %a, i32 signext %b) {275; CHECK-LABEL: i_a_op_b__1:276; CHECK: // %bb.0: // %entry277; CHECK-NEXT: lsl w8, w0, w1278; CHECK-NEXT: cmn w8, #1279; CHECK-NEXT: csinc w8, w1, wzr, eq280; CHECK-NEXT: mul w8, w8, w0281; CHECK-NEXT: csel w8, w1, w8, gt282; CHECK-NEXT: sxtw x0, w8283; CHECK-NEXT: ret284entry:285 %shl = shl i32 %a, %b286 %cmp = icmp sgt i32 %shl, -1287 br i1 %cmp, label %return, label %if.end288 289if.end: ; preds = %entry290 %cmp2 = icmp eq i32 %shl, -1291 %mul = select i1 %cmp2, i32 %b, i32 1292 %spec.select = mul nsw i32 %mul, %a293 br label %return294 295return: ; preds = %if.end, %entry296 %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]297 %retval.0 = sext i32 %retval.0.in to i64298 ret i64 %retval.0299}300 301define i64 @i_a_op_b_0(i32 signext %a, i32 signext %b) {302; CHECK-LABEL: i_a_op_b_0:303; CHECK: // %bb.0: // %entry304; CHECK-NEXT: lsl w8, w0, w1305; CHECK-NEXT: cmp w8, #0306; CHECK-NEXT: csinc w8, w1, wzr, eq307; CHECK-NEXT: mul w8, w8, w0308; CHECK-NEXT: csel w8, w1, w8, gt309; CHECK-NEXT: sxtw x0, w8310; CHECK-NEXT: ret311entry:312 %shl = shl i32 %a, %b313 %cmp = icmp sgt i32 %shl, 0314 br i1 %cmp, label %return, label %if.end315 316if.end: ; preds = %entry317 %cmp2 = icmp eq i32 %shl, 0318 %mul = select i1 %cmp2, i32 %b, i32 1319 %spec.select = mul nsw i32 %mul, %a320 br label %return321 322return: ; preds = %if.end, %entry323 %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]324 %retval.0 = sext i32 %retval.0.in to i64325 ret i64 %retval.0326}327 328define i64 @i_a_op_b_1(i32 signext %a, i32 signext %b) {329; CHECK-LABEL: i_a_op_b_1:330; CHECK: // %bb.0: // %entry331; CHECK-NEXT: lsl w8, w0, w1332; CHECK-NEXT: cmp w8, #1333; CHECK-NEXT: csinc w8, w1, wzr, eq334; CHECK-NEXT: mul w8, w8, w0335; CHECK-NEXT: csel w8, w1, w8, gt336; CHECK-NEXT: sxtw x0, w8337; CHECK-NEXT: ret338entry:339 %shl = shl i32 %a, %b340 %cmp = icmp sgt i32 %shl, 1341 br i1 %cmp, label %return, label %if.end342 343if.end: ; preds = %entry344 %cmp2 = icmp eq i32 %shl, 1345 %mul = select i1 %cmp2, i32 %b, i32 1346 %spec.select = mul nsw i32 %mul, %a347 br label %return348 349return: ; preds = %if.end, %entry350 %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]351 %retval.0 = sext i32 %retval.0.in to i64352 ret i64 %retval.0353}354 355define i64 @i_a_op_b_2(i32 signext %a, i32 signext %b) {356; CHECK-LABEL: i_a_op_b_2:357; CHECK: // %bb.0: // %entry358; CHECK-NEXT: lsl w8, w0, w1359; CHECK-NEXT: cmp w8, #2360; CHECK-NEXT: csinc w8, w1, wzr, eq361; CHECK-NEXT: mul w8, w8, w0362; CHECK-NEXT: csel w8, w1, w8, gt363; CHECK-NEXT: sxtw x0, w8364; CHECK-NEXT: ret365entry:366 %shl = shl i32 %a, %b367 %cmp = icmp sgt i32 %shl, 2368 br i1 %cmp, label %return, label %if.end369 370if.end: ; preds = %entry371 %cmp2 = icmp eq i32 %shl, 2372 %mul = select i1 %cmp2, i32 %b, i32 1373 %spec.select = mul nsw i32 %mul, %a374 br label %return375 376return: ; preds = %if.end, %entry377 %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]378 %retval.0 = sext i32 %retval.0.in to i64379 ret i64 %retval.0380}381 382define i64 @i_a__2(i32 signext %a, i32 signext %b) {383; CHECK-LABEL: i_a__2:384; CHECK: // %bb.0: // %entry385; CHECK-NEXT: cmn w0, #2386; CHECK-NEXT: csinc w8, w1, wzr, eq387; CHECK-NEXT: mul w8, w8, w0388; CHECK-NEXT: csel w8, w1, w8, gt389; CHECK-NEXT: sxtw x0, w8390; CHECK-NEXT: ret391entry:392 %cmp = icmp sgt i32 %a, -2393 br i1 %cmp, label %return, label %if.end394 395if.end: ; preds = %entry396 %cmp1 = icmp eq i32 %a, -2397 %mul = select i1 %cmp1, i32 %b, i32 1398 %spec.select = mul nsw i32 %mul, %a399 br label %return400 401return: ; preds = %if.end, %entry402 %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]403 %retval.0 = sext i32 %retval.0.in to i64404 ret i64 %retval.0405}406 407define i64 @i_a__1(i32 signext %a, i32 signext %b) {408; CHECK-LABEL: i_a__1:409; CHECK: // %bb.0: // %entry410; CHECK-NEXT: cmn w0, #1411; CHECK-NEXT: csinc w8, w1, wzr, eq412; CHECK-NEXT: mul w8, w8, w0413; CHECK-NEXT: csel w8, w1, w8, gt414; CHECK-NEXT: sxtw x0, w8415; CHECK-NEXT: ret416entry:417 %cmp = icmp sgt i32 %a, -1418 br i1 %cmp, label %return, label %if.end419 420if.end: ; preds = %entry421 %cmp1 = icmp eq i32 %a, -1422 %mul = select i1 %cmp1, i32 %b, i32 1423 %spec.select = mul nsw i32 %mul, %a424 br label %return425 426return: ; preds = %if.end, %entry427 %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]428 %retval.0 = sext i32 %retval.0.in to i64429 ret i64 %retval.0430}431 432define i64 @i_a_0(i32 signext %a, i32 signext %b) {433; CHECK-LABEL: i_a_0:434; CHECK: // %bb.0: // %entry435; CHECK-NEXT: cmp w0, #0436; CHECK-NEXT: csinc w8, w1, wzr, eq437; CHECK-NEXT: mul w8, w8, w0438; CHECK-NEXT: csel w8, w1, w8, gt439; CHECK-NEXT: sxtw x0, w8440; CHECK-NEXT: ret441entry:442 %cmp = icmp sgt i32 %a, 0443 br i1 %cmp, label %return, label %if.end444 445if.end: ; preds = %entry446 %cmp1 = icmp eq i32 %a, 0447 %mul = select i1 %cmp1, i32 %b, i32 1448 %spec.select = mul nsw i32 %mul, %a449 br label %return450 451return: ; preds = %if.end, %entry452 %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]453 %retval.0 = sext i32 %retval.0.in to i64454 ret i64 %retval.0455}456 457define i64 @i_a_1(i32 signext %a, i32 signext %b) {458; CHECK-LABEL: i_a_1:459; CHECK: // %bb.0: // %entry460; CHECK-NEXT: cmp w0, #1461; CHECK-NEXT: csinc w8, w1, wzr, eq462; CHECK-NEXT: mul w8, w8, w0463; CHECK-NEXT: csel w8, w1, w8, gt464; CHECK-NEXT: sxtw x0, w8465; CHECK-NEXT: ret466entry:467 %cmp = icmp sgt i32 %a, 1468 br i1 %cmp, label %return, label %if.end469 470if.end: ; preds = %entry471 %cmp1 = icmp eq i32 %a, 1472 %mul = select i1 %cmp1, i32 %b, i32 1473 %spec.select = mul nsw i32 %mul, %a474 br label %return475 476return: ; preds = %if.end, %entry477 %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]478 %retval.0 = sext i32 %retval.0.in to i64479 ret i64 %retval.0480}481 482define i64 @i_a_2(i32 signext %a, i32 signext %b) {483; CHECK-LABEL: i_a_2:484; CHECK: // %bb.0: // %entry485; CHECK-NEXT: cmp w0, #2486; CHECK-NEXT: csinc w8, w1, wzr, eq487; CHECK-NEXT: mul w8, w8, w0488; CHECK-NEXT: csel w8, w1, w8, gt489; CHECK-NEXT: sxtw x0, w8490; CHECK-NEXT: ret491entry:492 %cmp = icmp sgt i32 %a, 2493 br i1 %cmp, label %return, label %if.end494 495if.end: ; preds = %entry496 %cmp1 = icmp eq i32 %a, 2497 %mul = select i1 %cmp1, i32 %b, i32 1498 %spec.select = mul nsw i32 %mul, %a499 br label %return500 501return: ; preds = %if.end, %entry502 %retval.0.in = phi i32 [ %b, %entry ], [ %spec.select, %if.end ]503 %retval.0 = sext i32 %retval.0.in to i64504 ret i64 %retval.0505}506