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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=aarch64-apple-darwin -mattr=+neon -aarch64-enable-collect-loh=false -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-apple-darwin -mattr=+neon -aarch64-enable-collect-loh=false -global-isel -global-isel-abort=2 -verify-machineinstrs < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5; CHECK-GI: warning: Instruction selection used fallback path for convert_to_bitmask26; CHECK-GI-NEXT: warning: Instruction selection used fallback path for clang_builtins_undef_concat_convert_to_bitmask47; CHECK-GI-NEXT: warning: Instruction selection used fallback path for convert_to_bitmask_2xi328; CHECK-GI-NEXT: warning: Instruction selection used fallback path for convert_to_bitmask_8xi29; CHECK-GI-NEXT: warning: Instruction selection used fallback path for no_direct_convert_for_bad_concat10 11; Basic tests from input vector to bitmask12; IR generated from clang for:13; __builtin_convertvector + reinterpret_cast<uint16&>14 15define i16 @convert_to_bitmask16(<16 x i8> %vec) {16; Bits used in mask17; CHECK-SD-LABEL: convert_to_bitmask16:18; CHECK-SD: ; %bb.0:19; CHECK-SD-NEXT: adrp x8, lCPI0_0@PAGE20; CHECK-SD-NEXT: cmeq.16b v0, v0, #021; CHECK-SD-NEXT: ldr q1, [x8, lCPI0_0@PAGEOFF]22; CHECK-SD-NEXT: bic.16b v0, v1, v023; CHECK-SD-NEXT: ext.16b v1, v0, v0, #824; CHECK-SD-NEXT: zip1.16b v0, v0, v125; CHECK-SD-NEXT: addv.8h h0, v026; CHECK-SD-NEXT: fmov w0, s027; CHECK-SD-NEXT: ret28;29; CHECK-GI-LABEL: convert_to_bitmask16:30; CHECK-GI: ; %bb.0:31; CHECK-GI-NEXT: sub sp, sp, #1632; CHECK-GI-NEXT: .cfi_def_cfa_offset 1633; CHECK-GI-NEXT: cmtst.16b v0, v0, v034; CHECK-GI-NEXT: umov.b w8, v0[1]35; CHECK-GI-NEXT: umov.b w9, v0[0]36; CHECK-GI-NEXT: umov.b w10, v0[2]37; CHECK-GI-NEXT: umov.b w11, v0[3]38; CHECK-GI-NEXT: and w8, w8, #0x139; CHECK-GI-NEXT: bfi w9, w8, #1, #3140; CHECK-GI-NEXT: and w8, w10, #0x141; CHECK-GI-NEXT: umov.b w10, v0[4]42; CHECK-GI-NEXT: orr w8, w9, w8, lsl #243; CHECK-GI-NEXT: and w9, w11, #0x144; CHECK-GI-NEXT: umov.b w11, v0[5]45; CHECK-GI-NEXT: orr w8, w8, w9, lsl #346; CHECK-GI-NEXT: and w9, w10, #0x147; CHECK-GI-NEXT: umov.b w10, v0[6]48; CHECK-GI-NEXT: orr w8, w8, w9, lsl #449; CHECK-GI-NEXT: and w9, w11, #0x150; CHECK-GI-NEXT: umov.b w11, v0[7]51; CHECK-GI-NEXT: orr w8, w8, w9, lsl #552; CHECK-GI-NEXT: and w9, w10, #0x153; CHECK-GI-NEXT: umov.b w10, v0[8]54; CHECK-GI-NEXT: orr w8, w8, w9, lsl #655; CHECK-GI-NEXT: and w9, w11, #0x156; CHECK-GI-NEXT: umov.b w11, v0[9]57; CHECK-GI-NEXT: orr w8, w8, w9, lsl #758; CHECK-GI-NEXT: and w9, w10, #0x159; CHECK-GI-NEXT: umov.b w10, v0[10]60; CHECK-GI-NEXT: orr w8, w8, w9, lsl #861; CHECK-GI-NEXT: and w9, w11, #0x162; CHECK-GI-NEXT: umov.b w11, v0[11]63; CHECK-GI-NEXT: orr w8, w8, w9, lsl #964; CHECK-GI-NEXT: and w9, w10, #0x165; CHECK-GI-NEXT: umov.b w10, v0[12]66; CHECK-GI-NEXT: orr w8, w8, w9, lsl #1067; CHECK-GI-NEXT: and w9, w11, #0x168; CHECK-GI-NEXT: umov.b w11, v0[13]69; CHECK-GI-NEXT: orr w8, w8, w9, lsl #1170; CHECK-GI-NEXT: and w9, w10, #0x171; CHECK-GI-NEXT: umov.b w10, v0[14]72; CHECK-GI-NEXT: orr w8, w8, w9, lsl #1273; CHECK-GI-NEXT: and w9, w11, #0x174; CHECK-GI-NEXT: umov.b w11, v0[15]75; CHECK-GI-NEXT: orr w8, w8, w9, lsl #1376; CHECK-GI-NEXT: and w9, w10, #0x177; CHECK-GI-NEXT: orr w8, w8, w9, lsl #1478; CHECK-GI-NEXT: and w9, w11, #0x179; CHECK-GI-NEXT: orr w8, w8, w9, lsl #1580; CHECK-GI-NEXT: strh w8, [sp, #14]81; CHECK-GI-NEXT: and w0, w8, #0xffff82; CHECK-GI-NEXT: add sp, sp, #1683; CHECK-GI-NEXT: ret84 85; Actual conversion86 87 %cmp_result = icmp ne <16 x i8> %vec, zeroinitializer88 %bitmask = bitcast <16 x i1> %cmp_result to i1689 ret i16 %bitmask90}91 92define i16 @convert_to_bitmask8(<8 x i16> %vec) {93; CHECK-SD-LABEL: convert_to_bitmask8:94; CHECK-SD: ; %bb.0:95; CHECK-SD-NEXT: adrp x8, lCPI1_0@PAGE96; CHECK-SD-NEXT: cmeq.8h v0, v0, #097; CHECK-SD-NEXT: ldr q1, [x8, lCPI1_0@PAGEOFF]98; CHECK-SD-NEXT: bic.16b v0, v1, v099; CHECK-SD-NEXT: addv.8h h0, v0100; CHECK-SD-NEXT: fmov w8, s0101; CHECK-SD-NEXT: and w0, w8, #0xff102; CHECK-SD-NEXT: ret103;104; CHECK-GI-LABEL: convert_to_bitmask8:105; CHECK-GI: ; %bb.0:106; CHECK-GI-NEXT: sub sp, sp, #16107; CHECK-GI-NEXT: .cfi_def_cfa_offset 16108; CHECK-GI-NEXT: cmtst.8h v0, v0, v0109; CHECK-GI-NEXT: xtn.8b v0, v0110; CHECK-GI-NEXT: umov.b w8, v0[1]111; CHECK-GI-NEXT: umov.b w9, v0[0]112; CHECK-GI-NEXT: umov.b w10, v0[2]113; CHECK-GI-NEXT: umov.b w11, v0[3]114; CHECK-GI-NEXT: and w8, w8, #0x1115; CHECK-GI-NEXT: bfi w9, w8, #1, #31116; CHECK-GI-NEXT: and w8, w10, #0x1117; CHECK-GI-NEXT: umov.b w10, v0[4]118; CHECK-GI-NEXT: orr w8, w9, w8, lsl #2119; CHECK-GI-NEXT: and w9, w11, #0x1120; CHECK-GI-NEXT: umov.b w11, v0[5]121; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3122; CHECK-GI-NEXT: and w9, w10, #0x1123; CHECK-GI-NEXT: umov.b w10, v0[6]124; CHECK-GI-NEXT: orr w8, w8, w9, lsl #4125; CHECK-GI-NEXT: and w9, w11, #0x1126; CHECK-GI-NEXT: umov.b w11, v0[7]127; CHECK-GI-NEXT: orr w8, w8, w9, lsl #5128; CHECK-GI-NEXT: and w9, w10, #0x1129; CHECK-GI-NEXT: orr w8, w8, w9, lsl #6130; CHECK-GI-NEXT: and w9, w11, #0x1131; CHECK-GI-NEXT: orr w8, w8, w9, lsl #7132; CHECK-GI-NEXT: strb w8, [sp, #15]133; CHECK-GI-NEXT: and w0, w8, #0xff134; CHECK-GI-NEXT: add sp, sp, #16135; CHECK-GI-NEXT: ret136 137 138 %cmp_result = icmp ne <8 x i16> %vec, zeroinitializer139 %bitmask = bitcast <8 x i1> %cmp_result to i8140 %extended_bitmask = zext i8 %bitmask to i16141 ret i16 %extended_bitmask142}143 144define i4 @convert_to_bitmask4(<4 x i32> %vec) {145; CHECK-SD-LABEL: convert_to_bitmask4:146; CHECK-SD: ; %bb.0:147; CHECK-SD-NEXT: adrp x8, lCPI2_0@PAGE148; CHECK-SD-NEXT: cmeq.4s v0, v0, #0149; CHECK-SD-NEXT: ldr q1, [x8, lCPI2_0@PAGEOFF]150; CHECK-SD-NEXT: bic.16b v0, v1, v0151; CHECK-SD-NEXT: addv.4s s0, v0152; CHECK-SD-NEXT: fmov w0, s0153; CHECK-SD-NEXT: ret154;155; CHECK-GI-LABEL: convert_to_bitmask4:156; CHECK-GI: ; %bb.0:157; CHECK-GI-NEXT: sub sp, sp, #16158; CHECK-GI-NEXT: .cfi_def_cfa_offset 16159; CHECK-GI-NEXT: cmtst.4s v0, v0, v0160; CHECK-GI-NEXT: mov.s w8, v0[1]161; CHECK-GI-NEXT: mov.s w9, v0[2]162; CHECK-GI-NEXT: fmov w11, s0163; CHECK-GI-NEXT: mov.s w10, v0[3]164; CHECK-GI-NEXT: and w8, w8, #0x1165; CHECK-GI-NEXT: bfi w11, w8, #1, #31166; CHECK-GI-NEXT: and w8, w9, #0x1167; CHECK-GI-NEXT: and w9, w10, #0x1168; CHECK-GI-NEXT: orr w8, w11, w8, lsl #2169; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3170; CHECK-GI-NEXT: strb w8, [sp, #15]171; CHECK-GI-NEXT: and w0, w8, #0xff172; CHECK-GI-NEXT: add sp, sp, #16173; CHECK-GI-NEXT: ret174 175 176 %cmp_result = icmp ne <4 x i32> %vec, zeroinitializer177 %bitmask = bitcast <4 x i1> %cmp_result to i4178 ret i4 %bitmask179}180 181define i8 @convert_to_bitmask2(<2 x i64> %vec) {182; CHECK-LABEL: convert_to_bitmask2:183; CHECK: ; %bb.0:184; CHECK-NEXT: adrp x8, lCPI3_0@PAGE185; CHECK-NEXT: cmeq.2d v0, v0, #0186; CHECK-NEXT: ldr q1, [x8, lCPI3_0@PAGEOFF]187; CHECK-NEXT: bic.16b v0, v1, v0188; CHECK-NEXT: addp.2d d0, v0189; CHECK-NEXT: fmov w8, s0190; CHECK-NEXT: and w0, w8, #0x3191; CHECK-NEXT: ret192 193 194 %cmp_result = icmp ne <2 x i64> %vec, zeroinitializer195 %bitmask = bitcast <2 x i1> %cmp_result to i2196 %extended_bitmask = zext i2 %bitmask to i8197 ret i8 %extended_bitmask198}199 200; Clang's __builtin_convertvector adds an undef vector concat for vectors with <8 elements.201define i8 @clang_builtins_undef_concat_convert_to_bitmask4(<4 x i32> %vec) {202; CHECK-LABEL: clang_builtins_undef_concat_convert_to_bitmask4:203; CHECK: ; %bb.0:204; CHECK-NEXT: adrp x8, lCPI4_0@PAGE205; CHECK-NEXT: cmeq.4s v0, v0, #0206; CHECK-NEXT: ldr q1, [x8, lCPI4_0@PAGEOFF]207; CHECK-NEXT: bic.16b v0, v1, v0208; CHECK-NEXT: addv.4s s0, v0209; CHECK-NEXT: fmov w0, s0210; CHECK-NEXT: ret211 212 213 %cmp_result = icmp ne <4 x i32> %vec, zeroinitializer214 %vector_pad = shufflevector <4 x i1> %cmp_result, <4 x i1> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>215 %bitmask = bitcast <8 x i1> %vector_pad to i8216 ret i8 %bitmask217}218 219 220define i4 @convert_to_bitmask_no_compare(<4 x i32> %vec1, <4 x i32> %vec2) {221; CHECK-SD-LABEL: convert_to_bitmask_no_compare:222; CHECK-SD: ; %bb.0:223; CHECK-SD-NEXT: and.16b v0, v0, v1224; CHECK-SD-NEXT: adrp x8, lCPI5_0@PAGE225; CHECK-SD-NEXT: ldr q1, [x8, lCPI5_0@PAGEOFF]226; CHECK-SD-NEXT: shl.4s v0, v0, #31227; CHECK-SD-NEXT: cmlt.4s v0, v0, #0228; CHECK-SD-NEXT: and.16b v0, v0, v1229; CHECK-SD-NEXT: addv.4s s0, v0230; CHECK-SD-NEXT: fmov w0, s0231; CHECK-SD-NEXT: ret232;233; CHECK-GI-LABEL: convert_to_bitmask_no_compare:234; CHECK-GI: ; %bb.0:235; CHECK-GI-NEXT: sub sp, sp, #16236; CHECK-GI-NEXT: .cfi_def_cfa_offset 16237; CHECK-GI-NEXT: and.16b v0, v0, v1238; CHECK-GI-NEXT: mov.s w8, v0[1]239; CHECK-GI-NEXT: mov.s w9, v0[2]240; CHECK-GI-NEXT: fmov w11, s0241; CHECK-GI-NEXT: mov.s w10, v0[3]242; CHECK-GI-NEXT: and w8, w8, #0x1243; CHECK-GI-NEXT: bfi w11, w8, #1, #31244; CHECK-GI-NEXT: and w8, w9, #0x1245; CHECK-GI-NEXT: and w9, w10, #0x1246; CHECK-GI-NEXT: orr w8, w11, w8, lsl #2247; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3248; CHECK-GI-NEXT: strb w8, [sp, #15]249; CHECK-GI-NEXT: and w0, w8, #0xff250; CHECK-GI-NEXT: add sp, sp, #16251; CHECK-GI-NEXT: ret252 253 254 %cmp = and <4 x i32> %vec1, %vec2255 %trunc = trunc <4 x i32> %cmp to <4 x i1>256 %bitmask = bitcast <4 x i1> %trunc to i4257 ret i4 %bitmask258}259 260define i4 @convert_to_bitmask_with_compare_chain(<4 x i32> %vec1, <4 x i32> %vec2) {261; CHECK-SD-LABEL: convert_to_bitmask_with_compare_chain:262; CHECK-SD: ; %bb.0:263; CHECK-SD-NEXT: cmeq.4s v2, v0, #0264; CHECK-SD-NEXT: cmeq.4s v0, v0, v1265; CHECK-SD-NEXT: adrp x8, lCPI6_0@PAGE266; CHECK-SD-NEXT: ldr q1, [x8, lCPI6_0@PAGEOFF]267; CHECK-SD-NEXT: bic.16b v0, v0, v2268; CHECK-SD-NEXT: and.16b v0, v0, v1269; CHECK-SD-NEXT: addv.4s s0, v0270; CHECK-SD-NEXT: fmov w0, s0271; CHECK-SD-NEXT: ret272;273; CHECK-GI-LABEL: convert_to_bitmask_with_compare_chain:274; CHECK-GI: ; %bb.0:275; CHECK-GI-NEXT: sub sp, sp, #16276; CHECK-GI-NEXT: .cfi_def_cfa_offset 16277; CHECK-GI-NEXT: cmeq.4s v2, v0, #0278; CHECK-GI-NEXT: cmeq.4s v0, v0, v1279; CHECK-GI-NEXT: bic.16b v0, v0, v2280; CHECK-GI-NEXT: mov.s w8, v0[1]281; CHECK-GI-NEXT: mov.s w9, v0[2]282; CHECK-GI-NEXT: fmov w11, s0283; CHECK-GI-NEXT: mov.s w10, v0[3]284; CHECK-GI-NEXT: and w8, w8, #0x1285; CHECK-GI-NEXT: bfi w11, w8, #1, #31286; CHECK-GI-NEXT: and w8, w9, #0x1287; CHECK-GI-NEXT: and w9, w10, #0x1288; CHECK-GI-NEXT: orr w8, w11, w8, lsl #2289; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3290; CHECK-GI-NEXT: strb w8, [sp, #15]291; CHECK-GI-NEXT: and w0, w8, #0xff292; CHECK-GI-NEXT: add sp, sp, #16293; CHECK-GI-NEXT: ret294 295 296 %cmp1 = icmp ne <4 x i32> %vec1, zeroinitializer297 %cmp2 = icmp eq <4 x i32> %vec1, %vec2298 %cmp3 = and <4 x i1> %cmp1, %cmp2299 %bitmask = bitcast <4 x i1> %cmp3 to i4300 ret i4 %bitmask301}302 303define i4 @convert_to_bitmask_with_trunc_in_chain(<4 x i32> %vec1, <4 x i32> %vec2) {304; CHECK-SD-LABEL: convert_to_bitmask_with_trunc_in_chain:305; CHECK-SD: ; %bb.0:306; CHECK-SD-NEXT: cmeq.4s v0, v0, #0307; CHECK-SD-NEXT: adrp x8, lCPI7_0@PAGE308; CHECK-SD-NEXT: bic.16b v0, v1, v0309; CHECK-SD-NEXT: ldr q1, [x8, lCPI7_0@PAGEOFF]310; CHECK-SD-NEXT: shl.4s v0, v0, #31311; CHECK-SD-NEXT: cmlt.4s v0, v0, #0312; CHECK-SD-NEXT: and.16b v0, v0, v1313; CHECK-SD-NEXT: addv.4s s0, v0314; CHECK-SD-NEXT: fmov w0, s0315; CHECK-SD-NEXT: ret316;317; CHECK-GI-LABEL: convert_to_bitmask_with_trunc_in_chain:318; CHECK-GI: ; %bb.0:319; CHECK-GI-NEXT: sub sp, sp, #16320; CHECK-GI-NEXT: .cfi_def_cfa_offset 16321; CHECK-GI-NEXT: cmeq.4s v0, v0, #0322; CHECK-GI-NEXT: bic.16b v0, v1, v0323; CHECK-GI-NEXT: mov.s w8, v0[1]324; CHECK-GI-NEXT: mov.s w9, v0[2]325; CHECK-GI-NEXT: fmov w11, s0326; CHECK-GI-NEXT: mov.s w10, v0[3]327; CHECK-GI-NEXT: and w8, w8, #0x1328; CHECK-GI-NEXT: bfi w11, w8, #1, #31329; CHECK-GI-NEXT: and w8, w9, #0x1330; CHECK-GI-NEXT: and w9, w10, #0x1331; CHECK-GI-NEXT: orr w8, w11, w8, lsl #2332; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3333; CHECK-GI-NEXT: strb w8, [sp, #15]334; CHECK-GI-NEXT: and w0, w8, #0xff335; CHECK-GI-NEXT: add sp, sp, #16336; CHECK-GI-NEXT: ret337 338 339 %cmp1 = icmp ne <4 x i32> %vec1, zeroinitializer340 %trunc_vec = trunc <4 x i32> %vec2 to <4 x i1>341 %and_res = and <4 x i1> %cmp1, %trunc_vec342 %bitmask = bitcast <4 x i1> %and_res to i4343 ret i4 %bitmask344}345 346define i4 @convert_to_bitmask_with_unknown_type_in_long_chain(<4 x i32> %vec1, <4 x i32> %vec2) {347; CHECK-SD-LABEL: convert_to_bitmask_with_unknown_type_in_long_chain:348; CHECK-SD: ; %bb.0:349; CHECK-SD-NEXT: cmeq.4s v0, v0, #0350; CHECK-SD-NEXT: cmeq.4s v1, v1, #0351; CHECK-SD-NEXT: adrp x8, lCPI8_0@PAGE352; CHECK-SD-NEXT: movi d2, #0x000000ffffffff353; CHECK-SD-NEXT: movi d3, #0x00ffffffffffff354; CHECK-SD-NEXT: bic.16b v0, v1, v0355; CHECK-SD-NEXT: movi d1, #0xffff0000ffff0000356; CHECK-SD-NEXT: xtn.4h v0, v0357; CHECK-SD-NEXT: orr.8b v0, v0, v2358; CHECK-SD-NEXT: movi d2, #0x00ffffffff0000359; CHECK-SD-NEXT: eor.8b v1, v0, v1360; CHECK-SD-NEXT: eor.8b v0, v0, v2361; CHECK-SD-NEXT: mov.h v1[2], wzr362; CHECK-SD-NEXT: orr.8b v0, v0, v3363; CHECK-SD-NEXT: orr.8b v0, v1, v0364; CHECK-SD-NEXT: ldr d1, [x8, lCPI8_0@PAGEOFF]365; CHECK-SD-NEXT: shl.4h v0, v0, #15366; CHECK-SD-NEXT: cmlt.4h v0, v0, #0367; CHECK-SD-NEXT: and.8b v0, v0, v1368; CHECK-SD-NEXT: addv.4h h0, v0369; CHECK-SD-NEXT: fmov w0, s0370; CHECK-SD-NEXT: ret371;372; CHECK-GI-LABEL: convert_to_bitmask_with_unknown_type_in_long_chain:373; CHECK-GI: ; %bb.0:374; CHECK-GI-NEXT: sub sp, sp, #16375; CHECK-GI-NEXT: .cfi_def_cfa_offset 16376; CHECK-GI-NEXT: mov w8, #1 ; =0x1377; CHECK-GI-NEXT: mov w9, #0 ; =0x0378; CHECK-GI-NEXT: cmeq.4s v0, v0, #0379; CHECK-GI-NEXT: fmov s2, w8380; CHECK-GI-NEXT: fmov s4, w9381; CHECK-GI-NEXT: cmeq.4s v1, v1, #0382; CHECK-GI-NEXT: mov.16b v3, v2383; CHECK-GI-NEXT: mov.16b v5, v4384; CHECK-GI-NEXT: mov.h v4[1], w8385; CHECK-GI-NEXT: bic.16b v0, v1, v0386; CHECK-GI-NEXT: mov.16b v1, v2387; CHECK-GI-NEXT: mov.h v2[1], w8388; CHECK-GI-NEXT: mov.h v3[1], w8389; CHECK-GI-NEXT: mov.h v5[1], w8390; CHECK-GI-NEXT: mov.h v1[1], w8391; CHECK-GI-NEXT: mov.h v4[2], w8392; CHECK-GI-NEXT: xtn.4h v0, v0393; CHECK-GI-NEXT: mov.h v2[2], w8394; CHECK-GI-NEXT: mov.h v3[2], w9395; CHECK-GI-NEXT: mov.h v5[2], w9396; CHECK-GI-NEXT: mov.h v1[2], w9397; CHECK-GI-NEXT: mov.h v4[3], w9398; CHECK-GI-NEXT: mov.h v2[3], w9399; CHECK-GI-NEXT: mov.h v3[3], w9400; CHECK-GI-NEXT: mov.h v5[3], w8401; CHECK-GI-NEXT: mov.h v1[3], w8402; CHECK-GI-NEXT: orr.8b v0, v0, v3403; CHECK-GI-NEXT: eor.8b v3, v0, v5404; CHECK-GI-NEXT: eor.8b v0, v4, v0405; CHECK-GI-NEXT: and.8b v1, v3, v1406; CHECK-GI-NEXT: orr.8b v0, v2, v0407; CHECK-GI-NEXT: orr.8b v0, v1, v0408; CHECK-GI-NEXT: ushll.4s v0, v0, #0409; CHECK-GI-NEXT: mov.s w8, v0[1]410; CHECK-GI-NEXT: mov.s w9, v0[2]411; CHECK-GI-NEXT: fmov w11, s0412; CHECK-GI-NEXT: mov.s w10, v0[3]413; CHECK-GI-NEXT: and w8, w8, #0x1414; CHECK-GI-NEXT: bfi w11, w8, #1, #31415; CHECK-GI-NEXT: and w8, w9, #0x1416; CHECK-GI-NEXT: and w9, w10, #0x1417; CHECK-GI-NEXT: orr w8, w11, w8, lsl #2418; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3419; CHECK-GI-NEXT: strb w8, [sp, #15]420; CHECK-GI-NEXT: and w0, w8, #0xff421; CHECK-GI-NEXT: add sp, sp, #16422; CHECK-GI-NEXT: ret423 424 425 %cmp1 = icmp ne <4 x i32> %vec1, zeroinitializer426 %cmp2 = icmp eq <4 x i32> %vec2, zeroinitializer427 428 ; Artificially make this a long chain to hide the original type429 %chain1 = and <4 x i1> %cmp1, %cmp2;430 %chain2 = or <4 x i1> %chain1, <i1 1, i1 1, i1 0, i1 0>;431 %chain3 = xor <4 x i1> %chain2, <i1 0, i1 1, i1 0, i1 1>;432 %chain4 = and <4 x i1> %chain3, <i1 1, i1 1, i1 0, i1 1>;433 %chain5 = or <4 x i1> %chain4, <i1 1, i1 1, i1 1, i1 0>;434 %chain6 = xor <4 x i1> <i1 0, i1 1, i1 1, i1 0>, %chain2;435 %chain7 = or <4 x i1> %chain5, %chain6;436 %bitmask = bitcast <4 x i1> %chain7 to i4437 ret i4 %bitmask438}439 440define i4 @convert_to_bitmask_with_different_types_in_chain(<4 x i16> %vec1, <4 x i32> %vec2) {441; CHECK-SD-LABEL: convert_to_bitmask_with_different_types_in_chain:442; CHECK-SD: ; %bb.0:443; CHECK-SD-NEXT: cmeq.4s v1, v1, #0444; CHECK-SD-NEXT: cmeq.4h v0, v0, #0445; CHECK-SD-NEXT: adrp x8, lCPI9_0@PAGE446; CHECK-SD-NEXT: xtn.4h v1, v1447; CHECK-SD-NEXT: orn.8b v0, v1, v0448; CHECK-SD-NEXT: ldr d1, [x8, lCPI9_0@PAGEOFF]449; CHECK-SD-NEXT: and.8b v0, v0, v1450; CHECK-SD-NEXT: addv.4h h0, v0451; CHECK-SD-NEXT: fmov w0, s0452; CHECK-SD-NEXT: ret453;454; CHECK-GI-LABEL: convert_to_bitmask_with_different_types_in_chain:455; CHECK-GI: ; %bb.0:456; CHECK-GI-NEXT: sub sp, sp, #16457; CHECK-GI-NEXT: .cfi_def_cfa_offset 16458; CHECK-GI-NEXT: cmeq.4s v1, v1, #0459; CHECK-GI-NEXT: cmeq.4h v0, v0, #0460; CHECK-GI-NEXT: xtn.4h v1, v1461; CHECK-GI-NEXT: orn.8b v0, v1, v0462; CHECK-GI-NEXT: ushll.4s v0, v0, #0463; CHECK-GI-NEXT: mov.s w8, v0[1]464; CHECK-GI-NEXT: mov.s w9, v0[2]465; CHECK-GI-NEXT: fmov w11, s0466; CHECK-GI-NEXT: mov.s w10, v0[3]467; CHECK-GI-NEXT: and w8, w8, #0x1468; CHECK-GI-NEXT: bfi w11, w8, #1, #31469; CHECK-GI-NEXT: and w8, w9, #0x1470; CHECK-GI-NEXT: and w9, w10, #0x1471; CHECK-GI-NEXT: orr w8, w11, w8, lsl #2472; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3473; CHECK-GI-NEXT: strb w8, [sp, #15]474; CHECK-GI-NEXT: and w0, w8, #0xff475; CHECK-GI-NEXT: add sp, sp, #16476; CHECK-GI-NEXT: ret477 478 479 %cmp1 = icmp ne <4 x i16> %vec1, zeroinitializer480 %cmp2 = icmp eq <4 x i32> %vec2, zeroinitializer481 %chain1 = or <4 x i1> %cmp1, %cmp2482 %bitmask = bitcast <4 x i1> %chain1 to i4483 ret i4 %bitmask484}485 486define i16 @convert_to_bitmask_without_knowing_type(<16 x i1> %vec) {487; CHECK-SD-LABEL: convert_to_bitmask_without_knowing_type:488; CHECK-SD: ; %bb.0:489; CHECK-SD-NEXT: shl.16b v0, v0, #7490; CHECK-SD-NEXT: adrp x8, lCPI10_0@PAGE491; CHECK-SD-NEXT: ldr q1, [x8, lCPI10_0@PAGEOFF]492; CHECK-SD-NEXT: cmlt.16b v0, v0, #0493; CHECK-SD-NEXT: and.16b v0, v0, v1494; CHECK-SD-NEXT: ext.16b v1, v0, v0, #8495; CHECK-SD-NEXT: zip1.16b v0, v0, v1496; CHECK-SD-NEXT: addv.8h h0, v0497; CHECK-SD-NEXT: fmov w0, s0498; CHECK-SD-NEXT: ret499;500; CHECK-GI-LABEL: convert_to_bitmask_without_knowing_type:501; CHECK-GI: ; %bb.0:502; CHECK-GI-NEXT: sub sp, sp, #16503; CHECK-GI-NEXT: .cfi_def_cfa_offset 16504; CHECK-GI-NEXT: umov.b w8, v0[1]505; CHECK-GI-NEXT: umov.b w9, v0[0]506; CHECK-GI-NEXT: umov.b w10, v0[2]507; CHECK-GI-NEXT: umov.b w11, v0[3]508; CHECK-GI-NEXT: and w8, w8, #0x1509; CHECK-GI-NEXT: bfi w9, w8, #1, #31510; CHECK-GI-NEXT: and w8, w10, #0x1511; CHECK-GI-NEXT: umov.b w10, v0[4]512; CHECK-GI-NEXT: orr w8, w9, w8, lsl #2513; CHECK-GI-NEXT: and w9, w11, #0x1514; CHECK-GI-NEXT: umov.b w11, v0[5]515; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3516; CHECK-GI-NEXT: and w9, w10, #0x1517; CHECK-GI-NEXT: umov.b w10, v0[6]518; CHECK-GI-NEXT: orr w8, w8, w9, lsl #4519; CHECK-GI-NEXT: and w9, w11, #0x1520; CHECK-GI-NEXT: umov.b w11, v0[7]521; CHECK-GI-NEXT: orr w8, w8, w9, lsl #5522; CHECK-GI-NEXT: and w9, w10, #0x1523; CHECK-GI-NEXT: umov.b w10, v0[8]524; CHECK-GI-NEXT: orr w8, w8, w9, lsl #6525; CHECK-GI-NEXT: and w9, w11, #0x1526; CHECK-GI-NEXT: umov.b w11, v0[9]527; CHECK-GI-NEXT: orr w8, w8, w9, lsl #7528; CHECK-GI-NEXT: and w9, w10, #0x1529; CHECK-GI-NEXT: umov.b w10, v0[10]530; CHECK-GI-NEXT: orr w8, w8, w9, lsl #8531; CHECK-GI-NEXT: and w9, w11, #0x1532; CHECK-GI-NEXT: umov.b w11, v0[11]533; CHECK-GI-NEXT: orr w8, w8, w9, lsl #9534; CHECK-GI-NEXT: and w9, w10, #0x1535; CHECK-GI-NEXT: umov.b w10, v0[12]536; CHECK-GI-NEXT: orr w8, w8, w9, lsl #10537; CHECK-GI-NEXT: and w9, w11, #0x1538; CHECK-GI-NEXT: umov.b w11, v0[13]539; CHECK-GI-NEXT: orr w8, w8, w9, lsl #11540; CHECK-GI-NEXT: and w9, w10, #0x1541; CHECK-GI-NEXT: umov.b w10, v0[14]542; CHECK-GI-NEXT: orr w8, w8, w9, lsl #12543; CHECK-GI-NEXT: and w9, w11, #0x1544; CHECK-GI-NEXT: umov.b w11, v0[15]545; CHECK-GI-NEXT: orr w8, w8, w9, lsl #13546; CHECK-GI-NEXT: and w9, w10, #0x1547; CHECK-GI-NEXT: orr w8, w8, w9, lsl #14548; CHECK-GI-NEXT: and w9, w11, #0x1549; CHECK-GI-NEXT: orr w8, w8, w9, lsl #15550; CHECK-GI-NEXT: strh w8, [sp, #14]551; CHECK-GI-NEXT: and w0, w8, #0xffff552; CHECK-GI-NEXT: add sp, sp, #16553; CHECK-GI-NEXT: ret554 555 %bitmask = bitcast <16 x i1> %vec to i16556 ret i16 %bitmask557}558 559define i2 @convert_to_bitmask_2xi32(<2 x i32> %vec) {560; CHECK-LABEL: convert_to_bitmask_2xi32:561; CHECK: ; %bb.0:562; CHECK-NEXT: adrp x8, lCPI11_0@PAGE563; CHECK-NEXT: cmeq.2s v0, v0, #0564; CHECK-NEXT: ldr d1, [x8, lCPI11_0@PAGEOFF]565; CHECK-NEXT: bic.8b v0, v1, v0566; CHECK-NEXT: addp.2s v0, v0, v0567; CHECK-NEXT: fmov w0, s0568; CHECK-NEXT: ret569 570 %cmp_result = icmp ne <2 x i32> %vec, zeroinitializer571 %bitmask = bitcast <2 x i1> %cmp_result to i2572 ret i2 %bitmask573}574 575define i4 @convert_to_bitmask_4xi8(<4 x i8> %vec) {576; CHECK-SD-LABEL: convert_to_bitmask_4xi8:577; CHECK-SD: ; %bb.0:578; CHECK-SD-NEXT: bic.4h v0, #255, lsl #8579; CHECK-SD-NEXT: adrp x8, lCPI12_0@PAGE580; CHECK-SD-NEXT: ldr d1, [x8, lCPI12_0@PAGEOFF]581; CHECK-SD-NEXT: cmeq.4h v0, v0, #0582; CHECK-SD-NEXT: bic.8b v0, v1, v0583; CHECK-SD-NEXT: addv.4h h0, v0584; CHECK-SD-NEXT: fmov w0, s0585; CHECK-SD-NEXT: ret586;587; CHECK-GI-LABEL: convert_to_bitmask_4xi8:588; CHECK-GI: ; %bb.0:589; CHECK-GI-NEXT: sub sp, sp, #16590; CHECK-GI-NEXT: .cfi_def_cfa_offset 16591; CHECK-GI-NEXT: mov w8, #0 ; =0x0592; CHECK-GI-NEXT: uzp1.8b v0, v0, v0593; CHECK-GI-NEXT: fmov s1, w8594; CHECK-GI-NEXT: mov.b v1[1], w8595; CHECK-GI-NEXT: mov.b v1[2], w8596; CHECK-GI-NEXT: mov.b v1[3], w8597; CHECK-GI-NEXT: cmeq.8b v0, v0, v1598; CHECK-GI-NEXT: mvn.8b v0, v0599; CHECK-GI-NEXT: umov.b w8, v0[1]600; CHECK-GI-NEXT: umov.b w9, v0[0]601; CHECK-GI-NEXT: umov.b w10, v0[2]602; CHECK-GI-NEXT: umov.b w11, v0[3]603; CHECK-GI-NEXT: and w8, w8, #0x1604; CHECK-GI-NEXT: bfi w9, w8, #1, #31605; CHECK-GI-NEXT: and w8, w10, #0x1606; CHECK-GI-NEXT: orr w8, w9, w8, lsl #2607; CHECK-GI-NEXT: and w9, w11, #0x1608; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3609; CHECK-GI-NEXT: strb w8, [sp, #15]610; CHECK-GI-NEXT: and w0, w8, #0xff611; CHECK-GI-NEXT: add sp, sp, #16612; CHECK-GI-NEXT: ret613 614 %cmp_result = icmp ne <4 x i8> %vec, zeroinitializer615 %bitmask = bitcast <4 x i1> %cmp_result to i4616 ret i4 %bitmask617}618 619define i8 @convert_to_bitmask_8xi2(<8 x i2> %vec) {620; CHECK-LABEL: convert_to_bitmask_8xi2:621; CHECK: ; %bb.0:622; CHECK-NEXT: movi.8b v1, #3623; CHECK-NEXT: adrp x8, lCPI13_0@PAGE624; CHECK-NEXT: and.8b v0, v0, v1625; CHECK-NEXT: ldr d1, [x8, lCPI13_0@PAGEOFF]626; CHECK-NEXT: cmeq.8b v0, v0, #0627; CHECK-NEXT: bic.8b v0, v1, v0628; CHECK-NEXT: addv.8b b0, v0629; CHECK-NEXT: fmov w0, s0630; CHECK-NEXT: ret631 632 %cmp_result = icmp ne <8 x i2> %vec, zeroinitializer633 %bitmask = bitcast <8 x i1> %cmp_result to i8634 ret i8 %bitmask635}636 637define i4 @convert_to_bitmask_float(<4 x float> %vec) {638; CHECK-SD-LABEL: convert_to_bitmask_float:639; CHECK-SD: ; %bb.0:640; CHECK-SD-NEXT: fcmgt.4s v1, v0, #0.0641; CHECK-SD-NEXT: fcmlt.4s v0, v0, #0.0642; CHECK-SD-NEXT: adrp x8, lCPI14_0@PAGE643; CHECK-SD-NEXT: orr.16b v0, v0, v1644; CHECK-SD-NEXT: ldr q1, [x8, lCPI14_0@PAGEOFF]645; CHECK-SD-NEXT: and.16b v0, v0, v1646; CHECK-SD-NEXT: addv.4s s0, v0647; CHECK-SD-NEXT: fmov w0, s0648; CHECK-SD-NEXT: ret649;650; CHECK-GI-LABEL: convert_to_bitmask_float:651; CHECK-GI: ; %bb.0:652; CHECK-GI-NEXT: sub sp, sp, #16653; CHECK-GI-NEXT: .cfi_def_cfa_offset 16654; CHECK-GI-NEXT: fcmgt.4s v1, v0, #0.0655; CHECK-GI-NEXT: fcmlt.4s v0, v0, #0.0656; CHECK-GI-NEXT: orr.16b v0, v0, v1657; CHECK-GI-NEXT: mov.s w8, v0[1]658; CHECK-GI-NEXT: mov.s w9, v0[2]659; CHECK-GI-NEXT: fmov w11, s0660; CHECK-GI-NEXT: mov.s w10, v0[3]661; CHECK-GI-NEXT: and w8, w8, #0x1662; CHECK-GI-NEXT: bfi w11, w8, #1, #31663; CHECK-GI-NEXT: and w8, w9, #0x1664; CHECK-GI-NEXT: and w9, w10, #0x1665; CHECK-GI-NEXT: orr w8, w11, w8, lsl #2666; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3667; CHECK-GI-NEXT: strb w8, [sp, #15]668; CHECK-GI-NEXT: and w0, w8, #0xff669; CHECK-GI-NEXT: add sp, sp, #16670; CHECK-GI-NEXT: ret671 672 673 %cmp_result = fcmp one <4 x float> %vec, zeroinitializer674 %bitmask = bitcast <4 x i1> %cmp_result to i4675 ret i4 %bitmask676}677 678; Larger vector types don't map directly, but the can be split/truncated and then converted.679; After the comparison against 0, this is truncated to <8 x i16>, which is valid again.680define i8 @convert_large_vector(<8 x i32> %vec) {681; CHECK-SD-LABEL: convert_large_vector:682; CHECK-SD: ; %bb.0:683; CHECK-SD-NEXT: sub sp, sp, #16684; CHECK-SD-NEXT: .cfi_def_cfa_offset 16685; CHECK-SD-NEXT: cmeq.4s v1, v1, #0686; CHECK-SD-NEXT: cmeq.4s v0, v0, #0687; CHECK-SD-NEXT: adrp x8, lCPI15_0@PAGE688; CHECK-SD-NEXT: uzp1.8h v0, v0, v1689; CHECK-SD-NEXT: ldr q1, [x8, lCPI15_0@PAGEOFF]690; CHECK-SD-NEXT: bic.16b v0, v1, v0691; CHECK-SD-NEXT: addv.8h h0, v0692; CHECK-SD-NEXT: fmov w8, s0693; CHECK-SD-NEXT: and w0, w8, #0xff694; CHECK-SD-NEXT: add sp, sp, #16695; CHECK-SD-NEXT: ret696;697; CHECK-GI-LABEL: convert_large_vector:698; CHECK-GI: ; %bb.0:699; CHECK-GI-NEXT: sub sp, sp, #16700; CHECK-GI-NEXT: .cfi_def_cfa_offset 16701; CHECK-GI-NEXT: cmtst.4s v0, v0, v0702; CHECK-GI-NEXT: cmtst.4s v1, v1, v1703; CHECK-GI-NEXT: uzp1.8h v0, v0, v1704; CHECK-GI-NEXT: xtn.8b v0, v0705; CHECK-GI-NEXT: umov.b w8, v0[1]706; CHECK-GI-NEXT: umov.b w9, v0[0]707; CHECK-GI-NEXT: umov.b w10, v0[2]708; CHECK-GI-NEXT: umov.b w11, v0[3]709; CHECK-GI-NEXT: and w8, w8, #0x1710; CHECK-GI-NEXT: bfi w9, w8, #1, #31711; CHECK-GI-NEXT: and w8, w10, #0x1712; CHECK-GI-NEXT: umov.b w10, v0[4]713; CHECK-GI-NEXT: orr w8, w9, w8, lsl #2714; CHECK-GI-NEXT: and w9, w11, #0x1715; CHECK-GI-NEXT: umov.b w11, v0[5]716; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3717; CHECK-GI-NEXT: and w9, w10, #0x1718; CHECK-GI-NEXT: umov.b w10, v0[6]719; CHECK-GI-NEXT: orr w8, w8, w9, lsl #4720; CHECK-GI-NEXT: and w9, w11, #0x1721; CHECK-GI-NEXT: umov.b w11, v0[7]722; CHECK-GI-NEXT: orr w8, w8, w9, lsl #5723; CHECK-GI-NEXT: and w9, w10, #0x1724; CHECK-GI-NEXT: orr w8, w8, w9, lsl #6725; CHECK-GI-NEXT: and w9, w11, #0x1726; CHECK-GI-NEXT: orr w8, w8, w9, lsl #7727; CHECK-GI-NEXT: strb w8, [sp, #15]728; CHECK-GI-NEXT: and w0, w8, #0xff729; CHECK-GI-NEXT: add sp, sp, #16730; CHECK-GI-NEXT: ret731 732 733 %cmp_result = icmp ne <8 x i32> %vec, zeroinitializer734 %bitmask = bitcast <8 x i1> %cmp_result to i8735 ret i8 %bitmask736}737 738define i4 @convert_legalized_illegal_element_size(<4 x i22> %vec) {739; CHECK-SD-LABEL: convert_legalized_illegal_element_size:740; CHECK-SD: ; %bb.0:741; CHECK-SD-NEXT: movi.4s v1, #63, msl #16742; CHECK-SD-NEXT: adrp x8, lCPI16_0@PAGE743; CHECK-SD-NEXT: cmtst.4s v0, v0, v1744; CHECK-SD-NEXT: ldr d1, [x8, lCPI16_0@PAGEOFF]745; CHECK-SD-NEXT: xtn.4h v0, v0746; CHECK-SD-NEXT: and.8b v0, v0, v1747; CHECK-SD-NEXT: addv.4h h0, v0748; CHECK-SD-NEXT: fmov w0, s0749; CHECK-SD-NEXT: ret750;751; CHECK-GI-LABEL: convert_legalized_illegal_element_size:752; CHECK-GI: ; %bb.0:753; CHECK-GI-NEXT: sub sp, sp, #16754; CHECK-GI-NEXT: .cfi_def_cfa_offset 16755; CHECK-GI-NEXT: movi.4s v1, #63, msl #16756; CHECK-GI-NEXT: cmtst.4s v0, v0, v1757; CHECK-GI-NEXT: mov.s w8, v0[1]758; CHECK-GI-NEXT: mov.s w9, v0[2]759; CHECK-GI-NEXT: fmov w11, s0760; CHECK-GI-NEXT: mov.s w10, v0[3]761; CHECK-GI-NEXT: and w8, w8, #0x1762; CHECK-GI-NEXT: bfi w11, w8, #1, #31763; CHECK-GI-NEXT: and w8, w9, #0x1764; CHECK-GI-NEXT: and w9, w10, #0x1765; CHECK-GI-NEXT: orr w8, w11, w8, lsl #2766; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3767; CHECK-GI-NEXT: strb w8, [sp, #15]768; CHECK-GI-NEXT: and w0, w8, #0xff769; CHECK-GI-NEXT: add sp, sp, #16770; CHECK-GI-NEXT: ret771 772 %cmp_result = icmp ne <4 x i22> %vec, zeroinitializer773 %bitmask = bitcast <4 x i1> %cmp_result to i4774 ret i4 %bitmask775}776 777; This may still be converted as a v8i8 after the vector concat (but not as v4iX).778define i8 @no_direct_convert_for_bad_concat(<4 x i32> %vec) {779; CHECK-LABEL: no_direct_convert_for_bad_concat:780; CHECK: ; %bb.0:781; CHECK-NEXT: cmtst.4s v0, v0, v0782; CHECK-NEXT: adrp x8, lCPI17_0@PAGE783; CHECK-NEXT: xtn.4h v0, v0784; CHECK-NEXT: umov.h w9, v0[0]785; CHECK-NEXT: mov.b v1[4], w9786; CHECK-NEXT: umov.h w9, v0[1]787; CHECK-NEXT: mov.b v1[5], w9788; CHECK-NEXT: umov.h w9, v0[2]789; CHECK-NEXT: mov.b v1[6], w9790; CHECK-NEXT: umov.h w9, v0[3]791; CHECK-NEXT: mov.b v1[7], w9792; CHECK-NEXT: shl.8b v0, v1, #7793; CHECK-NEXT: ldr d1, [x8, lCPI17_0@PAGEOFF]794; CHECK-NEXT: cmlt.8b v0, v0, #0795; CHECK-NEXT: and.8b v0, v0, v1796; CHECK-NEXT: addv.8b b0, v0797; CHECK-NEXT: fmov w0, s0798; CHECK-NEXT: ret799 800 %cmp_result = icmp ne <4 x i32> %vec, zeroinitializer801 %vector_pad = shufflevector <4 x i1> poison, <4 x i1> %cmp_result, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 4, i32 5, i32 6, i32 7>802 %bitmask = bitcast <8 x i1> %vector_pad to i8803 ret i8 %bitmask804}805 806define <8 x i1> @no_convert_without_direct_bitcast(<8 x i16> %vec) {807; CHECK-LABEL: no_convert_without_direct_bitcast:808; CHECK: ; %bb.0:809; CHECK-NEXT: cmtst.8h v0, v0, v0810; CHECK-NEXT: xtn.8b v0, v0811; CHECK-NEXT: ret812 813 %cmp_result = icmp ne <8 x i16> %vec, zeroinitializer814 ret <8 x i1> %cmp_result815}816 817define i6 @no_combine_illegal_num_elements(<6 x i32> %vec) {818; CHECK-SD-LABEL: no_combine_illegal_num_elements:819; CHECK-SD: ; %bb.0:820; CHECK-SD-NEXT: sub sp, sp, #16821; CHECK-SD-NEXT: .cfi_def_cfa_offset 16822; CHECK-SD-NEXT: fmov s0, w0823; CHECK-SD-NEXT: fmov s1, w4824; CHECK-SD-NEXT: mov.s v0[1], w1825; CHECK-SD-NEXT: mov.s v1[1], w5826; CHECK-SD-NEXT: mov.s v0[2], w2827; CHECK-SD-NEXT: cmeq.4s v1, v1, #0828; CHECK-SD-NEXT: mov.s v0[3], w3829; CHECK-SD-NEXT: cmeq.4s v0, v0, #0830; CHECK-SD-NEXT: uzp1.8h v0, v0, v1831; CHECK-SD-NEXT: mvn.16b v0, v0832; CHECK-SD-NEXT: xtn.8b v0, v0833; CHECK-SD-NEXT: umov.b w8, v0[0]834; CHECK-SD-NEXT: umov.b w9, v0[1]835; CHECK-SD-NEXT: umov.b w10, v0[2]836; CHECK-SD-NEXT: and w8, w8, #0x1837; CHECK-SD-NEXT: bfi w8, w9, #1, #1838; CHECK-SD-NEXT: umov.b w9, v0[3]839; CHECK-SD-NEXT: bfi w8, w10, #2, #1840; CHECK-SD-NEXT: umov.b w10, v0[4]841; CHECK-SD-NEXT: bfi w8, w9, #3, #1842; CHECK-SD-NEXT: umov.b w9, v0[5]843; CHECK-SD-NEXT: bfi w8, w10, #4, #1844; CHECK-SD-NEXT: orr w8, w8, w9, lsl #5845; CHECK-SD-NEXT: and w0, w8, #0x3f846; CHECK-SD-NEXT: add sp, sp, #16847; CHECK-SD-NEXT: ret848;849; CHECK-GI-LABEL: no_combine_illegal_num_elements:850; CHECK-GI: ; %bb.0:851; CHECK-GI-NEXT: sub sp, sp, #16852; CHECK-GI-NEXT: .cfi_def_cfa_offset 16853; CHECK-GI-NEXT: fmov s1, w0854; CHECK-GI-NEXT: movi d0, #0000000000000000855; CHECK-GI-NEXT: fmov s2, w4856; CHECK-GI-NEXT: mov.s v1[1], w1857; CHECK-GI-NEXT: mov.s v2[1], w5858; CHECK-GI-NEXT: mov.s v0[1], wzr859; CHECK-GI-NEXT: mov.s v1[2], w2860; CHECK-GI-NEXT: cmeq.4s v0, v2, v0861; CHECK-GI-NEXT: mov.s v1[3], w3862; CHECK-GI-NEXT: mvn.16b v0, v0863; CHECK-GI-NEXT: cmtst.4s v1, v1, v1864; CHECK-GI-NEXT: mov.s w8, v1[1]865; CHECK-GI-NEXT: mov.s w9, v1[2]866; CHECK-GI-NEXT: fmov w11, s1867; CHECK-GI-NEXT: mov.s w10, v1[3]868; CHECK-GI-NEXT: and w8, w8, #0x1869; CHECK-GI-NEXT: bfi w11, w8, #1, #31870; CHECK-GI-NEXT: and w8, w9, #0x1871; CHECK-GI-NEXT: and w9, w10, #0x1872; CHECK-GI-NEXT: mov.s w10, v0[1]873; CHECK-GI-NEXT: orr w8, w11, w8, lsl #2874; CHECK-GI-NEXT: orr w8, w8, w9, lsl #3875; CHECK-GI-NEXT: fmov w9, s0876; CHECK-GI-NEXT: and w9, w9, #0x1877; CHECK-GI-NEXT: orr w8, w8, w9, lsl #4878; CHECK-GI-NEXT: and w9, w10, #0x1879; CHECK-GI-NEXT: orr w8, w8, w9, lsl #5880; CHECK-GI-NEXT: and w8, w8, #0x3f881; CHECK-GI-NEXT: strb w8, [sp, #15]882; CHECK-GI-NEXT: and w0, w8, #0xff883; CHECK-GI-NEXT: add sp, sp, #16884; CHECK-GI-NEXT: ret885 886 %cmp_result = icmp ne <6 x i32> %vec, zeroinitializer887 %bitmask = bitcast <6 x i1> %cmp_result to i6888 ret i6 %bitmask889}890 891; Only apply the combine when casting a vector to a scalar.892define <2 x i8> @vector_to_vector_cast(<16 x i1> %arg) nounwind {893; CHECK-SD-LABEL: vector_to_vector_cast:894; CHECK-SD: ; %bb.0:895; CHECK-SD-NEXT: sub sp, sp, #16896; CHECK-SD-NEXT: shl.16b v0, v0, #7897; CHECK-SD-NEXT: adrp x8, lCPI20_0@PAGE898; CHECK-SD-NEXT: ldr q1, [x8, lCPI20_0@PAGEOFF]899; CHECK-SD-NEXT: cmlt.16b v0, v0, #0900; CHECK-SD-NEXT: and.16b v0, v0, v1901; CHECK-SD-NEXT: ext.16b v1, v0, v0, #8902; CHECK-SD-NEXT: zip1.16b v0, v0, v1903; CHECK-SD-NEXT: addv.8h h0, v0904; CHECK-SD-NEXT: ushll.8h v0, v0, #0905; CHECK-SD-NEXT: ushll.4s v0, v0, #0906; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0907; CHECK-SD-NEXT: add sp, sp, #16908; CHECK-SD-NEXT: ret909;910; CHECK-GI-LABEL: vector_to_vector_cast:911; CHECK-GI: ; %bb.0:912; CHECK-GI-NEXT: sub sp, sp, #16913; CHECK-GI-NEXT: umov.b w8, v0[1]914; CHECK-GI-NEXT: mov d1, v0[1]915; CHECK-GI-NEXT: umov.b w10, v0[1]916; CHECK-GI-NEXT: umov.b w9, v0[0]917; CHECK-GI-NEXT: umov.b w13, v0[0]918; CHECK-GI-NEXT: umov.b w14, v0[2]919; CHECK-GI-NEXT: umov.b w15, v0[3]920; CHECK-GI-NEXT: umov.b w11, v0[2]921; CHECK-GI-NEXT: umov.b w16, v0[4]922; CHECK-GI-NEXT: umov.b w17, v0[5]923; CHECK-GI-NEXT: umov.b w12, v0[3]924; CHECK-GI-NEXT: and w8, w8, #0x1925; CHECK-GI-NEXT: and w10, w10, #0x1926; CHECK-GI-NEXT: umov.b w0, v1[1]927; CHECK-GI-NEXT: bfi w9, w8, #1, #31928; CHECK-GI-NEXT: bfi w13, w10, #1, #31929; CHECK-GI-NEXT: and w14, w14, #0x1930; CHECK-GI-NEXT: umov.b w8, v1[0]931; CHECK-GI-NEXT: umov.b w10, v1[2]932; CHECK-GI-NEXT: and w15, w15, #0x1933; CHECK-GI-NEXT: orr w13, w13, w14, lsl #2934; CHECK-GI-NEXT: umov.b w14, v1[3]935; CHECK-GI-NEXT: and w11, w11, #0x1936; CHECK-GI-NEXT: and w0, w0, #0x1937; CHECK-GI-NEXT: and w16, w16, #0x1938; CHECK-GI-NEXT: orr w9, w9, w11, lsl #2939; CHECK-GI-NEXT: orr w13, w13, w15, lsl #3940; CHECK-GI-NEXT: umov.b w15, v1[4]941; CHECK-GI-NEXT: umov.b w11, v0[6]942; CHECK-GI-NEXT: bfi w8, w0, #1, #31943; CHECK-GI-NEXT: and w10, w10, #0x1944; CHECK-GI-NEXT: and w17, w17, #0x1945; CHECK-GI-NEXT: orr w13, w13, w16, lsl #4946; CHECK-GI-NEXT: and w14, w14, #0x1947; CHECK-GI-NEXT: umov.b w0, v0[7]948; CHECK-GI-NEXT: orr w8, w8, w10, lsl #2949; CHECK-GI-NEXT: umov.b w10, v1[5]950; CHECK-GI-NEXT: umov.b w16, v1[6]951; CHECK-GI-NEXT: orr w13, w13, w17, lsl #5952; CHECK-GI-NEXT: umov.b w17, v0[4]953; CHECK-GI-NEXT: and w15, w15, #0x1954; CHECK-GI-NEXT: orr w8, w8, w14, lsl #3955; CHECK-GI-NEXT: and w12, w12, #0x1956; CHECK-GI-NEXT: and w11, w11, #0x1957; CHECK-GI-NEXT: umov.b w14, v1[7]958; CHECK-GI-NEXT: orr w9, w9, w12, lsl #3959; CHECK-GI-NEXT: orr w11, w13, w11, lsl #6960; CHECK-GI-NEXT: orr w8, w8, w15, lsl #4961; CHECK-GI-NEXT: umov.b w15, v0[5]962; CHECK-GI-NEXT: and w10, w10, #0x1963; CHECK-GI-NEXT: and w0, w0, #0x1964; CHECK-GI-NEXT: and w12, w17, #0x1965; CHECK-GI-NEXT: umov.b w13, v0[1]966; CHECK-GI-NEXT: orr w8, w8, w10, lsl #5967; CHECK-GI-NEXT: and w16, w16, #0x1968; CHECK-GI-NEXT: orr w9, w9, w12, lsl #4969; CHECK-GI-NEXT: umov.b w10, v0[0]970; CHECK-GI-NEXT: orr w11, w11, w0, lsl #7971; CHECK-GI-NEXT: and w14, w14, #0x1972; CHECK-GI-NEXT: and w12, w15, #0x1973; CHECK-GI-NEXT: umov.b w15, v0[2]974; CHECK-GI-NEXT: orr w8, w8, w16, lsl #6975; CHECK-GI-NEXT: orr w9, w9, w12, lsl #5976; CHECK-GI-NEXT: umov.b w12, v0[6]977; CHECK-GI-NEXT: strb w11, [sp, #8]978; CHECK-GI-NEXT: and w11, w13, #0x1979; CHECK-GI-NEXT: umov.b w13, v0[3]980; CHECK-GI-NEXT: orr w8, w8, w14, lsl #7981; CHECK-GI-NEXT: umov.b w14, v0[7]982; CHECK-GI-NEXT: ldr b0, [sp, #8]983; CHECK-GI-NEXT: bfi w10, w11, #1, #31984; CHECK-GI-NEXT: and w11, w15, #0x1985; CHECK-GI-NEXT: strb w8, [sp, #9]986; CHECK-GI-NEXT: umov.b w15, v0[4]987; CHECK-GI-NEXT: and w8, w12, #0x1988; CHECK-GI-NEXT: orr w10, w10, w11, lsl #2989; CHECK-GI-NEXT: orr w8, w9, w8, lsl #6990; CHECK-GI-NEXT: and w9, w13, #0x1991; CHECK-GI-NEXT: umov.b w11, v0[1]992; CHECK-GI-NEXT: orr w9, w10, w9, lsl #3993; CHECK-GI-NEXT: umov.b w10, v0[5]994; CHECK-GI-NEXT: umov.b w12, v0[0]995; CHECK-GI-NEXT: and w13, w14, #0x1996; CHECK-GI-NEXT: umov.b w16, v0[2]997; CHECK-GI-NEXT: umov.b w17, v0[3]998; CHECK-GI-NEXT: and w14, w15, #0x1999; CHECK-GI-NEXT: umov.b w15, v0[2]1000; CHECK-GI-NEXT: orr w8, w8, w13, lsl #71001; CHECK-GI-NEXT: orr w9, w9, w14, lsl #41002; CHECK-GI-NEXT: umov.b w13, v0[6]1003; CHECK-GI-NEXT: and w11, w11, #0x11004; CHECK-GI-NEXT: umov.b w14, v0[3]1005; CHECK-GI-NEXT: strb w8, [sp, #10]1006; CHECK-GI-NEXT: and w8, w10, #0x11007; CHECK-GI-NEXT: bfi w12, w11, #1, #311008; CHECK-GI-NEXT: orr w8, w9, w8, lsl #51009; CHECK-GI-NEXT: umov.b w10, v0[4]1010; CHECK-GI-NEXT: and w9, w15, #0x11011; CHECK-GI-NEXT: umov.b w11, v0[7]1012; CHECK-GI-NEXT: umov.b w15, v0[1]1013; CHECK-GI-NEXT: orr w9, w12, w9, lsl #21014; CHECK-GI-NEXT: umov.b w12, v0[5]1015; CHECK-GI-NEXT: and w13, w13, #0x11016; CHECK-GI-NEXT: and w14, w14, #0x11017; CHECK-GI-NEXT: orr w8, w8, w13, lsl #61018; CHECK-GI-NEXT: umov.b w13, v0[0]1019; CHECK-GI-NEXT: orr w9, w9, w14, lsl #31020; CHECK-GI-NEXT: and w10, w10, #0x11021; CHECK-GI-NEXT: umov.b w14, v0[6]1022; CHECK-GI-NEXT: and w11, w11, #0x11023; CHECK-GI-NEXT: and w15, w15, #0x11024; CHECK-GI-NEXT: umov.b w0, v0[3]1025; CHECK-GI-NEXT: orr w9, w9, w10, lsl #41026; CHECK-GI-NEXT: and w10, w12, #0x11027; CHECK-GI-NEXT: umov.b w12, v0[7]1028; CHECK-GI-NEXT: orr w8, w8, w11, lsl #71029; CHECK-GI-NEXT: bfi w13, w15, #1, #311030; CHECK-GI-NEXT: and w11, w16, #0x11031; CHECK-GI-NEXT: orr w9, w9, w10, lsl #51032; CHECK-GI-NEXT: and w10, w14, #0x11033; CHECK-GI-NEXT: umov.b w14, v0[4]1034; CHECK-GI-NEXT: strb w8, [sp, #11]1035; CHECK-GI-NEXT: umov.b w15, v0[1]1036; CHECK-GI-NEXT: umov.b w16, v0[3]1037; CHECK-GI-NEXT: orr w8, w9, w10, lsl #61038; CHECK-GI-NEXT: orr w9, w13, w11, lsl #21039; CHECK-GI-NEXT: and w10, w12, #0x11040; CHECK-GI-NEXT: and w11, w17, #0x11041; CHECK-GI-NEXT: umov.b w12, v0[5]1042; CHECK-GI-NEXT: umov.b w17, v0[0]1043; CHECK-GI-NEXT: orr w8, w8, w10, lsl #71044; CHECK-GI-NEXT: orr w9, w9, w11, lsl #31045; CHECK-GI-NEXT: umov.b w10, v0[1]1046; CHECK-GI-NEXT: and w11, w14, #0x11047; CHECK-GI-NEXT: umov.b w14, v0[0]1048; CHECK-GI-NEXT: and w15, w15, #0x11049; CHECK-GI-NEXT: orr w9, w9, w11, lsl #41050; CHECK-GI-NEXT: umov.b w11, v0[2]1051; CHECK-GI-NEXT: umov.b w13, v0[6]1052; CHECK-GI-NEXT: and w12, w12, #0x11053; CHECK-GI-NEXT: bfi w17, w15, #1, #311054; CHECK-GI-NEXT: umov.b w15, v0[5]1055; CHECK-GI-NEXT: orr w9, w9, w12, lsl #51056; CHECK-GI-NEXT: and w10, w10, #0x11057; CHECK-GI-NEXT: umov.b w12, v0[2]1058; CHECK-GI-NEXT: bfi w14, w10, #1, #311059; CHECK-GI-NEXT: umov.b w10, v0[4]1060; CHECK-GI-NEXT: ldr b1, [sp, #9]1061; CHECK-GI-NEXT: and w11, w11, #0x11062; CHECK-GI-NEXT: and w13, w13, #0x11063; CHECK-GI-NEXT: strb w8, [sp, #12]1064; CHECK-GI-NEXT: orr w11, w14, w11, lsl #21065; CHECK-GI-NEXT: and w14, w16, #0x11066; CHECK-GI-NEXT: umov.b w16, v0[4]1067; CHECK-GI-NEXT: and w12, w12, #0x11068; CHECK-GI-NEXT: and w15, w15, #0x11069; CHECK-GI-NEXT: orr w9, w9, w13, lsl #61070; CHECK-GI-NEXT: orr w11, w11, w14, lsl #31071; CHECK-GI-NEXT: orr w12, w17, w12, lsl #21072; CHECK-GI-NEXT: and w10, w10, #0x11073; CHECK-GI-NEXT: and w17, w0, #0x11074; CHECK-GI-NEXT: umov.b w0, v0[5]1075; CHECK-GI-NEXT: umov.b w14, v0[6]1076; CHECK-GI-NEXT: orr w10, w11, w10, lsl #41077; CHECK-GI-NEXT: orr w12, w12, w17, lsl #31078; CHECK-GI-NEXT: umov.b w11, v0[7]1079; CHECK-GI-NEXT: and w16, w16, #0x11080; CHECK-GI-NEXT: umov.b w17, v0[6]1081; CHECK-GI-NEXT: orr w10, w10, w15, lsl #51082; CHECK-GI-NEXT: umov.b w15, v0[7]1083; CHECK-GI-NEXT: orr w12, w12, w16, lsl #41084; CHECK-GI-NEXT: and w16, w0, #0x11085; CHECK-GI-NEXT: umov.b w0, v0[7]1086; CHECK-GI-NEXT: and w14, w14, #0x11087; CHECK-GI-NEXT: orr w12, w12, w16, lsl #51088; CHECK-GI-NEXT: orr w10, w10, w14, lsl #61089; CHECK-GI-NEXT: and w11, w11, #0x11090; CHECK-GI-NEXT: and w13, w17, #0x11091; CHECK-GI-NEXT: orr w9, w9, w11, lsl #71092; CHECK-GI-NEXT: mov.s v0[1], v1[0]1093; CHECK-GI-NEXT: orr w11, w12, w13, lsl #61094; CHECK-GI-NEXT: and w12, w15, #0x11095; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q01096; CHECK-GI-NEXT: orr w8, w10, w12, lsl #71097; CHECK-GI-NEXT: and w10, w0, #0x11098; CHECK-GI-NEXT: strb w9, [sp, #13]1099; CHECK-GI-NEXT: orr w9, w11, w10, lsl #71100; CHECK-GI-NEXT: strb w8, [sp, #14]1101; CHECK-GI-NEXT: strb w9, [sp, #15]1102; CHECK-GI-NEXT: add sp, sp, #161103; CHECK-GI-NEXT: ret1104 %bc = bitcast <16 x i1> %arg to <2 x i8>1105 ret <2 x i8> %bc1106}1107