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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK3 4declare {<1 x i32>, <1 x i1>} @llvm.uadd.with.overflow.v1i32(<1 x i32>, <1 x i32>)5declare {<2 x i32>, <2 x i1>} @llvm.uadd.with.overflow.v2i32(<2 x i32>, <2 x i32>)6declare {<3 x i32>, <3 x i1>} @llvm.uadd.with.overflow.v3i32(<3 x i32>, <3 x i32>)7declare {<4 x i32>, <4 x i1>} @llvm.uadd.with.overflow.v4i32(<4 x i32>, <4 x i32>)8declare {<6 x i32>, <6 x i1>} @llvm.uadd.with.overflow.v6i32(<6 x i32>, <6 x i32>)9declare {<8 x i32>, <8 x i1>} @llvm.uadd.with.overflow.v8i32(<8 x i32>, <8 x i32>)10 11declare {<16 x i8>, <16 x i1>} @llvm.uadd.with.overflow.v16i8(<16 x i8>, <16 x i8>)12declare {<8 x i16>, <8 x i1>} @llvm.uadd.with.overflow.v8i16(<8 x i16>, <8 x i16>)13declare {<2 x i64>, <2 x i1>} @llvm.uadd.with.overflow.v2i64(<2 x i64>, <2 x i64>)14 15declare {<4 x i24>, <4 x i1>} @llvm.uadd.with.overflow.v4i24(<4 x i24>, <4 x i24>)16declare {<4 x i1>, <4 x i1>} @llvm.uadd.with.overflow.v4i1(<4 x i1>, <4 x i1>)17declare {<2 x i128>, <2 x i1>} @llvm.uadd.with.overflow.v2i128(<2 x i128>, <2 x i128>)18 19define <1 x i32> @uaddo_v1i32(<1 x i32> %a0, <1 x i32> %a1, ptr %p2) nounwind {20; CHECK-LABEL: uaddo_v1i32:21; CHECK: // %bb.0:22; CHECK-NEXT: add v1.2s, v0.2s, v1.2s23; CHECK-NEXT: cmhi v0.2s, v0.2s, v1.2s24; CHECK-NEXT: str s1, [x0]25; CHECK-NEXT: ret26 %t = call {<1 x i32>, <1 x i1>} @llvm.uadd.with.overflow.v1i32(<1 x i32> %a0, <1 x i32> %a1)27 %val = extractvalue {<1 x i32>, <1 x i1>} %t, 028 %obit = extractvalue {<1 x i32>, <1 x i1>} %t, 129 %res = sext <1 x i1> %obit to <1 x i32>30 store <1 x i32> %val, ptr %p231 ret <1 x i32> %res32}33 34define <2 x i32> @uaddo_v2i32(<2 x i32> %a0, <2 x i32> %a1, ptr %p2) nounwind {35; CHECK-LABEL: uaddo_v2i32:36; CHECK: // %bb.0:37; CHECK-NEXT: add v1.2s, v0.2s, v1.2s38; CHECK-NEXT: cmhi v0.2s, v0.2s, v1.2s39; CHECK-NEXT: str d1, [x0]40; CHECK-NEXT: ret41 %t = call {<2 x i32>, <2 x i1>} @llvm.uadd.with.overflow.v2i32(<2 x i32> %a0, <2 x i32> %a1)42 %val = extractvalue {<2 x i32>, <2 x i1>} %t, 043 %obit = extractvalue {<2 x i32>, <2 x i1>} %t, 144 %res = sext <2 x i1> %obit to <2 x i32>45 store <2 x i32> %val, ptr %p246 ret <2 x i32> %res47}48 49define <3 x i32> @uaddo_v3i32(<3 x i32> %a0, <3 x i32> %a1, ptr %p2) nounwind {50; CHECK-LABEL: uaddo_v3i32:51; CHECK: // %bb.0:52; CHECK-NEXT: add v1.4s, v0.4s, v1.4s53; CHECK-NEXT: mov s2, v1.s[2]54; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s55; CHECK-NEXT: str d1, [x0]56; CHECK-NEXT: str s2, [x0, #8]57; CHECK-NEXT: ret58 %t = call {<3 x i32>, <3 x i1>} @llvm.uadd.with.overflow.v3i32(<3 x i32> %a0, <3 x i32> %a1)59 %val = extractvalue {<3 x i32>, <3 x i1>} %t, 060 %obit = extractvalue {<3 x i32>, <3 x i1>} %t, 161 %res = sext <3 x i1> %obit to <3 x i32>62 store <3 x i32> %val, ptr %p263 ret <3 x i32> %res64}65 66define <4 x i32> @uaddo_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %p2) nounwind {67; CHECK-LABEL: uaddo_v4i32:68; CHECK: // %bb.0:69; CHECK-NEXT: add v1.4s, v0.4s, v1.4s70; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s71; CHECK-NEXT: str q1, [x0]72; CHECK-NEXT: ret73 %t = call {<4 x i32>, <4 x i1>} @llvm.uadd.with.overflow.v4i32(<4 x i32> %a0, <4 x i32> %a1)74 %val = extractvalue {<4 x i32>, <4 x i1>} %t, 075 %obit = extractvalue {<4 x i32>, <4 x i1>} %t, 176 %res = sext <4 x i1> %obit to <4 x i32>77 store <4 x i32> %val, ptr %p278 ret <4 x i32> %res79}80 81define <6 x i32> @uaddo_v6i32(<6 x i32> %a0, <6 x i32> %a1, ptr %p2) nounwind {82; CHECK-LABEL: uaddo_v6i32:83; CHECK: // %bb.0:84; CHECK-NEXT: fmov s0, w085; CHECK-NEXT: fmov s1, w686; CHECK-NEXT: mov x8, sp87; CHECK-NEXT: fmov s3, w488; CHECK-NEXT: ldr s2, [sp, #16]89; CHECK-NEXT: add x9, sp, #2490; CHECK-NEXT: mov v0.s[1], w191; CHECK-NEXT: mov v1.s[1], w792; CHECK-NEXT: ld1 { v2.s }[1], [x9]93; CHECK-NEXT: mov v3.s[1], w594; CHECK-NEXT: mov v0.s[2], w295; CHECK-NEXT: ld1 { v1.s }[2], [x8]96; CHECK-NEXT: add x8, sp, #897; CHECK-NEXT: add v2.4s, v3.4s, v2.4s98; CHECK-NEXT: ld1 { v1.s }[3], [x8]99; CHECK-NEXT: ldr x8, [sp, #32]100; CHECK-NEXT: mov v0.s[3], w3101; CHECK-NEXT: cmhi v3.4s, v3.4s, v2.4s102; CHECK-NEXT: str d2, [x8, #16]103; CHECK-NEXT: mov w5, v3.s[1]104; CHECK-NEXT: fmov w4, s3105; CHECK-NEXT: add v1.4s, v0.4s, v1.4s106; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s107; CHECK-NEXT: str q1, [x8]108; CHECK-NEXT: mov w1, v0.s[1]109; CHECK-NEXT: mov w2, v0.s[2]110; CHECK-NEXT: mov w3, v0.s[3]111; CHECK-NEXT: fmov w0, s0112; CHECK-NEXT: ret113 %t = call {<6 x i32>, <6 x i1>} @llvm.uadd.with.overflow.v6i32(<6 x i32> %a0, <6 x i32> %a1)114 %val = extractvalue {<6 x i32>, <6 x i1>} %t, 0115 %obit = extractvalue {<6 x i32>, <6 x i1>} %t, 1116 %res = sext <6 x i1> %obit to <6 x i32>117 store <6 x i32> %val, ptr %p2118 ret <6 x i32> %res119}120 121define <8 x i32> @uaddo_v8i32(<8 x i32> %a0, <8 x i32> %a1, ptr %p2) nounwind {122; CHECK-LABEL: uaddo_v8i32:123; CHECK: // %bb.0:124; CHECK-NEXT: add v2.4s, v0.4s, v2.4s125; CHECK-NEXT: add v3.4s, v1.4s, v3.4s126; CHECK-NEXT: cmhi v0.4s, v0.4s, v2.4s127; CHECK-NEXT: cmhi v1.4s, v1.4s, v3.4s128; CHECK-NEXT: stp q2, q3, [x0]129; CHECK-NEXT: ret130 %t = call {<8 x i32>, <8 x i1>} @llvm.uadd.with.overflow.v8i32(<8 x i32> %a0, <8 x i32> %a1)131 %val = extractvalue {<8 x i32>, <8 x i1>} %t, 0132 %obit = extractvalue {<8 x i32>, <8 x i1>} %t, 1133 %res = sext <8 x i1> %obit to <8 x i32>134 store <8 x i32> %val, ptr %p2135 ret <8 x i32> %res136}137 138define <16 x i32> @uaddo_v16i8(<16 x i8> %a0, <16 x i8> %a1, ptr %p2) nounwind {139; CHECK-LABEL: uaddo_v16i8:140; CHECK: // %bb.0:141; CHECK-NEXT: add v4.16b, v0.16b, v1.16b142; CHECK-NEXT: cmhi v0.16b, v0.16b, v4.16b143; CHECK-NEXT: str q4, [x0]144; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8145; CHECK-NEXT: zip1 v2.8b, v0.8b, v0.8b146; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b147; CHECK-NEXT: zip1 v3.8b, v1.8b, v0.8b148; CHECK-NEXT: zip2 v1.8b, v1.8b, v0.8b149; CHECK-NEXT: ushll v2.4s, v2.4h, #0150; CHECK-NEXT: ushll v0.4s, v0.4h, #0151; CHECK-NEXT: shl v2.4s, v2.4s, #31152; CHECK-NEXT: ushll v3.4s, v3.4h, #0153; CHECK-NEXT: ushll v1.4s, v1.4h, #0154; CHECK-NEXT: shl v5.4s, v0.4s, #31155; CHECK-NEXT: cmlt v0.4s, v2.4s, #0156; CHECK-NEXT: shl v3.4s, v3.4s, #31157; CHECK-NEXT: shl v6.4s, v1.4s, #31158; CHECK-NEXT: cmlt v1.4s, v5.4s, #0159; CHECK-NEXT: cmlt v2.4s, v3.4s, #0160; CHECK-NEXT: cmlt v3.4s, v6.4s, #0161; CHECK-NEXT: ret162 %t = call {<16 x i8>, <16 x i1>} @llvm.uadd.with.overflow.v16i8(<16 x i8> %a0, <16 x i8> %a1)163 %val = extractvalue {<16 x i8>, <16 x i1>} %t, 0164 %obit = extractvalue {<16 x i8>, <16 x i1>} %t, 1165 %res = sext <16 x i1> %obit to <16 x i32>166 store <16 x i8> %val, ptr %p2167 ret <16 x i32> %res168}169 170define <8 x i32> @uaddo_v8i16(<8 x i16> %a0, <8 x i16> %a1, ptr %p2) nounwind {171; CHECK-LABEL: uaddo_v8i16:172; CHECK: // %bb.0:173; CHECK-NEXT: add v2.8h, v0.8h, v1.8h174; CHECK-NEXT: cmhi v0.8h, v0.8h, v2.8h175; CHECK-NEXT: str q2, [x0]176; CHECK-NEXT: xtn v0.8b, v0.8h177; CHECK-NEXT: zip1 v1.8b, v0.8b, v0.8b178; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b179; CHECK-NEXT: ushll v1.4s, v1.4h, #0180; CHECK-NEXT: ushll v0.4s, v0.4h, #0181; CHECK-NEXT: shl v1.4s, v1.4s, #31182; CHECK-NEXT: shl v3.4s, v0.4s, #31183; CHECK-NEXT: cmlt v0.4s, v1.4s, #0184; CHECK-NEXT: cmlt v1.4s, v3.4s, #0185; CHECK-NEXT: ret186 %t = call {<8 x i16>, <8 x i1>} @llvm.uadd.with.overflow.v8i16(<8 x i16> %a0, <8 x i16> %a1)187 %val = extractvalue {<8 x i16>, <8 x i1>} %t, 0188 %obit = extractvalue {<8 x i16>, <8 x i1>} %t, 1189 %res = sext <8 x i1> %obit to <8 x i32>190 store <8 x i16> %val, ptr %p2191 ret <8 x i32> %res192}193 194define <2 x i32> @uaddo_v2i64(<2 x i64> %a0, <2 x i64> %a1, ptr %p2) nounwind {195; CHECK-LABEL: uaddo_v2i64:196; CHECK: // %bb.0:197; CHECK-NEXT: add v1.2d, v0.2d, v1.2d198; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d199; CHECK-NEXT: str q1, [x0]200; CHECK-NEXT: xtn v0.2s, v0.2d201; CHECK-NEXT: ret202 %t = call {<2 x i64>, <2 x i1>} @llvm.uadd.with.overflow.v2i64(<2 x i64> %a0, <2 x i64> %a1)203 %val = extractvalue {<2 x i64>, <2 x i1>} %t, 0204 %obit = extractvalue {<2 x i64>, <2 x i1>} %t, 1205 %res = sext <2 x i1> %obit to <2 x i32>206 store <2 x i64> %val, ptr %p2207 ret <2 x i32> %res208}209 210define <4 x i32> @uaddo_v4i24(<4 x i24> %a0, <4 x i24> %a1, ptr %p2) nounwind {211; CHECK-LABEL: uaddo_v4i24:212; CHECK: // %bb.0:213; CHECK-NEXT: bic v1.4s, #255, lsl #24214; CHECK-NEXT: bic v0.4s, #255, lsl #24215; CHECK-NEXT: add v1.4s, v0.4s, v1.4s216; CHECK-NEXT: mov v0.16b, v1.16b217; CHECK-NEXT: mov w8, v1.s[3]218; CHECK-NEXT: mov w10, v1.s[1]219; CHECK-NEXT: mov w9, v1.s[2]220; CHECK-NEXT: str h1, [x0]221; CHECK-NEXT: bic v0.4s, #1, lsl #24222; CHECK-NEXT: sturh w8, [x0, #9]223; CHECK-NEXT: lsr w8, w8, #16224; CHECK-NEXT: sturh w10, [x0, #3]225; CHECK-NEXT: cmeq v0.4s, v0.4s, v1.4s226; CHECK-NEXT: strb w8, [x0, #11]227; CHECK-NEXT: lsr w8, w10, #16228; CHECK-NEXT: fmov w10, s1229; CHECK-NEXT: strh w9, [x0, #6]230; CHECK-NEXT: lsr w9, w9, #16231; CHECK-NEXT: strb w8, [x0, #5]232; CHECK-NEXT: mvn v0.16b, v0.16b233; CHECK-NEXT: strb w9, [x0, #8]234; CHECK-NEXT: lsr w9, w10, #16235; CHECK-NEXT: strb w9, [x0, #2]236; CHECK-NEXT: ret237 %t = call {<4 x i24>, <4 x i1>} @llvm.uadd.with.overflow.v4i24(<4 x i24> %a0, <4 x i24> %a1)238 %val = extractvalue {<4 x i24>, <4 x i1>} %t, 0239 %obit = extractvalue {<4 x i24>, <4 x i1>} %t, 1240 %res = sext <4 x i1> %obit to <4 x i32>241 store <4 x i24> %val, ptr %p2242 ret <4 x i32> %res243}244 245define <4 x i32> @uaddo_v4i1(<4 x i1> %a0, <4 x i1> %a1, ptr %p2) nounwind {246; CHECK-LABEL: uaddo_v4i1:247; CHECK: // %bb.0:248; CHECK-NEXT: eor v2.8b, v0.8b, v1.8b249; CHECK-NEXT: and v0.8b, v0.8b, v1.8b250; CHECK-NEXT: adrp x8, .LCPI10_0251; CHECK-NEXT: shl v1.4h, v2.4h, #15252; CHECK-NEXT: ushll v0.4s, v0.4h, #0253; CHECK-NEXT: ldr d2, [x8, :lo12:.LCPI10_0]254; CHECK-NEXT: cmlt v1.4h, v1.4h, #0255; CHECK-NEXT: shl v0.4s, v0.4s, #31256; CHECK-NEXT: and v1.8b, v1.8b, v2.8b257; CHECK-NEXT: cmlt v0.4s, v0.4s, #0258; CHECK-NEXT: addv h1, v1.4h259; CHECK-NEXT: str b1, [x0]260; CHECK-NEXT: ret261 %t = call {<4 x i1>, <4 x i1>} @llvm.uadd.with.overflow.v4i1(<4 x i1> %a0, <4 x i1> %a1)262 %val = extractvalue {<4 x i1>, <4 x i1>} %t, 0263 %obit = extractvalue {<4 x i1>, <4 x i1>} %t, 1264 %res = sext <4 x i1> %obit to <4 x i32>265 store <4 x i1> %val, ptr %p2266 ret <4 x i32> %res267}268 269define <2 x i32> @uaddo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind {270; CHECK-LABEL: uaddo_v2i128:271; CHECK: // %bb.0:272; CHECK-NEXT: adds x8, x2, x6273; CHECK-NEXT: adcs x9, x3, x7274; CHECK-NEXT: cset w10, hs275; CHECK-NEXT: adds x11, x0, x4276; CHECK-NEXT: adcs x12, x1, x5277; CHECK-NEXT: cset w13, hs278; CHECK-NEXT: fmov s0, w13279; CHECK-NEXT: mov v0.s[1], w10280; CHECK-NEXT: ldr x10, [sp]281; CHECK-NEXT: stp x11, x12, [x10]282; CHECK-NEXT: stp x8, x9, [x10, #16]283; CHECK-NEXT: shl v0.2s, v0.2s, #31284; CHECK-NEXT: cmlt v0.2s, v0.2s, #0285; CHECK-NEXT: ret286 %t = call {<2 x i128>, <2 x i1>} @llvm.uadd.with.overflow.v2i128(<2 x i128> %a0, <2 x i128> %a1)287 %val = extractvalue {<2 x i128>, <2 x i1>} %t, 0288 %obit = extractvalue {<2 x i128>, <2 x i1>} %t, 1289 %res = sext <2 x i1> %obit to <2 x i32>290 store <2 x i128> %val, ptr %p2291 ret <2 x i32> %res292}293