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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64-gnu-linux -mattr=+neon,+sve -vector-library=sleefgnuabi < %s | FileCheck %s -check-prefix=SLEEF3; RUN: llc -mtriple=aarch64-gnu-linux -mattr=+neon,+sve -vector-library=ArmPL < %s | FileCheck %s -check-prefix=ARMPL4 5define <4 x float> @test_modf_v4f32(<4 x float> %x, ptr %out_integral) {6; SLEEF-LABEL: test_modf_v4f32:7; SLEEF: // %bb.0:8; SLEEF-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill9; SLEEF-NEXT: .cfi_def_cfa_offset 1610; SLEEF-NEXT: .cfi_offset w30, -1611; SLEEF-NEXT: bl _ZGVnN4vl4_modff12; SLEEF-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload13; SLEEF-NEXT: ret14;15; ARMPL-LABEL: test_modf_v4f32:16; ARMPL: // %bb.0:17; ARMPL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill18; ARMPL-NEXT: .cfi_def_cfa_offset 1619; ARMPL-NEXT: .cfi_offset w30, -1620; ARMPL-NEXT: bl armpl_vmodfq_f3221; ARMPL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload22; ARMPL-NEXT: ret23 %result = call { <4 x float>, <4 x float> } @llvm.modf.v4f32(<4 x float> %x)24 %result.0 = extractvalue { <4 x float>, <4 x float> } %result, 025 %result.1 = extractvalue { <4 x float>, <4 x float> } %result, 126 store <4 x float> %result.1, ptr %out_integral, align 427 ret <4 x float> %result.028}29 30define <2 x double> @test_modf_v2f64(<2 x double> %x, ptr %out_integral) {31; SLEEF-LABEL: test_modf_v2f64:32; SLEEF: // %bb.0:33; SLEEF-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill34; SLEEF-NEXT: .cfi_def_cfa_offset 1635; SLEEF-NEXT: .cfi_offset w30, -1636; SLEEF-NEXT: bl _ZGVnN2vl8_modf37; SLEEF-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload38; SLEEF-NEXT: ret39;40; ARMPL-LABEL: test_modf_v2f64:41; ARMPL: // %bb.0:42; ARMPL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill43; ARMPL-NEXT: .cfi_def_cfa_offset 1644; ARMPL-NEXT: .cfi_offset w30, -1645; ARMPL-NEXT: bl armpl_vmodfq_f6446; ARMPL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload47; ARMPL-NEXT: ret48 %result = call { <2 x double>, <2 x double> } @llvm.modf.v2f64(<2 x double> %x)49 %result.0 = extractvalue { <2 x double>, <2 x double> } %result, 050 %result.1 = extractvalue { <2 x double>, <2 x double> } %result, 151 store <2 x double> %result.1, ptr %out_integral, align 852 ret <2 x double> %result.053}54 55define <vscale x 4 x float> @test_modf_nxv4f32(<vscale x 4 x float> %x, ptr %out_integral) {56; SLEEF-LABEL: test_modf_nxv4f32:57; SLEEF: // %bb.0:58; SLEEF-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill59; SLEEF-NEXT: .cfi_def_cfa_offset 1660; SLEEF-NEXT: .cfi_offset w30, -1661; SLEEF-NEXT: bl _ZGVsNxvl4_modff62; SLEEF-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload63; SLEEF-NEXT: ret64;65; ARMPL-LABEL: test_modf_nxv4f32:66; ARMPL: // %bb.0:67; ARMPL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill68; ARMPL-NEXT: .cfi_def_cfa_offset 1669; ARMPL-NEXT: .cfi_offset w30, -1670; ARMPL-NEXT: ptrue p0.s71; ARMPL-NEXT: bl armpl_svmodf_f32_x72; ARMPL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload73; ARMPL-NEXT: ret74 %result = call { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.modf.nxv4f32(<vscale x 4 x float> %x)75 %result.0 = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %result, 076 %result.1 = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %result, 177 store <vscale x 4 x float> %result.1, ptr %out_integral, align 478 ret <vscale x 4 x float> %result.079}80 81define <vscale x 2 x double> @test_modf_nxv2f64(<vscale x 2 x double> %x, ptr %out_integral) {82; SLEEF-LABEL: test_modf_nxv2f64:83; SLEEF: // %bb.0:84; SLEEF-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill85; SLEEF-NEXT: .cfi_def_cfa_offset 1686; SLEEF-NEXT: .cfi_offset w30, -1687; SLEEF-NEXT: bl _ZGVsNxvl8_modf88; SLEEF-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload89; SLEEF-NEXT: ret90;91; ARMPL-LABEL: test_modf_nxv2f64:92; ARMPL: // %bb.0:93; ARMPL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill94; ARMPL-NEXT: .cfi_def_cfa_offset 1695; ARMPL-NEXT: .cfi_offset w30, -1696; ARMPL-NEXT: ptrue p0.d97; ARMPL-NEXT: bl armpl_svmodf_f64_x98; ARMPL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload99; ARMPL-NEXT: ret100 %result = call { <vscale x 2 x double>, <vscale x 2 x double> } @llvm.modf.nxv2f64(<vscale x 2 x double> %x)101 %result.0 = extractvalue { <vscale x 2 x double>, <vscale x 2 x double> } %result, 0102 %result.1 = extractvalue { <vscale x 2 x double>, <vscale x 2 x double> } %result, 1103 store <vscale x 2 x double> %result.1, ptr %out_integral, align 8104 ret <vscale x 2 x double> %result.0105}106 107define <4 x float> @modf_store_merging_load_before_store(<4 x float> %x, ptr %out_integral) {108; SLEEF-LABEL: modf_store_merging_load_before_store:109; SLEEF: // %bb.0:110; SLEEF-NEXT: sub sp, sp, #32111; SLEEF-NEXT: str x30, [sp, #16] // 8-byte Spill112; SLEEF-NEXT: .cfi_def_cfa_offset 32113; SLEEF-NEXT: .cfi_offset w30, -16114; SLEEF-NEXT: ldr q1, [x0]115; SLEEF-NEXT: str q1, [sp] // 16-byte Spill116; SLEEF-NEXT: bl _ZGVnN4vl4_modff117; SLEEF-NEXT: ldr q1, [sp] // 16-byte Reload118; SLEEF-NEXT: ldr x30, [sp, #16] // 8-byte Reload119; SLEEF-NEXT: fadd v0.4s, v1.4s, v0.4s120; SLEEF-NEXT: add sp, sp, #32121; SLEEF-NEXT: ret122;123; ARMPL-LABEL: modf_store_merging_load_before_store:124; ARMPL: // %bb.0:125; ARMPL-NEXT: sub sp, sp, #32126; ARMPL-NEXT: str x30, [sp, #16] // 8-byte Spill127; ARMPL-NEXT: .cfi_def_cfa_offset 32128; ARMPL-NEXT: .cfi_offset w30, -16129; ARMPL-NEXT: ldr q1, [x0]130; ARMPL-NEXT: str q1, [sp] // 16-byte Spill131; ARMPL-NEXT: bl armpl_vmodfq_f32132; ARMPL-NEXT: ldr q1, [sp] // 16-byte Reload133; ARMPL-NEXT: ldr x30, [sp, #16] // 8-byte Reload134; ARMPL-NEXT: fadd v0.4s, v1.4s, v0.4s135; ARMPL-NEXT: add sp, sp, #32136; ARMPL-NEXT: ret137 %result = call { <4 x float>, <4 x float> } @llvm.modf.v4f32(<4 x float> %x)138 %result.0 = extractvalue { <4 x float>, <4 x float> } %result, 0139 %result.1 = extractvalue { <4 x float>, <4 x float> } %result, 1140 %original_intergral = load <4 x float>, ptr %out_integral, align 4141 store <4 x float> %result.1, ptr %out_integral, align 4142 %return = fadd <4 x float> %original_intergral, %result.0143 ret <4 x float> %return144}145