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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5; CHECK-GI: warning: Instruction selection used fallback path for test_v5f326 7declare half @llvm.vector.reduce.fadd.f16.v1f16(half, <1 x half>)8declare float @llvm.vector.reduce.fadd.f32.v1f32(float, <1 x float>)9declare double @llvm.vector.reduce.fadd.f64.v1f64(double, <1 x double>)10declare fp128 @llvm.vector.reduce.fadd.f128.v1f128(fp128, <1 x fp128>)11 12declare float @llvm.vector.reduce.fadd.f32.v3f32(float, <3 x float>)13declare float @llvm.vector.reduce.fadd.f32.v5f32(float, <5 x float>)14declare fp128 @llvm.vector.reduce.fadd.f128.v2f128(fp128, <2 x fp128>)15declare float @llvm.vector.reduce.fadd.f32.v16f32(float, <16 x float>)16 17define half @test_v1f16(<1 x half> %a) nounwind {18; CHECK-LABEL: test_v1f16:19; CHECK: // %bb.0:20; CHECK-NEXT: ret21 %b = call reassoc half @llvm.vector.reduce.fadd.f16.v1f16(half -0.0, <1 x half> %a)22 ret half %b23}24 25define float @test_v1f32(<1 x float> %a) nounwind {26; CHECK-SD-LABEL: test_v1f32:27; CHECK-SD: // %bb.0:28; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q029; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q030; CHECK-SD-NEXT: ret31;32; CHECK-GI-LABEL: test_v1f32:33; CHECK-GI: // %bb.0:34; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $d035; CHECK-GI-NEXT: ret36 %b = call reassoc float @llvm.vector.reduce.fadd.f32.v1f32(float -0.0, <1 x float> %a)37 ret float %b38}39 40define double @test_v1f64(<1 x double> %a) nounwind {41; CHECK-LABEL: test_v1f64:42; CHECK: // %bb.0:43; CHECK-NEXT: ret44 %b = call reassoc double @llvm.vector.reduce.fadd.f64.v1f64(double -0.0, <1 x double> %a)45 ret double %b46}47 48define fp128 @test_v1f128(<1 x fp128> %a) nounwind {49; CHECK-LABEL: test_v1f128:50; CHECK: // %bb.0:51; CHECK-NEXT: ret52 %b = call reassoc fp128 @llvm.vector.reduce.fadd.f128.v1f128(fp128 0xL00000000000000008000000000000000, <1 x fp128> %a)53 ret fp128 %b54}55 56define float @test_v3f32(<3 x float> %a) nounwind {57; CHECK-LABEL: test_v3f32:58; CHECK: // %bb.0:59; CHECK-NEXT: movi v1.2s, #128, lsl #2460; CHECK-NEXT: mov v0.s[3], v1.s[0]61; CHECK-NEXT: faddp v0.4s, v0.4s, v0.4s62; CHECK-NEXT: faddp s0, v0.2s63; CHECK-NEXT: ret64 %b = call reassoc float @llvm.vector.reduce.fadd.f32.v3f32(float -0.0, <3 x float> %a)65 ret float %b66}67 68define float @test_v5f32(<5 x float> %a) nounwind {69; CHECK-LABEL: test_v5f32:70; CHECK: // %bb.0:71; CHECK-NEXT: // kill: def $s0 killed $s0 def $q072; CHECK-NEXT: // kill: def $s1 killed $s1 def $q173; CHECK-NEXT: // kill: def $s2 killed $s2 def $q274; CHECK-NEXT: movi v5.4s, #128, lsl #2475; CHECK-NEXT: // kill: def $s4 killed $s4 def $q476; CHECK-NEXT: // kill: def $s3 killed $s3 def $q377; CHECK-NEXT: mov v0.s[1], v1.s[0]78; CHECK-NEXT: mov v5.s[0], v4.s[0]79; CHECK-NEXT: mov v0.s[2], v2.s[0]80; CHECK-NEXT: mov v0.s[3], v3.s[0]81; CHECK-NEXT: fadd v0.4s, v0.4s, v5.4s82; CHECK-NEXT: faddp v0.4s, v0.4s, v0.4s83; CHECK-NEXT: faddp s0, v0.2s84; CHECK-NEXT: ret85 %b = call reassoc float @llvm.vector.reduce.fadd.f32.v5f32(float -0.0, <5 x float> %a)86 ret float %b87}88 89define fp128 @test_v2f128(<2 x fp128> %a) nounwind {90; CHECK-SD-LABEL: test_v2f128:91; CHECK-SD: // %bb.0:92; CHECK-SD-NEXT: b __addtf393;94; CHECK-GI-LABEL: test_v2f128:95; CHECK-GI: // %bb.0:96; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill97; CHECK-GI-NEXT: bl __addtf398; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload99; CHECK-GI-NEXT: ret100 %b = call reassoc fp128 @llvm.vector.reduce.fadd.f128.v2f128(fp128 0xL00000000000000008000000000000000, <2 x fp128> %a)101 ret fp128 %b102}103 104define float @test_v16f32(<16 x float> %a) nounwind {105; CHECK-SD-LABEL: test_v16f32:106; CHECK-SD: // %bb.0:107; CHECK-SD-NEXT: fadd v1.4s, v1.4s, v3.4s108; CHECK-SD-NEXT: fadd v0.4s, v0.4s, v2.4s109; CHECK-SD-NEXT: fadd v0.4s, v0.4s, v1.4s110; CHECK-SD-NEXT: faddp v0.4s, v0.4s, v0.4s111; CHECK-SD-NEXT: faddp s0, v0.2s112; CHECK-SD-NEXT: ret113;114; CHECK-GI-LABEL: test_v16f32:115; CHECK-GI: // %bb.0:116; CHECK-GI-NEXT: fadd v0.4s, v0.4s, v1.4s117; CHECK-GI-NEXT: fadd v1.4s, v2.4s, v3.4s118; CHECK-GI-NEXT: fadd v0.4s, v0.4s, v1.4s119; CHECK-GI-NEXT: faddp v0.4s, v0.4s, v0.4s120; CHECK-GI-NEXT: faddp s0, v0.2s121; CHECK-GI-NEXT: ret122 %b = call reassoc float @llvm.vector.reduce.fadd.f32.v16f32(float -0.0, <16 x float> %a)123 ret float %b124}125