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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP163; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP164; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP165; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP166 7define float @add_HalfS(<2 x float> %bin.rdx) {8; CHECK-SD-LABEL: add_HalfS:9; CHECK-SD: // %bb.0:10; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q011; CHECK-SD-NEXT: faddp s0, v0.2s12; CHECK-SD-NEXT: ret13;14; CHECK-GI-LABEL: add_HalfS:15; CHECK-GI: // %bb.0:16; CHECK-GI-NEXT: faddp s0, v0.2s17; CHECK-GI-NEXT: ret18 %r = call float @llvm.vector.reduce.fadd.f32.v2f32(float -0.0, <2 x float> %bin.rdx)19 ret float %r20}21 22define half @add_v2HalfH(<2 x half> %bin.rdx) {23; CHECK-SD-NOFP16-LABEL: add_v2HalfH:24; CHECK-SD-NOFP16: // %bb.0:25; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q026; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]27; CHECK-SD-NOFP16-NEXT: fcvt s0, h028; CHECK-SD-NOFP16-NEXT: fcvt s1, h129; CHECK-SD-NOFP16-NEXT: fadd s0, s0, s130; CHECK-SD-NOFP16-NEXT: fcvt h0, s031; CHECK-SD-NOFP16-NEXT: ret32;33; CHECK-SD-FP16-LABEL: add_v2HalfH:34; CHECK-SD-FP16: // %bb.0:35; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q036; CHECK-SD-FP16-NEXT: faddp h0, v0.2h37; CHECK-SD-FP16-NEXT: ret38;39; CHECK-GI-NOFP16-LABEL: add_v2HalfH:40; CHECK-GI-NOFP16: // %bb.0:41; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q042; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]43; CHECK-GI-NOFP16-NEXT: fcvt s0, h044; CHECK-GI-NOFP16-NEXT: fcvt s1, h145; CHECK-GI-NOFP16-NEXT: fadd s0, s0, s146; CHECK-GI-NOFP16-NEXT: fcvt h0, s047; CHECK-GI-NOFP16-NEXT: ret48;49; CHECK-GI-FP16-LABEL: add_v2HalfH:50; CHECK-GI-FP16: // %bb.0:51; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q052; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]53; CHECK-GI-FP16-NEXT: fadd h0, h0, h154; CHECK-GI-FP16-NEXT: ret55 %r = call half @llvm.vector.reduce.fadd.f16.v2f16(half -0.0, <2 x half> %bin.rdx)56 ret half %r57}58 59define half @add_v3HalfH(<3 x half> %bin.rdx) {60; CHECK-SD-NOFP16-LABEL: add_v3HalfH:61; CHECK-SD-NOFP16: // %bb.0:62; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q063; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]64; CHECK-SD-NOFP16-NEXT: fcvt s2, h065; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[2]66; CHECK-SD-NOFP16-NEXT: fcvt s1, h167; CHECK-SD-NOFP16-NEXT: fcvt s0, h068; CHECK-SD-NOFP16-NEXT: fadd s1, s2, s169; CHECK-SD-NOFP16-NEXT: fcvt h1, s170; CHECK-SD-NOFP16-NEXT: fcvt s1, h171; CHECK-SD-NOFP16-NEXT: fadd s0, s1, s072; CHECK-SD-NOFP16-NEXT: fcvt h0, s073; CHECK-SD-NOFP16-NEXT: ret74;75; CHECK-SD-FP16-LABEL: add_v3HalfH:76; CHECK-SD-FP16: // %bb.0:77; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q078; CHECK-SD-FP16-NEXT: mov h1, v0.h[2]79; CHECK-SD-FP16-NEXT: faddp h0, v0.2h80; CHECK-SD-FP16-NEXT: fadd h0, h0, h181; CHECK-SD-FP16-NEXT: ret82;83; CHECK-GI-NOFP16-LABEL: add_v3HalfH:84; CHECK-GI-NOFP16: // %bb.0:85; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q086; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]87; CHECK-GI-NOFP16-NEXT: fcvt s2, h088; CHECK-GI-NOFP16-NEXT: mov h0, v0.h[2]89; CHECK-GI-NOFP16-NEXT: fcvt s1, h190; CHECK-GI-NOFP16-NEXT: fcvt s0, h091; CHECK-GI-NOFP16-NEXT: fadd s1, s2, s192; CHECK-GI-NOFP16-NEXT: fcvt h1, s193; CHECK-GI-NOFP16-NEXT: fcvt s1, h194; CHECK-GI-NOFP16-NEXT: fadd s0, s1, s095; CHECK-GI-NOFP16-NEXT: fcvt h0, s096; CHECK-GI-NOFP16-NEXT: ret97;98; CHECK-GI-FP16-LABEL: add_v3HalfH:99; CHECK-GI-FP16: // %bb.0:100; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0101; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]102; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]103; CHECK-GI-FP16-NEXT: fadd h0, h0, h1104; CHECK-GI-FP16-NEXT: fadd h0, h0, h2105; CHECK-GI-FP16-NEXT: ret106 %r = call half @llvm.vector.reduce.fadd.f16.v3f16(half -0.0, <3 x half> %bin.rdx)107 ret half %r108}109 110define half @add_HalfH(<4 x half> %bin.rdx) {111; CHECK-SD-NOFP16-LABEL: add_HalfH:112; CHECK-SD-NOFP16: // %bb.0:113; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0114; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]115; CHECK-SD-NOFP16-NEXT: fcvt s2, h0116; CHECK-SD-NOFP16-NEXT: fcvt s1, h1117; CHECK-SD-NOFP16-NEXT: fadd s1, s2, s1118; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[2]119; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]120; CHECK-SD-NOFP16-NEXT: fcvt h1, s1121; CHECK-SD-NOFP16-NEXT: fcvt s2, h2122; CHECK-SD-NOFP16-NEXT: fcvt s0, h0123; CHECK-SD-NOFP16-NEXT: fcvt s1, h1124; CHECK-SD-NOFP16-NEXT: fadd s1, s1, s2125; CHECK-SD-NOFP16-NEXT: fcvt h1, s1126; CHECK-SD-NOFP16-NEXT: fcvt s1, h1127; CHECK-SD-NOFP16-NEXT: fadd s0, s1, s0128; CHECK-SD-NOFP16-NEXT: fcvt h0, s0129; CHECK-SD-NOFP16-NEXT: ret130;131; CHECK-SD-FP16-LABEL: add_HalfH:132; CHECK-SD-FP16: // %bb.0:133; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0134; CHECK-SD-FP16-NEXT: mov h1, v0.h[2]135; CHECK-SD-FP16-NEXT: faddp h2, v0.2h136; CHECK-SD-FP16-NEXT: mov h0, v0.h[3]137; CHECK-SD-FP16-NEXT: fadd h1, h2, h1138; CHECK-SD-FP16-NEXT: fadd h0, h1, h0139; CHECK-SD-FP16-NEXT: ret140;141; CHECK-GI-NOFP16-LABEL: add_HalfH:142; CHECK-GI-NOFP16: // %bb.0:143; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0144; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]145; CHECK-GI-NOFP16-NEXT: fcvt s2, h0146; CHECK-GI-NOFP16-NEXT: fcvt s1, h1147; CHECK-GI-NOFP16-NEXT: fadd s1, s2, s1148; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[2]149; CHECK-GI-NOFP16-NEXT: mov h0, v0.h[3]150; CHECK-GI-NOFP16-NEXT: fcvt h1, s1151; CHECK-GI-NOFP16-NEXT: fcvt s2, h2152; CHECK-GI-NOFP16-NEXT: fcvt s0, h0153; CHECK-GI-NOFP16-NEXT: fcvt s1, h1154; CHECK-GI-NOFP16-NEXT: fadd s1, s1, s2155; CHECK-GI-NOFP16-NEXT: fcvt h1, s1156; CHECK-GI-NOFP16-NEXT: fcvt s1, h1157; CHECK-GI-NOFP16-NEXT: fadd s0, s1, s0158; CHECK-GI-NOFP16-NEXT: fcvt h0, s0159; CHECK-GI-NOFP16-NEXT: ret160;161; CHECK-GI-FP16-LABEL: add_HalfH:162; CHECK-GI-FP16: // %bb.0:163; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0164; CHECK-GI-FP16-NEXT: mov h1, v0.h[1]165; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]166; CHECK-GI-FP16-NEXT: fadd h1, h0, h1167; CHECK-GI-FP16-NEXT: mov h0, v0.h[3]168; CHECK-GI-FP16-NEXT: fadd h1, h1, h2169; CHECK-GI-FP16-NEXT: fadd h0, h1, h0170; CHECK-GI-FP16-NEXT: ret171 %r = call half @llvm.vector.reduce.fadd.f16.v4f16(half -0.0, <4 x half> %bin.rdx)172 ret half %r173}174 175 176define half @add_H(<8 x half> %bin.rdx) {177; CHECK-SD-NOFP16-LABEL: add_H:178; CHECK-SD-NOFP16: // %bb.0:179; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]180; CHECK-SD-NOFP16-NEXT: fcvt s2, h0181; CHECK-SD-NOFP16-NEXT: fcvt s1, h1182; CHECK-SD-NOFP16-NEXT: fadd s1, s2, s1183; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[2]184; CHECK-SD-NOFP16-NEXT: fcvt h1, s1185; CHECK-SD-NOFP16-NEXT: fcvt s2, h2186; CHECK-SD-NOFP16-NEXT: fcvt s1, h1187; CHECK-SD-NOFP16-NEXT: fadd s1, s1, s2188; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[3]189; CHECK-SD-NOFP16-NEXT: fcvt h1, s1190; CHECK-SD-NOFP16-NEXT: fcvt s2, h2191; CHECK-SD-NOFP16-NEXT: fcvt s1, h1192; CHECK-SD-NOFP16-NEXT: fadd s1, s1, s2193; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[4]194; CHECK-SD-NOFP16-NEXT: fcvt h1, s1195; CHECK-SD-NOFP16-NEXT: fcvt s2, h2196; CHECK-SD-NOFP16-NEXT: fcvt s1, h1197; CHECK-SD-NOFP16-NEXT: fadd s1, s1, s2198; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[5]199; CHECK-SD-NOFP16-NEXT: fcvt h1, s1200; CHECK-SD-NOFP16-NEXT: fcvt s2, h2201; CHECK-SD-NOFP16-NEXT: fcvt s1, h1202; CHECK-SD-NOFP16-NEXT: fadd s1, s1, s2203; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[6]204; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7]205; CHECK-SD-NOFP16-NEXT: fcvt h1, s1206; CHECK-SD-NOFP16-NEXT: fcvt s2, h2207; CHECK-SD-NOFP16-NEXT: fcvt s0, h0208; CHECK-SD-NOFP16-NEXT: fcvt s1, h1209; CHECK-SD-NOFP16-NEXT: fadd s1, s1, s2210; CHECK-SD-NOFP16-NEXT: fcvt h1, s1211; CHECK-SD-NOFP16-NEXT: fcvt s1, h1212; CHECK-SD-NOFP16-NEXT: fadd s0, s1, s0213; CHECK-SD-NOFP16-NEXT: fcvt h0, s0214; CHECK-SD-NOFP16-NEXT: ret215;216; CHECK-SD-FP16-LABEL: add_H:217; CHECK-SD-FP16: // %bb.0:218; CHECK-SD-FP16-NEXT: mov h1, v0.h[2]219; CHECK-SD-FP16-NEXT: faddp h2, v0.2h220; CHECK-SD-FP16-NEXT: mov h3, v0.h[3]221; CHECK-SD-FP16-NEXT: fadd h1, h2, h1222; CHECK-SD-FP16-NEXT: mov h2, v0.h[4]223; CHECK-SD-FP16-NEXT: fadd h1, h1, h3224; CHECK-SD-FP16-NEXT: mov h3, v0.h[5]225; CHECK-SD-FP16-NEXT: fadd h1, h1, h2226; CHECK-SD-FP16-NEXT: mov h2, v0.h[6]227; CHECK-SD-FP16-NEXT: mov h0, v0.h[7]228; CHECK-SD-FP16-NEXT: fadd h1, h1, h3229; CHECK-SD-FP16-NEXT: fadd h1, h1, h2230; CHECK-SD-FP16-NEXT: fadd h0, h1, h0231; CHECK-SD-FP16-NEXT: ret232;233; CHECK-GI-NOFP16-LABEL: add_H:234; CHECK-GI-NOFP16: // %bb.0:235; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]236; CHECK-GI-NOFP16-NEXT: fcvt s2, h0237; CHECK-GI-NOFP16-NEXT: fcvt s1, h1238; CHECK-GI-NOFP16-NEXT: fadd s1, s2, s1239; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[2]240; CHECK-GI-NOFP16-NEXT: fcvt h1, s1241; CHECK-GI-NOFP16-NEXT: fcvt s2, h2242; CHECK-GI-NOFP16-NEXT: fcvt s1, h1243; CHECK-GI-NOFP16-NEXT: fadd s1, s1, s2244; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[3]245; CHECK-GI-NOFP16-NEXT: fcvt h1, s1246; CHECK-GI-NOFP16-NEXT: fcvt s2, h2247; CHECK-GI-NOFP16-NEXT: fcvt s1, h1248; CHECK-GI-NOFP16-NEXT: fadd s1, s1, s2249; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[4]250; CHECK-GI-NOFP16-NEXT: fcvt h1, s1251; CHECK-GI-NOFP16-NEXT: fcvt s2, h2252; CHECK-GI-NOFP16-NEXT: fcvt s1, h1253; CHECK-GI-NOFP16-NEXT: fadd s1, s1, s2254; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[5]255; CHECK-GI-NOFP16-NEXT: fcvt h1, s1256; CHECK-GI-NOFP16-NEXT: fcvt s2, h2257; CHECK-GI-NOFP16-NEXT: fcvt s1, h1258; CHECK-GI-NOFP16-NEXT: fadd s1, s1, s2259; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[6]260; CHECK-GI-NOFP16-NEXT: mov h0, v0.h[7]261; CHECK-GI-NOFP16-NEXT: fcvt h1, s1262; CHECK-GI-NOFP16-NEXT: fcvt s2, h2263; CHECK-GI-NOFP16-NEXT: fcvt s0, h0264; CHECK-GI-NOFP16-NEXT: fcvt s1, h1265; CHECK-GI-NOFP16-NEXT: fadd s1, s1, s2266; CHECK-GI-NOFP16-NEXT: fcvt h1, s1267; CHECK-GI-NOFP16-NEXT: fcvt s1, h1268; CHECK-GI-NOFP16-NEXT: fadd s0, s1, s0269; CHECK-GI-NOFP16-NEXT: fcvt h0, s0270; CHECK-GI-NOFP16-NEXT: ret271;272; CHECK-GI-FP16-LABEL: add_H:273; CHECK-GI-FP16: // %bb.0:274; CHECK-GI-FP16-NEXT: mov h1, v0.h[2]275; CHECK-GI-FP16-NEXT: faddp h2, v0.2h276; CHECK-GI-FP16-NEXT: mov h3, v0.h[3]277; CHECK-GI-FP16-NEXT: fadd h1, h2, h1278; CHECK-GI-FP16-NEXT: mov h2, v0.h[4]279; CHECK-GI-FP16-NEXT: fadd h1, h1, h3280; CHECK-GI-FP16-NEXT: mov h3, v0.h[5]281; CHECK-GI-FP16-NEXT: fadd h1, h1, h2282; CHECK-GI-FP16-NEXT: mov h2, v0.h[6]283; CHECK-GI-FP16-NEXT: mov h0, v0.h[7]284; CHECK-GI-FP16-NEXT: fadd h1, h1, h3285; CHECK-GI-FP16-NEXT: fadd h1, h1, h2286; CHECK-GI-FP16-NEXT: fadd h0, h1, h0287; CHECK-GI-FP16-NEXT: ret288 %r = call half @llvm.vector.reduce.fadd.f16.v8f16(half -0.0, <8 x half> %bin.rdx)289 ret half %r290}291 292define float @add_S(<4 x float> %bin.rdx) {293; CHECK-LABEL: add_S:294; CHECK: // %bb.0:295; CHECK-NEXT: mov s1, v0.s[2]296; CHECK-NEXT: faddp s2, v0.2s297; CHECK-NEXT: mov s0, v0.s[3]298; CHECK-NEXT: fadd s1, s2, s1299; CHECK-NEXT: fadd s0, s1, s0300; CHECK-NEXT: ret301 %r = call float @llvm.vector.reduce.fadd.f32.v4f32(float -0.0, <4 x float> %bin.rdx)302 ret float %r303}304 305define double @add_D(<2 x double> %bin.rdx) {306; CHECK-LABEL: add_D:307; CHECK: // %bb.0:308; CHECK-NEXT: faddp d0, v0.2d309; CHECK-NEXT: ret310 %r = call double @llvm.vector.reduce.fadd.f64.v2f64(double -0.0, <2 x double> %bin.rdx)311 ret double %r312}313 314define half @add_2H(<16 x half> %bin.rdx) {315; CHECK-SD-NOFP16-LABEL: add_2H:316; CHECK-SD-NOFP16: // %bb.0:317; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[1]318; CHECK-SD-NOFP16-NEXT: fcvt s3, h0319; CHECK-SD-NOFP16-NEXT: fcvt s2, h2320; CHECK-SD-NOFP16-NEXT: fadd s2, s3, s2321; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[2]322; CHECK-SD-NOFP16-NEXT: fcvt h2, s2323; CHECK-SD-NOFP16-NEXT: fcvt s3, h3324; CHECK-SD-NOFP16-NEXT: fcvt s2, h2325; CHECK-SD-NOFP16-NEXT: fadd s2, s2, s3326; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[3]327; CHECK-SD-NOFP16-NEXT: fcvt h2, s2328; CHECK-SD-NOFP16-NEXT: fcvt s3, h3329; CHECK-SD-NOFP16-NEXT: fcvt s2, h2330; CHECK-SD-NOFP16-NEXT: fadd s2, s2, s3331; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[4]332; CHECK-SD-NOFP16-NEXT: fcvt h2, s2333; CHECK-SD-NOFP16-NEXT: fcvt s3, h3334; CHECK-SD-NOFP16-NEXT: fcvt s2, h2335; CHECK-SD-NOFP16-NEXT: fadd s2, s2, s3336; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[5]337; CHECK-SD-NOFP16-NEXT: fcvt h2, s2338; CHECK-SD-NOFP16-NEXT: fcvt s3, h3339; CHECK-SD-NOFP16-NEXT: fcvt s2, h2340; CHECK-SD-NOFP16-NEXT: fadd s2, s2, s3341; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[6]342; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7]343; CHECK-SD-NOFP16-NEXT: fcvt h2, s2344; CHECK-SD-NOFP16-NEXT: fcvt s3, h3345; CHECK-SD-NOFP16-NEXT: fcvt s0, h0346; CHECK-SD-NOFP16-NEXT: fcvt s2, h2347; CHECK-SD-NOFP16-NEXT: fadd s2, s2, s3348; CHECK-SD-NOFP16-NEXT: fcvt h2, s2349; CHECK-SD-NOFP16-NEXT: fcvt s2, h2350; CHECK-SD-NOFP16-NEXT: fadd s0, s2, s0351; CHECK-SD-NOFP16-NEXT: fcvt s2, h1352; CHECK-SD-NOFP16-NEXT: fcvt h0, s0353; CHECK-SD-NOFP16-NEXT: fcvt s0, h0354; CHECK-SD-NOFP16-NEXT: fadd s0, s0, s2355; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[1]356; CHECK-SD-NOFP16-NEXT: fcvt h0, s0357; CHECK-SD-NOFP16-NEXT: fcvt s2, h2358; CHECK-SD-NOFP16-NEXT: fcvt s0, h0359; CHECK-SD-NOFP16-NEXT: fadd s0, s0, s2360; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[2]361; CHECK-SD-NOFP16-NEXT: fcvt h0, s0362; CHECK-SD-NOFP16-NEXT: fcvt s2, h2363; CHECK-SD-NOFP16-NEXT: fcvt s0, h0364; CHECK-SD-NOFP16-NEXT: fadd s0, s0, s2365; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[3]366; CHECK-SD-NOFP16-NEXT: fcvt h0, s0367; CHECK-SD-NOFP16-NEXT: fcvt s2, h2368; CHECK-SD-NOFP16-NEXT: fcvt s0, h0369; CHECK-SD-NOFP16-NEXT: fadd s0, s0, s2370; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[4]371; CHECK-SD-NOFP16-NEXT: fcvt h0, s0372; CHECK-SD-NOFP16-NEXT: fcvt s2, h2373; CHECK-SD-NOFP16-NEXT: fcvt s0, h0374; CHECK-SD-NOFP16-NEXT: fadd s0, s0, s2375; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[5]376; CHECK-SD-NOFP16-NEXT: fcvt h0, s0377; CHECK-SD-NOFP16-NEXT: fcvt s2, h2378; CHECK-SD-NOFP16-NEXT: fcvt s0, h0379; CHECK-SD-NOFP16-NEXT: fadd s0, s0, s2380; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[6]381; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[7]382; CHECK-SD-NOFP16-NEXT: fcvt h0, s0383; CHECK-SD-NOFP16-NEXT: fcvt s2, h2384; CHECK-SD-NOFP16-NEXT: fcvt s1, h1385; CHECK-SD-NOFP16-NEXT: fcvt s0, h0386; CHECK-SD-NOFP16-NEXT: fadd s0, s0, s2387; CHECK-SD-NOFP16-NEXT: fcvt h0, s0388; CHECK-SD-NOFP16-NEXT: fcvt s0, h0389; CHECK-SD-NOFP16-NEXT: fadd s0, s0, s1390; CHECK-SD-NOFP16-NEXT: fcvt h0, s0391; CHECK-SD-NOFP16-NEXT: ret392;393; CHECK-SD-FP16-LABEL: add_2H:394; CHECK-SD-FP16: // %bb.0:395; CHECK-SD-FP16-NEXT: mov h2, v0.h[2]396; CHECK-SD-FP16-NEXT: faddp h3, v0.2h397; CHECK-SD-FP16-NEXT: mov h4, v0.h[3]398; CHECK-SD-FP16-NEXT: fadd h2, h3, h2399; CHECK-SD-FP16-NEXT: mov h3, v0.h[4]400; CHECK-SD-FP16-NEXT: fadd h2, h2, h4401; CHECK-SD-FP16-NEXT: mov h4, v0.h[5]402; CHECK-SD-FP16-NEXT: fadd h2, h2, h3403; CHECK-SD-FP16-NEXT: mov h3, v0.h[6]404; CHECK-SD-FP16-NEXT: mov h0, v0.h[7]405; CHECK-SD-FP16-NEXT: fadd h2, h2, h4406; CHECK-SD-FP16-NEXT: fadd h2, h2, h3407; CHECK-SD-FP16-NEXT: mov h3, v1.h[2]408; CHECK-SD-FP16-NEXT: fadd h0, h2, h0409; CHECK-SD-FP16-NEXT: mov h2, v1.h[1]410; CHECK-SD-FP16-NEXT: fadd h0, h0, h1411; CHECK-SD-FP16-NEXT: fadd h0, h0, h2412; CHECK-SD-FP16-NEXT: mov h2, v1.h[3]413; CHECK-SD-FP16-NEXT: fadd h0, h0, h3414; CHECK-SD-FP16-NEXT: mov h3, v1.h[4]415; CHECK-SD-FP16-NEXT: fadd h0, h0, h2416; CHECK-SD-FP16-NEXT: mov h2, v1.h[5]417; CHECK-SD-FP16-NEXT: fadd h0, h0, h3418; CHECK-SD-FP16-NEXT: mov h3, v1.h[6]419; CHECK-SD-FP16-NEXT: mov h1, v1.h[7]420; CHECK-SD-FP16-NEXT: fadd h0, h0, h2421; CHECK-SD-FP16-NEXT: fadd h0, h0, h3422; CHECK-SD-FP16-NEXT: fadd h0, h0, h1423; CHECK-SD-FP16-NEXT: ret424;425; CHECK-GI-NOFP16-LABEL: add_2H:426; CHECK-GI-NOFP16: // %bb.0:427; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[1]428; CHECK-GI-NOFP16-NEXT: fcvt s3, h0429; CHECK-GI-NOFP16-NEXT: fcvt s2, h2430; CHECK-GI-NOFP16-NEXT: fadd s2, s3, s2431; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[2]432; CHECK-GI-NOFP16-NEXT: fcvt h2, s2433; CHECK-GI-NOFP16-NEXT: fcvt s3, h3434; CHECK-GI-NOFP16-NEXT: fcvt s2, h2435; CHECK-GI-NOFP16-NEXT: fadd s2, s2, s3436; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[3]437; CHECK-GI-NOFP16-NEXT: fcvt h2, s2438; CHECK-GI-NOFP16-NEXT: fcvt s3, h3439; CHECK-GI-NOFP16-NEXT: fcvt s2, h2440; CHECK-GI-NOFP16-NEXT: fadd s2, s2, s3441; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[4]442; CHECK-GI-NOFP16-NEXT: fcvt h2, s2443; CHECK-GI-NOFP16-NEXT: fcvt s3, h3444; CHECK-GI-NOFP16-NEXT: fcvt s2, h2445; CHECK-GI-NOFP16-NEXT: fadd s2, s2, s3446; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[5]447; CHECK-GI-NOFP16-NEXT: fcvt h2, s2448; CHECK-GI-NOFP16-NEXT: fcvt s3, h3449; CHECK-GI-NOFP16-NEXT: fcvt s2, h2450; CHECK-GI-NOFP16-NEXT: fadd s2, s2, s3451; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[6]452; CHECK-GI-NOFP16-NEXT: mov h0, v0.h[7]453; CHECK-GI-NOFP16-NEXT: fcvt h2, s2454; CHECK-GI-NOFP16-NEXT: fcvt s3, h3455; CHECK-GI-NOFP16-NEXT: fcvt s0, h0456; CHECK-GI-NOFP16-NEXT: fcvt s2, h2457; CHECK-GI-NOFP16-NEXT: fadd s2, s2, s3458; CHECK-GI-NOFP16-NEXT: fcvt h2, s2459; CHECK-GI-NOFP16-NEXT: fcvt s2, h2460; CHECK-GI-NOFP16-NEXT: fadd s0, s2, s0461; CHECK-GI-NOFP16-NEXT: fcvt s2, h1462; CHECK-GI-NOFP16-NEXT: fcvt h0, s0463; CHECK-GI-NOFP16-NEXT: fcvt s0, h0464; CHECK-GI-NOFP16-NEXT: fadd s0, s0, s2465; CHECK-GI-NOFP16-NEXT: mov h2, v1.h[1]466; CHECK-GI-NOFP16-NEXT: fcvt h0, s0467; CHECK-GI-NOFP16-NEXT: fcvt s2, h2468; CHECK-GI-NOFP16-NEXT: fcvt s0, h0469; CHECK-GI-NOFP16-NEXT: fadd s0, s0, s2470; CHECK-GI-NOFP16-NEXT: mov h2, v1.h[2]471; CHECK-GI-NOFP16-NEXT: fcvt h0, s0472; CHECK-GI-NOFP16-NEXT: fcvt s2, h2473; CHECK-GI-NOFP16-NEXT: fcvt s0, h0474; CHECK-GI-NOFP16-NEXT: fadd s0, s0, s2475; CHECK-GI-NOFP16-NEXT: mov h2, v1.h[3]476; CHECK-GI-NOFP16-NEXT: fcvt h0, s0477; CHECK-GI-NOFP16-NEXT: fcvt s2, h2478; CHECK-GI-NOFP16-NEXT: fcvt s0, h0479; CHECK-GI-NOFP16-NEXT: fadd s0, s0, s2480; CHECK-GI-NOFP16-NEXT: mov h2, v1.h[4]481; CHECK-GI-NOFP16-NEXT: fcvt h0, s0482; CHECK-GI-NOFP16-NEXT: fcvt s2, h2483; CHECK-GI-NOFP16-NEXT: fcvt s0, h0484; CHECK-GI-NOFP16-NEXT: fadd s0, s0, s2485; CHECK-GI-NOFP16-NEXT: mov h2, v1.h[5]486; CHECK-GI-NOFP16-NEXT: fcvt h0, s0487; CHECK-GI-NOFP16-NEXT: fcvt s2, h2488; CHECK-GI-NOFP16-NEXT: fcvt s0, h0489; CHECK-GI-NOFP16-NEXT: fadd s0, s0, s2490; CHECK-GI-NOFP16-NEXT: mov h2, v1.h[6]491; CHECK-GI-NOFP16-NEXT: mov h1, v1.h[7]492; CHECK-GI-NOFP16-NEXT: fcvt h0, s0493; CHECK-GI-NOFP16-NEXT: fcvt s2, h2494; CHECK-GI-NOFP16-NEXT: fcvt s1, h1495; CHECK-GI-NOFP16-NEXT: fcvt s0, h0496; CHECK-GI-NOFP16-NEXT: fadd s0, s0, s2497; CHECK-GI-NOFP16-NEXT: fcvt h0, s0498; CHECK-GI-NOFP16-NEXT: fcvt s0, h0499; CHECK-GI-NOFP16-NEXT: fadd s0, s0, s1500; CHECK-GI-NOFP16-NEXT: fcvt h0, s0501; CHECK-GI-NOFP16-NEXT: ret502;503; CHECK-GI-FP16-LABEL: add_2H:504; CHECK-GI-FP16: // %bb.0:505; CHECK-GI-FP16-NEXT: mov h2, v0.h[2]506; CHECK-GI-FP16-NEXT: faddp h3, v0.2h507; CHECK-GI-FP16-NEXT: mov h4, v0.h[3]508; CHECK-GI-FP16-NEXT: fadd h2, h3, h2509; CHECK-GI-FP16-NEXT: mov h3, v0.h[4]510; CHECK-GI-FP16-NEXT: fadd h2, h2, h4511; CHECK-GI-FP16-NEXT: mov h4, v0.h[5]512; CHECK-GI-FP16-NEXT: fadd h2, h2, h3513; CHECK-GI-FP16-NEXT: mov h3, v0.h[6]514; CHECK-GI-FP16-NEXT: mov h0, v0.h[7]515; CHECK-GI-FP16-NEXT: fadd h2, h2, h4516; CHECK-GI-FP16-NEXT: fadd h2, h2, h3517; CHECK-GI-FP16-NEXT: mov h3, v1.h[2]518; CHECK-GI-FP16-NEXT: fadd h0, h2, h0519; CHECK-GI-FP16-NEXT: mov h2, v1.h[1]520; CHECK-GI-FP16-NEXT: fadd h0, h0, h1521; CHECK-GI-FP16-NEXT: fadd h0, h0, h2522; CHECK-GI-FP16-NEXT: mov h2, v1.h[3]523; CHECK-GI-FP16-NEXT: fadd h0, h0, h3524; CHECK-GI-FP16-NEXT: mov h3, v1.h[4]525; CHECK-GI-FP16-NEXT: fadd h0, h0, h2526; CHECK-GI-FP16-NEXT: mov h2, v1.h[5]527; CHECK-GI-FP16-NEXT: fadd h0, h0, h3528; CHECK-GI-FP16-NEXT: mov h3, v1.h[6]529; CHECK-GI-FP16-NEXT: mov h1, v1.h[7]530; CHECK-GI-FP16-NEXT: fadd h0, h0, h2531; CHECK-GI-FP16-NEXT: fadd h0, h0, h3532; CHECK-GI-FP16-NEXT: fadd h0, h0, h1533; CHECK-GI-FP16-NEXT: ret534 %r = call half @llvm.vector.reduce.fadd.f16.v16f16(half -0.0, <16 x half> %bin.rdx)535 ret half %r536}537 538define float @add_2S(<8 x float> %bin.rdx) {539; CHECK-LABEL: add_2S:540; CHECK: // %bb.0:541; CHECK-NEXT: mov s2, v0.s[2]542; CHECK-NEXT: faddp s3, v0.2s543; CHECK-NEXT: mov s0, v0.s[3]544; CHECK-NEXT: fadd s2, s3, s2545; CHECK-NEXT: mov s3, v1.s[2]546; CHECK-NEXT: fadd s0, s2, s0547; CHECK-NEXT: mov s2, v1.s[1]548; CHECK-NEXT: fadd s0, s0, s1549; CHECK-NEXT: mov s1, v1.s[3]550; CHECK-NEXT: fadd s0, s0, s2551; CHECK-NEXT: fadd s0, s0, s3552; CHECK-NEXT: fadd s0, s0, s1553; CHECK-NEXT: ret554 %r = call float @llvm.vector.reduce.fadd.f32.v8f32(float -0.0, <8 x float> %bin.rdx)555 ret float %r556}557 558define double @add_2D(<4 x double> %bin.rdx) {559; CHECK-LABEL: add_2D:560; CHECK: // %bb.0:561; CHECK-NEXT: faddp d0, v0.2d562; CHECK-NEXT: mov d2, v1.d[1]563; CHECK-NEXT: fadd d0, d0, d1564; CHECK-NEXT: fadd d0, d0, d2565; CHECK-NEXT: ret566 %r = call double @llvm.vector.reduce.fadd.f64.v4f64(double -0.0, <4 x double> %bin.rdx)567 ret double %r568}569 570; Added at least one test where the start value is not -0.0.571define float @add_S_init_42(<4 x float> %bin.rdx) {572; CHECK-LABEL: add_S_init_42:573; CHECK: // %bb.0:574; CHECK-NEXT: mov w8, #1109917696 // =0x42280000575; CHECK-NEXT: mov s2, v0.s[1]576; CHECK-NEXT: mov s3, v0.s[2]577; CHECK-NEXT: fmov s1, w8578; CHECK-NEXT: fadd s1, s0, s1579; CHECK-NEXT: mov s0, v0.s[3]580; CHECK-NEXT: fadd s1, s1, s2581; CHECK-NEXT: fadd s1, s1, s3582; CHECK-NEXT: fadd s0, s1, s0583; CHECK-NEXT: ret584 %r = call float @llvm.vector.reduce.fadd.f32.v4f32(float 42.0, <4 x float> %bin.rdx)585 ret float %r586}587 588; Function Attrs: nounwind readnone589declare half @llvm.vector.reduce.fadd.f16.v4f16(half, <4 x half>)590declare half @llvm.vector.reduce.fadd.f16.v8f16(half, <8 x half>)591declare half @llvm.vector.reduce.fadd.f16.v16f16(half, <16 x half>)592declare float @llvm.vector.reduce.fadd.f32.v2f32(float, <2 x float>)593declare float @llvm.vector.reduce.fadd.f32.v4f32(float, <4 x float>)594declare float @llvm.vector.reduce.fadd.f32.v8f32(float, <8 x float>)595declare double @llvm.vector.reduce.fadd.f64.v2f64(double, <2 x double>)596declare double @llvm.vector.reduce.fadd.f64.v4f64(double, <4 x double>)597