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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NOFP --check-prefix=CHECK-NOFP-SD3; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon,+fullfp16 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FP --check-prefix=CHECK-FP-SD4; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NOFP --check-prefix=CHECK-NOFP-GI5; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon,+fullfp16 -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FP --check-prefix=CHECK-FP-GI6 7; CHECK-NOFP-GI: warning: Instruction selection used fallback path for test_v11f168;9; CHECK-FP-GI: warning: Instruction selection used fallback path for test_v11f1610 11declare half @llvm.vector.reduce.fminimum.v1f16(<1 x half> %a)12declare float @llvm.vector.reduce.fminimum.v1f32(<1 x float> %a)13declare double @llvm.vector.reduce.fminimum.v1f64(<1 x double> %a)14declare fp128 @llvm.vector.reduce.fminimum.v1f128(<1 x fp128> %a)15 16declare half @llvm.vector.reduce.fminimum.v4f16(<4 x half> %a)17declare half @llvm.vector.reduce.fminimum.v8f16(<8 x half> %a)18declare half @llvm.vector.reduce.fminimum.v16f16(<16 x half> %a)19declare float @llvm.vector.reduce.fminimum.v2f32(<2 x float> %a)20declare float @llvm.vector.reduce.fminimum.v4f32(<4 x float> %a)21declare float @llvm.vector.reduce.fminimum.v8f32(<8 x float> %a)22declare float @llvm.vector.reduce.fminimum.v16f32(<16 x float> %a)23declare double @llvm.vector.reduce.fminimum.v2f64(<2 x double> %a)24declare double @llvm.vector.reduce.fminimum.v4f64(<4 x double> %a)25 26declare half @llvm.vector.reduce.fminimum.v11f16(<11 x half> %a)27declare float @llvm.vector.reduce.fminimum.v3f32(<3 x float> %a)28declare fp128 @llvm.vector.reduce.fminimum.v2f128(<2 x fp128> %a)29 30define half @test_v1f16(<1 x half> %a) nounwind {31; CHECK-LABEL: test_v1f16:32; CHECK: // %bb.0:33; CHECK-NEXT: ret34 %b = call half @llvm.vector.reduce.fminimum.v1f16(<1 x half> %a)35 ret half %b36}37 38define float @test_v1f32(<1 x float> %a) nounwind {39; CHECK-NOFP-SD-LABEL: test_v1f32:40; CHECK-NOFP-SD: // %bb.0:41; CHECK-NOFP-SD-NEXT: // kill: def $d0 killed $d0 def $q042; CHECK-NOFP-SD-NEXT: // kill: def $s0 killed $s0 killed $q043; CHECK-NOFP-SD-NEXT: ret44;45; CHECK-FP-SD-LABEL: test_v1f32:46; CHECK-FP-SD: // %bb.0:47; CHECK-FP-SD-NEXT: // kill: def $d0 killed $d0 def $q048; CHECK-FP-SD-NEXT: // kill: def $s0 killed $s0 killed $q049; CHECK-FP-SD-NEXT: ret50;51; CHECK-NOFP-GI-LABEL: test_v1f32:52; CHECK-NOFP-GI: // %bb.0:53; CHECK-NOFP-GI-NEXT: // kill: def $s0 killed $s0 killed $d054; CHECK-NOFP-GI-NEXT: ret55;56; CHECK-FP-GI-LABEL: test_v1f32:57; CHECK-FP-GI: // %bb.0:58; CHECK-FP-GI-NEXT: // kill: def $s0 killed $s0 killed $d059; CHECK-FP-GI-NEXT: ret60 %b = call float @llvm.vector.reduce.fminimum.v1f32(<1 x float> %a)61 ret float %b62}63 64define double @test_v1f64(<1 x double> %a) nounwind {65; CHECK-LABEL: test_v1f64:66; CHECK: // %bb.0:67; CHECK-NEXT: ret68 %b = call double @llvm.vector.reduce.fminimum.v1f64(<1 x double> %a)69 ret double %b70}71 72define fp128 @test_v1f128(<1 x fp128> %a) nounwind {73; CHECK-LABEL: test_v1f128:74; CHECK: // %bb.0:75; CHECK-NEXT: ret76 %b = call fp128 @llvm.vector.reduce.fminimum.v1f128(<1 x fp128> %a)77 ret fp128 %b78}79 80define half @test_v4f16(<4 x half> %a) nounwind {81; CHECK-NOFP-SD-LABEL: test_v4f16:82; CHECK-NOFP-SD: // %bb.0:83; CHECK-NOFP-SD-NEXT: // kill: def $d0 killed $d0 def $q084; CHECK-NOFP-SD-NEXT: mov h1, v0.h[1]85; CHECK-NOFP-SD-NEXT: fcvt s2, h086; CHECK-NOFP-SD-NEXT: fcvt s1, h187; CHECK-NOFP-SD-NEXT: fmin s1, s2, s188; CHECK-NOFP-SD-NEXT: mov h2, v0.h[2]89; CHECK-NOFP-SD-NEXT: mov h0, v0.h[3]90; CHECK-NOFP-SD-NEXT: fcvt h1, s191; CHECK-NOFP-SD-NEXT: fcvt s2, h292; CHECK-NOFP-SD-NEXT: fcvt s0, h093; CHECK-NOFP-SD-NEXT: fcvt s1, h194; CHECK-NOFP-SD-NEXT: fmin s1, s1, s295; CHECK-NOFP-SD-NEXT: fcvt h1, s196; CHECK-NOFP-SD-NEXT: fcvt s1, h197; CHECK-NOFP-SD-NEXT: fmin s0, s1, s098; CHECK-NOFP-SD-NEXT: fcvt h0, s099; CHECK-NOFP-SD-NEXT: ret100;101; CHECK-FP-LABEL: test_v4f16:102; CHECK-FP: // %bb.0:103; CHECK-FP-NEXT: fminv h0, v0.4h104; CHECK-FP-NEXT: ret105;106; CHECK-NOFP-GI-LABEL: test_v4f16:107; CHECK-NOFP-GI: // %bb.0:108; CHECK-NOFP-GI-NEXT: fcvtl v0.4s, v0.4h109; CHECK-NOFP-GI-NEXT: fminv s0, v0.4s110; CHECK-NOFP-GI-NEXT: fcvt h0, s0111; CHECK-NOFP-GI-NEXT: ret112 %b = call half @llvm.vector.reduce.fminimum.v4f16(<4 x half> %a)113 ret half %b114}115 116define half @test_v8f16(<8 x half> %a) nounwind {117; CHECK-NOFP-SD-LABEL: test_v8f16:118; CHECK-NOFP-SD: // %bb.0:119; CHECK-NOFP-SD-NEXT: mov h1, v0.h[1]120; CHECK-NOFP-SD-NEXT: fcvt s2, h0121; CHECK-NOFP-SD-NEXT: fcvt s1, h1122; CHECK-NOFP-SD-NEXT: fmin s1, s2, s1123; CHECK-NOFP-SD-NEXT: mov h2, v0.h[2]124; CHECK-NOFP-SD-NEXT: fcvt h1, s1125; CHECK-NOFP-SD-NEXT: fcvt s2, h2126; CHECK-NOFP-SD-NEXT: fcvt s1, h1127; CHECK-NOFP-SD-NEXT: fmin s1, s1, s2128; CHECK-NOFP-SD-NEXT: mov h2, v0.h[3]129; CHECK-NOFP-SD-NEXT: fcvt h1, s1130; CHECK-NOFP-SD-NEXT: fcvt s2, h2131; CHECK-NOFP-SD-NEXT: fcvt s1, h1132; CHECK-NOFP-SD-NEXT: fmin s1, s1, s2133; CHECK-NOFP-SD-NEXT: mov h2, v0.h[4]134; CHECK-NOFP-SD-NEXT: fcvt h1, s1135; CHECK-NOFP-SD-NEXT: fcvt s2, h2136; CHECK-NOFP-SD-NEXT: fcvt s1, h1137; CHECK-NOFP-SD-NEXT: fmin s1, s1, s2138; CHECK-NOFP-SD-NEXT: mov h2, v0.h[5]139; CHECK-NOFP-SD-NEXT: fcvt h1, s1140; CHECK-NOFP-SD-NEXT: fcvt s2, h2141; CHECK-NOFP-SD-NEXT: fcvt s1, h1142; CHECK-NOFP-SD-NEXT: fmin s1, s1, s2143; CHECK-NOFP-SD-NEXT: mov h2, v0.h[6]144; CHECK-NOFP-SD-NEXT: mov h0, v0.h[7]145; CHECK-NOFP-SD-NEXT: fcvt h1, s1146; CHECK-NOFP-SD-NEXT: fcvt s2, h2147; CHECK-NOFP-SD-NEXT: fcvt s0, h0148; CHECK-NOFP-SD-NEXT: fcvt s1, h1149; CHECK-NOFP-SD-NEXT: fmin s1, s1, s2150; CHECK-NOFP-SD-NEXT: fcvt h1, s1151; CHECK-NOFP-SD-NEXT: fcvt s1, h1152; CHECK-NOFP-SD-NEXT: fmin s0, s1, s0153; CHECK-NOFP-SD-NEXT: fcvt h0, s0154; CHECK-NOFP-SD-NEXT: ret155;156; CHECK-FP-LABEL: test_v8f16:157; CHECK-FP: // %bb.0:158; CHECK-FP-NEXT: fminv h0, v0.8h159; CHECK-FP-NEXT: ret160;161; CHECK-NOFP-GI-LABEL: test_v8f16:162; CHECK-NOFP-GI: // %bb.0:163; CHECK-NOFP-GI-NEXT: fcvtl v1.4s, v0.4h164; CHECK-NOFP-GI-NEXT: fcvtl2 v0.4s, v0.8h165; CHECK-NOFP-GI-NEXT: fmin v0.4s, v1.4s, v0.4s166; CHECK-NOFP-GI-NEXT: fminv s0, v0.4s167; CHECK-NOFP-GI-NEXT: fcvt h0, s0168; CHECK-NOFP-GI-NEXT: ret169 %b = call nnan half @llvm.vector.reduce.fminimum.v8f16(<8 x half> %a)170 ret half %b171}172 173define half @test_v16f16(<16 x half> %a) nounwind {174; CHECK-NOFP-SD-LABEL: test_v16f16:175; CHECK-NOFP-SD: // %bb.0:176; CHECK-NOFP-SD-NEXT: mov h2, v1.h[1]177; CHECK-NOFP-SD-NEXT: mov h3, v0.h[1]178; CHECK-NOFP-SD-NEXT: fcvt s4, h1179; CHECK-NOFP-SD-NEXT: fcvt s5, h0180; CHECK-NOFP-SD-NEXT: fcvt s2, h2181; CHECK-NOFP-SD-NEXT: fcvt s3, h3182; CHECK-NOFP-SD-NEXT: fmin s4, s5, s4183; CHECK-NOFP-SD-NEXT: mov h5, v0.h[2]184; CHECK-NOFP-SD-NEXT: fmin s2, s3, s2185; CHECK-NOFP-SD-NEXT: mov h3, v1.h[2]186; CHECK-NOFP-SD-NEXT: fcvt h4, s4187; CHECK-NOFP-SD-NEXT: fcvt s5, h5188; CHECK-NOFP-SD-NEXT: fcvt h2, s2189; CHECK-NOFP-SD-NEXT: fcvt s3, h3190; CHECK-NOFP-SD-NEXT: fcvt s4, h4191; CHECK-NOFP-SD-NEXT: fcvt s2, h2192; CHECK-NOFP-SD-NEXT: fmin s3, s5, s3193; CHECK-NOFP-SD-NEXT: mov h5, v0.h[3]194; CHECK-NOFP-SD-NEXT: fmin s2, s4, s2195; CHECK-NOFP-SD-NEXT: mov h4, v1.h[3]196; CHECK-NOFP-SD-NEXT: fcvt h3, s3197; CHECK-NOFP-SD-NEXT: fcvt s5, h5198; CHECK-NOFP-SD-NEXT: fcvt h2, s2199; CHECK-NOFP-SD-NEXT: fcvt s4, h4200; CHECK-NOFP-SD-NEXT: fcvt s3, h3201; CHECK-NOFP-SD-NEXT: fcvt s2, h2202; CHECK-NOFP-SD-NEXT: fmin s4, s5, s4203; CHECK-NOFP-SD-NEXT: mov h5, v0.h[4]204; CHECK-NOFP-SD-NEXT: fmin s2, s2, s3205; CHECK-NOFP-SD-NEXT: mov h3, v1.h[4]206; CHECK-NOFP-SD-NEXT: fcvt h4, s4207; CHECK-NOFP-SD-NEXT: fcvt s5, h5208; CHECK-NOFP-SD-NEXT: fcvt h2, s2209; CHECK-NOFP-SD-NEXT: fcvt s3, h3210; CHECK-NOFP-SD-NEXT: fcvt s4, h4211; CHECK-NOFP-SD-NEXT: fcvt s2, h2212; CHECK-NOFP-SD-NEXT: fmin s3, s5, s3213; CHECK-NOFP-SD-NEXT: mov h5, v0.h[5]214; CHECK-NOFP-SD-NEXT: fmin s2, s2, s4215; CHECK-NOFP-SD-NEXT: mov h4, v1.h[5]216; CHECK-NOFP-SD-NEXT: fcvt h3, s3217; CHECK-NOFP-SD-NEXT: fcvt s5, h5218; CHECK-NOFP-SD-NEXT: fcvt h2, s2219; CHECK-NOFP-SD-NEXT: fcvt s4, h4220; CHECK-NOFP-SD-NEXT: fcvt s3, h3221; CHECK-NOFP-SD-NEXT: fcvt s2, h2222; CHECK-NOFP-SD-NEXT: fmin s4, s5, s4223; CHECK-NOFP-SD-NEXT: mov h5, v0.h[6]224; CHECK-NOFP-SD-NEXT: mov h0, v0.h[7]225; CHECK-NOFP-SD-NEXT: fmin s2, s2, s3226; CHECK-NOFP-SD-NEXT: fcvt h3, s4227; CHECK-NOFP-SD-NEXT: mov h4, v1.h[6]228; CHECK-NOFP-SD-NEXT: fcvt s5, h5229; CHECK-NOFP-SD-NEXT: mov h1, v1.h[7]230; CHECK-NOFP-SD-NEXT: fcvt s0, h0231; CHECK-NOFP-SD-NEXT: fcvt h2, s2232; CHECK-NOFP-SD-NEXT: fcvt s3, h3233; CHECK-NOFP-SD-NEXT: fcvt s4, h4234; CHECK-NOFP-SD-NEXT: fcvt s1, h1235; CHECK-NOFP-SD-NEXT: fcvt s2, h2236; CHECK-NOFP-SD-NEXT: fmin s0, s0, s1237; CHECK-NOFP-SD-NEXT: fmin s2, s2, s3238; CHECK-NOFP-SD-NEXT: fmin s3, s5, s4239; CHECK-NOFP-SD-NEXT: fcvt h0, s0240; CHECK-NOFP-SD-NEXT: fcvt h2, s2241; CHECK-NOFP-SD-NEXT: fcvt h3, s3242; CHECK-NOFP-SD-NEXT: fcvt s0, h0243; CHECK-NOFP-SD-NEXT: fcvt s2, h2244; CHECK-NOFP-SD-NEXT: fcvt s3, h3245; CHECK-NOFP-SD-NEXT: fmin s2, s2, s3246; CHECK-NOFP-SD-NEXT: fcvt h1, s2247; CHECK-NOFP-SD-NEXT: fcvt s1, h1248; CHECK-NOFP-SD-NEXT: fmin s0, s1, s0249; CHECK-NOFP-SD-NEXT: fcvt h0, s0250; CHECK-NOFP-SD-NEXT: ret251;252; CHECK-FP-LABEL: test_v16f16:253; CHECK-FP: // %bb.0:254; CHECK-FP-NEXT: fmin v0.8h, v0.8h, v1.8h255; CHECK-FP-NEXT: fminv h0, v0.8h256; CHECK-FP-NEXT: ret257;258; CHECK-NOFP-GI-LABEL: test_v16f16:259; CHECK-NOFP-GI: // %bb.0:260; CHECK-NOFP-GI-NEXT: fcvtl v2.4s, v0.4h261; CHECK-NOFP-GI-NEXT: fcvtl2 v0.4s, v0.8h262; CHECK-NOFP-GI-NEXT: fcvtl v3.4s, v1.4h263; CHECK-NOFP-GI-NEXT: fcvtl2 v1.4s, v1.8h264; CHECK-NOFP-GI-NEXT: fmin v0.4s, v2.4s, v0.4s265; CHECK-NOFP-GI-NEXT: fmin v1.4s, v3.4s, v1.4s266; CHECK-NOFP-GI-NEXT: fmin v0.4s, v0.4s, v1.4s267; CHECK-NOFP-GI-NEXT: fminv s0, v0.4s268; CHECK-NOFP-GI-NEXT: fcvt h0, s0269; CHECK-NOFP-GI-NEXT: ret270 %b = call nnan half @llvm.vector.reduce.fminimum.v16f16(<16 x half> %a)271 ret half %b272}273 274define float @test_v2f32(<2 x float> %a) nounwind {275; CHECK-LABEL: test_v2f32:276; CHECK: // %bb.0:277; CHECK-NEXT: fminp s0, v0.2s278; CHECK-NEXT: ret279 %b = call nnan float @llvm.vector.reduce.fminimum.v2f32(<2 x float> %a)280 ret float %b281}282 283define float @test_v4f32(<4 x float> %a) nounwind {284; CHECK-LABEL: test_v4f32:285; CHECK: // %bb.0:286; CHECK-NEXT: fminv s0, v0.4s287; CHECK-NEXT: ret288 %b = call nnan float @llvm.vector.reduce.fminimum.v4f32(<4 x float> %a)289 ret float %b290}291 292define float @test_v8f32(<8 x float> %a) nounwind {293; CHECK-LABEL: test_v8f32:294; CHECK: // %bb.0:295; CHECK-NEXT: fmin v0.4s, v0.4s, v1.4s296; CHECK-NEXT: fminv s0, v0.4s297; CHECK-NEXT: ret298 %b = call nnan float @llvm.vector.reduce.fminimum.v8f32(<8 x float> %a)299 ret float %b300}301 302define float @test_v16f32(<16 x float> %a) nounwind {303; CHECK-NOFP-SD-LABEL: test_v16f32:304; CHECK-NOFP-SD: // %bb.0:305; CHECK-NOFP-SD-NEXT: fmin v1.4s, v1.4s, v3.4s306; CHECK-NOFP-SD-NEXT: fmin v0.4s, v0.4s, v2.4s307; CHECK-NOFP-SD-NEXT: fmin v0.4s, v0.4s, v1.4s308; CHECK-NOFP-SD-NEXT: fminv s0, v0.4s309; CHECK-NOFP-SD-NEXT: ret310;311; CHECK-FP-SD-LABEL: test_v16f32:312; CHECK-FP-SD: // %bb.0:313; CHECK-FP-SD-NEXT: fmin v1.4s, v1.4s, v3.4s314; CHECK-FP-SD-NEXT: fmin v0.4s, v0.4s, v2.4s315; CHECK-FP-SD-NEXT: fmin v0.4s, v0.4s, v1.4s316; CHECK-FP-SD-NEXT: fminv s0, v0.4s317; CHECK-FP-SD-NEXT: ret318;319; CHECK-NOFP-GI-LABEL: test_v16f32:320; CHECK-NOFP-GI: // %bb.0:321; CHECK-NOFP-GI-NEXT: fmin v0.4s, v0.4s, v1.4s322; CHECK-NOFP-GI-NEXT: fmin v1.4s, v2.4s, v3.4s323; CHECK-NOFP-GI-NEXT: fmin v0.4s, v0.4s, v1.4s324; CHECK-NOFP-GI-NEXT: fminv s0, v0.4s325; CHECK-NOFP-GI-NEXT: ret326;327; CHECK-FP-GI-LABEL: test_v16f32:328; CHECK-FP-GI: // %bb.0:329; CHECK-FP-GI-NEXT: fmin v0.4s, v0.4s, v1.4s330; CHECK-FP-GI-NEXT: fmin v1.4s, v2.4s, v3.4s331; CHECK-FP-GI-NEXT: fmin v0.4s, v0.4s, v1.4s332; CHECK-FP-GI-NEXT: fminv s0, v0.4s333; CHECK-FP-GI-NEXT: ret334 %b = call nnan float @llvm.vector.reduce.fminimum.v16f32(<16 x float> %a)335 ret float %b336}337 338define double @test_v2f64(<2 x double> %a) nounwind {339; CHECK-LABEL: test_v2f64:340; CHECK: // %bb.0:341; CHECK-NEXT: fminp d0, v0.2d342; CHECK-NEXT: ret343 %b = call double @llvm.vector.reduce.fminimum.v2f64(<2 x double> %a)344 ret double %b345}346 347define double @test_v4f64(<4 x double> %a) nounwind {348; CHECK-LABEL: test_v4f64:349; CHECK: // %bb.0:350; CHECK-NEXT: fmin v0.2d, v0.2d, v1.2d351; CHECK-NEXT: fminp d0, v0.2d352; CHECK-NEXT: ret353 %b = call double @llvm.vector.reduce.fminimum.v4f64(<4 x double> %a)354 ret double %b355}356 357define half @test_v11f16(<11 x half> %a) nounwind {358; CHECK-NOFP-LABEL: test_v11f16:359; CHECK-NOFP: // %bb.0:360; CHECK-NOFP-NEXT: ldr h16, [sp, #8]361; CHECK-NOFP-NEXT: ldr h17, [sp]362; CHECK-NOFP-NEXT: fcvt s1, h1363; CHECK-NOFP-NEXT: fcvt s0, h0364; CHECK-NOFP-NEXT: fcvt s2, h2365; CHECK-NOFP-NEXT: fcvt s16, h16366; CHECK-NOFP-NEXT: fcvt s17, h17367; CHECK-NOFP-NEXT: fmin s1, s1, s16368; CHECK-NOFP-NEXT: fmin s0, s0, s17369; CHECK-NOFP-NEXT: ldr h16, [sp, #16]370; CHECK-NOFP-NEXT: fcvt s16, h16371; CHECK-NOFP-NEXT: fcvt h1, s1372; CHECK-NOFP-NEXT: fcvt h0, s0373; CHECK-NOFP-NEXT: fcvt s1, h1374; CHECK-NOFP-NEXT: fcvt s0, h0375; CHECK-NOFP-NEXT: fmin s0, s0, s1376; CHECK-NOFP-NEXT: fmin s1, s2, s16377; CHECK-NOFP-NEXT: fcvt h0, s0378; CHECK-NOFP-NEXT: fcvt h1, s1379; CHECK-NOFP-NEXT: fcvt s0, h0380; CHECK-NOFP-NEXT: fcvt s1, h1381; CHECK-NOFP-NEXT: fmin s0, s0, s1382; CHECK-NOFP-NEXT: fcvt s1, h3383; CHECK-NOFP-NEXT: fcvt h0, s0384; CHECK-NOFP-NEXT: fcvt s0, h0385; CHECK-NOFP-NEXT: fmin s0, s0, s1386; CHECK-NOFP-NEXT: fcvt s1, h4387; CHECK-NOFP-NEXT: fcvt h0, s0388; CHECK-NOFP-NEXT: fcvt s0, h0389; CHECK-NOFP-NEXT: fmin s0, s0, s1390; CHECK-NOFP-NEXT: fcvt s1, h5391; CHECK-NOFP-NEXT: fcvt h0, s0392; CHECK-NOFP-NEXT: fcvt s0, h0393; CHECK-NOFP-NEXT: fmin s0, s0, s1394; CHECK-NOFP-NEXT: fcvt s1, h6395; CHECK-NOFP-NEXT: fcvt h0, s0396; CHECK-NOFP-NEXT: fcvt s0, h0397; CHECK-NOFP-NEXT: fmin s0, s0, s1398; CHECK-NOFP-NEXT: fcvt s1, h7399; CHECK-NOFP-NEXT: fcvt h0, s0400; CHECK-NOFP-NEXT: fcvt s0, h0401; CHECK-NOFP-NEXT: fmin s0, s0, s1402; CHECK-NOFP-NEXT: fcvt h0, s0403; CHECK-NOFP-NEXT: ret404;405; CHECK-FP-LABEL: test_v11f16:406; CHECK-FP: // %bb.0:407; CHECK-FP-NEXT: // kill: def $h0 killed $h0 def $q0408; CHECK-FP-NEXT: // kill: def $h1 killed $h1 def $q1409; CHECK-FP-NEXT: // kill: def $h2 killed $h2 def $q2410; CHECK-FP-NEXT: // kill: def $h3 killed $h3 def $q3411; CHECK-FP-NEXT: // kill: def $h4 killed $h4 def $q4412; CHECK-FP-NEXT: // kill: def $h5 killed $h5 def $q5413; CHECK-FP-NEXT: mov x8, sp414; CHECK-FP-NEXT: // kill: def $h6 killed $h6 def $q6415; CHECK-FP-NEXT: // kill: def $h7 killed $h7 def $q7416; CHECK-FP-NEXT: mov v0.h[1], v1.h[0]417; CHECK-FP-NEXT: movi v1.8h, #124, lsl #8418; CHECK-FP-NEXT: mov v0.h[2], v2.h[0]419; CHECK-FP-NEXT: ld1 { v1.h }[0], [x8]420; CHECK-FP-NEXT: add x8, sp, #8421; CHECK-FP-NEXT: ld1 { v1.h }[1], [x8]422; CHECK-FP-NEXT: add x8, sp, #16423; CHECK-FP-NEXT: mov v0.h[3], v3.h[0]424; CHECK-FP-NEXT: ld1 { v1.h }[2], [x8]425; CHECK-FP-NEXT: mov v0.h[4], v4.h[0]426; CHECK-FP-NEXT: mov v0.h[5], v5.h[0]427; CHECK-FP-NEXT: mov v0.h[6], v6.h[0]428; CHECK-FP-NEXT: mov v0.h[7], v7.h[0]429; CHECK-FP-NEXT: fmin v0.8h, v0.8h, v1.8h430; CHECK-FP-NEXT: fminv h0, v0.8h431; CHECK-FP-NEXT: ret432 %b = call half @llvm.vector.reduce.fminimum.v11f16(<11 x half> %a)433 ret half %b434}435 436; Neutral element is negative infinity which is chosen for padding the widened437; vector.438define float @test_v3f32(<3 x float> %a) nounwind {439; CHECK-NOFP-SD-LABEL: test_v3f32:440; CHECK-NOFP-SD: // %bb.0:441; CHECK-NOFP-SD-NEXT: mov w8, #2139095040 // =0x7f800000442; CHECK-NOFP-SD-NEXT: fmov s1, w8443; CHECK-NOFP-SD-NEXT: mov v0.s[3], v1.s[0]444; CHECK-NOFP-SD-NEXT: fminv s0, v0.4s445; CHECK-NOFP-SD-NEXT: ret446;447; CHECK-FP-SD-LABEL: test_v3f32:448; CHECK-FP-SD: // %bb.0:449; CHECK-FP-SD-NEXT: mov w8, #2139095040 // =0x7f800000450; CHECK-FP-SD-NEXT: fmov s1, w8451; CHECK-FP-SD-NEXT: mov v0.s[3], v1.s[0]452; CHECK-FP-SD-NEXT: fminv s0, v0.4s453; CHECK-FP-SD-NEXT: ret454;455; CHECK-NOFP-GI-LABEL: test_v3f32:456; CHECK-NOFP-GI: // %bb.0:457; CHECK-NOFP-GI-NEXT: mov s1, v0.s[1]458; CHECK-NOFP-GI-NEXT: mov s2, v0.s[2]459; CHECK-NOFP-GI-NEXT: fmin s0, s0, s1460; CHECK-NOFP-GI-NEXT: fmin s0, s0, s2461; CHECK-NOFP-GI-NEXT: ret462;463; CHECK-FP-GI-LABEL: test_v3f32:464; CHECK-FP-GI: // %bb.0:465; CHECK-FP-GI-NEXT: mov s1, v0.s[1]466; CHECK-FP-GI-NEXT: mov s2, v0.s[2]467; CHECK-FP-GI-NEXT: fmin s0, s0, s1468; CHECK-FP-GI-NEXT: fmin s0, s0, s2469; CHECK-FP-GI-NEXT: ret470 %b = call float @llvm.vector.reduce.fminimum.v3f32(<3 x float> %a)471 ret float %b472}473 474; Neutral element chosen for padding the widened vector is not negative infinity.475define float @test_v3f32_ninf(<3 x float> %a) nounwind {476; CHECK-NOFP-SD-LABEL: test_v3f32_ninf:477; CHECK-NOFP-SD: // %bb.0:478; CHECK-NOFP-SD-NEXT: mov w8, #2139095039 // =0x7f7fffff479; CHECK-NOFP-SD-NEXT: fmov s1, w8480; CHECK-NOFP-SD-NEXT: mov v0.s[3], v1.s[0]481; CHECK-NOFP-SD-NEXT: fminv s0, v0.4s482; CHECK-NOFP-SD-NEXT: ret483;484; CHECK-FP-SD-LABEL: test_v3f32_ninf:485; CHECK-FP-SD: // %bb.0:486; CHECK-FP-SD-NEXT: mov w8, #2139095039 // =0x7f7fffff487; CHECK-FP-SD-NEXT: fmov s1, w8488; CHECK-FP-SD-NEXT: mov v0.s[3], v1.s[0]489; CHECK-FP-SD-NEXT: fminv s0, v0.4s490; CHECK-FP-SD-NEXT: ret491;492; CHECK-NOFP-GI-LABEL: test_v3f32_ninf:493; CHECK-NOFP-GI: // %bb.0:494; CHECK-NOFP-GI-NEXT: mov s1, v0.s[1]495; CHECK-NOFP-GI-NEXT: mov s2, v0.s[2]496; CHECK-NOFP-GI-NEXT: fmin s0, s0, s1497; CHECK-NOFP-GI-NEXT: fmin s0, s0, s2498; CHECK-NOFP-GI-NEXT: ret499;500; CHECK-FP-GI-LABEL: test_v3f32_ninf:501; CHECK-FP-GI: // %bb.0:502; CHECK-FP-GI-NEXT: mov s1, v0.s[1]503; CHECK-FP-GI-NEXT: mov s2, v0.s[2]504; CHECK-FP-GI-NEXT: fmin s0, s0, s1505; CHECK-FP-GI-NEXT: fmin s0, s0, s2506; CHECK-FP-GI-NEXT: ret507 %b = call ninf float @llvm.vector.reduce.fminimum.v3f32(<3 x float> %a)508 ret float %b509}510 511; Cannot legalize f128. See PR63267 - The underlying fminimum has no default512; expansion and no libcalls.513;define fp128 @test_v2f128(<2 x fp128> %a) nounwind {514; %b = call fp128 @llvm.vector.reduce.fminimum.v2f128(<2 x fp128> %a)515; ret fp128 %b516;}517