3553 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-unknown- | FileCheck %s3 4define <16 x i8> @ugt_1_v16i8(<16 x i8> %0) {5; CHECK-LABEL: ugt_1_v16i8:6; CHECK: // %bb.0:7; CHECK-NEXT: movi v1.16b, #18; CHECK-NEXT: cnt v0.16b, v0.16b9; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b10; CHECK-NEXT: ret11 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)12 %3 = icmp ugt <16 x i8> %2, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>13 %4 = sext <16 x i1> %3 to <16 x i8>14 ret <16 x i8> %415}16 17define <16 x i8> @ult_2_v16i8(<16 x i8> %0) {18; CHECK-LABEL: ult_2_v16i8:19; CHECK: // %bb.0:20; CHECK-NEXT: movi v1.16b, #221; CHECK-NEXT: cnt v0.16b, v0.16b22; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b23; CHECK-NEXT: ret24 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)25 %3 = icmp ult <16 x i8> %2, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>26 %4 = sext <16 x i1> %3 to <16 x i8>27 ret <16 x i8> %428}29 30define <16 x i8> @ugt_2_v16i8(<16 x i8> %0) {31; CHECK-LABEL: ugt_2_v16i8:32; CHECK: // %bb.0:33; CHECK-NEXT: movi v1.16b, #234; CHECK-NEXT: cnt v0.16b, v0.16b35; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b36; CHECK-NEXT: ret37 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)38 %3 = icmp ugt <16 x i8> %2, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>39 %4 = sext <16 x i1> %3 to <16 x i8>40 ret <16 x i8> %441}42 43define <16 x i8> @ult_3_v16i8(<16 x i8> %0) {44; CHECK-LABEL: ult_3_v16i8:45; CHECK: // %bb.0:46; CHECK-NEXT: movi v1.16b, #347; CHECK-NEXT: cnt v0.16b, v0.16b48; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b49; CHECK-NEXT: ret50 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)51 %3 = icmp ult <16 x i8> %2, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>52 %4 = sext <16 x i1> %3 to <16 x i8>53 ret <16 x i8> %454}55 56define <16 x i8> @ugt_3_v16i8(<16 x i8> %0) {57; CHECK-LABEL: ugt_3_v16i8:58; CHECK: // %bb.0:59; CHECK-NEXT: movi v1.16b, #360; CHECK-NEXT: cnt v0.16b, v0.16b61; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b62; CHECK-NEXT: ret63 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)64 %3 = icmp ugt <16 x i8> %2, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>65 %4 = sext <16 x i1> %3 to <16 x i8>66 ret <16 x i8> %467}68 69define <16 x i8> @ult_4_v16i8(<16 x i8> %0) {70; CHECK-LABEL: ult_4_v16i8:71; CHECK: // %bb.0:72; CHECK-NEXT: movi v1.16b, #473; CHECK-NEXT: cnt v0.16b, v0.16b74; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b75; CHECK-NEXT: ret76 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)77 %3 = icmp ult <16 x i8> %2, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>78 %4 = sext <16 x i1> %3 to <16 x i8>79 ret <16 x i8> %480}81 82define <16 x i8> @ugt_4_v16i8(<16 x i8> %0) {83; CHECK-LABEL: ugt_4_v16i8:84; CHECK: // %bb.0:85; CHECK-NEXT: movi v1.16b, #486; CHECK-NEXT: cnt v0.16b, v0.16b87; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b88; CHECK-NEXT: ret89 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)90 %3 = icmp ugt <16 x i8> %2, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>91 %4 = sext <16 x i1> %3 to <16 x i8>92 ret <16 x i8> %493}94 95define <16 x i8> @ult_5_v16i8(<16 x i8> %0) {96; CHECK-LABEL: ult_5_v16i8:97; CHECK: // %bb.0:98; CHECK-NEXT: movi v1.16b, #599; CHECK-NEXT: cnt v0.16b, v0.16b100; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b101; CHECK-NEXT: ret102 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)103 %3 = icmp ult <16 x i8> %2, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>104 %4 = sext <16 x i1> %3 to <16 x i8>105 ret <16 x i8> %4106}107 108define <16 x i8> @ugt_5_v16i8(<16 x i8> %0) {109; CHECK-LABEL: ugt_5_v16i8:110; CHECK: // %bb.0:111; CHECK-NEXT: movi v1.16b, #5112; CHECK-NEXT: cnt v0.16b, v0.16b113; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b114; CHECK-NEXT: ret115 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)116 %3 = icmp ugt <16 x i8> %2, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>117 %4 = sext <16 x i1> %3 to <16 x i8>118 ret <16 x i8> %4119}120 121define <16 x i8> @ult_6_v16i8(<16 x i8> %0) {122; CHECK-LABEL: ult_6_v16i8:123; CHECK: // %bb.0:124; CHECK-NEXT: movi v1.16b, #6125; CHECK-NEXT: cnt v0.16b, v0.16b126; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b127; CHECK-NEXT: ret128 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)129 %3 = icmp ult <16 x i8> %2, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>130 %4 = sext <16 x i1> %3 to <16 x i8>131 ret <16 x i8> %4132}133 134define <16 x i8> @ugt_6_v16i8(<16 x i8> %0) {135; CHECK-LABEL: ugt_6_v16i8:136; CHECK: // %bb.0:137; CHECK-NEXT: movi v1.16b, #6138; CHECK-NEXT: cnt v0.16b, v0.16b139; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b140; CHECK-NEXT: ret141 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)142 %3 = icmp ugt <16 x i8> %2, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>143 %4 = sext <16 x i1> %3 to <16 x i8>144 ret <16 x i8> %4145}146 147define <16 x i8> @ult_7_v16i8(<16 x i8> %0) {148; CHECK-LABEL: ult_7_v16i8:149; CHECK: // %bb.0:150; CHECK-NEXT: movi v1.16b, #7151; CHECK-NEXT: cnt v0.16b, v0.16b152; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b153; CHECK-NEXT: ret154 %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0)155 %3 = icmp ult <16 x i8> %2, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>156 %4 = sext <16 x i1> %3 to <16 x i8>157 ret <16 x i8> %4158}159 160define <8 x i16> @ugt_1_v8i16(<8 x i16> %0) {161; CHECK-LABEL: ugt_1_v8i16:162; CHECK: // %bb.0:163; CHECK-NEXT: movi v1.2d, #0xffffffffffffffff164; CHECK-NEXT: add v1.8h, v0.8h, v1.8h165; CHECK-NEXT: cmtst v0.8h, v0.8h, v1.8h166; CHECK-NEXT: ret167 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)168 %3 = icmp ugt <8 x i16> %2, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>169 %4 = sext <8 x i1> %3 to <8 x i16>170 ret <8 x i16> %4171}172 173define <8 x i16> @ult_2_v8i16(<8 x i16> %0) {174; CHECK-LABEL: ult_2_v8i16:175; CHECK: // %bb.0:176; CHECK-NEXT: movi v1.2d, #0xffffffffffffffff177; CHECK-NEXT: add v1.8h, v0.8h, v1.8h178; CHECK-NEXT: and v0.16b, v0.16b, v1.16b179; CHECK-NEXT: cmeq v0.8h, v0.8h, #0180; CHECK-NEXT: ret181 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)182 %3 = icmp ult <8 x i16> %2, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>183 %4 = sext <8 x i1> %3 to <8 x i16>184 ret <8 x i16> %4185}186 187define <8 x i16> @ugt_2_v8i16(<8 x i16> %0) {188; CHECK-LABEL: ugt_2_v8i16:189; CHECK: // %bb.0:190; CHECK-NEXT: cnt v0.16b, v0.16b191; CHECK-NEXT: movi v1.8h, #2192; CHECK-NEXT: uaddlp v0.8h, v0.16b193; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h194; CHECK-NEXT: ret195 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)196 %3 = icmp ugt <8 x i16> %2, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>197 %4 = sext <8 x i1> %3 to <8 x i16>198 ret <8 x i16> %4199}200 201define <8 x i16> @ult_3_v8i16(<8 x i16> %0) {202; CHECK-LABEL: ult_3_v8i16:203; CHECK: // %bb.0:204; CHECK-NEXT: cnt v0.16b, v0.16b205; CHECK-NEXT: movi v1.8h, #3206; CHECK-NEXT: uaddlp v0.8h, v0.16b207; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h208; CHECK-NEXT: ret209 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)210 %3 = icmp ult <8 x i16> %2, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>211 %4 = sext <8 x i1> %3 to <8 x i16>212 ret <8 x i16> %4213}214 215define <8 x i16> @ugt_3_v8i16(<8 x i16> %0) {216; CHECK-LABEL: ugt_3_v8i16:217; CHECK: // %bb.0:218; CHECK-NEXT: cnt v0.16b, v0.16b219; CHECK-NEXT: movi v1.8h, #3220; CHECK-NEXT: uaddlp v0.8h, v0.16b221; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h222; CHECK-NEXT: ret223 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)224 %3 = icmp ugt <8 x i16> %2, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>225 %4 = sext <8 x i1> %3 to <8 x i16>226 ret <8 x i16> %4227}228 229define <8 x i16> @ult_4_v8i16(<8 x i16> %0) {230; CHECK-LABEL: ult_4_v8i16:231; CHECK: // %bb.0:232; CHECK-NEXT: cnt v0.16b, v0.16b233; CHECK-NEXT: movi v1.8h, #4234; CHECK-NEXT: uaddlp v0.8h, v0.16b235; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h236; CHECK-NEXT: ret237 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)238 %3 = icmp ult <8 x i16> %2, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>239 %4 = sext <8 x i1> %3 to <8 x i16>240 ret <8 x i16> %4241}242 243define <8 x i16> @ugt_4_v8i16(<8 x i16> %0) {244; CHECK-LABEL: ugt_4_v8i16:245; CHECK: // %bb.0:246; CHECK-NEXT: cnt v0.16b, v0.16b247; CHECK-NEXT: movi v1.8h, #4248; CHECK-NEXT: uaddlp v0.8h, v0.16b249; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h250; CHECK-NEXT: ret251 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)252 %3 = icmp ugt <8 x i16> %2, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>253 %4 = sext <8 x i1> %3 to <8 x i16>254 ret <8 x i16> %4255}256 257define <8 x i16> @ult_5_v8i16(<8 x i16> %0) {258; CHECK-LABEL: ult_5_v8i16:259; CHECK: // %bb.0:260; CHECK-NEXT: cnt v0.16b, v0.16b261; CHECK-NEXT: movi v1.8h, #5262; CHECK-NEXT: uaddlp v0.8h, v0.16b263; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h264; CHECK-NEXT: ret265 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)266 %3 = icmp ult <8 x i16> %2, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>267 %4 = sext <8 x i1> %3 to <8 x i16>268 ret <8 x i16> %4269}270 271define <8 x i16> @ugt_5_v8i16(<8 x i16> %0) {272; CHECK-LABEL: ugt_5_v8i16:273; CHECK: // %bb.0:274; CHECK-NEXT: cnt v0.16b, v0.16b275; CHECK-NEXT: movi v1.8h, #5276; CHECK-NEXT: uaddlp v0.8h, v0.16b277; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h278; CHECK-NEXT: ret279 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)280 %3 = icmp ugt <8 x i16> %2, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>281 %4 = sext <8 x i1> %3 to <8 x i16>282 ret <8 x i16> %4283}284 285define <8 x i16> @ult_6_v8i16(<8 x i16> %0) {286; CHECK-LABEL: ult_6_v8i16:287; CHECK: // %bb.0:288; CHECK-NEXT: cnt v0.16b, v0.16b289; CHECK-NEXT: movi v1.8h, #6290; CHECK-NEXT: uaddlp v0.8h, v0.16b291; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h292; CHECK-NEXT: ret293 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)294 %3 = icmp ult <8 x i16> %2, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>295 %4 = sext <8 x i1> %3 to <8 x i16>296 ret <8 x i16> %4297}298 299define <8 x i16> @ugt_6_v8i16(<8 x i16> %0) {300; CHECK-LABEL: ugt_6_v8i16:301; CHECK: // %bb.0:302; CHECK-NEXT: cnt v0.16b, v0.16b303; CHECK-NEXT: movi v1.8h, #6304; CHECK-NEXT: uaddlp v0.8h, v0.16b305; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h306; CHECK-NEXT: ret307 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)308 %3 = icmp ugt <8 x i16> %2, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>309 %4 = sext <8 x i1> %3 to <8 x i16>310 ret <8 x i16> %4311}312 313define <8 x i16> @ult_7_v8i16(<8 x i16> %0) {314; CHECK-LABEL: ult_7_v8i16:315; CHECK: // %bb.0:316; CHECK-NEXT: cnt v0.16b, v0.16b317; CHECK-NEXT: movi v1.8h, #7318; CHECK-NEXT: uaddlp v0.8h, v0.16b319; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h320; CHECK-NEXT: ret321 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)322 %3 = icmp ult <8 x i16> %2, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>323 %4 = sext <8 x i1> %3 to <8 x i16>324 ret <8 x i16> %4325}326 327define <8 x i16> @ugt_7_v8i16(<8 x i16> %0) {328; CHECK-LABEL: ugt_7_v8i16:329; CHECK: // %bb.0:330; CHECK-NEXT: cnt v0.16b, v0.16b331; CHECK-NEXT: movi v1.8h, #7332; CHECK-NEXT: uaddlp v0.8h, v0.16b333; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h334; CHECK-NEXT: ret335 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)336 %3 = icmp ugt <8 x i16> %2, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>337 %4 = sext <8 x i1> %3 to <8 x i16>338 ret <8 x i16> %4339}340 341define <8 x i16> @ult_8_v8i16(<8 x i16> %0) {342; CHECK-LABEL: ult_8_v8i16:343; CHECK: // %bb.0:344; CHECK-NEXT: cnt v0.16b, v0.16b345; CHECK-NEXT: movi v1.8h, #8346; CHECK-NEXT: uaddlp v0.8h, v0.16b347; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h348; CHECK-NEXT: ret349 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)350 %3 = icmp ult <8 x i16> %2, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>351 %4 = sext <8 x i1> %3 to <8 x i16>352 ret <8 x i16> %4353}354 355define <8 x i16> @ugt_8_v8i16(<8 x i16> %0) {356; CHECK-LABEL: ugt_8_v8i16:357; CHECK: // %bb.0:358; CHECK-NEXT: cnt v0.16b, v0.16b359; CHECK-NEXT: movi v1.8h, #8360; CHECK-NEXT: uaddlp v0.8h, v0.16b361; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h362; CHECK-NEXT: ret363 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)364 %3 = icmp ugt <8 x i16> %2, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>365 %4 = sext <8 x i1> %3 to <8 x i16>366 ret <8 x i16> %4367}368 369define <8 x i16> @ult_9_v8i16(<8 x i16> %0) {370; CHECK-LABEL: ult_9_v8i16:371; CHECK: // %bb.0:372; CHECK-NEXT: cnt v0.16b, v0.16b373; CHECK-NEXT: movi v1.8h, #9374; CHECK-NEXT: uaddlp v0.8h, v0.16b375; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h376; CHECK-NEXT: ret377 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)378 %3 = icmp ult <8 x i16> %2, <i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9>379 %4 = sext <8 x i1> %3 to <8 x i16>380 ret <8 x i16> %4381}382 383define <8 x i16> @ugt_9_v8i16(<8 x i16> %0) {384; CHECK-LABEL: ugt_9_v8i16:385; CHECK: // %bb.0:386; CHECK-NEXT: cnt v0.16b, v0.16b387; CHECK-NEXT: movi v1.8h, #9388; CHECK-NEXT: uaddlp v0.8h, v0.16b389; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h390; CHECK-NEXT: ret391 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)392 %3 = icmp ugt <8 x i16> %2, <i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9>393 %4 = sext <8 x i1> %3 to <8 x i16>394 ret <8 x i16> %4395}396 397define <8 x i16> @ult_10_v8i16(<8 x i16> %0) {398; CHECK-LABEL: ult_10_v8i16:399; CHECK: // %bb.0:400; CHECK-NEXT: cnt v0.16b, v0.16b401; CHECK-NEXT: movi v1.8h, #10402; CHECK-NEXT: uaddlp v0.8h, v0.16b403; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h404; CHECK-NEXT: ret405 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)406 %3 = icmp ult <8 x i16> %2, <i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10>407 %4 = sext <8 x i1> %3 to <8 x i16>408 ret <8 x i16> %4409}410 411define <8 x i16> @ugt_10_v8i16(<8 x i16> %0) {412; CHECK-LABEL: ugt_10_v8i16:413; CHECK: // %bb.0:414; CHECK-NEXT: cnt v0.16b, v0.16b415; CHECK-NEXT: movi v1.8h, #10416; CHECK-NEXT: uaddlp v0.8h, v0.16b417; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h418; CHECK-NEXT: ret419 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)420 %3 = icmp ugt <8 x i16> %2, <i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10>421 %4 = sext <8 x i1> %3 to <8 x i16>422 ret <8 x i16> %4423}424 425define <8 x i16> @ult_11_v8i16(<8 x i16> %0) {426; CHECK-LABEL: ult_11_v8i16:427; CHECK: // %bb.0:428; CHECK-NEXT: cnt v0.16b, v0.16b429; CHECK-NEXT: movi v1.8h, #11430; CHECK-NEXT: uaddlp v0.8h, v0.16b431; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h432; CHECK-NEXT: ret433 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)434 %3 = icmp ult <8 x i16> %2, <i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11>435 %4 = sext <8 x i1> %3 to <8 x i16>436 ret <8 x i16> %4437}438 439define <8 x i16> @ugt_11_v8i16(<8 x i16> %0) {440; CHECK-LABEL: ugt_11_v8i16:441; CHECK: // %bb.0:442; CHECK-NEXT: cnt v0.16b, v0.16b443; CHECK-NEXT: movi v1.8h, #11444; CHECK-NEXT: uaddlp v0.8h, v0.16b445; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h446; CHECK-NEXT: ret447 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)448 %3 = icmp ugt <8 x i16> %2, <i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11>449 %4 = sext <8 x i1> %3 to <8 x i16>450 ret <8 x i16> %4451}452 453define <8 x i16> @ult_12_v8i16(<8 x i16> %0) {454; CHECK-LABEL: ult_12_v8i16:455; CHECK: // %bb.0:456; CHECK-NEXT: cnt v0.16b, v0.16b457; CHECK-NEXT: movi v1.8h, #12458; CHECK-NEXT: uaddlp v0.8h, v0.16b459; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h460; CHECK-NEXT: ret461 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)462 %3 = icmp ult <8 x i16> %2, <i16 12, i16 12, i16 12, i16 12, i16 12, i16 12, i16 12, i16 12>463 %4 = sext <8 x i1> %3 to <8 x i16>464 ret <8 x i16> %4465}466 467define <8 x i16> @ugt_12_v8i16(<8 x i16> %0) {468; CHECK-LABEL: ugt_12_v8i16:469; CHECK: // %bb.0:470; CHECK-NEXT: cnt v0.16b, v0.16b471; CHECK-NEXT: movi v1.8h, #12472; CHECK-NEXT: uaddlp v0.8h, v0.16b473; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h474; CHECK-NEXT: ret475 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)476 %3 = icmp ugt <8 x i16> %2, <i16 12, i16 12, i16 12, i16 12, i16 12, i16 12, i16 12, i16 12>477 %4 = sext <8 x i1> %3 to <8 x i16>478 ret <8 x i16> %4479}480 481define <8 x i16> @ult_13_v8i16(<8 x i16> %0) {482; CHECK-LABEL: ult_13_v8i16:483; CHECK: // %bb.0:484; CHECK-NEXT: cnt v0.16b, v0.16b485; CHECK-NEXT: movi v1.8h, #13486; CHECK-NEXT: uaddlp v0.8h, v0.16b487; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h488; CHECK-NEXT: ret489 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)490 %3 = icmp ult <8 x i16> %2, <i16 13, i16 13, i16 13, i16 13, i16 13, i16 13, i16 13, i16 13>491 %4 = sext <8 x i1> %3 to <8 x i16>492 ret <8 x i16> %4493}494 495define <8 x i16> @ugt_13_v8i16(<8 x i16> %0) {496; CHECK-LABEL: ugt_13_v8i16:497; CHECK: // %bb.0:498; CHECK-NEXT: cnt v0.16b, v0.16b499; CHECK-NEXT: movi v1.8h, #13500; CHECK-NEXT: uaddlp v0.8h, v0.16b501; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h502; CHECK-NEXT: ret503 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)504 %3 = icmp ugt <8 x i16> %2, <i16 13, i16 13, i16 13, i16 13, i16 13, i16 13, i16 13, i16 13>505 %4 = sext <8 x i1> %3 to <8 x i16>506 ret <8 x i16> %4507}508 509define <8 x i16> @ult_14_v8i16(<8 x i16> %0) {510; CHECK-LABEL: ult_14_v8i16:511; CHECK: // %bb.0:512; CHECK-NEXT: cnt v0.16b, v0.16b513; CHECK-NEXT: movi v1.8h, #14514; CHECK-NEXT: uaddlp v0.8h, v0.16b515; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h516; CHECK-NEXT: ret517 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)518 %3 = icmp ult <8 x i16> %2, <i16 14, i16 14, i16 14, i16 14, i16 14, i16 14, i16 14, i16 14>519 %4 = sext <8 x i1> %3 to <8 x i16>520 ret <8 x i16> %4521}522 523define <8 x i16> @ugt_14_v8i16(<8 x i16> %0) {524; CHECK-LABEL: ugt_14_v8i16:525; CHECK: // %bb.0:526; CHECK-NEXT: cnt v0.16b, v0.16b527; CHECK-NEXT: movi v1.8h, #14528; CHECK-NEXT: uaddlp v0.8h, v0.16b529; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h530; CHECK-NEXT: ret531 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)532 %3 = icmp ugt <8 x i16> %2, <i16 14, i16 14, i16 14, i16 14, i16 14, i16 14, i16 14, i16 14>533 %4 = sext <8 x i1> %3 to <8 x i16>534 ret <8 x i16> %4535}536 537define <8 x i16> @ult_15_v8i16(<8 x i16> %0) {538; CHECK-LABEL: ult_15_v8i16:539; CHECK: // %bb.0:540; CHECK-NEXT: cnt v0.16b, v0.16b541; CHECK-NEXT: movi v1.8h, #15542; CHECK-NEXT: uaddlp v0.8h, v0.16b543; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h544; CHECK-NEXT: ret545 %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0)546 %3 = icmp ult <8 x i16> %2, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>547 %4 = sext <8 x i1> %3 to <8 x i16>548 ret <8 x i16> %4549}550 551define <4 x i32> @ugt_1_v4i32(<4 x i32> %0) {552; CHECK-LABEL: ugt_1_v4i32:553; CHECK: // %bb.0:554; CHECK-NEXT: movi v1.2d, #0xffffffffffffffff555; CHECK-NEXT: add v1.4s, v0.4s, v1.4s556; CHECK-NEXT: cmtst v0.4s, v0.4s, v1.4s557; CHECK-NEXT: ret558 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)559 %3 = icmp ugt <4 x i32> %2, <i32 1, i32 1, i32 1, i32 1>560 %4 = sext <4 x i1> %3 to <4 x i32>561 ret <4 x i32> %4562}563 564define <4 x i32> @ult_2_v4i32(<4 x i32> %0) {565; CHECK-LABEL: ult_2_v4i32:566; CHECK: // %bb.0:567; CHECK-NEXT: movi v1.2d, #0xffffffffffffffff568; CHECK-NEXT: add v1.4s, v0.4s, v1.4s569; CHECK-NEXT: and v0.16b, v0.16b, v1.16b570; CHECK-NEXT: cmeq v0.4s, v0.4s, #0571; CHECK-NEXT: ret572 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)573 %3 = icmp ult <4 x i32> %2, <i32 2, i32 2, i32 2, i32 2>574 %4 = sext <4 x i1> %3 to <4 x i32>575 ret <4 x i32> %4576}577 578define <4 x i32> @ugt_2_v4i32(<4 x i32> %0) {579; CHECK-LABEL: ugt_2_v4i32:580; CHECK: // %bb.0:581; CHECK-NEXT: cnt v0.16b, v0.16b582; CHECK-NEXT: movi v1.4s, #2583; CHECK-NEXT: uaddlp v0.8h, v0.16b584; CHECK-NEXT: uaddlp v0.4s, v0.8h585; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s586; CHECK-NEXT: ret587 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)588 %3 = icmp ugt <4 x i32> %2, <i32 2, i32 2, i32 2, i32 2>589 %4 = sext <4 x i1> %3 to <4 x i32>590 ret <4 x i32> %4591}592 593define <4 x i32> @ult_3_v4i32(<4 x i32> %0) {594; CHECK-LABEL: ult_3_v4i32:595; CHECK: // %bb.0:596; CHECK-NEXT: cnt v0.16b, v0.16b597; CHECK-NEXT: movi v1.4s, #3598; CHECK-NEXT: uaddlp v0.8h, v0.16b599; CHECK-NEXT: uaddlp v0.4s, v0.8h600; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s601; CHECK-NEXT: ret602 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)603 %3 = icmp ult <4 x i32> %2, <i32 3, i32 3, i32 3, i32 3>604 %4 = sext <4 x i1> %3 to <4 x i32>605 ret <4 x i32> %4606}607 608define <4 x i32> @ugt_3_v4i32(<4 x i32> %0) {609; CHECK-LABEL: ugt_3_v4i32:610; CHECK: // %bb.0:611; CHECK-NEXT: cnt v0.16b, v0.16b612; CHECK-NEXT: movi v1.4s, #3613; CHECK-NEXT: uaddlp v0.8h, v0.16b614; CHECK-NEXT: uaddlp v0.4s, v0.8h615; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s616; CHECK-NEXT: ret617 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)618 %3 = icmp ugt <4 x i32> %2, <i32 3, i32 3, i32 3, i32 3>619 %4 = sext <4 x i1> %3 to <4 x i32>620 ret <4 x i32> %4621}622 623define <4 x i32> @ult_4_v4i32(<4 x i32> %0) {624; CHECK-LABEL: ult_4_v4i32:625; CHECK: // %bb.0:626; CHECK-NEXT: cnt v0.16b, v0.16b627; CHECK-NEXT: movi v1.4s, #4628; CHECK-NEXT: uaddlp v0.8h, v0.16b629; CHECK-NEXT: uaddlp v0.4s, v0.8h630; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s631; CHECK-NEXT: ret632 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)633 %3 = icmp ult <4 x i32> %2, <i32 4, i32 4, i32 4, i32 4>634 %4 = sext <4 x i1> %3 to <4 x i32>635 ret <4 x i32> %4636}637 638define <4 x i32> @ugt_4_v4i32(<4 x i32> %0) {639; CHECK-LABEL: ugt_4_v4i32:640; CHECK: // %bb.0:641; CHECK-NEXT: cnt v0.16b, v0.16b642; CHECK-NEXT: movi v1.4s, #4643; CHECK-NEXT: uaddlp v0.8h, v0.16b644; CHECK-NEXT: uaddlp v0.4s, v0.8h645; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s646; CHECK-NEXT: ret647 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)648 %3 = icmp ugt <4 x i32> %2, <i32 4, i32 4, i32 4, i32 4>649 %4 = sext <4 x i1> %3 to <4 x i32>650 ret <4 x i32> %4651}652 653define <4 x i32> @ult_5_v4i32(<4 x i32> %0) {654; CHECK-LABEL: ult_5_v4i32:655; CHECK: // %bb.0:656; CHECK-NEXT: cnt v0.16b, v0.16b657; CHECK-NEXT: movi v1.4s, #5658; CHECK-NEXT: uaddlp v0.8h, v0.16b659; CHECK-NEXT: uaddlp v0.4s, v0.8h660; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s661; CHECK-NEXT: ret662 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)663 %3 = icmp ult <4 x i32> %2, <i32 5, i32 5, i32 5, i32 5>664 %4 = sext <4 x i1> %3 to <4 x i32>665 ret <4 x i32> %4666}667 668define <4 x i32> @ugt_5_v4i32(<4 x i32> %0) {669; CHECK-LABEL: ugt_5_v4i32:670; CHECK: // %bb.0:671; CHECK-NEXT: cnt v0.16b, v0.16b672; CHECK-NEXT: movi v1.4s, #5673; CHECK-NEXT: uaddlp v0.8h, v0.16b674; CHECK-NEXT: uaddlp v0.4s, v0.8h675; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s676; CHECK-NEXT: ret677 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)678 %3 = icmp ugt <4 x i32> %2, <i32 5, i32 5, i32 5, i32 5>679 %4 = sext <4 x i1> %3 to <4 x i32>680 ret <4 x i32> %4681}682 683define <4 x i32> @ult_6_v4i32(<4 x i32> %0) {684; CHECK-LABEL: ult_6_v4i32:685; CHECK: // %bb.0:686; CHECK-NEXT: cnt v0.16b, v0.16b687; CHECK-NEXT: movi v1.4s, #6688; CHECK-NEXT: uaddlp v0.8h, v0.16b689; CHECK-NEXT: uaddlp v0.4s, v0.8h690; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s691; CHECK-NEXT: ret692 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)693 %3 = icmp ult <4 x i32> %2, <i32 6, i32 6, i32 6, i32 6>694 %4 = sext <4 x i1> %3 to <4 x i32>695 ret <4 x i32> %4696}697 698define <4 x i32> @ugt_6_v4i32(<4 x i32> %0) {699; CHECK-LABEL: ugt_6_v4i32:700; CHECK: // %bb.0:701; CHECK-NEXT: cnt v0.16b, v0.16b702; CHECK-NEXT: movi v1.4s, #6703; CHECK-NEXT: uaddlp v0.8h, v0.16b704; CHECK-NEXT: uaddlp v0.4s, v0.8h705; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s706; CHECK-NEXT: ret707 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)708 %3 = icmp ugt <4 x i32> %2, <i32 6, i32 6, i32 6, i32 6>709 %4 = sext <4 x i1> %3 to <4 x i32>710 ret <4 x i32> %4711}712 713define <4 x i32> @ult_7_v4i32(<4 x i32> %0) {714; CHECK-LABEL: ult_7_v4i32:715; CHECK: // %bb.0:716; CHECK-NEXT: cnt v0.16b, v0.16b717; CHECK-NEXT: movi v1.4s, #7718; CHECK-NEXT: uaddlp v0.8h, v0.16b719; CHECK-NEXT: uaddlp v0.4s, v0.8h720; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s721; CHECK-NEXT: ret722 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)723 %3 = icmp ult <4 x i32> %2, <i32 7, i32 7, i32 7, i32 7>724 %4 = sext <4 x i1> %3 to <4 x i32>725 ret <4 x i32> %4726}727 728define <4 x i32> @ugt_7_v4i32(<4 x i32> %0) {729; CHECK-LABEL: ugt_7_v4i32:730; CHECK: // %bb.0:731; CHECK-NEXT: cnt v0.16b, v0.16b732; CHECK-NEXT: movi v1.4s, #7733; CHECK-NEXT: uaddlp v0.8h, v0.16b734; CHECK-NEXT: uaddlp v0.4s, v0.8h735; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s736; CHECK-NEXT: ret737 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)738 %3 = icmp ugt <4 x i32> %2, <i32 7, i32 7, i32 7, i32 7>739 %4 = sext <4 x i1> %3 to <4 x i32>740 ret <4 x i32> %4741}742 743define <4 x i32> @ult_8_v4i32(<4 x i32> %0) {744; CHECK-LABEL: ult_8_v4i32:745; CHECK: // %bb.0:746; CHECK-NEXT: cnt v0.16b, v0.16b747; CHECK-NEXT: movi v1.4s, #8748; CHECK-NEXT: uaddlp v0.8h, v0.16b749; CHECK-NEXT: uaddlp v0.4s, v0.8h750; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s751; CHECK-NEXT: ret752 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)753 %3 = icmp ult <4 x i32> %2, <i32 8, i32 8, i32 8, i32 8>754 %4 = sext <4 x i1> %3 to <4 x i32>755 ret <4 x i32> %4756}757 758define <4 x i32> @ugt_8_v4i32(<4 x i32> %0) {759; CHECK-LABEL: ugt_8_v4i32:760; CHECK: // %bb.0:761; CHECK-NEXT: cnt v0.16b, v0.16b762; CHECK-NEXT: movi v1.4s, #8763; CHECK-NEXT: uaddlp v0.8h, v0.16b764; CHECK-NEXT: uaddlp v0.4s, v0.8h765; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s766; CHECK-NEXT: ret767 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)768 %3 = icmp ugt <4 x i32> %2, <i32 8, i32 8, i32 8, i32 8>769 %4 = sext <4 x i1> %3 to <4 x i32>770 ret <4 x i32> %4771}772 773define <4 x i32> @ult_9_v4i32(<4 x i32> %0) {774; CHECK-LABEL: ult_9_v4i32:775; CHECK: // %bb.0:776; CHECK-NEXT: cnt v0.16b, v0.16b777; CHECK-NEXT: movi v1.4s, #9778; CHECK-NEXT: uaddlp v0.8h, v0.16b779; CHECK-NEXT: uaddlp v0.4s, v0.8h780; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s781; CHECK-NEXT: ret782 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)783 %3 = icmp ult <4 x i32> %2, <i32 9, i32 9, i32 9, i32 9>784 %4 = sext <4 x i1> %3 to <4 x i32>785 ret <4 x i32> %4786}787 788define <4 x i32> @ugt_9_v4i32(<4 x i32> %0) {789; CHECK-LABEL: ugt_9_v4i32:790; CHECK: // %bb.0:791; CHECK-NEXT: cnt v0.16b, v0.16b792; CHECK-NEXT: movi v1.4s, #9793; CHECK-NEXT: uaddlp v0.8h, v0.16b794; CHECK-NEXT: uaddlp v0.4s, v0.8h795; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s796; CHECK-NEXT: ret797 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)798 %3 = icmp ugt <4 x i32> %2, <i32 9, i32 9, i32 9, i32 9>799 %4 = sext <4 x i1> %3 to <4 x i32>800 ret <4 x i32> %4801}802 803define <4 x i32> @ult_10_v4i32(<4 x i32> %0) {804; CHECK-LABEL: ult_10_v4i32:805; CHECK: // %bb.0:806; CHECK-NEXT: cnt v0.16b, v0.16b807; CHECK-NEXT: movi v1.4s, #10808; CHECK-NEXT: uaddlp v0.8h, v0.16b809; CHECK-NEXT: uaddlp v0.4s, v0.8h810; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s811; CHECK-NEXT: ret812 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)813 %3 = icmp ult <4 x i32> %2, <i32 10, i32 10, i32 10, i32 10>814 %4 = sext <4 x i1> %3 to <4 x i32>815 ret <4 x i32> %4816}817 818define <4 x i32> @ugt_10_v4i32(<4 x i32> %0) {819; CHECK-LABEL: ugt_10_v4i32:820; CHECK: // %bb.0:821; CHECK-NEXT: cnt v0.16b, v0.16b822; CHECK-NEXT: movi v1.4s, #10823; CHECK-NEXT: uaddlp v0.8h, v0.16b824; CHECK-NEXT: uaddlp v0.4s, v0.8h825; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s826; CHECK-NEXT: ret827 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)828 %3 = icmp ugt <4 x i32> %2, <i32 10, i32 10, i32 10, i32 10>829 %4 = sext <4 x i1> %3 to <4 x i32>830 ret <4 x i32> %4831}832 833define <4 x i32> @ult_11_v4i32(<4 x i32> %0) {834; CHECK-LABEL: ult_11_v4i32:835; CHECK: // %bb.0:836; CHECK-NEXT: cnt v0.16b, v0.16b837; CHECK-NEXT: movi v1.4s, #11838; CHECK-NEXT: uaddlp v0.8h, v0.16b839; CHECK-NEXT: uaddlp v0.4s, v0.8h840; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s841; CHECK-NEXT: ret842 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)843 %3 = icmp ult <4 x i32> %2, <i32 11, i32 11, i32 11, i32 11>844 %4 = sext <4 x i1> %3 to <4 x i32>845 ret <4 x i32> %4846}847 848define <4 x i32> @ugt_11_v4i32(<4 x i32> %0) {849; CHECK-LABEL: ugt_11_v4i32:850; CHECK: // %bb.0:851; CHECK-NEXT: cnt v0.16b, v0.16b852; CHECK-NEXT: movi v1.4s, #11853; CHECK-NEXT: uaddlp v0.8h, v0.16b854; CHECK-NEXT: uaddlp v0.4s, v0.8h855; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s856; CHECK-NEXT: ret857 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)858 %3 = icmp ugt <4 x i32> %2, <i32 11, i32 11, i32 11, i32 11>859 %4 = sext <4 x i1> %3 to <4 x i32>860 ret <4 x i32> %4861}862 863define <4 x i32> @ult_12_v4i32(<4 x i32> %0) {864; CHECK-LABEL: ult_12_v4i32:865; CHECK: // %bb.0:866; CHECK-NEXT: cnt v0.16b, v0.16b867; CHECK-NEXT: movi v1.4s, #12868; CHECK-NEXT: uaddlp v0.8h, v0.16b869; CHECK-NEXT: uaddlp v0.4s, v0.8h870; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s871; CHECK-NEXT: ret872 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)873 %3 = icmp ult <4 x i32> %2, <i32 12, i32 12, i32 12, i32 12>874 %4 = sext <4 x i1> %3 to <4 x i32>875 ret <4 x i32> %4876}877 878define <4 x i32> @ugt_12_v4i32(<4 x i32> %0) {879; CHECK-LABEL: ugt_12_v4i32:880; CHECK: // %bb.0:881; CHECK-NEXT: cnt v0.16b, v0.16b882; CHECK-NEXT: movi v1.4s, #12883; CHECK-NEXT: uaddlp v0.8h, v0.16b884; CHECK-NEXT: uaddlp v0.4s, v0.8h885; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s886; CHECK-NEXT: ret887 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)888 %3 = icmp ugt <4 x i32> %2, <i32 12, i32 12, i32 12, i32 12>889 %4 = sext <4 x i1> %3 to <4 x i32>890 ret <4 x i32> %4891}892 893define <4 x i32> @ult_13_v4i32(<4 x i32> %0) {894; CHECK-LABEL: ult_13_v4i32:895; CHECK: // %bb.0:896; CHECK-NEXT: cnt v0.16b, v0.16b897; CHECK-NEXT: movi v1.4s, #13898; CHECK-NEXT: uaddlp v0.8h, v0.16b899; CHECK-NEXT: uaddlp v0.4s, v0.8h900; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s901; CHECK-NEXT: ret902 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)903 %3 = icmp ult <4 x i32> %2, <i32 13, i32 13, i32 13, i32 13>904 %4 = sext <4 x i1> %3 to <4 x i32>905 ret <4 x i32> %4906}907 908define <4 x i32> @ugt_13_v4i32(<4 x i32> %0) {909; CHECK-LABEL: ugt_13_v4i32:910; CHECK: // %bb.0:911; CHECK-NEXT: cnt v0.16b, v0.16b912; CHECK-NEXT: movi v1.4s, #13913; CHECK-NEXT: uaddlp v0.8h, v0.16b914; CHECK-NEXT: uaddlp v0.4s, v0.8h915; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s916; CHECK-NEXT: ret917 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)918 %3 = icmp ugt <4 x i32> %2, <i32 13, i32 13, i32 13, i32 13>919 %4 = sext <4 x i1> %3 to <4 x i32>920 ret <4 x i32> %4921}922 923define <4 x i32> @ult_14_v4i32(<4 x i32> %0) {924; CHECK-LABEL: ult_14_v4i32:925; CHECK: // %bb.0:926; CHECK-NEXT: cnt v0.16b, v0.16b927; CHECK-NEXT: movi v1.4s, #14928; CHECK-NEXT: uaddlp v0.8h, v0.16b929; CHECK-NEXT: uaddlp v0.4s, v0.8h930; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s931; CHECK-NEXT: ret932 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)933 %3 = icmp ult <4 x i32> %2, <i32 14, i32 14, i32 14, i32 14>934 %4 = sext <4 x i1> %3 to <4 x i32>935 ret <4 x i32> %4936}937 938define <4 x i32> @ugt_14_v4i32(<4 x i32> %0) {939; CHECK-LABEL: ugt_14_v4i32:940; CHECK: // %bb.0:941; CHECK-NEXT: cnt v0.16b, v0.16b942; CHECK-NEXT: movi v1.4s, #14943; CHECK-NEXT: uaddlp v0.8h, v0.16b944; CHECK-NEXT: uaddlp v0.4s, v0.8h945; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s946; CHECK-NEXT: ret947 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)948 %3 = icmp ugt <4 x i32> %2, <i32 14, i32 14, i32 14, i32 14>949 %4 = sext <4 x i1> %3 to <4 x i32>950 ret <4 x i32> %4951}952 953define <4 x i32> @ult_15_v4i32(<4 x i32> %0) {954; CHECK-LABEL: ult_15_v4i32:955; CHECK: // %bb.0:956; CHECK-NEXT: cnt v0.16b, v0.16b957; CHECK-NEXT: movi v1.4s, #15958; CHECK-NEXT: uaddlp v0.8h, v0.16b959; CHECK-NEXT: uaddlp v0.4s, v0.8h960; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s961; CHECK-NEXT: ret962 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)963 %3 = icmp ult <4 x i32> %2, <i32 15, i32 15, i32 15, i32 15>964 %4 = sext <4 x i1> %3 to <4 x i32>965 ret <4 x i32> %4966}967 968define <4 x i32> @ugt_15_v4i32(<4 x i32> %0) {969; CHECK-LABEL: ugt_15_v4i32:970; CHECK: // %bb.0:971; CHECK-NEXT: cnt v0.16b, v0.16b972; CHECK-NEXT: movi v1.4s, #15973; CHECK-NEXT: uaddlp v0.8h, v0.16b974; CHECK-NEXT: uaddlp v0.4s, v0.8h975; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s976; CHECK-NEXT: ret977 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)978 %3 = icmp ugt <4 x i32> %2, <i32 15, i32 15, i32 15, i32 15>979 %4 = sext <4 x i1> %3 to <4 x i32>980 ret <4 x i32> %4981}982 983define <4 x i32> @ult_16_v4i32(<4 x i32> %0) {984; CHECK-LABEL: ult_16_v4i32:985; CHECK: // %bb.0:986; CHECK-NEXT: cnt v0.16b, v0.16b987; CHECK-NEXT: movi v1.4s, #16988; CHECK-NEXT: uaddlp v0.8h, v0.16b989; CHECK-NEXT: uaddlp v0.4s, v0.8h990; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s991; CHECK-NEXT: ret992 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)993 %3 = icmp ult <4 x i32> %2, <i32 16, i32 16, i32 16, i32 16>994 %4 = sext <4 x i1> %3 to <4 x i32>995 ret <4 x i32> %4996}997 998define <4 x i32> @ugt_16_v4i32(<4 x i32> %0) {999; CHECK-LABEL: ugt_16_v4i32:1000; CHECK: // %bb.0:1001; CHECK-NEXT: cnt v0.16b, v0.16b1002; CHECK-NEXT: movi v1.4s, #161003; CHECK-NEXT: uaddlp v0.8h, v0.16b1004; CHECK-NEXT: uaddlp v0.4s, v0.8h1005; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1006; CHECK-NEXT: ret1007 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1008 %3 = icmp ugt <4 x i32> %2, <i32 16, i32 16, i32 16, i32 16>1009 %4 = sext <4 x i1> %3 to <4 x i32>1010 ret <4 x i32> %41011}1012 1013define <4 x i32> @ult_17_v4i32(<4 x i32> %0) {1014; CHECK-LABEL: ult_17_v4i32:1015; CHECK: // %bb.0:1016; CHECK-NEXT: cnt v0.16b, v0.16b1017; CHECK-NEXT: movi v1.4s, #171018; CHECK-NEXT: uaddlp v0.8h, v0.16b1019; CHECK-NEXT: uaddlp v0.4s, v0.8h1020; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1021; CHECK-NEXT: ret1022 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1023 %3 = icmp ult <4 x i32> %2, <i32 17, i32 17, i32 17, i32 17>1024 %4 = sext <4 x i1> %3 to <4 x i32>1025 ret <4 x i32> %41026}1027 1028define <4 x i32> @ugt_17_v4i32(<4 x i32> %0) {1029; CHECK-LABEL: ugt_17_v4i32:1030; CHECK: // %bb.0:1031; CHECK-NEXT: cnt v0.16b, v0.16b1032; CHECK-NEXT: movi v1.4s, #171033; CHECK-NEXT: uaddlp v0.8h, v0.16b1034; CHECK-NEXT: uaddlp v0.4s, v0.8h1035; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1036; CHECK-NEXT: ret1037 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1038 %3 = icmp ugt <4 x i32> %2, <i32 17, i32 17, i32 17, i32 17>1039 %4 = sext <4 x i1> %3 to <4 x i32>1040 ret <4 x i32> %41041}1042 1043define <4 x i32> @ult_18_v4i32(<4 x i32> %0) {1044; CHECK-LABEL: ult_18_v4i32:1045; CHECK: // %bb.0:1046; CHECK-NEXT: cnt v0.16b, v0.16b1047; CHECK-NEXT: movi v1.4s, #181048; CHECK-NEXT: uaddlp v0.8h, v0.16b1049; CHECK-NEXT: uaddlp v0.4s, v0.8h1050; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1051; CHECK-NEXT: ret1052 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1053 %3 = icmp ult <4 x i32> %2, <i32 18, i32 18, i32 18, i32 18>1054 %4 = sext <4 x i1> %3 to <4 x i32>1055 ret <4 x i32> %41056}1057 1058define <4 x i32> @ugt_18_v4i32(<4 x i32> %0) {1059; CHECK-LABEL: ugt_18_v4i32:1060; CHECK: // %bb.0:1061; CHECK-NEXT: cnt v0.16b, v0.16b1062; CHECK-NEXT: movi v1.4s, #181063; CHECK-NEXT: uaddlp v0.8h, v0.16b1064; CHECK-NEXT: uaddlp v0.4s, v0.8h1065; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1066; CHECK-NEXT: ret1067 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1068 %3 = icmp ugt <4 x i32> %2, <i32 18, i32 18, i32 18, i32 18>1069 %4 = sext <4 x i1> %3 to <4 x i32>1070 ret <4 x i32> %41071}1072 1073define <4 x i32> @ult_19_v4i32(<4 x i32> %0) {1074; CHECK-LABEL: ult_19_v4i32:1075; CHECK: // %bb.0:1076; CHECK-NEXT: cnt v0.16b, v0.16b1077; CHECK-NEXT: movi v1.4s, #191078; CHECK-NEXT: uaddlp v0.8h, v0.16b1079; CHECK-NEXT: uaddlp v0.4s, v0.8h1080; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1081; CHECK-NEXT: ret1082 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1083 %3 = icmp ult <4 x i32> %2, <i32 19, i32 19, i32 19, i32 19>1084 %4 = sext <4 x i1> %3 to <4 x i32>1085 ret <4 x i32> %41086}1087 1088define <4 x i32> @ugt_19_v4i32(<4 x i32> %0) {1089; CHECK-LABEL: ugt_19_v4i32:1090; CHECK: // %bb.0:1091; CHECK-NEXT: cnt v0.16b, v0.16b1092; CHECK-NEXT: movi v1.4s, #191093; CHECK-NEXT: uaddlp v0.8h, v0.16b1094; CHECK-NEXT: uaddlp v0.4s, v0.8h1095; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1096; CHECK-NEXT: ret1097 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1098 %3 = icmp ugt <4 x i32> %2, <i32 19, i32 19, i32 19, i32 19>1099 %4 = sext <4 x i1> %3 to <4 x i32>1100 ret <4 x i32> %41101}1102 1103define <4 x i32> @ult_20_v4i32(<4 x i32> %0) {1104; CHECK-LABEL: ult_20_v4i32:1105; CHECK: // %bb.0:1106; CHECK-NEXT: cnt v0.16b, v0.16b1107; CHECK-NEXT: movi v1.4s, #201108; CHECK-NEXT: uaddlp v0.8h, v0.16b1109; CHECK-NEXT: uaddlp v0.4s, v0.8h1110; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1111; CHECK-NEXT: ret1112 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1113 %3 = icmp ult <4 x i32> %2, <i32 20, i32 20, i32 20, i32 20>1114 %4 = sext <4 x i1> %3 to <4 x i32>1115 ret <4 x i32> %41116}1117 1118define <4 x i32> @ugt_20_v4i32(<4 x i32> %0) {1119; CHECK-LABEL: ugt_20_v4i32:1120; CHECK: // %bb.0:1121; CHECK-NEXT: cnt v0.16b, v0.16b1122; CHECK-NEXT: movi v1.4s, #201123; CHECK-NEXT: uaddlp v0.8h, v0.16b1124; CHECK-NEXT: uaddlp v0.4s, v0.8h1125; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1126; CHECK-NEXT: ret1127 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1128 %3 = icmp ugt <4 x i32> %2, <i32 20, i32 20, i32 20, i32 20>1129 %4 = sext <4 x i1> %3 to <4 x i32>1130 ret <4 x i32> %41131}1132 1133define <4 x i32> @ult_21_v4i32(<4 x i32> %0) {1134; CHECK-LABEL: ult_21_v4i32:1135; CHECK: // %bb.0:1136; CHECK-NEXT: cnt v0.16b, v0.16b1137; CHECK-NEXT: movi v1.4s, #211138; CHECK-NEXT: uaddlp v0.8h, v0.16b1139; CHECK-NEXT: uaddlp v0.4s, v0.8h1140; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1141; CHECK-NEXT: ret1142 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1143 %3 = icmp ult <4 x i32> %2, <i32 21, i32 21, i32 21, i32 21>1144 %4 = sext <4 x i1> %3 to <4 x i32>1145 ret <4 x i32> %41146}1147 1148define <4 x i32> @ugt_21_v4i32(<4 x i32> %0) {1149; CHECK-LABEL: ugt_21_v4i32:1150; CHECK: // %bb.0:1151; CHECK-NEXT: cnt v0.16b, v0.16b1152; CHECK-NEXT: movi v1.4s, #211153; CHECK-NEXT: uaddlp v0.8h, v0.16b1154; CHECK-NEXT: uaddlp v0.4s, v0.8h1155; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1156; CHECK-NEXT: ret1157 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1158 %3 = icmp ugt <4 x i32> %2, <i32 21, i32 21, i32 21, i32 21>1159 %4 = sext <4 x i1> %3 to <4 x i32>1160 ret <4 x i32> %41161}1162 1163define <4 x i32> @ult_22_v4i32(<4 x i32> %0) {1164; CHECK-LABEL: ult_22_v4i32:1165; CHECK: // %bb.0:1166; CHECK-NEXT: cnt v0.16b, v0.16b1167; CHECK-NEXT: movi v1.4s, #221168; CHECK-NEXT: uaddlp v0.8h, v0.16b1169; CHECK-NEXT: uaddlp v0.4s, v0.8h1170; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1171; CHECK-NEXT: ret1172 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1173 %3 = icmp ult <4 x i32> %2, <i32 22, i32 22, i32 22, i32 22>1174 %4 = sext <4 x i1> %3 to <4 x i32>1175 ret <4 x i32> %41176}1177 1178define <4 x i32> @ugt_22_v4i32(<4 x i32> %0) {1179; CHECK-LABEL: ugt_22_v4i32:1180; CHECK: // %bb.0:1181; CHECK-NEXT: cnt v0.16b, v0.16b1182; CHECK-NEXT: movi v1.4s, #221183; CHECK-NEXT: uaddlp v0.8h, v0.16b1184; CHECK-NEXT: uaddlp v0.4s, v0.8h1185; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1186; CHECK-NEXT: ret1187 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1188 %3 = icmp ugt <4 x i32> %2, <i32 22, i32 22, i32 22, i32 22>1189 %4 = sext <4 x i1> %3 to <4 x i32>1190 ret <4 x i32> %41191}1192 1193define <4 x i32> @ult_23_v4i32(<4 x i32> %0) {1194; CHECK-LABEL: ult_23_v4i32:1195; CHECK: // %bb.0:1196; CHECK-NEXT: cnt v0.16b, v0.16b1197; CHECK-NEXT: movi v1.4s, #231198; CHECK-NEXT: uaddlp v0.8h, v0.16b1199; CHECK-NEXT: uaddlp v0.4s, v0.8h1200; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1201; CHECK-NEXT: ret1202 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1203 %3 = icmp ult <4 x i32> %2, <i32 23, i32 23, i32 23, i32 23>1204 %4 = sext <4 x i1> %3 to <4 x i32>1205 ret <4 x i32> %41206}1207 1208define <4 x i32> @ugt_23_v4i32(<4 x i32> %0) {1209; CHECK-LABEL: ugt_23_v4i32:1210; CHECK: // %bb.0:1211; CHECK-NEXT: cnt v0.16b, v0.16b1212; CHECK-NEXT: movi v1.4s, #231213; CHECK-NEXT: uaddlp v0.8h, v0.16b1214; CHECK-NEXT: uaddlp v0.4s, v0.8h1215; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1216; CHECK-NEXT: ret1217 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1218 %3 = icmp ugt <4 x i32> %2, <i32 23, i32 23, i32 23, i32 23>1219 %4 = sext <4 x i1> %3 to <4 x i32>1220 ret <4 x i32> %41221}1222 1223define <4 x i32> @ult_24_v4i32(<4 x i32> %0) {1224; CHECK-LABEL: ult_24_v4i32:1225; CHECK: // %bb.0:1226; CHECK-NEXT: cnt v0.16b, v0.16b1227; CHECK-NEXT: movi v1.4s, #241228; CHECK-NEXT: uaddlp v0.8h, v0.16b1229; CHECK-NEXT: uaddlp v0.4s, v0.8h1230; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1231; CHECK-NEXT: ret1232 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1233 %3 = icmp ult <4 x i32> %2, <i32 24, i32 24, i32 24, i32 24>1234 %4 = sext <4 x i1> %3 to <4 x i32>1235 ret <4 x i32> %41236}1237 1238define <4 x i32> @ugt_24_v4i32(<4 x i32> %0) {1239; CHECK-LABEL: ugt_24_v4i32:1240; CHECK: // %bb.0:1241; CHECK-NEXT: cnt v0.16b, v0.16b1242; CHECK-NEXT: movi v1.4s, #241243; CHECK-NEXT: uaddlp v0.8h, v0.16b1244; CHECK-NEXT: uaddlp v0.4s, v0.8h1245; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1246; CHECK-NEXT: ret1247 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1248 %3 = icmp ugt <4 x i32> %2, <i32 24, i32 24, i32 24, i32 24>1249 %4 = sext <4 x i1> %3 to <4 x i32>1250 ret <4 x i32> %41251}1252 1253define <4 x i32> @ult_25_v4i32(<4 x i32> %0) {1254; CHECK-LABEL: ult_25_v4i32:1255; CHECK: // %bb.0:1256; CHECK-NEXT: cnt v0.16b, v0.16b1257; CHECK-NEXT: movi v1.4s, #251258; CHECK-NEXT: uaddlp v0.8h, v0.16b1259; CHECK-NEXT: uaddlp v0.4s, v0.8h1260; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1261; CHECK-NEXT: ret1262 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1263 %3 = icmp ult <4 x i32> %2, <i32 25, i32 25, i32 25, i32 25>1264 %4 = sext <4 x i1> %3 to <4 x i32>1265 ret <4 x i32> %41266}1267 1268define <4 x i32> @ugt_25_v4i32(<4 x i32> %0) {1269; CHECK-LABEL: ugt_25_v4i32:1270; CHECK: // %bb.0:1271; CHECK-NEXT: cnt v0.16b, v0.16b1272; CHECK-NEXT: movi v1.4s, #251273; CHECK-NEXT: uaddlp v0.8h, v0.16b1274; CHECK-NEXT: uaddlp v0.4s, v0.8h1275; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1276; CHECK-NEXT: ret1277 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1278 %3 = icmp ugt <4 x i32> %2, <i32 25, i32 25, i32 25, i32 25>1279 %4 = sext <4 x i1> %3 to <4 x i32>1280 ret <4 x i32> %41281}1282 1283define <4 x i32> @ult_26_v4i32(<4 x i32> %0) {1284; CHECK-LABEL: ult_26_v4i32:1285; CHECK: // %bb.0:1286; CHECK-NEXT: cnt v0.16b, v0.16b1287; CHECK-NEXT: movi v1.4s, #261288; CHECK-NEXT: uaddlp v0.8h, v0.16b1289; CHECK-NEXT: uaddlp v0.4s, v0.8h1290; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1291; CHECK-NEXT: ret1292 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1293 %3 = icmp ult <4 x i32> %2, <i32 26, i32 26, i32 26, i32 26>1294 %4 = sext <4 x i1> %3 to <4 x i32>1295 ret <4 x i32> %41296}1297 1298define <4 x i32> @ugt_26_v4i32(<4 x i32> %0) {1299; CHECK-LABEL: ugt_26_v4i32:1300; CHECK: // %bb.0:1301; CHECK-NEXT: cnt v0.16b, v0.16b1302; CHECK-NEXT: movi v1.4s, #261303; CHECK-NEXT: uaddlp v0.8h, v0.16b1304; CHECK-NEXT: uaddlp v0.4s, v0.8h1305; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1306; CHECK-NEXT: ret1307 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1308 %3 = icmp ugt <4 x i32> %2, <i32 26, i32 26, i32 26, i32 26>1309 %4 = sext <4 x i1> %3 to <4 x i32>1310 ret <4 x i32> %41311}1312 1313define <4 x i32> @ult_27_v4i32(<4 x i32> %0) {1314; CHECK-LABEL: ult_27_v4i32:1315; CHECK: // %bb.0:1316; CHECK-NEXT: cnt v0.16b, v0.16b1317; CHECK-NEXT: movi v1.4s, #271318; CHECK-NEXT: uaddlp v0.8h, v0.16b1319; CHECK-NEXT: uaddlp v0.4s, v0.8h1320; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1321; CHECK-NEXT: ret1322 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1323 %3 = icmp ult <4 x i32> %2, <i32 27, i32 27, i32 27, i32 27>1324 %4 = sext <4 x i1> %3 to <4 x i32>1325 ret <4 x i32> %41326}1327 1328define <4 x i32> @ugt_27_v4i32(<4 x i32> %0) {1329; CHECK-LABEL: ugt_27_v4i32:1330; CHECK: // %bb.0:1331; CHECK-NEXT: cnt v0.16b, v0.16b1332; CHECK-NEXT: movi v1.4s, #271333; CHECK-NEXT: uaddlp v0.8h, v0.16b1334; CHECK-NEXT: uaddlp v0.4s, v0.8h1335; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1336; CHECK-NEXT: ret1337 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1338 %3 = icmp ugt <4 x i32> %2, <i32 27, i32 27, i32 27, i32 27>1339 %4 = sext <4 x i1> %3 to <4 x i32>1340 ret <4 x i32> %41341}1342 1343define <4 x i32> @ult_28_v4i32(<4 x i32> %0) {1344; CHECK-LABEL: ult_28_v4i32:1345; CHECK: // %bb.0:1346; CHECK-NEXT: cnt v0.16b, v0.16b1347; CHECK-NEXT: movi v1.4s, #281348; CHECK-NEXT: uaddlp v0.8h, v0.16b1349; CHECK-NEXT: uaddlp v0.4s, v0.8h1350; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1351; CHECK-NEXT: ret1352 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1353 %3 = icmp ult <4 x i32> %2, <i32 28, i32 28, i32 28, i32 28>1354 %4 = sext <4 x i1> %3 to <4 x i32>1355 ret <4 x i32> %41356}1357 1358define <4 x i32> @ugt_28_v4i32(<4 x i32> %0) {1359; CHECK-LABEL: ugt_28_v4i32:1360; CHECK: // %bb.0:1361; CHECK-NEXT: cnt v0.16b, v0.16b1362; CHECK-NEXT: movi v1.4s, #281363; CHECK-NEXT: uaddlp v0.8h, v0.16b1364; CHECK-NEXT: uaddlp v0.4s, v0.8h1365; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1366; CHECK-NEXT: ret1367 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1368 %3 = icmp ugt <4 x i32> %2, <i32 28, i32 28, i32 28, i32 28>1369 %4 = sext <4 x i1> %3 to <4 x i32>1370 ret <4 x i32> %41371}1372 1373define <4 x i32> @ult_29_v4i32(<4 x i32> %0) {1374; CHECK-LABEL: ult_29_v4i32:1375; CHECK: // %bb.0:1376; CHECK-NEXT: cnt v0.16b, v0.16b1377; CHECK-NEXT: movi v1.4s, #291378; CHECK-NEXT: uaddlp v0.8h, v0.16b1379; CHECK-NEXT: uaddlp v0.4s, v0.8h1380; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1381; CHECK-NEXT: ret1382 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1383 %3 = icmp ult <4 x i32> %2, <i32 29, i32 29, i32 29, i32 29>1384 %4 = sext <4 x i1> %3 to <4 x i32>1385 ret <4 x i32> %41386}1387 1388define <4 x i32> @ugt_29_v4i32(<4 x i32> %0) {1389; CHECK-LABEL: ugt_29_v4i32:1390; CHECK: // %bb.0:1391; CHECK-NEXT: cnt v0.16b, v0.16b1392; CHECK-NEXT: movi v1.4s, #291393; CHECK-NEXT: uaddlp v0.8h, v0.16b1394; CHECK-NEXT: uaddlp v0.4s, v0.8h1395; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1396; CHECK-NEXT: ret1397 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1398 %3 = icmp ugt <4 x i32> %2, <i32 29, i32 29, i32 29, i32 29>1399 %4 = sext <4 x i1> %3 to <4 x i32>1400 ret <4 x i32> %41401}1402 1403define <4 x i32> @ult_30_v4i32(<4 x i32> %0) {1404; CHECK-LABEL: ult_30_v4i32:1405; CHECK: // %bb.0:1406; CHECK-NEXT: cnt v0.16b, v0.16b1407; CHECK-NEXT: movi v1.4s, #301408; CHECK-NEXT: uaddlp v0.8h, v0.16b1409; CHECK-NEXT: uaddlp v0.4s, v0.8h1410; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1411; CHECK-NEXT: ret1412 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1413 %3 = icmp ult <4 x i32> %2, <i32 30, i32 30, i32 30, i32 30>1414 %4 = sext <4 x i1> %3 to <4 x i32>1415 ret <4 x i32> %41416}1417 1418define <4 x i32> @ugt_30_v4i32(<4 x i32> %0) {1419; CHECK-LABEL: ugt_30_v4i32:1420; CHECK: // %bb.0:1421; CHECK-NEXT: cnt v0.16b, v0.16b1422; CHECK-NEXT: movi v1.4s, #301423; CHECK-NEXT: uaddlp v0.8h, v0.16b1424; CHECK-NEXT: uaddlp v0.4s, v0.8h1425; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1426; CHECK-NEXT: ret1427 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1428 %3 = icmp ugt <4 x i32> %2, <i32 30, i32 30, i32 30, i32 30>1429 %4 = sext <4 x i1> %3 to <4 x i32>1430 ret <4 x i32> %41431}1432 1433define <4 x i32> @ult_31_v4i32(<4 x i32> %0) {1434; CHECK-LABEL: ult_31_v4i32:1435; CHECK: // %bb.0:1436; CHECK-NEXT: cnt v0.16b, v0.16b1437; CHECK-NEXT: movi v1.4s, #311438; CHECK-NEXT: uaddlp v0.8h, v0.16b1439; CHECK-NEXT: uaddlp v0.4s, v0.8h1440; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1441; CHECK-NEXT: ret1442 %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0)1443 %3 = icmp ult <4 x i32> %2, <i32 31, i32 31, i32 31, i32 31>1444 %4 = sext <4 x i1> %3 to <4 x i32>1445 ret <4 x i32> %41446}1447 1448define <2 x i64> @ugt_1_v2i64(<2 x i64> %0) {1449; CHECK-LABEL: ugt_1_v2i64:1450; CHECK: // %bb.0:1451; CHECK-NEXT: movi v1.2d, #0xffffffffffffffff1452; CHECK-NEXT: add v1.2d, v0.2d, v1.2d1453; CHECK-NEXT: cmtst v0.2d, v0.2d, v1.2d1454; CHECK-NEXT: ret1455 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1456 %3 = icmp ugt <2 x i64> %2, <i64 1, i64 1>1457 %4 = sext <2 x i1> %3 to <2 x i64>1458 ret <2 x i64> %41459}1460 1461define <2 x i64> @ult_2_v2i64(<2 x i64> %0) {1462; CHECK-LABEL: ult_2_v2i64:1463; CHECK: // %bb.0:1464; CHECK-NEXT: movi v1.2d, #0xffffffffffffffff1465; CHECK-NEXT: add v1.2d, v0.2d, v1.2d1466; CHECK-NEXT: and v0.16b, v0.16b, v1.16b1467; CHECK-NEXT: cmeq v0.2d, v0.2d, #01468; CHECK-NEXT: ret1469 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1470 %3 = icmp ult <2 x i64> %2, <i64 2, i64 2>1471 %4 = sext <2 x i1> %3 to <2 x i64>1472 ret <2 x i64> %41473}1474 1475define <2 x i64> @ugt_2_v2i64(<2 x i64> %0) {1476; CHECK-LABEL: ugt_2_v2i64:1477; CHECK: // %bb.0:1478; CHECK-NEXT: cnt v0.16b, v0.16b1479; CHECK-NEXT: mov w8, #21480; CHECK-NEXT: dup v1.2d, x81481; CHECK-NEXT: uaddlp v0.8h, v0.16b1482; CHECK-NEXT: uaddlp v0.4s, v0.8h1483; CHECK-NEXT: uaddlp v0.2d, v0.4s1484; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1485; CHECK-NEXT: ret1486 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1487 %3 = icmp ugt <2 x i64> %2, <i64 2, i64 2>1488 %4 = sext <2 x i1> %3 to <2 x i64>1489 ret <2 x i64> %41490}1491 1492define <2 x i64> @ult_3_v2i64(<2 x i64> %0) {1493; CHECK-LABEL: ult_3_v2i64:1494; CHECK: // %bb.0:1495; CHECK-NEXT: cnt v0.16b, v0.16b1496; CHECK-NEXT: mov w8, #31497; CHECK-NEXT: dup v1.2d, x81498; CHECK-NEXT: uaddlp v0.8h, v0.16b1499; CHECK-NEXT: uaddlp v0.4s, v0.8h1500; CHECK-NEXT: uaddlp v0.2d, v0.4s1501; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1502; CHECK-NEXT: ret1503 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1504 %3 = icmp ult <2 x i64> %2, <i64 3, i64 3>1505 %4 = sext <2 x i1> %3 to <2 x i64>1506 ret <2 x i64> %41507}1508 1509define <2 x i64> @ugt_3_v2i64(<2 x i64> %0) {1510; CHECK-LABEL: ugt_3_v2i64:1511; CHECK: // %bb.0:1512; CHECK-NEXT: cnt v0.16b, v0.16b1513; CHECK-NEXT: mov w8, #31514; CHECK-NEXT: dup v1.2d, x81515; CHECK-NEXT: uaddlp v0.8h, v0.16b1516; CHECK-NEXT: uaddlp v0.4s, v0.8h1517; CHECK-NEXT: uaddlp v0.2d, v0.4s1518; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1519; CHECK-NEXT: ret1520 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1521 %3 = icmp ugt <2 x i64> %2, <i64 3, i64 3>1522 %4 = sext <2 x i1> %3 to <2 x i64>1523 ret <2 x i64> %41524}1525 1526define <2 x i64> @ult_4_v2i64(<2 x i64> %0) {1527; CHECK-LABEL: ult_4_v2i64:1528; CHECK: // %bb.0:1529; CHECK-NEXT: cnt v0.16b, v0.16b1530; CHECK-NEXT: mov w8, #41531; CHECK-NEXT: dup v1.2d, x81532; CHECK-NEXT: uaddlp v0.8h, v0.16b1533; CHECK-NEXT: uaddlp v0.4s, v0.8h1534; CHECK-NEXT: uaddlp v0.2d, v0.4s1535; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1536; CHECK-NEXT: ret1537 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1538 %3 = icmp ult <2 x i64> %2, <i64 4, i64 4>1539 %4 = sext <2 x i1> %3 to <2 x i64>1540 ret <2 x i64> %41541}1542 1543define <2 x i64> @ugt_4_v2i64(<2 x i64> %0) {1544; CHECK-LABEL: ugt_4_v2i64:1545; CHECK: // %bb.0:1546; CHECK-NEXT: cnt v0.16b, v0.16b1547; CHECK-NEXT: mov w8, #41548; CHECK-NEXT: dup v1.2d, x81549; CHECK-NEXT: uaddlp v0.8h, v0.16b1550; CHECK-NEXT: uaddlp v0.4s, v0.8h1551; CHECK-NEXT: uaddlp v0.2d, v0.4s1552; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1553; CHECK-NEXT: ret1554 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1555 %3 = icmp ugt <2 x i64> %2, <i64 4, i64 4>1556 %4 = sext <2 x i1> %3 to <2 x i64>1557 ret <2 x i64> %41558}1559 1560define <2 x i64> @ult_5_v2i64(<2 x i64> %0) {1561; CHECK-LABEL: ult_5_v2i64:1562; CHECK: // %bb.0:1563; CHECK-NEXT: cnt v0.16b, v0.16b1564; CHECK-NEXT: mov w8, #51565; CHECK-NEXT: dup v1.2d, x81566; CHECK-NEXT: uaddlp v0.8h, v0.16b1567; CHECK-NEXT: uaddlp v0.4s, v0.8h1568; CHECK-NEXT: uaddlp v0.2d, v0.4s1569; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1570; CHECK-NEXT: ret1571 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1572 %3 = icmp ult <2 x i64> %2, <i64 5, i64 5>1573 %4 = sext <2 x i1> %3 to <2 x i64>1574 ret <2 x i64> %41575}1576 1577define <2 x i64> @ugt_5_v2i64(<2 x i64> %0) {1578; CHECK-LABEL: ugt_5_v2i64:1579; CHECK: // %bb.0:1580; CHECK-NEXT: cnt v0.16b, v0.16b1581; CHECK-NEXT: mov w8, #51582; CHECK-NEXT: dup v1.2d, x81583; CHECK-NEXT: uaddlp v0.8h, v0.16b1584; CHECK-NEXT: uaddlp v0.4s, v0.8h1585; CHECK-NEXT: uaddlp v0.2d, v0.4s1586; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1587; CHECK-NEXT: ret1588 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1589 %3 = icmp ugt <2 x i64> %2, <i64 5, i64 5>1590 %4 = sext <2 x i1> %3 to <2 x i64>1591 ret <2 x i64> %41592}1593 1594define <2 x i64> @ult_6_v2i64(<2 x i64> %0) {1595; CHECK-LABEL: ult_6_v2i64:1596; CHECK: // %bb.0:1597; CHECK-NEXT: cnt v0.16b, v0.16b1598; CHECK-NEXT: mov w8, #61599; CHECK-NEXT: dup v1.2d, x81600; CHECK-NEXT: uaddlp v0.8h, v0.16b1601; CHECK-NEXT: uaddlp v0.4s, v0.8h1602; CHECK-NEXT: uaddlp v0.2d, v0.4s1603; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1604; CHECK-NEXT: ret1605 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1606 %3 = icmp ult <2 x i64> %2, <i64 6, i64 6>1607 %4 = sext <2 x i1> %3 to <2 x i64>1608 ret <2 x i64> %41609}1610 1611define <2 x i64> @ugt_6_v2i64(<2 x i64> %0) {1612; CHECK-LABEL: ugt_6_v2i64:1613; CHECK: // %bb.0:1614; CHECK-NEXT: cnt v0.16b, v0.16b1615; CHECK-NEXT: mov w8, #61616; CHECK-NEXT: dup v1.2d, x81617; CHECK-NEXT: uaddlp v0.8h, v0.16b1618; CHECK-NEXT: uaddlp v0.4s, v0.8h1619; CHECK-NEXT: uaddlp v0.2d, v0.4s1620; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1621; CHECK-NEXT: ret1622 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1623 %3 = icmp ugt <2 x i64> %2, <i64 6, i64 6>1624 %4 = sext <2 x i1> %3 to <2 x i64>1625 ret <2 x i64> %41626}1627 1628define <2 x i64> @ult_7_v2i64(<2 x i64> %0) {1629; CHECK-LABEL: ult_7_v2i64:1630; CHECK: // %bb.0:1631; CHECK-NEXT: cnt v0.16b, v0.16b1632; CHECK-NEXT: mov w8, #71633; CHECK-NEXT: dup v1.2d, x81634; CHECK-NEXT: uaddlp v0.8h, v0.16b1635; CHECK-NEXT: uaddlp v0.4s, v0.8h1636; CHECK-NEXT: uaddlp v0.2d, v0.4s1637; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1638; CHECK-NEXT: ret1639 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1640 %3 = icmp ult <2 x i64> %2, <i64 7, i64 7>1641 %4 = sext <2 x i1> %3 to <2 x i64>1642 ret <2 x i64> %41643}1644 1645define <2 x i64> @ugt_7_v2i64(<2 x i64> %0) {1646; CHECK-LABEL: ugt_7_v2i64:1647; CHECK: // %bb.0:1648; CHECK-NEXT: cnt v0.16b, v0.16b1649; CHECK-NEXT: mov w8, #71650; CHECK-NEXT: dup v1.2d, x81651; CHECK-NEXT: uaddlp v0.8h, v0.16b1652; CHECK-NEXT: uaddlp v0.4s, v0.8h1653; CHECK-NEXT: uaddlp v0.2d, v0.4s1654; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1655; CHECK-NEXT: ret1656 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1657 %3 = icmp ugt <2 x i64> %2, <i64 7, i64 7>1658 %4 = sext <2 x i1> %3 to <2 x i64>1659 ret <2 x i64> %41660}1661 1662define <2 x i64> @ult_8_v2i64(<2 x i64> %0) {1663; CHECK-LABEL: ult_8_v2i64:1664; CHECK: // %bb.0:1665; CHECK-NEXT: cnt v0.16b, v0.16b1666; CHECK-NEXT: mov w8, #81667; CHECK-NEXT: dup v1.2d, x81668; CHECK-NEXT: uaddlp v0.8h, v0.16b1669; CHECK-NEXT: uaddlp v0.4s, v0.8h1670; CHECK-NEXT: uaddlp v0.2d, v0.4s1671; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1672; CHECK-NEXT: ret1673 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1674 %3 = icmp ult <2 x i64> %2, <i64 8, i64 8>1675 %4 = sext <2 x i1> %3 to <2 x i64>1676 ret <2 x i64> %41677}1678 1679define <2 x i64> @ugt_8_v2i64(<2 x i64> %0) {1680; CHECK-LABEL: ugt_8_v2i64:1681; CHECK: // %bb.0:1682; CHECK-NEXT: cnt v0.16b, v0.16b1683; CHECK-NEXT: mov w8, #81684; CHECK-NEXT: dup v1.2d, x81685; CHECK-NEXT: uaddlp v0.8h, v0.16b1686; CHECK-NEXT: uaddlp v0.4s, v0.8h1687; CHECK-NEXT: uaddlp v0.2d, v0.4s1688; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1689; CHECK-NEXT: ret1690 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1691 %3 = icmp ugt <2 x i64> %2, <i64 8, i64 8>1692 %4 = sext <2 x i1> %3 to <2 x i64>1693 ret <2 x i64> %41694}1695 1696define <2 x i64> @ult_9_v2i64(<2 x i64> %0) {1697; CHECK-LABEL: ult_9_v2i64:1698; CHECK: // %bb.0:1699; CHECK-NEXT: cnt v0.16b, v0.16b1700; CHECK-NEXT: mov w8, #91701; CHECK-NEXT: dup v1.2d, x81702; CHECK-NEXT: uaddlp v0.8h, v0.16b1703; CHECK-NEXT: uaddlp v0.4s, v0.8h1704; CHECK-NEXT: uaddlp v0.2d, v0.4s1705; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1706; CHECK-NEXT: ret1707 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1708 %3 = icmp ult <2 x i64> %2, <i64 9, i64 9>1709 %4 = sext <2 x i1> %3 to <2 x i64>1710 ret <2 x i64> %41711}1712 1713define <2 x i64> @ugt_9_v2i64(<2 x i64> %0) {1714; CHECK-LABEL: ugt_9_v2i64:1715; CHECK: // %bb.0:1716; CHECK-NEXT: cnt v0.16b, v0.16b1717; CHECK-NEXT: mov w8, #91718; CHECK-NEXT: dup v1.2d, x81719; CHECK-NEXT: uaddlp v0.8h, v0.16b1720; CHECK-NEXT: uaddlp v0.4s, v0.8h1721; CHECK-NEXT: uaddlp v0.2d, v0.4s1722; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1723; CHECK-NEXT: ret1724 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1725 %3 = icmp ugt <2 x i64> %2, <i64 9, i64 9>1726 %4 = sext <2 x i1> %3 to <2 x i64>1727 ret <2 x i64> %41728}1729 1730define <2 x i64> @ult_10_v2i64(<2 x i64> %0) {1731; CHECK-LABEL: ult_10_v2i64:1732; CHECK: // %bb.0:1733; CHECK-NEXT: cnt v0.16b, v0.16b1734; CHECK-NEXT: mov w8, #101735; CHECK-NEXT: dup v1.2d, x81736; CHECK-NEXT: uaddlp v0.8h, v0.16b1737; CHECK-NEXT: uaddlp v0.4s, v0.8h1738; CHECK-NEXT: uaddlp v0.2d, v0.4s1739; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1740; CHECK-NEXT: ret1741 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1742 %3 = icmp ult <2 x i64> %2, <i64 10, i64 10>1743 %4 = sext <2 x i1> %3 to <2 x i64>1744 ret <2 x i64> %41745}1746 1747define <2 x i64> @ugt_10_v2i64(<2 x i64> %0) {1748; CHECK-LABEL: ugt_10_v2i64:1749; CHECK: // %bb.0:1750; CHECK-NEXT: cnt v0.16b, v0.16b1751; CHECK-NEXT: mov w8, #101752; CHECK-NEXT: dup v1.2d, x81753; CHECK-NEXT: uaddlp v0.8h, v0.16b1754; CHECK-NEXT: uaddlp v0.4s, v0.8h1755; CHECK-NEXT: uaddlp v0.2d, v0.4s1756; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1757; CHECK-NEXT: ret1758 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1759 %3 = icmp ugt <2 x i64> %2, <i64 10, i64 10>1760 %4 = sext <2 x i1> %3 to <2 x i64>1761 ret <2 x i64> %41762}1763 1764define <2 x i64> @ult_11_v2i64(<2 x i64> %0) {1765; CHECK-LABEL: ult_11_v2i64:1766; CHECK: // %bb.0:1767; CHECK-NEXT: cnt v0.16b, v0.16b1768; CHECK-NEXT: mov w8, #111769; CHECK-NEXT: dup v1.2d, x81770; CHECK-NEXT: uaddlp v0.8h, v0.16b1771; CHECK-NEXT: uaddlp v0.4s, v0.8h1772; CHECK-NEXT: uaddlp v0.2d, v0.4s1773; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1774; CHECK-NEXT: ret1775 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1776 %3 = icmp ult <2 x i64> %2, <i64 11, i64 11>1777 %4 = sext <2 x i1> %3 to <2 x i64>1778 ret <2 x i64> %41779}1780 1781define <2 x i64> @ugt_11_v2i64(<2 x i64> %0) {1782; CHECK-LABEL: ugt_11_v2i64:1783; CHECK: // %bb.0:1784; CHECK-NEXT: cnt v0.16b, v0.16b1785; CHECK-NEXT: mov w8, #111786; CHECK-NEXT: dup v1.2d, x81787; CHECK-NEXT: uaddlp v0.8h, v0.16b1788; CHECK-NEXT: uaddlp v0.4s, v0.8h1789; CHECK-NEXT: uaddlp v0.2d, v0.4s1790; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1791; CHECK-NEXT: ret1792 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1793 %3 = icmp ugt <2 x i64> %2, <i64 11, i64 11>1794 %4 = sext <2 x i1> %3 to <2 x i64>1795 ret <2 x i64> %41796}1797 1798define <2 x i64> @ult_12_v2i64(<2 x i64> %0) {1799; CHECK-LABEL: ult_12_v2i64:1800; CHECK: // %bb.0:1801; CHECK-NEXT: cnt v0.16b, v0.16b1802; CHECK-NEXT: mov w8, #121803; CHECK-NEXT: dup v1.2d, x81804; CHECK-NEXT: uaddlp v0.8h, v0.16b1805; CHECK-NEXT: uaddlp v0.4s, v0.8h1806; CHECK-NEXT: uaddlp v0.2d, v0.4s1807; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1808; CHECK-NEXT: ret1809 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1810 %3 = icmp ult <2 x i64> %2, <i64 12, i64 12>1811 %4 = sext <2 x i1> %3 to <2 x i64>1812 ret <2 x i64> %41813}1814 1815define <2 x i64> @ugt_12_v2i64(<2 x i64> %0) {1816; CHECK-LABEL: ugt_12_v2i64:1817; CHECK: // %bb.0:1818; CHECK-NEXT: cnt v0.16b, v0.16b1819; CHECK-NEXT: mov w8, #121820; CHECK-NEXT: dup v1.2d, x81821; CHECK-NEXT: uaddlp v0.8h, v0.16b1822; CHECK-NEXT: uaddlp v0.4s, v0.8h1823; CHECK-NEXT: uaddlp v0.2d, v0.4s1824; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1825; CHECK-NEXT: ret1826 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1827 %3 = icmp ugt <2 x i64> %2, <i64 12, i64 12>1828 %4 = sext <2 x i1> %3 to <2 x i64>1829 ret <2 x i64> %41830}1831 1832define <2 x i64> @ult_13_v2i64(<2 x i64> %0) {1833; CHECK-LABEL: ult_13_v2i64:1834; CHECK: // %bb.0:1835; CHECK-NEXT: cnt v0.16b, v0.16b1836; CHECK-NEXT: mov w8, #131837; CHECK-NEXT: dup v1.2d, x81838; CHECK-NEXT: uaddlp v0.8h, v0.16b1839; CHECK-NEXT: uaddlp v0.4s, v0.8h1840; CHECK-NEXT: uaddlp v0.2d, v0.4s1841; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1842; CHECK-NEXT: ret1843 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1844 %3 = icmp ult <2 x i64> %2, <i64 13, i64 13>1845 %4 = sext <2 x i1> %3 to <2 x i64>1846 ret <2 x i64> %41847}1848 1849define <2 x i64> @ugt_13_v2i64(<2 x i64> %0) {1850; CHECK-LABEL: ugt_13_v2i64:1851; CHECK: // %bb.0:1852; CHECK-NEXT: cnt v0.16b, v0.16b1853; CHECK-NEXT: mov w8, #131854; CHECK-NEXT: dup v1.2d, x81855; CHECK-NEXT: uaddlp v0.8h, v0.16b1856; CHECK-NEXT: uaddlp v0.4s, v0.8h1857; CHECK-NEXT: uaddlp v0.2d, v0.4s1858; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1859; CHECK-NEXT: ret1860 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1861 %3 = icmp ugt <2 x i64> %2, <i64 13, i64 13>1862 %4 = sext <2 x i1> %3 to <2 x i64>1863 ret <2 x i64> %41864}1865 1866define <2 x i64> @ult_14_v2i64(<2 x i64> %0) {1867; CHECK-LABEL: ult_14_v2i64:1868; CHECK: // %bb.0:1869; CHECK-NEXT: cnt v0.16b, v0.16b1870; CHECK-NEXT: mov w8, #141871; CHECK-NEXT: dup v1.2d, x81872; CHECK-NEXT: uaddlp v0.8h, v0.16b1873; CHECK-NEXT: uaddlp v0.4s, v0.8h1874; CHECK-NEXT: uaddlp v0.2d, v0.4s1875; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1876; CHECK-NEXT: ret1877 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1878 %3 = icmp ult <2 x i64> %2, <i64 14, i64 14>1879 %4 = sext <2 x i1> %3 to <2 x i64>1880 ret <2 x i64> %41881}1882 1883define <2 x i64> @ugt_14_v2i64(<2 x i64> %0) {1884; CHECK-LABEL: ugt_14_v2i64:1885; CHECK: // %bb.0:1886; CHECK-NEXT: cnt v0.16b, v0.16b1887; CHECK-NEXT: mov w8, #141888; CHECK-NEXT: dup v1.2d, x81889; CHECK-NEXT: uaddlp v0.8h, v0.16b1890; CHECK-NEXT: uaddlp v0.4s, v0.8h1891; CHECK-NEXT: uaddlp v0.2d, v0.4s1892; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1893; CHECK-NEXT: ret1894 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1895 %3 = icmp ugt <2 x i64> %2, <i64 14, i64 14>1896 %4 = sext <2 x i1> %3 to <2 x i64>1897 ret <2 x i64> %41898}1899 1900define <2 x i64> @ult_15_v2i64(<2 x i64> %0) {1901; CHECK-LABEL: ult_15_v2i64:1902; CHECK: // %bb.0:1903; CHECK-NEXT: cnt v0.16b, v0.16b1904; CHECK-NEXT: mov w8, #151905; CHECK-NEXT: dup v1.2d, x81906; CHECK-NEXT: uaddlp v0.8h, v0.16b1907; CHECK-NEXT: uaddlp v0.4s, v0.8h1908; CHECK-NEXT: uaddlp v0.2d, v0.4s1909; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1910; CHECK-NEXT: ret1911 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1912 %3 = icmp ult <2 x i64> %2, <i64 15, i64 15>1913 %4 = sext <2 x i1> %3 to <2 x i64>1914 ret <2 x i64> %41915}1916 1917define <2 x i64> @ugt_15_v2i64(<2 x i64> %0) {1918; CHECK-LABEL: ugt_15_v2i64:1919; CHECK: // %bb.0:1920; CHECK-NEXT: cnt v0.16b, v0.16b1921; CHECK-NEXT: mov w8, #151922; CHECK-NEXT: dup v1.2d, x81923; CHECK-NEXT: uaddlp v0.8h, v0.16b1924; CHECK-NEXT: uaddlp v0.4s, v0.8h1925; CHECK-NEXT: uaddlp v0.2d, v0.4s1926; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1927; CHECK-NEXT: ret1928 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1929 %3 = icmp ugt <2 x i64> %2, <i64 15, i64 15>1930 %4 = sext <2 x i1> %3 to <2 x i64>1931 ret <2 x i64> %41932}1933 1934define <2 x i64> @ult_16_v2i64(<2 x i64> %0) {1935; CHECK-LABEL: ult_16_v2i64:1936; CHECK: // %bb.0:1937; CHECK-NEXT: cnt v0.16b, v0.16b1938; CHECK-NEXT: mov w8, #161939; CHECK-NEXT: dup v1.2d, x81940; CHECK-NEXT: uaddlp v0.8h, v0.16b1941; CHECK-NEXT: uaddlp v0.4s, v0.8h1942; CHECK-NEXT: uaddlp v0.2d, v0.4s1943; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1944; CHECK-NEXT: ret1945 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1946 %3 = icmp ult <2 x i64> %2, <i64 16, i64 16>1947 %4 = sext <2 x i1> %3 to <2 x i64>1948 ret <2 x i64> %41949}1950 1951define <2 x i64> @ugt_16_v2i64(<2 x i64> %0) {1952; CHECK-LABEL: ugt_16_v2i64:1953; CHECK: // %bb.0:1954; CHECK-NEXT: cnt v0.16b, v0.16b1955; CHECK-NEXT: mov w8, #161956; CHECK-NEXT: dup v1.2d, x81957; CHECK-NEXT: uaddlp v0.8h, v0.16b1958; CHECK-NEXT: uaddlp v0.4s, v0.8h1959; CHECK-NEXT: uaddlp v0.2d, v0.4s1960; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1961; CHECK-NEXT: ret1962 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1963 %3 = icmp ugt <2 x i64> %2, <i64 16, i64 16>1964 %4 = sext <2 x i1> %3 to <2 x i64>1965 ret <2 x i64> %41966}1967 1968define <2 x i64> @ult_17_v2i64(<2 x i64> %0) {1969; CHECK-LABEL: ult_17_v2i64:1970; CHECK: // %bb.0:1971; CHECK-NEXT: cnt v0.16b, v0.16b1972; CHECK-NEXT: mov w8, #171973; CHECK-NEXT: dup v1.2d, x81974; CHECK-NEXT: uaddlp v0.8h, v0.16b1975; CHECK-NEXT: uaddlp v0.4s, v0.8h1976; CHECK-NEXT: uaddlp v0.2d, v0.4s1977; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d1978; CHECK-NEXT: ret1979 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1980 %3 = icmp ult <2 x i64> %2, <i64 17, i64 17>1981 %4 = sext <2 x i1> %3 to <2 x i64>1982 ret <2 x i64> %41983}1984 1985define <2 x i64> @ugt_17_v2i64(<2 x i64> %0) {1986; CHECK-LABEL: ugt_17_v2i64:1987; CHECK: // %bb.0:1988; CHECK-NEXT: cnt v0.16b, v0.16b1989; CHECK-NEXT: mov w8, #171990; CHECK-NEXT: dup v1.2d, x81991; CHECK-NEXT: uaddlp v0.8h, v0.16b1992; CHECK-NEXT: uaddlp v0.4s, v0.8h1993; CHECK-NEXT: uaddlp v0.2d, v0.4s1994; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d1995; CHECK-NEXT: ret1996 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)1997 %3 = icmp ugt <2 x i64> %2, <i64 17, i64 17>1998 %4 = sext <2 x i1> %3 to <2 x i64>1999 ret <2 x i64> %42000}2001 2002define <2 x i64> @ult_18_v2i64(<2 x i64> %0) {2003; CHECK-LABEL: ult_18_v2i64:2004; CHECK: // %bb.0:2005; CHECK-NEXT: cnt v0.16b, v0.16b2006; CHECK-NEXT: mov w8, #182007; CHECK-NEXT: dup v1.2d, x82008; CHECK-NEXT: uaddlp v0.8h, v0.16b2009; CHECK-NEXT: uaddlp v0.4s, v0.8h2010; CHECK-NEXT: uaddlp v0.2d, v0.4s2011; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2012; CHECK-NEXT: ret2013 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2014 %3 = icmp ult <2 x i64> %2, <i64 18, i64 18>2015 %4 = sext <2 x i1> %3 to <2 x i64>2016 ret <2 x i64> %42017}2018 2019define <2 x i64> @ugt_18_v2i64(<2 x i64> %0) {2020; CHECK-LABEL: ugt_18_v2i64:2021; CHECK: // %bb.0:2022; CHECK-NEXT: cnt v0.16b, v0.16b2023; CHECK-NEXT: mov w8, #182024; CHECK-NEXT: dup v1.2d, x82025; CHECK-NEXT: uaddlp v0.8h, v0.16b2026; CHECK-NEXT: uaddlp v0.4s, v0.8h2027; CHECK-NEXT: uaddlp v0.2d, v0.4s2028; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2029; CHECK-NEXT: ret2030 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2031 %3 = icmp ugt <2 x i64> %2, <i64 18, i64 18>2032 %4 = sext <2 x i1> %3 to <2 x i64>2033 ret <2 x i64> %42034}2035 2036define <2 x i64> @ult_19_v2i64(<2 x i64> %0) {2037; CHECK-LABEL: ult_19_v2i64:2038; CHECK: // %bb.0:2039; CHECK-NEXT: cnt v0.16b, v0.16b2040; CHECK-NEXT: mov w8, #192041; CHECK-NEXT: dup v1.2d, x82042; CHECK-NEXT: uaddlp v0.8h, v0.16b2043; CHECK-NEXT: uaddlp v0.4s, v0.8h2044; CHECK-NEXT: uaddlp v0.2d, v0.4s2045; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2046; CHECK-NEXT: ret2047 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2048 %3 = icmp ult <2 x i64> %2, <i64 19, i64 19>2049 %4 = sext <2 x i1> %3 to <2 x i64>2050 ret <2 x i64> %42051}2052 2053define <2 x i64> @ugt_19_v2i64(<2 x i64> %0) {2054; CHECK-LABEL: ugt_19_v2i64:2055; CHECK: // %bb.0:2056; CHECK-NEXT: cnt v0.16b, v0.16b2057; CHECK-NEXT: mov w8, #192058; CHECK-NEXT: dup v1.2d, x82059; CHECK-NEXT: uaddlp v0.8h, v0.16b2060; CHECK-NEXT: uaddlp v0.4s, v0.8h2061; CHECK-NEXT: uaddlp v0.2d, v0.4s2062; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2063; CHECK-NEXT: ret2064 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2065 %3 = icmp ugt <2 x i64> %2, <i64 19, i64 19>2066 %4 = sext <2 x i1> %3 to <2 x i64>2067 ret <2 x i64> %42068}2069 2070define <2 x i64> @ult_20_v2i64(<2 x i64> %0) {2071; CHECK-LABEL: ult_20_v2i64:2072; CHECK: // %bb.0:2073; CHECK-NEXT: cnt v0.16b, v0.16b2074; CHECK-NEXT: mov w8, #202075; CHECK-NEXT: dup v1.2d, x82076; CHECK-NEXT: uaddlp v0.8h, v0.16b2077; CHECK-NEXT: uaddlp v0.4s, v0.8h2078; CHECK-NEXT: uaddlp v0.2d, v0.4s2079; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2080; CHECK-NEXT: ret2081 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2082 %3 = icmp ult <2 x i64> %2, <i64 20, i64 20>2083 %4 = sext <2 x i1> %3 to <2 x i64>2084 ret <2 x i64> %42085}2086 2087define <2 x i64> @ugt_20_v2i64(<2 x i64> %0) {2088; CHECK-LABEL: ugt_20_v2i64:2089; CHECK: // %bb.0:2090; CHECK-NEXT: cnt v0.16b, v0.16b2091; CHECK-NEXT: mov w8, #202092; CHECK-NEXT: dup v1.2d, x82093; CHECK-NEXT: uaddlp v0.8h, v0.16b2094; CHECK-NEXT: uaddlp v0.4s, v0.8h2095; CHECK-NEXT: uaddlp v0.2d, v0.4s2096; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2097; CHECK-NEXT: ret2098 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2099 %3 = icmp ugt <2 x i64> %2, <i64 20, i64 20>2100 %4 = sext <2 x i1> %3 to <2 x i64>2101 ret <2 x i64> %42102}2103 2104define <2 x i64> @ult_21_v2i64(<2 x i64> %0) {2105; CHECK-LABEL: ult_21_v2i64:2106; CHECK: // %bb.0:2107; CHECK-NEXT: cnt v0.16b, v0.16b2108; CHECK-NEXT: mov w8, #212109; CHECK-NEXT: dup v1.2d, x82110; CHECK-NEXT: uaddlp v0.8h, v0.16b2111; CHECK-NEXT: uaddlp v0.4s, v0.8h2112; CHECK-NEXT: uaddlp v0.2d, v0.4s2113; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2114; CHECK-NEXT: ret2115 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2116 %3 = icmp ult <2 x i64> %2, <i64 21, i64 21>2117 %4 = sext <2 x i1> %3 to <2 x i64>2118 ret <2 x i64> %42119}2120 2121define <2 x i64> @ugt_21_v2i64(<2 x i64> %0) {2122; CHECK-LABEL: ugt_21_v2i64:2123; CHECK: // %bb.0:2124; CHECK-NEXT: cnt v0.16b, v0.16b2125; CHECK-NEXT: mov w8, #212126; CHECK-NEXT: dup v1.2d, x82127; CHECK-NEXT: uaddlp v0.8h, v0.16b2128; CHECK-NEXT: uaddlp v0.4s, v0.8h2129; CHECK-NEXT: uaddlp v0.2d, v0.4s2130; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2131; CHECK-NEXT: ret2132 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2133 %3 = icmp ugt <2 x i64> %2, <i64 21, i64 21>2134 %4 = sext <2 x i1> %3 to <2 x i64>2135 ret <2 x i64> %42136}2137 2138define <2 x i64> @ult_22_v2i64(<2 x i64> %0) {2139; CHECK-LABEL: ult_22_v2i64:2140; CHECK: // %bb.0:2141; CHECK-NEXT: cnt v0.16b, v0.16b2142; CHECK-NEXT: mov w8, #222143; CHECK-NEXT: dup v1.2d, x82144; CHECK-NEXT: uaddlp v0.8h, v0.16b2145; CHECK-NEXT: uaddlp v0.4s, v0.8h2146; CHECK-NEXT: uaddlp v0.2d, v0.4s2147; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2148; CHECK-NEXT: ret2149 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2150 %3 = icmp ult <2 x i64> %2, <i64 22, i64 22>2151 %4 = sext <2 x i1> %3 to <2 x i64>2152 ret <2 x i64> %42153}2154 2155define <2 x i64> @ugt_22_v2i64(<2 x i64> %0) {2156; CHECK-LABEL: ugt_22_v2i64:2157; CHECK: // %bb.0:2158; CHECK-NEXT: cnt v0.16b, v0.16b2159; CHECK-NEXT: mov w8, #222160; CHECK-NEXT: dup v1.2d, x82161; CHECK-NEXT: uaddlp v0.8h, v0.16b2162; CHECK-NEXT: uaddlp v0.4s, v0.8h2163; CHECK-NEXT: uaddlp v0.2d, v0.4s2164; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2165; CHECK-NEXT: ret2166 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2167 %3 = icmp ugt <2 x i64> %2, <i64 22, i64 22>2168 %4 = sext <2 x i1> %3 to <2 x i64>2169 ret <2 x i64> %42170}2171 2172define <2 x i64> @ult_23_v2i64(<2 x i64> %0) {2173; CHECK-LABEL: ult_23_v2i64:2174; CHECK: // %bb.0:2175; CHECK-NEXT: cnt v0.16b, v0.16b2176; CHECK-NEXT: mov w8, #232177; CHECK-NEXT: dup v1.2d, x82178; CHECK-NEXT: uaddlp v0.8h, v0.16b2179; CHECK-NEXT: uaddlp v0.4s, v0.8h2180; CHECK-NEXT: uaddlp v0.2d, v0.4s2181; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2182; CHECK-NEXT: ret2183 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2184 %3 = icmp ult <2 x i64> %2, <i64 23, i64 23>2185 %4 = sext <2 x i1> %3 to <2 x i64>2186 ret <2 x i64> %42187}2188 2189define <2 x i64> @ugt_23_v2i64(<2 x i64> %0) {2190; CHECK-LABEL: ugt_23_v2i64:2191; CHECK: // %bb.0:2192; CHECK-NEXT: cnt v0.16b, v0.16b2193; CHECK-NEXT: mov w8, #232194; CHECK-NEXT: dup v1.2d, x82195; CHECK-NEXT: uaddlp v0.8h, v0.16b2196; CHECK-NEXT: uaddlp v0.4s, v0.8h2197; CHECK-NEXT: uaddlp v0.2d, v0.4s2198; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2199; CHECK-NEXT: ret2200 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2201 %3 = icmp ugt <2 x i64> %2, <i64 23, i64 23>2202 %4 = sext <2 x i1> %3 to <2 x i64>2203 ret <2 x i64> %42204}2205 2206define <2 x i64> @ult_24_v2i64(<2 x i64> %0) {2207; CHECK-LABEL: ult_24_v2i64:2208; CHECK: // %bb.0:2209; CHECK-NEXT: cnt v0.16b, v0.16b2210; CHECK-NEXT: mov w8, #242211; CHECK-NEXT: dup v1.2d, x82212; CHECK-NEXT: uaddlp v0.8h, v0.16b2213; CHECK-NEXT: uaddlp v0.4s, v0.8h2214; CHECK-NEXT: uaddlp v0.2d, v0.4s2215; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2216; CHECK-NEXT: ret2217 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2218 %3 = icmp ult <2 x i64> %2, <i64 24, i64 24>2219 %4 = sext <2 x i1> %3 to <2 x i64>2220 ret <2 x i64> %42221}2222 2223define <2 x i64> @ugt_24_v2i64(<2 x i64> %0) {2224; CHECK-LABEL: ugt_24_v2i64:2225; CHECK: // %bb.0:2226; CHECK-NEXT: cnt v0.16b, v0.16b2227; CHECK-NEXT: mov w8, #242228; CHECK-NEXT: dup v1.2d, x82229; CHECK-NEXT: uaddlp v0.8h, v0.16b2230; CHECK-NEXT: uaddlp v0.4s, v0.8h2231; CHECK-NEXT: uaddlp v0.2d, v0.4s2232; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2233; CHECK-NEXT: ret2234 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2235 %3 = icmp ugt <2 x i64> %2, <i64 24, i64 24>2236 %4 = sext <2 x i1> %3 to <2 x i64>2237 ret <2 x i64> %42238}2239 2240define <2 x i64> @ult_25_v2i64(<2 x i64> %0) {2241; CHECK-LABEL: ult_25_v2i64:2242; CHECK: // %bb.0:2243; CHECK-NEXT: cnt v0.16b, v0.16b2244; CHECK-NEXT: mov w8, #252245; CHECK-NEXT: dup v1.2d, x82246; CHECK-NEXT: uaddlp v0.8h, v0.16b2247; CHECK-NEXT: uaddlp v0.4s, v0.8h2248; CHECK-NEXT: uaddlp v0.2d, v0.4s2249; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2250; CHECK-NEXT: ret2251 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2252 %3 = icmp ult <2 x i64> %2, <i64 25, i64 25>2253 %4 = sext <2 x i1> %3 to <2 x i64>2254 ret <2 x i64> %42255}2256 2257define <2 x i64> @ugt_25_v2i64(<2 x i64> %0) {2258; CHECK-LABEL: ugt_25_v2i64:2259; CHECK: // %bb.0:2260; CHECK-NEXT: cnt v0.16b, v0.16b2261; CHECK-NEXT: mov w8, #252262; CHECK-NEXT: dup v1.2d, x82263; CHECK-NEXT: uaddlp v0.8h, v0.16b2264; CHECK-NEXT: uaddlp v0.4s, v0.8h2265; CHECK-NEXT: uaddlp v0.2d, v0.4s2266; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2267; CHECK-NEXT: ret2268 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2269 %3 = icmp ugt <2 x i64> %2, <i64 25, i64 25>2270 %4 = sext <2 x i1> %3 to <2 x i64>2271 ret <2 x i64> %42272}2273 2274define <2 x i64> @ult_26_v2i64(<2 x i64> %0) {2275; CHECK-LABEL: ult_26_v2i64:2276; CHECK: // %bb.0:2277; CHECK-NEXT: cnt v0.16b, v0.16b2278; CHECK-NEXT: mov w8, #262279; CHECK-NEXT: dup v1.2d, x82280; CHECK-NEXT: uaddlp v0.8h, v0.16b2281; CHECK-NEXT: uaddlp v0.4s, v0.8h2282; CHECK-NEXT: uaddlp v0.2d, v0.4s2283; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2284; CHECK-NEXT: ret2285 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2286 %3 = icmp ult <2 x i64> %2, <i64 26, i64 26>2287 %4 = sext <2 x i1> %3 to <2 x i64>2288 ret <2 x i64> %42289}2290 2291define <2 x i64> @ugt_26_v2i64(<2 x i64> %0) {2292; CHECK-LABEL: ugt_26_v2i64:2293; CHECK: // %bb.0:2294; CHECK-NEXT: cnt v0.16b, v0.16b2295; CHECK-NEXT: mov w8, #262296; CHECK-NEXT: dup v1.2d, x82297; CHECK-NEXT: uaddlp v0.8h, v0.16b2298; CHECK-NEXT: uaddlp v0.4s, v0.8h2299; CHECK-NEXT: uaddlp v0.2d, v0.4s2300; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2301; CHECK-NEXT: ret2302 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2303 %3 = icmp ugt <2 x i64> %2, <i64 26, i64 26>2304 %4 = sext <2 x i1> %3 to <2 x i64>2305 ret <2 x i64> %42306}2307 2308define <2 x i64> @ult_27_v2i64(<2 x i64> %0) {2309; CHECK-LABEL: ult_27_v2i64:2310; CHECK: // %bb.0:2311; CHECK-NEXT: cnt v0.16b, v0.16b2312; CHECK-NEXT: mov w8, #272313; CHECK-NEXT: dup v1.2d, x82314; CHECK-NEXT: uaddlp v0.8h, v0.16b2315; CHECK-NEXT: uaddlp v0.4s, v0.8h2316; CHECK-NEXT: uaddlp v0.2d, v0.4s2317; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2318; CHECK-NEXT: ret2319 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2320 %3 = icmp ult <2 x i64> %2, <i64 27, i64 27>2321 %4 = sext <2 x i1> %3 to <2 x i64>2322 ret <2 x i64> %42323}2324 2325define <2 x i64> @ugt_27_v2i64(<2 x i64> %0) {2326; CHECK-LABEL: ugt_27_v2i64:2327; CHECK: // %bb.0:2328; CHECK-NEXT: cnt v0.16b, v0.16b2329; CHECK-NEXT: mov w8, #272330; CHECK-NEXT: dup v1.2d, x82331; CHECK-NEXT: uaddlp v0.8h, v0.16b2332; CHECK-NEXT: uaddlp v0.4s, v0.8h2333; CHECK-NEXT: uaddlp v0.2d, v0.4s2334; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2335; CHECK-NEXT: ret2336 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2337 %3 = icmp ugt <2 x i64> %2, <i64 27, i64 27>2338 %4 = sext <2 x i1> %3 to <2 x i64>2339 ret <2 x i64> %42340}2341 2342define <2 x i64> @ult_28_v2i64(<2 x i64> %0) {2343; CHECK-LABEL: ult_28_v2i64:2344; CHECK: // %bb.0:2345; CHECK-NEXT: cnt v0.16b, v0.16b2346; CHECK-NEXT: mov w8, #282347; CHECK-NEXT: dup v1.2d, x82348; CHECK-NEXT: uaddlp v0.8h, v0.16b2349; CHECK-NEXT: uaddlp v0.4s, v0.8h2350; CHECK-NEXT: uaddlp v0.2d, v0.4s2351; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2352; CHECK-NEXT: ret2353 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2354 %3 = icmp ult <2 x i64> %2, <i64 28, i64 28>2355 %4 = sext <2 x i1> %3 to <2 x i64>2356 ret <2 x i64> %42357}2358 2359define <2 x i64> @ugt_28_v2i64(<2 x i64> %0) {2360; CHECK-LABEL: ugt_28_v2i64:2361; CHECK: // %bb.0:2362; CHECK-NEXT: cnt v0.16b, v0.16b2363; CHECK-NEXT: mov w8, #282364; CHECK-NEXT: dup v1.2d, x82365; CHECK-NEXT: uaddlp v0.8h, v0.16b2366; CHECK-NEXT: uaddlp v0.4s, v0.8h2367; CHECK-NEXT: uaddlp v0.2d, v0.4s2368; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2369; CHECK-NEXT: ret2370 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2371 %3 = icmp ugt <2 x i64> %2, <i64 28, i64 28>2372 %4 = sext <2 x i1> %3 to <2 x i64>2373 ret <2 x i64> %42374}2375 2376define <2 x i64> @ult_29_v2i64(<2 x i64> %0) {2377; CHECK-LABEL: ult_29_v2i64:2378; CHECK: // %bb.0:2379; CHECK-NEXT: cnt v0.16b, v0.16b2380; CHECK-NEXT: mov w8, #292381; CHECK-NEXT: dup v1.2d, x82382; CHECK-NEXT: uaddlp v0.8h, v0.16b2383; CHECK-NEXT: uaddlp v0.4s, v0.8h2384; CHECK-NEXT: uaddlp v0.2d, v0.4s2385; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2386; CHECK-NEXT: ret2387 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2388 %3 = icmp ult <2 x i64> %2, <i64 29, i64 29>2389 %4 = sext <2 x i1> %3 to <2 x i64>2390 ret <2 x i64> %42391}2392 2393define <2 x i64> @ugt_29_v2i64(<2 x i64> %0) {2394; CHECK-LABEL: ugt_29_v2i64:2395; CHECK: // %bb.0:2396; CHECK-NEXT: cnt v0.16b, v0.16b2397; CHECK-NEXT: mov w8, #292398; CHECK-NEXT: dup v1.2d, x82399; CHECK-NEXT: uaddlp v0.8h, v0.16b2400; CHECK-NEXT: uaddlp v0.4s, v0.8h2401; CHECK-NEXT: uaddlp v0.2d, v0.4s2402; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2403; CHECK-NEXT: ret2404 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2405 %3 = icmp ugt <2 x i64> %2, <i64 29, i64 29>2406 %4 = sext <2 x i1> %3 to <2 x i64>2407 ret <2 x i64> %42408}2409 2410define <2 x i64> @ult_30_v2i64(<2 x i64> %0) {2411; CHECK-LABEL: ult_30_v2i64:2412; CHECK: // %bb.0:2413; CHECK-NEXT: cnt v0.16b, v0.16b2414; CHECK-NEXT: mov w8, #302415; CHECK-NEXT: dup v1.2d, x82416; CHECK-NEXT: uaddlp v0.8h, v0.16b2417; CHECK-NEXT: uaddlp v0.4s, v0.8h2418; CHECK-NEXT: uaddlp v0.2d, v0.4s2419; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2420; CHECK-NEXT: ret2421 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2422 %3 = icmp ult <2 x i64> %2, <i64 30, i64 30>2423 %4 = sext <2 x i1> %3 to <2 x i64>2424 ret <2 x i64> %42425}2426 2427define <2 x i64> @ugt_30_v2i64(<2 x i64> %0) {2428; CHECK-LABEL: ugt_30_v2i64:2429; CHECK: // %bb.0:2430; CHECK-NEXT: cnt v0.16b, v0.16b2431; CHECK-NEXT: mov w8, #302432; CHECK-NEXT: dup v1.2d, x82433; CHECK-NEXT: uaddlp v0.8h, v0.16b2434; CHECK-NEXT: uaddlp v0.4s, v0.8h2435; CHECK-NEXT: uaddlp v0.2d, v0.4s2436; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2437; CHECK-NEXT: ret2438 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2439 %3 = icmp ugt <2 x i64> %2, <i64 30, i64 30>2440 %4 = sext <2 x i1> %3 to <2 x i64>2441 ret <2 x i64> %42442}2443 2444define <2 x i64> @ult_31_v2i64(<2 x i64> %0) {2445; CHECK-LABEL: ult_31_v2i64:2446; CHECK: // %bb.0:2447; CHECK-NEXT: cnt v0.16b, v0.16b2448; CHECK-NEXT: mov w8, #312449; CHECK-NEXT: dup v1.2d, x82450; CHECK-NEXT: uaddlp v0.8h, v0.16b2451; CHECK-NEXT: uaddlp v0.4s, v0.8h2452; CHECK-NEXT: uaddlp v0.2d, v0.4s2453; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2454; CHECK-NEXT: ret2455 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2456 %3 = icmp ult <2 x i64> %2, <i64 31, i64 31>2457 %4 = sext <2 x i1> %3 to <2 x i64>2458 ret <2 x i64> %42459}2460 2461define <2 x i64> @ugt_31_v2i64(<2 x i64> %0) {2462; CHECK-LABEL: ugt_31_v2i64:2463; CHECK: // %bb.0:2464; CHECK-NEXT: cnt v0.16b, v0.16b2465; CHECK-NEXT: mov w8, #312466; CHECK-NEXT: dup v1.2d, x82467; CHECK-NEXT: uaddlp v0.8h, v0.16b2468; CHECK-NEXT: uaddlp v0.4s, v0.8h2469; CHECK-NEXT: uaddlp v0.2d, v0.4s2470; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2471; CHECK-NEXT: ret2472 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2473 %3 = icmp ugt <2 x i64> %2, <i64 31, i64 31>2474 %4 = sext <2 x i1> %3 to <2 x i64>2475 ret <2 x i64> %42476}2477 2478define <2 x i64> @ult_32_v2i64(<2 x i64> %0) {2479; CHECK-LABEL: ult_32_v2i64:2480; CHECK: // %bb.0:2481; CHECK-NEXT: cnt v0.16b, v0.16b2482; CHECK-NEXT: mov w8, #322483; CHECK-NEXT: dup v1.2d, x82484; CHECK-NEXT: uaddlp v0.8h, v0.16b2485; CHECK-NEXT: uaddlp v0.4s, v0.8h2486; CHECK-NEXT: uaddlp v0.2d, v0.4s2487; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2488; CHECK-NEXT: ret2489 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2490 %3 = icmp ult <2 x i64> %2, <i64 32, i64 32>2491 %4 = sext <2 x i1> %3 to <2 x i64>2492 ret <2 x i64> %42493}2494 2495define <2 x i64> @ugt_32_v2i64(<2 x i64> %0) {2496; CHECK-LABEL: ugt_32_v2i64:2497; CHECK: // %bb.0:2498; CHECK-NEXT: cnt v0.16b, v0.16b2499; CHECK-NEXT: mov w8, #322500; CHECK-NEXT: dup v1.2d, x82501; CHECK-NEXT: uaddlp v0.8h, v0.16b2502; CHECK-NEXT: uaddlp v0.4s, v0.8h2503; CHECK-NEXT: uaddlp v0.2d, v0.4s2504; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2505; CHECK-NEXT: ret2506 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2507 %3 = icmp ugt <2 x i64> %2, <i64 32, i64 32>2508 %4 = sext <2 x i1> %3 to <2 x i64>2509 ret <2 x i64> %42510}2511 2512define <2 x i64> @ult_33_v2i64(<2 x i64> %0) {2513; CHECK-LABEL: ult_33_v2i64:2514; CHECK: // %bb.0:2515; CHECK-NEXT: cnt v0.16b, v0.16b2516; CHECK-NEXT: mov w8, #332517; CHECK-NEXT: dup v1.2d, x82518; CHECK-NEXT: uaddlp v0.8h, v0.16b2519; CHECK-NEXT: uaddlp v0.4s, v0.8h2520; CHECK-NEXT: uaddlp v0.2d, v0.4s2521; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2522; CHECK-NEXT: ret2523 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2524 %3 = icmp ult <2 x i64> %2, <i64 33, i64 33>2525 %4 = sext <2 x i1> %3 to <2 x i64>2526 ret <2 x i64> %42527}2528 2529define <2 x i64> @ugt_33_v2i64(<2 x i64> %0) {2530; CHECK-LABEL: ugt_33_v2i64:2531; CHECK: // %bb.0:2532; CHECK-NEXT: cnt v0.16b, v0.16b2533; CHECK-NEXT: mov w8, #332534; CHECK-NEXT: dup v1.2d, x82535; CHECK-NEXT: uaddlp v0.8h, v0.16b2536; CHECK-NEXT: uaddlp v0.4s, v0.8h2537; CHECK-NEXT: uaddlp v0.2d, v0.4s2538; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2539; CHECK-NEXT: ret2540 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2541 %3 = icmp ugt <2 x i64> %2, <i64 33, i64 33>2542 %4 = sext <2 x i1> %3 to <2 x i64>2543 ret <2 x i64> %42544}2545 2546define <2 x i64> @ult_34_v2i64(<2 x i64> %0) {2547; CHECK-LABEL: ult_34_v2i64:2548; CHECK: // %bb.0:2549; CHECK-NEXT: cnt v0.16b, v0.16b2550; CHECK-NEXT: mov w8, #342551; CHECK-NEXT: dup v1.2d, x82552; CHECK-NEXT: uaddlp v0.8h, v0.16b2553; CHECK-NEXT: uaddlp v0.4s, v0.8h2554; CHECK-NEXT: uaddlp v0.2d, v0.4s2555; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2556; CHECK-NEXT: ret2557 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2558 %3 = icmp ult <2 x i64> %2, <i64 34, i64 34>2559 %4 = sext <2 x i1> %3 to <2 x i64>2560 ret <2 x i64> %42561}2562 2563define <2 x i64> @ugt_34_v2i64(<2 x i64> %0) {2564; CHECK-LABEL: ugt_34_v2i64:2565; CHECK: // %bb.0:2566; CHECK-NEXT: cnt v0.16b, v0.16b2567; CHECK-NEXT: mov w8, #342568; CHECK-NEXT: dup v1.2d, x82569; CHECK-NEXT: uaddlp v0.8h, v0.16b2570; CHECK-NEXT: uaddlp v0.4s, v0.8h2571; CHECK-NEXT: uaddlp v0.2d, v0.4s2572; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2573; CHECK-NEXT: ret2574 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2575 %3 = icmp ugt <2 x i64> %2, <i64 34, i64 34>2576 %4 = sext <2 x i1> %3 to <2 x i64>2577 ret <2 x i64> %42578}2579 2580define <2 x i64> @ult_35_v2i64(<2 x i64> %0) {2581; CHECK-LABEL: ult_35_v2i64:2582; CHECK: // %bb.0:2583; CHECK-NEXT: cnt v0.16b, v0.16b2584; CHECK-NEXT: mov w8, #352585; CHECK-NEXT: dup v1.2d, x82586; CHECK-NEXT: uaddlp v0.8h, v0.16b2587; CHECK-NEXT: uaddlp v0.4s, v0.8h2588; CHECK-NEXT: uaddlp v0.2d, v0.4s2589; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2590; CHECK-NEXT: ret2591 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2592 %3 = icmp ult <2 x i64> %2, <i64 35, i64 35>2593 %4 = sext <2 x i1> %3 to <2 x i64>2594 ret <2 x i64> %42595}2596 2597define <2 x i64> @ugt_35_v2i64(<2 x i64> %0) {2598; CHECK-LABEL: ugt_35_v2i64:2599; CHECK: // %bb.0:2600; CHECK-NEXT: cnt v0.16b, v0.16b2601; CHECK-NEXT: mov w8, #352602; CHECK-NEXT: dup v1.2d, x82603; CHECK-NEXT: uaddlp v0.8h, v0.16b2604; CHECK-NEXT: uaddlp v0.4s, v0.8h2605; CHECK-NEXT: uaddlp v0.2d, v0.4s2606; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2607; CHECK-NEXT: ret2608 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2609 %3 = icmp ugt <2 x i64> %2, <i64 35, i64 35>2610 %4 = sext <2 x i1> %3 to <2 x i64>2611 ret <2 x i64> %42612}2613 2614define <2 x i64> @ult_36_v2i64(<2 x i64> %0) {2615; CHECK-LABEL: ult_36_v2i64:2616; CHECK: // %bb.0:2617; CHECK-NEXT: cnt v0.16b, v0.16b2618; CHECK-NEXT: mov w8, #362619; CHECK-NEXT: dup v1.2d, x82620; CHECK-NEXT: uaddlp v0.8h, v0.16b2621; CHECK-NEXT: uaddlp v0.4s, v0.8h2622; CHECK-NEXT: uaddlp v0.2d, v0.4s2623; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2624; CHECK-NEXT: ret2625 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2626 %3 = icmp ult <2 x i64> %2, <i64 36, i64 36>2627 %4 = sext <2 x i1> %3 to <2 x i64>2628 ret <2 x i64> %42629}2630 2631define <2 x i64> @ugt_36_v2i64(<2 x i64> %0) {2632; CHECK-LABEL: ugt_36_v2i64:2633; CHECK: // %bb.0:2634; CHECK-NEXT: cnt v0.16b, v0.16b2635; CHECK-NEXT: mov w8, #362636; CHECK-NEXT: dup v1.2d, x82637; CHECK-NEXT: uaddlp v0.8h, v0.16b2638; CHECK-NEXT: uaddlp v0.4s, v0.8h2639; CHECK-NEXT: uaddlp v0.2d, v0.4s2640; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2641; CHECK-NEXT: ret2642 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2643 %3 = icmp ugt <2 x i64> %2, <i64 36, i64 36>2644 %4 = sext <2 x i1> %3 to <2 x i64>2645 ret <2 x i64> %42646}2647 2648define <2 x i64> @ult_37_v2i64(<2 x i64> %0) {2649; CHECK-LABEL: ult_37_v2i64:2650; CHECK: // %bb.0:2651; CHECK-NEXT: cnt v0.16b, v0.16b2652; CHECK-NEXT: mov w8, #372653; CHECK-NEXT: dup v1.2d, x82654; CHECK-NEXT: uaddlp v0.8h, v0.16b2655; CHECK-NEXT: uaddlp v0.4s, v0.8h2656; CHECK-NEXT: uaddlp v0.2d, v0.4s2657; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2658; CHECK-NEXT: ret2659 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2660 %3 = icmp ult <2 x i64> %2, <i64 37, i64 37>2661 %4 = sext <2 x i1> %3 to <2 x i64>2662 ret <2 x i64> %42663}2664 2665define <2 x i64> @ugt_37_v2i64(<2 x i64> %0) {2666; CHECK-LABEL: ugt_37_v2i64:2667; CHECK: // %bb.0:2668; CHECK-NEXT: cnt v0.16b, v0.16b2669; CHECK-NEXT: mov w8, #372670; CHECK-NEXT: dup v1.2d, x82671; CHECK-NEXT: uaddlp v0.8h, v0.16b2672; CHECK-NEXT: uaddlp v0.4s, v0.8h2673; CHECK-NEXT: uaddlp v0.2d, v0.4s2674; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2675; CHECK-NEXT: ret2676 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2677 %3 = icmp ugt <2 x i64> %2, <i64 37, i64 37>2678 %4 = sext <2 x i1> %3 to <2 x i64>2679 ret <2 x i64> %42680}2681 2682define <2 x i64> @ult_38_v2i64(<2 x i64> %0) {2683; CHECK-LABEL: ult_38_v2i64:2684; CHECK: // %bb.0:2685; CHECK-NEXT: cnt v0.16b, v0.16b2686; CHECK-NEXT: mov w8, #382687; CHECK-NEXT: dup v1.2d, x82688; CHECK-NEXT: uaddlp v0.8h, v0.16b2689; CHECK-NEXT: uaddlp v0.4s, v0.8h2690; CHECK-NEXT: uaddlp v0.2d, v0.4s2691; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2692; CHECK-NEXT: ret2693 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2694 %3 = icmp ult <2 x i64> %2, <i64 38, i64 38>2695 %4 = sext <2 x i1> %3 to <2 x i64>2696 ret <2 x i64> %42697}2698 2699define <2 x i64> @ugt_38_v2i64(<2 x i64> %0) {2700; CHECK-LABEL: ugt_38_v2i64:2701; CHECK: // %bb.0:2702; CHECK-NEXT: cnt v0.16b, v0.16b2703; CHECK-NEXT: mov w8, #382704; CHECK-NEXT: dup v1.2d, x82705; CHECK-NEXT: uaddlp v0.8h, v0.16b2706; CHECK-NEXT: uaddlp v0.4s, v0.8h2707; CHECK-NEXT: uaddlp v0.2d, v0.4s2708; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2709; CHECK-NEXT: ret2710 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2711 %3 = icmp ugt <2 x i64> %2, <i64 38, i64 38>2712 %4 = sext <2 x i1> %3 to <2 x i64>2713 ret <2 x i64> %42714}2715 2716define <2 x i64> @ult_39_v2i64(<2 x i64> %0) {2717; CHECK-LABEL: ult_39_v2i64:2718; CHECK: // %bb.0:2719; CHECK-NEXT: cnt v0.16b, v0.16b2720; CHECK-NEXT: mov w8, #392721; CHECK-NEXT: dup v1.2d, x82722; CHECK-NEXT: uaddlp v0.8h, v0.16b2723; CHECK-NEXT: uaddlp v0.4s, v0.8h2724; CHECK-NEXT: uaddlp v0.2d, v0.4s2725; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2726; CHECK-NEXT: ret2727 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2728 %3 = icmp ult <2 x i64> %2, <i64 39, i64 39>2729 %4 = sext <2 x i1> %3 to <2 x i64>2730 ret <2 x i64> %42731}2732 2733define <2 x i64> @ugt_39_v2i64(<2 x i64> %0) {2734; CHECK-LABEL: ugt_39_v2i64:2735; CHECK: // %bb.0:2736; CHECK-NEXT: cnt v0.16b, v0.16b2737; CHECK-NEXT: mov w8, #392738; CHECK-NEXT: dup v1.2d, x82739; CHECK-NEXT: uaddlp v0.8h, v0.16b2740; CHECK-NEXT: uaddlp v0.4s, v0.8h2741; CHECK-NEXT: uaddlp v0.2d, v0.4s2742; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2743; CHECK-NEXT: ret2744 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2745 %3 = icmp ugt <2 x i64> %2, <i64 39, i64 39>2746 %4 = sext <2 x i1> %3 to <2 x i64>2747 ret <2 x i64> %42748}2749 2750define <2 x i64> @ult_40_v2i64(<2 x i64> %0) {2751; CHECK-LABEL: ult_40_v2i64:2752; CHECK: // %bb.0:2753; CHECK-NEXT: cnt v0.16b, v0.16b2754; CHECK-NEXT: mov w8, #402755; CHECK-NEXT: dup v1.2d, x82756; CHECK-NEXT: uaddlp v0.8h, v0.16b2757; CHECK-NEXT: uaddlp v0.4s, v0.8h2758; CHECK-NEXT: uaddlp v0.2d, v0.4s2759; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2760; CHECK-NEXT: ret2761 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2762 %3 = icmp ult <2 x i64> %2, <i64 40, i64 40>2763 %4 = sext <2 x i1> %3 to <2 x i64>2764 ret <2 x i64> %42765}2766 2767define <2 x i64> @ugt_40_v2i64(<2 x i64> %0) {2768; CHECK-LABEL: ugt_40_v2i64:2769; CHECK: // %bb.0:2770; CHECK-NEXT: cnt v0.16b, v0.16b2771; CHECK-NEXT: mov w8, #402772; CHECK-NEXT: dup v1.2d, x82773; CHECK-NEXT: uaddlp v0.8h, v0.16b2774; CHECK-NEXT: uaddlp v0.4s, v0.8h2775; CHECK-NEXT: uaddlp v0.2d, v0.4s2776; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2777; CHECK-NEXT: ret2778 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2779 %3 = icmp ugt <2 x i64> %2, <i64 40, i64 40>2780 %4 = sext <2 x i1> %3 to <2 x i64>2781 ret <2 x i64> %42782}2783 2784define <2 x i64> @ult_41_v2i64(<2 x i64> %0) {2785; CHECK-LABEL: ult_41_v2i64:2786; CHECK: // %bb.0:2787; CHECK-NEXT: cnt v0.16b, v0.16b2788; CHECK-NEXT: mov w8, #412789; CHECK-NEXT: dup v1.2d, x82790; CHECK-NEXT: uaddlp v0.8h, v0.16b2791; CHECK-NEXT: uaddlp v0.4s, v0.8h2792; CHECK-NEXT: uaddlp v0.2d, v0.4s2793; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2794; CHECK-NEXT: ret2795 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2796 %3 = icmp ult <2 x i64> %2, <i64 41, i64 41>2797 %4 = sext <2 x i1> %3 to <2 x i64>2798 ret <2 x i64> %42799}2800 2801define <2 x i64> @ugt_41_v2i64(<2 x i64> %0) {2802; CHECK-LABEL: ugt_41_v2i64:2803; CHECK: // %bb.0:2804; CHECK-NEXT: cnt v0.16b, v0.16b2805; CHECK-NEXT: mov w8, #412806; CHECK-NEXT: dup v1.2d, x82807; CHECK-NEXT: uaddlp v0.8h, v0.16b2808; CHECK-NEXT: uaddlp v0.4s, v0.8h2809; CHECK-NEXT: uaddlp v0.2d, v0.4s2810; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2811; CHECK-NEXT: ret2812 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2813 %3 = icmp ugt <2 x i64> %2, <i64 41, i64 41>2814 %4 = sext <2 x i1> %3 to <2 x i64>2815 ret <2 x i64> %42816}2817 2818define <2 x i64> @ult_42_v2i64(<2 x i64> %0) {2819; CHECK-LABEL: ult_42_v2i64:2820; CHECK: // %bb.0:2821; CHECK-NEXT: cnt v0.16b, v0.16b2822; CHECK-NEXT: mov w8, #422823; CHECK-NEXT: dup v1.2d, x82824; CHECK-NEXT: uaddlp v0.8h, v0.16b2825; CHECK-NEXT: uaddlp v0.4s, v0.8h2826; CHECK-NEXT: uaddlp v0.2d, v0.4s2827; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2828; CHECK-NEXT: ret2829 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2830 %3 = icmp ult <2 x i64> %2, <i64 42, i64 42>2831 %4 = sext <2 x i1> %3 to <2 x i64>2832 ret <2 x i64> %42833}2834 2835define <2 x i64> @ugt_42_v2i64(<2 x i64> %0) {2836; CHECK-LABEL: ugt_42_v2i64:2837; CHECK: // %bb.0:2838; CHECK-NEXT: cnt v0.16b, v0.16b2839; CHECK-NEXT: mov w8, #422840; CHECK-NEXT: dup v1.2d, x82841; CHECK-NEXT: uaddlp v0.8h, v0.16b2842; CHECK-NEXT: uaddlp v0.4s, v0.8h2843; CHECK-NEXT: uaddlp v0.2d, v0.4s2844; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2845; CHECK-NEXT: ret2846 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2847 %3 = icmp ugt <2 x i64> %2, <i64 42, i64 42>2848 %4 = sext <2 x i1> %3 to <2 x i64>2849 ret <2 x i64> %42850}2851 2852define <2 x i64> @ult_43_v2i64(<2 x i64> %0) {2853; CHECK-LABEL: ult_43_v2i64:2854; CHECK: // %bb.0:2855; CHECK-NEXT: cnt v0.16b, v0.16b2856; CHECK-NEXT: mov w8, #432857; CHECK-NEXT: dup v1.2d, x82858; CHECK-NEXT: uaddlp v0.8h, v0.16b2859; CHECK-NEXT: uaddlp v0.4s, v0.8h2860; CHECK-NEXT: uaddlp v0.2d, v0.4s2861; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2862; CHECK-NEXT: ret2863 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2864 %3 = icmp ult <2 x i64> %2, <i64 43, i64 43>2865 %4 = sext <2 x i1> %3 to <2 x i64>2866 ret <2 x i64> %42867}2868 2869define <2 x i64> @ugt_43_v2i64(<2 x i64> %0) {2870; CHECK-LABEL: ugt_43_v2i64:2871; CHECK: // %bb.0:2872; CHECK-NEXT: cnt v0.16b, v0.16b2873; CHECK-NEXT: mov w8, #432874; CHECK-NEXT: dup v1.2d, x82875; CHECK-NEXT: uaddlp v0.8h, v0.16b2876; CHECK-NEXT: uaddlp v0.4s, v0.8h2877; CHECK-NEXT: uaddlp v0.2d, v0.4s2878; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2879; CHECK-NEXT: ret2880 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2881 %3 = icmp ugt <2 x i64> %2, <i64 43, i64 43>2882 %4 = sext <2 x i1> %3 to <2 x i64>2883 ret <2 x i64> %42884}2885 2886define <2 x i64> @ult_44_v2i64(<2 x i64> %0) {2887; CHECK-LABEL: ult_44_v2i64:2888; CHECK: // %bb.0:2889; CHECK-NEXT: cnt v0.16b, v0.16b2890; CHECK-NEXT: mov w8, #442891; CHECK-NEXT: dup v1.2d, x82892; CHECK-NEXT: uaddlp v0.8h, v0.16b2893; CHECK-NEXT: uaddlp v0.4s, v0.8h2894; CHECK-NEXT: uaddlp v0.2d, v0.4s2895; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2896; CHECK-NEXT: ret2897 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2898 %3 = icmp ult <2 x i64> %2, <i64 44, i64 44>2899 %4 = sext <2 x i1> %3 to <2 x i64>2900 ret <2 x i64> %42901}2902 2903define <2 x i64> @ugt_44_v2i64(<2 x i64> %0) {2904; CHECK-LABEL: ugt_44_v2i64:2905; CHECK: // %bb.0:2906; CHECK-NEXT: cnt v0.16b, v0.16b2907; CHECK-NEXT: mov w8, #442908; CHECK-NEXT: dup v1.2d, x82909; CHECK-NEXT: uaddlp v0.8h, v0.16b2910; CHECK-NEXT: uaddlp v0.4s, v0.8h2911; CHECK-NEXT: uaddlp v0.2d, v0.4s2912; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2913; CHECK-NEXT: ret2914 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2915 %3 = icmp ugt <2 x i64> %2, <i64 44, i64 44>2916 %4 = sext <2 x i1> %3 to <2 x i64>2917 ret <2 x i64> %42918}2919 2920define <2 x i64> @ult_45_v2i64(<2 x i64> %0) {2921; CHECK-LABEL: ult_45_v2i64:2922; CHECK: // %bb.0:2923; CHECK-NEXT: cnt v0.16b, v0.16b2924; CHECK-NEXT: mov w8, #452925; CHECK-NEXT: dup v1.2d, x82926; CHECK-NEXT: uaddlp v0.8h, v0.16b2927; CHECK-NEXT: uaddlp v0.4s, v0.8h2928; CHECK-NEXT: uaddlp v0.2d, v0.4s2929; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2930; CHECK-NEXT: ret2931 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2932 %3 = icmp ult <2 x i64> %2, <i64 45, i64 45>2933 %4 = sext <2 x i1> %3 to <2 x i64>2934 ret <2 x i64> %42935}2936 2937define <2 x i64> @ugt_45_v2i64(<2 x i64> %0) {2938; CHECK-LABEL: ugt_45_v2i64:2939; CHECK: // %bb.0:2940; CHECK-NEXT: cnt v0.16b, v0.16b2941; CHECK-NEXT: mov w8, #452942; CHECK-NEXT: dup v1.2d, x82943; CHECK-NEXT: uaddlp v0.8h, v0.16b2944; CHECK-NEXT: uaddlp v0.4s, v0.8h2945; CHECK-NEXT: uaddlp v0.2d, v0.4s2946; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2947; CHECK-NEXT: ret2948 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2949 %3 = icmp ugt <2 x i64> %2, <i64 45, i64 45>2950 %4 = sext <2 x i1> %3 to <2 x i64>2951 ret <2 x i64> %42952}2953 2954define <2 x i64> @ult_46_v2i64(<2 x i64> %0) {2955; CHECK-LABEL: ult_46_v2i64:2956; CHECK: // %bb.0:2957; CHECK-NEXT: cnt v0.16b, v0.16b2958; CHECK-NEXT: mov w8, #462959; CHECK-NEXT: dup v1.2d, x82960; CHECK-NEXT: uaddlp v0.8h, v0.16b2961; CHECK-NEXT: uaddlp v0.4s, v0.8h2962; CHECK-NEXT: uaddlp v0.2d, v0.4s2963; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2964; CHECK-NEXT: ret2965 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2966 %3 = icmp ult <2 x i64> %2, <i64 46, i64 46>2967 %4 = sext <2 x i1> %3 to <2 x i64>2968 ret <2 x i64> %42969}2970 2971define <2 x i64> @ugt_46_v2i64(<2 x i64> %0) {2972; CHECK-LABEL: ugt_46_v2i64:2973; CHECK: // %bb.0:2974; CHECK-NEXT: cnt v0.16b, v0.16b2975; CHECK-NEXT: mov w8, #462976; CHECK-NEXT: dup v1.2d, x82977; CHECK-NEXT: uaddlp v0.8h, v0.16b2978; CHECK-NEXT: uaddlp v0.4s, v0.8h2979; CHECK-NEXT: uaddlp v0.2d, v0.4s2980; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d2981; CHECK-NEXT: ret2982 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)2983 %3 = icmp ugt <2 x i64> %2, <i64 46, i64 46>2984 %4 = sext <2 x i1> %3 to <2 x i64>2985 ret <2 x i64> %42986}2987 2988define <2 x i64> @ult_47_v2i64(<2 x i64> %0) {2989; CHECK-LABEL: ult_47_v2i64:2990; CHECK: // %bb.0:2991; CHECK-NEXT: cnt v0.16b, v0.16b2992; CHECK-NEXT: mov w8, #472993; CHECK-NEXT: dup v1.2d, x82994; CHECK-NEXT: uaddlp v0.8h, v0.16b2995; CHECK-NEXT: uaddlp v0.4s, v0.8h2996; CHECK-NEXT: uaddlp v0.2d, v0.4s2997; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d2998; CHECK-NEXT: ret2999 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3000 %3 = icmp ult <2 x i64> %2, <i64 47, i64 47>3001 %4 = sext <2 x i1> %3 to <2 x i64>3002 ret <2 x i64> %43003}3004 3005define <2 x i64> @ugt_47_v2i64(<2 x i64> %0) {3006; CHECK-LABEL: ugt_47_v2i64:3007; CHECK: // %bb.0:3008; CHECK-NEXT: cnt v0.16b, v0.16b3009; CHECK-NEXT: mov w8, #473010; CHECK-NEXT: dup v1.2d, x83011; CHECK-NEXT: uaddlp v0.8h, v0.16b3012; CHECK-NEXT: uaddlp v0.4s, v0.8h3013; CHECK-NEXT: uaddlp v0.2d, v0.4s3014; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3015; CHECK-NEXT: ret3016 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3017 %3 = icmp ugt <2 x i64> %2, <i64 47, i64 47>3018 %4 = sext <2 x i1> %3 to <2 x i64>3019 ret <2 x i64> %43020}3021 3022define <2 x i64> @ult_48_v2i64(<2 x i64> %0) {3023; CHECK-LABEL: ult_48_v2i64:3024; CHECK: // %bb.0:3025; CHECK-NEXT: cnt v0.16b, v0.16b3026; CHECK-NEXT: mov w8, #483027; CHECK-NEXT: dup v1.2d, x83028; CHECK-NEXT: uaddlp v0.8h, v0.16b3029; CHECK-NEXT: uaddlp v0.4s, v0.8h3030; CHECK-NEXT: uaddlp v0.2d, v0.4s3031; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3032; CHECK-NEXT: ret3033 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3034 %3 = icmp ult <2 x i64> %2, <i64 48, i64 48>3035 %4 = sext <2 x i1> %3 to <2 x i64>3036 ret <2 x i64> %43037}3038 3039define <2 x i64> @ugt_48_v2i64(<2 x i64> %0) {3040; CHECK-LABEL: ugt_48_v2i64:3041; CHECK: // %bb.0:3042; CHECK-NEXT: cnt v0.16b, v0.16b3043; CHECK-NEXT: mov w8, #483044; CHECK-NEXT: dup v1.2d, x83045; CHECK-NEXT: uaddlp v0.8h, v0.16b3046; CHECK-NEXT: uaddlp v0.4s, v0.8h3047; CHECK-NEXT: uaddlp v0.2d, v0.4s3048; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3049; CHECK-NEXT: ret3050 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3051 %3 = icmp ugt <2 x i64> %2, <i64 48, i64 48>3052 %4 = sext <2 x i1> %3 to <2 x i64>3053 ret <2 x i64> %43054}3055 3056define <2 x i64> @ult_49_v2i64(<2 x i64> %0) {3057; CHECK-LABEL: ult_49_v2i64:3058; CHECK: // %bb.0:3059; CHECK-NEXT: cnt v0.16b, v0.16b3060; CHECK-NEXT: mov w8, #493061; CHECK-NEXT: dup v1.2d, x83062; CHECK-NEXT: uaddlp v0.8h, v0.16b3063; CHECK-NEXT: uaddlp v0.4s, v0.8h3064; CHECK-NEXT: uaddlp v0.2d, v0.4s3065; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3066; CHECK-NEXT: ret3067 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3068 %3 = icmp ult <2 x i64> %2, <i64 49, i64 49>3069 %4 = sext <2 x i1> %3 to <2 x i64>3070 ret <2 x i64> %43071}3072 3073define <2 x i64> @ugt_49_v2i64(<2 x i64> %0) {3074; CHECK-LABEL: ugt_49_v2i64:3075; CHECK: // %bb.0:3076; CHECK-NEXT: cnt v0.16b, v0.16b3077; CHECK-NEXT: mov w8, #493078; CHECK-NEXT: dup v1.2d, x83079; CHECK-NEXT: uaddlp v0.8h, v0.16b3080; CHECK-NEXT: uaddlp v0.4s, v0.8h3081; CHECK-NEXT: uaddlp v0.2d, v0.4s3082; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3083; CHECK-NEXT: ret3084 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3085 %3 = icmp ugt <2 x i64> %2, <i64 49, i64 49>3086 %4 = sext <2 x i1> %3 to <2 x i64>3087 ret <2 x i64> %43088}3089 3090define <2 x i64> @ult_50_v2i64(<2 x i64> %0) {3091; CHECK-LABEL: ult_50_v2i64:3092; CHECK: // %bb.0:3093; CHECK-NEXT: cnt v0.16b, v0.16b3094; CHECK-NEXT: mov w8, #503095; CHECK-NEXT: dup v1.2d, x83096; CHECK-NEXT: uaddlp v0.8h, v0.16b3097; CHECK-NEXT: uaddlp v0.4s, v0.8h3098; CHECK-NEXT: uaddlp v0.2d, v0.4s3099; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3100; CHECK-NEXT: ret3101 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3102 %3 = icmp ult <2 x i64> %2, <i64 50, i64 50>3103 %4 = sext <2 x i1> %3 to <2 x i64>3104 ret <2 x i64> %43105}3106 3107define <2 x i64> @ugt_50_v2i64(<2 x i64> %0) {3108; CHECK-LABEL: ugt_50_v2i64:3109; CHECK: // %bb.0:3110; CHECK-NEXT: cnt v0.16b, v0.16b3111; CHECK-NEXT: mov w8, #503112; CHECK-NEXT: dup v1.2d, x83113; CHECK-NEXT: uaddlp v0.8h, v0.16b3114; CHECK-NEXT: uaddlp v0.4s, v0.8h3115; CHECK-NEXT: uaddlp v0.2d, v0.4s3116; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3117; CHECK-NEXT: ret3118 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3119 %3 = icmp ugt <2 x i64> %2, <i64 50, i64 50>3120 %4 = sext <2 x i1> %3 to <2 x i64>3121 ret <2 x i64> %43122}3123 3124define <2 x i64> @ult_51_v2i64(<2 x i64> %0) {3125; CHECK-LABEL: ult_51_v2i64:3126; CHECK: // %bb.0:3127; CHECK-NEXT: cnt v0.16b, v0.16b3128; CHECK-NEXT: mov w8, #513129; CHECK-NEXT: dup v1.2d, x83130; CHECK-NEXT: uaddlp v0.8h, v0.16b3131; CHECK-NEXT: uaddlp v0.4s, v0.8h3132; CHECK-NEXT: uaddlp v0.2d, v0.4s3133; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3134; CHECK-NEXT: ret3135 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3136 %3 = icmp ult <2 x i64> %2, <i64 51, i64 51>3137 %4 = sext <2 x i1> %3 to <2 x i64>3138 ret <2 x i64> %43139}3140 3141define <2 x i64> @ugt_51_v2i64(<2 x i64> %0) {3142; CHECK-LABEL: ugt_51_v2i64:3143; CHECK: // %bb.0:3144; CHECK-NEXT: cnt v0.16b, v0.16b3145; CHECK-NEXT: mov w8, #513146; CHECK-NEXT: dup v1.2d, x83147; CHECK-NEXT: uaddlp v0.8h, v0.16b3148; CHECK-NEXT: uaddlp v0.4s, v0.8h3149; CHECK-NEXT: uaddlp v0.2d, v0.4s3150; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3151; CHECK-NEXT: ret3152 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3153 %3 = icmp ugt <2 x i64> %2, <i64 51, i64 51>3154 %4 = sext <2 x i1> %3 to <2 x i64>3155 ret <2 x i64> %43156}3157 3158define <2 x i64> @ult_52_v2i64(<2 x i64> %0) {3159; CHECK-LABEL: ult_52_v2i64:3160; CHECK: // %bb.0:3161; CHECK-NEXT: cnt v0.16b, v0.16b3162; CHECK-NEXT: mov w8, #523163; CHECK-NEXT: dup v1.2d, x83164; CHECK-NEXT: uaddlp v0.8h, v0.16b3165; CHECK-NEXT: uaddlp v0.4s, v0.8h3166; CHECK-NEXT: uaddlp v0.2d, v0.4s3167; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3168; CHECK-NEXT: ret3169 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3170 %3 = icmp ult <2 x i64> %2, <i64 52, i64 52>3171 %4 = sext <2 x i1> %3 to <2 x i64>3172 ret <2 x i64> %43173}3174 3175define <2 x i64> @ugt_52_v2i64(<2 x i64> %0) {3176; CHECK-LABEL: ugt_52_v2i64:3177; CHECK: // %bb.0:3178; CHECK-NEXT: cnt v0.16b, v0.16b3179; CHECK-NEXT: mov w8, #523180; CHECK-NEXT: dup v1.2d, x83181; CHECK-NEXT: uaddlp v0.8h, v0.16b3182; CHECK-NEXT: uaddlp v0.4s, v0.8h3183; CHECK-NEXT: uaddlp v0.2d, v0.4s3184; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3185; CHECK-NEXT: ret3186 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3187 %3 = icmp ugt <2 x i64> %2, <i64 52, i64 52>3188 %4 = sext <2 x i1> %3 to <2 x i64>3189 ret <2 x i64> %43190}3191 3192define <2 x i64> @ult_53_v2i64(<2 x i64> %0) {3193; CHECK-LABEL: ult_53_v2i64:3194; CHECK: // %bb.0:3195; CHECK-NEXT: cnt v0.16b, v0.16b3196; CHECK-NEXT: mov w8, #533197; CHECK-NEXT: dup v1.2d, x83198; CHECK-NEXT: uaddlp v0.8h, v0.16b3199; CHECK-NEXT: uaddlp v0.4s, v0.8h3200; CHECK-NEXT: uaddlp v0.2d, v0.4s3201; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3202; CHECK-NEXT: ret3203 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3204 %3 = icmp ult <2 x i64> %2, <i64 53, i64 53>3205 %4 = sext <2 x i1> %3 to <2 x i64>3206 ret <2 x i64> %43207}3208 3209define <2 x i64> @ugt_53_v2i64(<2 x i64> %0) {3210; CHECK-LABEL: ugt_53_v2i64:3211; CHECK: // %bb.0:3212; CHECK-NEXT: cnt v0.16b, v0.16b3213; CHECK-NEXT: mov w8, #533214; CHECK-NEXT: dup v1.2d, x83215; CHECK-NEXT: uaddlp v0.8h, v0.16b3216; CHECK-NEXT: uaddlp v0.4s, v0.8h3217; CHECK-NEXT: uaddlp v0.2d, v0.4s3218; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3219; CHECK-NEXT: ret3220 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3221 %3 = icmp ugt <2 x i64> %2, <i64 53, i64 53>3222 %4 = sext <2 x i1> %3 to <2 x i64>3223 ret <2 x i64> %43224}3225 3226define <2 x i64> @ult_54_v2i64(<2 x i64> %0) {3227; CHECK-LABEL: ult_54_v2i64:3228; CHECK: // %bb.0:3229; CHECK-NEXT: cnt v0.16b, v0.16b3230; CHECK-NEXT: mov w8, #543231; CHECK-NEXT: dup v1.2d, x83232; CHECK-NEXT: uaddlp v0.8h, v0.16b3233; CHECK-NEXT: uaddlp v0.4s, v0.8h3234; CHECK-NEXT: uaddlp v0.2d, v0.4s3235; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3236; CHECK-NEXT: ret3237 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3238 %3 = icmp ult <2 x i64> %2, <i64 54, i64 54>3239 %4 = sext <2 x i1> %3 to <2 x i64>3240 ret <2 x i64> %43241}3242 3243define <2 x i64> @ugt_54_v2i64(<2 x i64> %0) {3244; CHECK-LABEL: ugt_54_v2i64:3245; CHECK: // %bb.0:3246; CHECK-NEXT: cnt v0.16b, v0.16b3247; CHECK-NEXT: mov w8, #543248; CHECK-NEXT: dup v1.2d, x83249; CHECK-NEXT: uaddlp v0.8h, v0.16b3250; CHECK-NEXT: uaddlp v0.4s, v0.8h3251; CHECK-NEXT: uaddlp v0.2d, v0.4s3252; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3253; CHECK-NEXT: ret3254 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3255 %3 = icmp ugt <2 x i64> %2, <i64 54, i64 54>3256 %4 = sext <2 x i1> %3 to <2 x i64>3257 ret <2 x i64> %43258}3259 3260define <2 x i64> @ult_55_v2i64(<2 x i64> %0) {3261; CHECK-LABEL: ult_55_v2i64:3262; CHECK: // %bb.0:3263; CHECK-NEXT: cnt v0.16b, v0.16b3264; CHECK-NEXT: mov w8, #553265; CHECK-NEXT: dup v1.2d, x83266; CHECK-NEXT: uaddlp v0.8h, v0.16b3267; CHECK-NEXT: uaddlp v0.4s, v0.8h3268; CHECK-NEXT: uaddlp v0.2d, v0.4s3269; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3270; CHECK-NEXT: ret3271 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3272 %3 = icmp ult <2 x i64> %2, <i64 55, i64 55>3273 %4 = sext <2 x i1> %3 to <2 x i64>3274 ret <2 x i64> %43275}3276 3277define <2 x i64> @ugt_55_v2i64(<2 x i64> %0) {3278; CHECK-LABEL: ugt_55_v2i64:3279; CHECK: // %bb.0:3280; CHECK-NEXT: cnt v0.16b, v0.16b3281; CHECK-NEXT: mov w8, #553282; CHECK-NEXT: dup v1.2d, x83283; CHECK-NEXT: uaddlp v0.8h, v0.16b3284; CHECK-NEXT: uaddlp v0.4s, v0.8h3285; CHECK-NEXT: uaddlp v0.2d, v0.4s3286; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3287; CHECK-NEXT: ret3288 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3289 %3 = icmp ugt <2 x i64> %2, <i64 55, i64 55>3290 %4 = sext <2 x i1> %3 to <2 x i64>3291 ret <2 x i64> %43292}3293 3294define <2 x i64> @ult_56_v2i64(<2 x i64> %0) {3295; CHECK-LABEL: ult_56_v2i64:3296; CHECK: // %bb.0:3297; CHECK-NEXT: cnt v0.16b, v0.16b3298; CHECK-NEXT: mov w8, #563299; CHECK-NEXT: dup v1.2d, x83300; CHECK-NEXT: uaddlp v0.8h, v0.16b3301; CHECK-NEXT: uaddlp v0.4s, v0.8h3302; CHECK-NEXT: uaddlp v0.2d, v0.4s3303; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3304; CHECK-NEXT: ret3305 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3306 %3 = icmp ult <2 x i64> %2, <i64 56, i64 56>3307 %4 = sext <2 x i1> %3 to <2 x i64>3308 ret <2 x i64> %43309}3310 3311define <2 x i64> @ugt_56_v2i64(<2 x i64> %0) {3312; CHECK-LABEL: ugt_56_v2i64:3313; CHECK: // %bb.0:3314; CHECK-NEXT: cnt v0.16b, v0.16b3315; CHECK-NEXT: mov w8, #563316; CHECK-NEXT: dup v1.2d, x83317; CHECK-NEXT: uaddlp v0.8h, v0.16b3318; CHECK-NEXT: uaddlp v0.4s, v0.8h3319; CHECK-NEXT: uaddlp v0.2d, v0.4s3320; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3321; CHECK-NEXT: ret3322 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3323 %3 = icmp ugt <2 x i64> %2, <i64 56, i64 56>3324 %4 = sext <2 x i1> %3 to <2 x i64>3325 ret <2 x i64> %43326}3327 3328define <2 x i64> @ult_57_v2i64(<2 x i64> %0) {3329; CHECK-LABEL: ult_57_v2i64:3330; CHECK: // %bb.0:3331; CHECK-NEXT: cnt v0.16b, v0.16b3332; CHECK-NEXT: mov w8, #573333; CHECK-NEXT: dup v1.2d, x83334; CHECK-NEXT: uaddlp v0.8h, v0.16b3335; CHECK-NEXT: uaddlp v0.4s, v0.8h3336; CHECK-NEXT: uaddlp v0.2d, v0.4s3337; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3338; CHECK-NEXT: ret3339 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3340 %3 = icmp ult <2 x i64> %2, <i64 57, i64 57>3341 %4 = sext <2 x i1> %3 to <2 x i64>3342 ret <2 x i64> %43343}3344 3345define <2 x i64> @ugt_57_v2i64(<2 x i64> %0) {3346; CHECK-LABEL: ugt_57_v2i64:3347; CHECK: // %bb.0:3348; CHECK-NEXT: cnt v0.16b, v0.16b3349; CHECK-NEXT: mov w8, #573350; CHECK-NEXT: dup v1.2d, x83351; CHECK-NEXT: uaddlp v0.8h, v0.16b3352; CHECK-NEXT: uaddlp v0.4s, v0.8h3353; CHECK-NEXT: uaddlp v0.2d, v0.4s3354; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3355; CHECK-NEXT: ret3356 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3357 %3 = icmp ugt <2 x i64> %2, <i64 57, i64 57>3358 %4 = sext <2 x i1> %3 to <2 x i64>3359 ret <2 x i64> %43360}3361 3362define <2 x i64> @ult_58_v2i64(<2 x i64> %0) {3363; CHECK-LABEL: ult_58_v2i64:3364; CHECK: // %bb.0:3365; CHECK-NEXT: cnt v0.16b, v0.16b3366; CHECK-NEXT: mov w8, #583367; CHECK-NEXT: dup v1.2d, x83368; CHECK-NEXT: uaddlp v0.8h, v0.16b3369; CHECK-NEXT: uaddlp v0.4s, v0.8h3370; CHECK-NEXT: uaddlp v0.2d, v0.4s3371; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3372; CHECK-NEXT: ret3373 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3374 %3 = icmp ult <2 x i64> %2, <i64 58, i64 58>3375 %4 = sext <2 x i1> %3 to <2 x i64>3376 ret <2 x i64> %43377}3378 3379define <2 x i64> @ugt_58_v2i64(<2 x i64> %0) {3380; CHECK-LABEL: ugt_58_v2i64:3381; CHECK: // %bb.0:3382; CHECK-NEXT: cnt v0.16b, v0.16b3383; CHECK-NEXT: mov w8, #583384; CHECK-NEXT: dup v1.2d, x83385; CHECK-NEXT: uaddlp v0.8h, v0.16b3386; CHECK-NEXT: uaddlp v0.4s, v0.8h3387; CHECK-NEXT: uaddlp v0.2d, v0.4s3388; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3389; CHECK-NEXT: ret3390 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3391 %3 = icmp ugt <2 x i64> %2, <i64 58, i64 58>3392 %4 = sext <2 x i1> %3 to <2 x i64>3393 ret <2 x i64> %43394}3395 3396define <2 x i64> @ult_59_v2i64(<2 x i64> %0) {3397; CHECK-LABEL: ult_59_v2i64:3398; CHECK: // %bb.0:3399; CHECK-NEXT: cnt v0.16b, v0.16b3400; CHECK-NEXT: mov w8, #593401; CHECK-NEXT: dup v1.2d, x83402; CHECK-NEXT: uaddlp v0.8h, v0.16b3403; CHECK-NEXT: uaddlp v0.4s, v0.8h3404; CHECK-NEXT: uaddlp v0.2d, v0.4s3405; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3406; CHECK-NEXT: ret3407 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3408 %3 = icmp ult <2 x i64> %2, <i64 59, i64 59>3409 %4 = sext <2 x i1> %3 to <2 x i64>3410 ret <2 x i64> %43411}3412 3413define <2 x i64> @ugt_59_v2i64(<2 x i64> %0) {3414; CHECK-LABEL: ugt_59_v2i64:3415; CHECK: // %bb.0:3416; CHECK-NEXT: cnt v0.16b, v0.16b3417; CHECK-NEXT: mov w8, #593418; CHECK-NEXT: dup v1.2d, x83419; CHECK-NEXT: uaddlp v0.8h, v0.16b3420; CHECK-NEXT: uaddlp v0.4s, v0.8h3421; CHECK-NEXT: uaddlp v0.2d, v0.4s3422; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3423; CHECK-NEXT: ret3424 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3425 %3 = icmp ugt <2 x i64> %2, <i64 59, i64 59>3426 %4 = sext <2 x i1> %3 to <2 x i64>3427 ret <2 x i64> %43428}3429 3430define <2 x i64> @ult_60_v2i64(<2 x i64> %0) {3431; CHECK-LABEL: ult_60_v2i64:3432; CHECK: // %bb.0:3433; CHECK-NEXT: cnt v0.16b, v0.16b3434; CHECK-NEXT: mov w8, #603435; CHECK-NEXT: dup v1.2d, x83436; CHECK-NEXT: uaddlp v0.8h, v0.16b3437; CHECK-NEXT: uaddlp v0.4s, v0.8h3438; CHECK-NEXT: uaddlp v0.2d, v0.4s3439; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3440; CHECK-NEXT: ret3441 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3442 %3 = icmp ult <2 x i64> %2, <i64 60, i64 60>3443 %4 = sext <2 x i1> %3 to <2 x i64>3444 ret <2 x i64> %43445}3446 3447define <2 x i64> @ugt_60_v2i64(<2 x i64> %0) {3448; CHECK-LABEL: ugt_60_v2i64:3449; CHECK: // %bb.0:3450; CHECK-NEXT: cnt v0.16b, v0.16b3451; CHECK-NEXT: mov w8, #603452; CHECK-NEXT: dup v1.2d, x83453; CHECK-NEXT: uaddlp v0.8h, v0.16b3454; CHECK-NEXT: uaddlp v0.4s, v0.8h3455; CHECK-NEXT: uaddlp v0.2d, v0.4s3456; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3457; CHECK-NEXT: ret3458 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3459 %3 = icmp ugt <2 x i64> %2, <i64 60, i64 60>3460 %4 = sext <2 x i1> %3 to <2 x i64>3461 ret <2 x i64> %43462}3463 3464define <2 x i64> @ult_61_v2i64(<2 x i64> %0) {3465; CHECK-LABEL: ult_61_v2i64:3466; CHECK: // %bb.0:3467; CHECK-NEXT: cnt v0.16b, v0.16b3468; CHECK-NEXT: mov w8, #613469; CHECK-NEXT: dup v1.2d, x83470; CHECK-NEXT: uaddlp v0.8h, v0.16b3471; CHECK-NEXT: uaddlp v0.4s, v0.8h3472; CHECK-NEXT: uaddlp v0.2d, v0.4s3473; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3474; CHECK-NEXT: ret3475 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3476 %3 = icmp ult <2 x i64> %2, <i64 61, i64 61>3477 %4 = sext <2 x i1> %3 to <2 x i64>3478 ret <2 x i64> %43479}3480 3481define <2 x i64> @ugt_61_v2i64(<2 x i64> %0) {3482; CHECK-LABEL: ugt_61_v2i64:3483; CHECK: // %bb.0:3484; CHECK-NEXT: cnt v0.16b, v0.16b3485; CHECK-NEXT: mov w8, #613486; CHECK-NEXT: dup v1.2d, x83487; CHECK-NEXT: uaddlp v0.8h, v0.16b3488; CHECK-NEXT: uaddlp v0.4s, v0.8h3489; CHECK-NEXT: uaddlp v0.2d, v0.4s3490; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3491; CHECK-NEXT: ret3492 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3493 %3 = icmp ugt <2 x i64> %2, <i64 61, i64 61>3494 %4 = sext <2 x i1> %3 to <2 x i64>3495 ret <2 x i64> %43496}3497 3498define <2 x i64> @ult_62_v2i64(<2 x i64> %0) {3499; CHECK-LABEL: ult_62_v2i64:3500; CHECK: // %bb.0:3501; CHECK-NEXT: cnt v0.16b, v0.16b3502; CHECK-NEXT: mov w8, #623503; CHECK-NEXT: dup v1.2d, x83504; CHECK-NEXT: uaddlp v0.8h, v0.16b3505; CHECK-NEXT: uaddlp v0.4s, v0.8h3506; CHECK-NEXT: uaddlp v0.2d, v0.4s3507; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3508; CHECK-NEXT: ret3509 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3510 %3 = icmp ult <2 x i64> %2, <i64 62, i64 62>3511 %4 = sext <2 x i1> %3 to <2 x i64>3512 ret <2 x i64> %43513}3514 3515define <2 x i64> @ugt_62_v2i64(<2 x i64> %0) {3516; CHECK-LABEL: ugt_62_v2i64:3517; CHECK: // %bb.0:3518; CHECK-NEXT: cnt v0.16b, v0.16b3519; CHECK-NEXT: mov w8, #623520; CHECK-NEXT: dup v1.2d, x83521; CHECK-NEXT: uaddlp v0.8h, v0.16b3522; CHECK-NEXT: uaddlp v0.4s, v0.8h3523; CHECK-NEXT: uaddlp v0.2d, v0.4s3524; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d3525; CHECK-NEXT: ret3526 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3527 %3 = icmp ugt <2 x i64> %2, <i64 62, i64 62>3528 %4 = sext <2 x i1> %3 to <2 x i64>3529 ret <2 x i64> %43530}3531 3532define <2 x i64> @ult_63_v2i64(<2 x i64> %0) {3533; CHECK-LABEL: ult_63_v2i64:3534; CHECK: // %bb.0:3535; CHECK-NEXT: cnt v0.16b, v0.16b3536; CHECK-NEXT: mov w8, #633537; CHECK-NEXT: dup v1.2d, x83538; CHECK-NEXT: uaddlp v0.8h, v0.16b3539; CHECK-NEXT: uaddlp v0.4s, v0.8h3540; CHECK-NEXT: uaddlp v0.2d, v0.4s3541; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d3542; CHECK-NEXT: ret3543 %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)3544 %3 = icmp ult <2 x i64> %2, <i64 63, i64 63>3545 %4 = sext <2 x i1> %3 to <2 x i64>3546 ret <2 x i64> %43547}3548 3549declare <16 x i8> @llvm.ctpop.v16i8(<16 x i8>)3550declare <8 x i16> @llvm.ctpop.v8i16(<8 x i16>)3551declare <4 x i32> @llvm.ctpop.v4i32(<4 x i32>)3552declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)3553