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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s3 4define void @vld2(ptr nocapture readonly %pSrc, ptr noalias nocapture %pDst, i32 %numSamples) {5; CHECK-LABEL: vld2:6; CHECK:       .Lfunc_begin0:7; CHECK-NEXT:    .cfi_startproc8; CHECK-NEXT:  // %bb.0: // %entry9; CHECK-NEXT:    mov x8, xzr10; CHECK-NEXT:  .LBB0_1: // %vector.body11; CHECK-NEXT:    // =>This Inner Loop Header: Depth=112; CHECK-NEXT:    ld2 { v0.4s, v1.4s }, [x0], #3213; CHECK-NEXT:    fmul v2.4s, v0.4s, v0.4s14; CHECK-NEXT:    fmla v2.4s, v1.4s, v1.4s15; CHECK-NEXT:    str q2, [x1, x8]16; CHECK-NEXT:    add x8, x8, #1617; CHECK-NEXT:    cmp x8, #1, lsl #12 // =409618; CHECK-NEXT:    b.ne .LBB0_119; CHECK-NEXT:  // %bb.2: // %while.end20; CHECK-NEXT:    ret21entry:22  br label %vector.body23 24vector.body:                                      ; preds = %vector.body, %entry25  %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]26  %0 = shl i64 %index, 127  %next.gep = getelementptr float, ptr %pSrc, i64 %028  %next.gep19 = getelementptr float, ptr %pDst, i64 %index29  %wide.vec = load <8 x float>, ptr %next.gep, align 430  %1 = fmul fast <8 x float> %wide.vec, %wide.vec31  %2 = shufflevector <8 x float> %1, <8 x float> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>32  %3 = fmul fast <8 x float> %wide.vec, %wide.vec33  %4 = shufflevector <8 x float> %3, <8 x float> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>34  %5 = fadd fast <4 x float> %4, %235  store <4 x float> %5, ptr %next.gep19, align 436  %index.next = add i64 %index, 437  %6 = icmp eq i64 %index.next, 102438  br i1 %6, label %while.end, label %vector.body39 40while.end:                                        ; preds = %vector.body41  ret void42}43 44define void @vld3(ptr nocapture readonly %pSrc, ptr noalias nocapture %pDst, i32 %numSamples) {45; CHECK-LABEL: vld3:46; CHECK:       .Lfunc_begin1:47; CHECK-NEXT:    .cfi_startproc48; CHECK-NEXT:  // %bb.0: // %entry49; CHECK-NEXT:    mov x8, xzr50; CHECK-NEXT:  .LBB1_1: // %vector.body51; CHECK-NEXT:    // =>This Inner Loop Header: Depth=152; CHECK-NEXT:    ld3 { v0.4s, v1.4s, v2.4s }, [x0], #4853; CHECK-NEXT:    fmul v3.4s, v0.4s, v0.4s54; CHECK-NEXT:    fmla v3.4s, v1.4s, v1.4s55; CHECK-NEXT:    fmla v3.4s, v2.4s, v2.4s56; CHECK-NEXT:    str q3, [x1, x8]57; CHECK-NEXT:    add x8, x8, #1658; CHECK-NEXT:    cmp x8, #1, lsl #12 // =409659; CHECK-NEXT:    b.ne .LBB1_160; CHECK-NEXT:  // %bb.2: // %while.end61; CHECK-NEXT:    ret62entry:63  br label %vector.body64 65vector.body:                                      ; preds = %vector.body, %entry66  %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]67  %0 = mul i64 %index, 368  %next.gep = getelementptr float, ptr %pSrc, i64 %069  %next.gep23 = getelementptr float, ptr %pDst, i64 %index70  %wide.vec = load <12 x float>, ptr %next.gep, align 471  %1 = fmul fast <12 x float> %wide.vec, %wide.vec72  %2 = shufflevector <12 x float> %1, <12 x float> undef, <4 x i32> <i32 0, i32 3, i32 6, i32 9>73  %3 = fmul fast <12 x float> %wide.vec, %wide.vec74  %4 = shufflevector <12 x float> %3, <12 x float> undef, <4 x i32> <i32 1, i32 4, i32 7, i32 10>75  %5 = fadd fast <4 x float> %4, %276  %6 = fmul fast <12 x float> %wide.vec, %wide.vec77  %7 = shufflevector <12 x float> %6, <12 x float> undef, <4 x i32> <i32 2, i32 5, i32 8, i32 11>78  %8 = fadd fast <4 x float> %5, %779  store <4 x float> %8, ptr %next.gep23, align 480  %index.next = add i64 %index, 481  %9 = icmp eq i64 %index.next, 102482  br i1 %9, label %while.end, label %vector.body83 84while.end:                                        ; preds = %vector.body85  ret void86}87 88define void @vld4(ptr nocapture readonly %pSrc, ptr noalias nocapture %pDst, i32 %numSamples) {89; CHECK-LABEL: vld4:90; CHECK:       .Lfunc_begin2:91; CHECK-NEXT:    .cfi_startproc92; CHECK-NEXT:  // %bb.0: // %entry93; CHECK-NEXT:    mov x8, xzr94; CHECK-NEXT:  .LBB2_1: // %vector.body95; CHECK-NEXT:    // =>This Inner Loop Header: Depth=196; CHECK-NEXT:    ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [x0], #6497; CHECK-NEXT:    add x9, x1, x898; CHECK-NEXT:    add x8, x8, #3299; CHECK-NEXT:    cmp x8, #2, lsl #12 // =8192100; CHECK-NEXT:    fmul v4.4s, v0.4s, v0.4s101; CHECK-NEXT:    fmla v4.4s, v1.4s, v1.4s102; CHECK-NEXT:    fmul v5.4s, v2.4s, v2.4s103; CHECK-NEXT:    fmla v5.4s, v3.4s, v3.4s104; CHECK-NEXT:    st2 { v4.4s, v5.4s }, [x9]105; CHECK-NEXT:    b.ne .LBB2_1106; CHECK-NEXT:  // %bb.2: // %while.end107; CHECK-NEXT:    ret108entry:109  br label %vector.body110 111vector.body:                                      ; preds = %vector.body, %entry112  %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]113  %0 = shl i64 %index, 2114  %next.gep = getelementptr float, ptr %pSrc, i64 %0115  %1 = shl i64 %index, 1116  %wide.vec = load <16 x float>, ptr %next.gep, align 4117  %2 = fmul fast <16 x float> %wide.vec, %wide.vec118  %3 = shufflevector <16 x float> %2, <16 x float> undef, <4 x i32> <i32 0, i32 4, i32 8, i32 12>119  %4 = fmul fast <16 x float> %wide.vec, %wide.vec120  %5 = shufflevector <16 x float> %4, <16 x float> undef, <4 x i32> <i32 1, i32 5, i32 9, i32 13>121  %6 = fadd fast <4 x float> %5, %3122  %7 = fmul fast <16 x float> %wide.vec, %wide.vec123  %8 = shufflevector <16 x float> %7, <16 x float> undef, <4 x i32> <i32 2, i32 6, i32 10, i32 14>124  %9 = fmul fast <16 x float> %wide.vec, %wide.vec125  %10 = shufflevector <16 x float> %9, <16 x float> undef, <4 x i32> <i32 3, i32 7, i32 11, i32 15>126  %11 = fadd fast <4 x float> %10, %8127  %12 = getelementptr inbounds float, ptr %pDst, i64 %1128  %interleaved.vec = shufflevector <4 x float> %6, <4 x float> %11, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>129  store <8 x float> %interleaved.vec, ptr %12, align 4130  %index.next = add i64 %index, 4131  %13 = icmp eq i64 %index.next, 1024132  br i1 %13, label %while.end, label %vector.body133 134while.end:                                        ; preds = %vector.body135  ret void136}137 138define void @twosrc(ptr nocapture readonly %pSrc, ptr nocapture readonly %pSrc2, ptr noalias nocapture %pDst, i32 %numSamples) {139; CHECK-LABEL: twosrc:140; CHECK:       .Lfunc_begin3:141; CHECK-NEXT:    .cfi_startproc142; CHECK-NEXT:  // %bb.0: // %entry143; CHECK-NEXT:    mov x8, xzr144; CHECK-NEXT:  .LBB3_1: // %vector.body145; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1146; CHECK-NEXT:    add x9, x0, x8147; CHECK-NEXT:    add x10, x1, x8148; CHECK-NEXT:    add x8, x8, #32149; CHECK-NEXT:    ld2 { v0.4s, v1.4s }, [x9]150; CHECK-NEXT:    cmp x8, #2, lsl #12 // =8192151; CHECK-NEXT:    ld2 { v2.4s, v3.4s }, [x10]152; CHECK-NEXT:    fmul v4.4s, v2.4s, v0.4s153; CHECK-NEXT:    fmla v4.4s, v1.4s, v3.4s154; CHECK-NEXT:    str q4, [x2], #16155; CHECK-NEXT:    b.ne .LBB3_1156; CHECK-NEXT:  // %bb.2: // %while.end157; CHECK-NEXT:    ret158entry:159  br label %vector.body160 161vector.body:                                      ; preds = %vector.body, %entry162  %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]163  %0 = shl i64 %index, 1164  %next.gep = getelementptr float, ptr %pSrc, i64 %0165  %1 = shl i64 %index, 1166  %next.gep23 = getelementptr float, ptr %pSrc2, i64 %1167  %next.gep24 = getelementptr float, ptr %pDst, i64 %index168  %wide.vec = load <8 x float>, ptr %next.gep, align 4169  %wide.vec26 = load <8 x float>, ptr %next.gep23, align 4170  %2 = fmul fast <8 x float> %wide.vec26, %wide.vec171  %3 = shufflevector <8 x float> %2, <8 x float> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>172  %4 = fmul fast <8 x float> %wide.vec26, %wide.vec173  %5 = shufflevector <8 x float> %4, <8 x float> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>174  %6 = fadd fast <4 x float> %5, %3175  store <4 x float> %6, ptr %next.gep24, align 4176  %index.next = add i64 %index, 4177  %7 = icmp eq i64 %index.next, 1024178  br i1 %7, label %while.end, label %vector.body179 180while.end:                                        ; preds = %vector.body181  ret void182}183 184define void @vld2_multiuse(ptr nocapture readonly %pSrc, ptr noalias nocapture %pDst, i32 %numSamples) {185; CHECK-LABEL: vld2_multiuse:186; CHECK:       .Lfunc_begin4:187; CHECK-NEXT:    .cfi_startproc188; CHECK-NEXT:  // %bb.0: // %entry189; CHECK-NEXT:    mov x8, xzr190; CHECK-NEXT:  .LBB4_1: // %vector.body191; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1192; CHECK-NEXT:    ld2 { v0.4s, v1.4s }, [x0], #32193; CHECK-NEXT:    fmul v2.4s, v0.4s, v0.4s194; CHECK-NEXT:    fmla v2.4s, v1.4s, v1.4s195; CHECK-NEXT:    str q2, [x1, x8]196; CHECK-NEXT:    add x8, x8, #16197; CHECK-NEXT:    cmp x8, #1, lsl #12 // =4096198; CHECK-NEXT:    b.ne .LBB4_1199; CHECK-NEXT:  // %bb.2: // %while.end200; CHECK-NEXT:    ret201entry:202  br label %vector.body203 204vector.body:                                      ; preds = %vector.body, %entry205  %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]206  %0 = shl i64 %index, 1207  %next.gep = getelementptr float, ptr %pSrc, i64 %0208  %next.gep19 = getelementptr float, ptr %pDst, i64 %index209  %wide.vec = load <8 x float>, ptr %next.gep, align 4210  %1 = fmul fast <8 x float> %wide.vec, %wide.vec211  %2 = shufflevector <8 x float> %1, <8 x float> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>212  %3 = shufflevector <8 x float> %1, <8 x float> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>213  %4 = fadd fast <4 x float> %3, %2214  store <4 x float> %4, ptr %next.gep19, align 4215  %index.next = add i64 %index, 4216  %5 = icmp eq i64 %index.next, 1024217  br i1 %5, label %while.end, label %vector.body218 219while.end:                                        ; preds = %vector.body220  ret void221}222 223define void @vld3_multiuse(ptr nocapture readonly %pSrc, ptr noalias nocapture %pDst, i32 %numSamples) {224; CHECK-LABEL: vld3_multiuse:225; CHECK:       .Lfunc_begin5:226; CHECK-NEXT:    .cfi_startproc227; CHECK-NEXT:  // %bb.0: // %entry228; CHECK-NEXT:    mov x8, xzr229; CHECK-NEXT:  .LBB5_1: // %vector.body230; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1231; CHECK-NEXT:    ld3 { v0.4s, v1.4s, v2.4s }, [x0], #48232; CHECK-NEXT:    fmul v3.4s, v0.4s, v0.4s233; CHECK-NEXT:    fmla v3.4s, v1.4s, v1.4s234; CHECK-NEXT:    fmla v3.4s, v2.4s, v2.4s235; CHECK-NEXT:    str q3, [x1, x8]236; CHECK-NEXT:    add x8, x8, #16237; CHECK-NEXT:    cmp x8, #1, lsl #12 // =4096238; CHECK-NEXT:    b.ne .LBB5_1239; CHECK-NEXT:  // %bb.2: // %while.end240; CHECK-NEXT:    ret241entry:242  br label %vector.body243 244vector.body:                                      ; preds = %vector.body, %entry245  %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]246  %0 = mul i64 %index, 3247  %next.gep = getelementptr float, ptr %pSrc, i64 %0248  %next.gep23 = getelementptr float, ptr %pDst, i64 %index249  %wide.vec = load <12 x float>, ptr %next.gep, align 4250  %1 = fmul fast <12 x float> %wide.vec, %wide.vec251  %2 = shufflevector <12 x float> %1, <12 x float> undef, <4 x i32> <i32 0, i32 3, i32 6, i32 9>252  %3 = shufflevector <12 x float> %1, <12 x float> undef, <4 x i32> <i32 1, i32 4, i32 7, i32 10>253  %4 = fadd fast <4 x float> %3, %2254  %5 = shufflevector <12 x float> %1, <12 x float> undef, <4 x i32> <i32 2, i32 5, i32 8, i32 11>255  %6 = fadd fast <4 x float> %4, %5256  store <4 x float> %6, ptr %next.gep23, align 4257  %index.next = add i64 %index, 4258  %7 = icmp eq i64 %index.next, 1024259  br i1 %7, label %while.end, label %vector.body260 261while.end:                                        ; preds = %vector.body262  ret void263}264 265define void @vld4_multiuse(ptr nocapture readonly %pSrc, ptr noalias nocapture %pDst, i32 %numSamples) {266; CHECK-LABEL: vld4_multiuse:267; CHECK:       .Lfunc_begin6:268; CHECK-NEXT:    .cfi_startproc269; CHECK-NEXT:  // %bb.0: // %entry270; CHECK-NEXT:    mov x8, xzr271; CHECK-NEXT:  .LBB6_1: // %vector.body272; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1273; CHECK-NEXT:    ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [x0], #64274; CHECK-NEXT:    add x9, x1, x8275; CHECK-NEXT:    add x8, x8, #32276; CHECK-NEXT:    cmp x8, #2, lsl #12 // =8192277; CHECK-NEXT:    fmul v4.4s, v0.4s, v0.4s278; CHECK-NEXT:    fmla v4.4s, v1.4s, v1.4s279; CHECK-NEXT:    fmul v5.4s, v2.4s, v2.4s280; CHECK-NEXT:    fmla v5.4s, v3.4s, v3.4s281; CHECK-NEXT:    st2 { v4.4s, v5.4s }, [x9]282; CHECK-NEXT:    b.ne .LBB6_1283; CHECK-NEXT:  // %bb.2: // %while.end284; CHECK-NEXT:    ret285entry:286  br label %vector.body287 288vector.body:                                      ; preds = %vector.body, %entry289  %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]290  %0 = shl i64 %index, 2291  %next.gep = getelementptr float, ptr %pSrc, i64 %0292  %1 = shl i64 %index, 1293  %wide.vec = load <16 x float>, ptr %next.gep, align 4294  %2 = fmul fast <16 x float> %wide.vec, %wide.vec295  %3 = shufflevector <16 x float> %2, <16 x float> undef, <4 x i32> <i32 0, i32 4, i32 8, i32 12>296  %4 = shufflevector <16 x float> %2, <16 x float> undef, <4 x i32> <i32 1, i32 5, i32 9, i32 13>297  %5 = fadd fast <4 x float> %4, %3298  %6 = shufflevector <16 x float> %2, <16 x float> undef, <4 x i32> <i32 2, i32 6, i32 10, i32 14>299  %7 = shufflevector <16 x float> %2, <16 x float> undef, <4 x i32> <i32 3, i32 7, i32 11, i32 15>300  %8 = fadd fast <4 x float> %7, %6301  %9 = getelementptr inbounds float, ptr %pDst, i64 %1302  %interleaved.vec = shufflevector <4 x float> %5, <4 x float> %8, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>303  store <8 x float> %interleaved.vec, ptr %9, align 4304  %index.next = add i64 %index, 4305  %10 = icmp eq i64 %index.next, 1024306  br i1 %10, label %while.end, label %vector.body307 308while.end:                                        ; preds = %vector.body309  ret void310}311 312; This example has store(shuffle(shuffle(... that would be better to be treated313; as a single store. This avoids the vld2 for data that is already shuffled.314define void @transpose_s16_8x8_simpler(ptr nocapture noundef %a) {315; CHECK-LABEL: transpose_s16_8x8_simpler:316; CHECK:       .Lfunc_begin7:317; CHECK-NEXT:    .cfi_startproc318; CHECK-NEXT:  // %bb.0: // %entry319; CHECK-NEXT:    ldp q0, q1, [x0]320; CHECK-NEXT:    ldp q2, q3, [x0, #64]321; CHECK-NEXT:    ldp q4, q5, [x0, #32]322; CHECK-NEXT:    ldp q6, q7, [x0, #96]323; CHECK-NEXT:    trn1 v0.8h, v0.8h, v1.8h324; CHECK-NEXT:    trn1 v1.8h, v2.8h, v3.8h325; CHECK-NEXT:    trn1 v2.8h, v4.8h, v5.8h326; CHECK-NEXT:    trn1 v3.8h, v6.8h, v7.8h327; CHECK-NEXT:    trn1 v0.4s, v0.4s, v1.4s328; CHECK-NEXT:    trn1 v1.4s, v2.4s, v3.4s329; CHECK-NEXT:    zip2 v2.4s, v0.4s, v1.4s330; CHECK-NEXT:    st2 { v0.2s, v1.2s }, [x0]331; CHECK-NEXT:    str q2, [x0, #64]332; CHECK-NEXT:    ret333entry:334  %0 = load <8 x i16>, ptr %a, align 16335  %arrayidx1 = getelementptr inbounds <8 x i16>, ptr %a, i64 1336  %1 = load <8 x i16>, ptr %arrayidx1, align 16337  %shuffle.i = shufflevector <8 x i16> %0, <8 x i16> %1, <8 x i32> <i32 0, i32 8, i32 undef, i32 undef, i32 4, i32 12, i32 undef, i32 undef>338  %arrayidx2 = getelementptr inbounds <8 x i16>, ptr %a, i64 2339  %2 = load <8 x i16>, ptr %arrayidx2, align 16340  %arrayidx3 = getelementptr inbounds <8 x i16>, ptr %a, i64 3341  %3 = load <8 x i16>, ptr %arrayidx3, align 16342  %shuffle.i34 = shufflevector <8 x i16> %2, <8 x i16> %3, <8 x i32> <i32 0, i32 8, i32 undef, i32 undef, i32 4, i32 12, i32 undef, i32 undef>343  %arrayidx5 = getelementptr inbounds <8 x i16>, ptr %a, i64 4344  %4 = load <8 x i16>, ptr %arrayidx5, align 16345  %arrayidx6 = getelementptr inbounds <8 x i16>, ptr %a, i64 5346  %5 = load <8 x i16>, ptr %arrayidx6, align 16347  %shuffle.i35 = shufflevector <8 x i16> %4, <8 x i16> %5, <8 x i32> <i32 0, i32 8, i32 undef, i32 undef, i32 4, i32 12, i32 undef, i32 undef>348  %arrayidx8 = getelementptr inbounds <8 x i16>, ptr %a, i64 6349  %6 = load <8 x i16>, ptr %arrayidx8, align 16350  %arrayidx9 = getelementptr inbounds <8 x i16>, ptr %a, i64 7351  %7 = load <8 x i16>, ptr %arrayidx9, align 16352  %shuffle.i36 = shufflevector <8 x i16> %6, <8 x i16> %7, <8 x i32> <i32 0, i32 8, i32 undef, i32 undef, i32 4, i32 12, i32 undef, i32 undef>353  %8 = bitcast <8 x i16> %shuffle.i to <4 x i32>354  %9 = bitcast <8 x i16> %shuffle.i35 to <4 x i32>355  %shuffle.i37 = shufflevector <4 x i32> %8, <4 x i32> %9, <4 x i32> <i32 0, i32 4, i32 2, i32 6>356  %10 = bitcast <8 x i16> %shuffle.i34 to <4 x i32>357  %11 = bitcast <8 x i16> %shuffle.i36 to <4 x i32>358  %shuffle.i38 = shufflevector <4 x i32> %10, <4 x i32> %11, <4 x i32> <i32 0, i32 4, i32 2, i32 6>359  %vzip.i = shufflevector <4 x i32> %shuffle.i37, <4 x i32> %shuffle.i38, <4 x i32> <i32 0, i32 4, i32 1, i32 5>360  %vzip1.i = shufflevector <4 x i32> %shuffle.i37, <4 x i32> %shuffle.i38, <4 x i32> <i32 2, i32 6, i32 3, i32 7>361  store <4 x i32> %vzip.i, ptr %a, align 16362  store <4 x i32> %vzip1.i, ptr %arrayidx5, align 16363  ret void364}365 366; Same as above with some different shuffles367define void @transpose_s16_8x8_simpler2(ptr nocapture noundef %a) {368; CHECK-LABEL: transpose_s16_8x8_simpler2:369; CHECK:       .Lfunc_begin8:370; CHECK-NEXT:    .cfi_startproc371; CHECK-NEXT:  // %bb.0: // %entry372; CHECK-NEXT:    ldp q0, q1, [x0]373; CHECK-NEXT:    ldp q2, q3, [x0, #64]374; CHECK-NEXT:    ldp q4, q5, [x0, #32]375; CHECK-NEXT:    ldp q6, q7, [x0, #96]376; CHECK-NEXT:    trn1 v0.8h, v0.8h, v1.8h377; CHECK-NEXT:    zip1 v1.8h, v2.8h, v3.8h378; CHECK-NEXT:    zip1 v2.8h, v4.8h, v5.8h379; CHECK-NEXT:    trn1 v3.8h, v6.8h, v7.8h380; CHECK-NEXT:    trn1 v0.4s, v0.4s, v1.4s381; CHECK-NEXT:    uzp1 v1.4s, v2.4s, v3.4s382; CHECK-NEXT:    zip2 v2.4s, v0.4s, v1.4s383; CHECK-NEXT:    st2 { v0.2s, v1.2s }, [x0]384; CHECK-NEXT:    str q2, [x0, #64]385; CHECK-NEXT:    ret386entry:387  %0 = load <8 x i16>, ptr %a, align 16388  %arrayidx1 = getelementptr inbounds <8 x i16>, ptr %a, i64 1389  %1 = load <8 x i16>, ptr %arrayidx1, align 16390  %shuffle.i = shufflevector <8 x i16> %0, <8 x i16> %1, <8 x i32> <i32 0, i32 8, i32 undef, i32 undef, i32 4, i32 12, i32 undef, i32 undef>391  %arrayidx2 = getelementptr inbounds <8 x i16>, ptr %a, i64 2392  %2 = load <8 x i16>, ptr %arrayidx2, align 16393  %arrayidx3 = getelementptr inbounds <8 x i16>, ptr %a, i64 3394  %3 = load <8 x i16>, ptr %arrayidx3, align 16395  %shuffle.i34 = shufflevector <8 x i16> %2, <8 x i16> %3, <8 x i32> <i32 0, i32 8, i32 undef, i32 undef, i32 4, i32 12, i32 undef, i32 undef>396  %arrayidx5 = getelementptr inbounds <8 x i16>, ptr %a, i64 4397  %4 = load <8 x i16>, ptr %arrayidx5, align 16398  %arrayidx6 = getelementptr inbounds <8 x i16>, ptr %a, i64 5399  %5 = load <8 x i16>, ptr %arrayidx6, align 16400  %shuffle.i35 = shufflevector <8 x i16> %4, <8 x i16> %5, <8 x i32> <i32 0, i32 8, i32 undef, i32 undef, i32 4, i32 12, i32 undef, i32 undef>401  %arrayidx8 = getelementptr inbounds <8 x i16>, ptr %a, i64 6402  %6 = load <8 x i16>, ptr %arrayidx8, align 16403  %arrayidx9 = getelementptr inbounds <8 x i16>, ptr %a, i64 7404  %7 = load <8 x i16>, ptr %arrayidx9, align 16405  %shuffle.i36 = shufflevector <8 x i16> %6, <8 x i16> %7, <8 x i32> <i32 0, i32 8, i32 undef, i32 undef, i32 4, i32 12, i32 undef, i32 undef>406  %8 = bitcast <8 x i16> %shuffle.i to <4 x i32>407  %9 = bitcast <8 x i16> %shuffle.i35 to <4 x i32>408  %shuffle.i37 = shufflevector <4 x i32> %8, <4 x i32> %9, <4 x i32> <i32 1, i32 4, i32 2, i32 7>409  %10 = bitcast <8 x i16> %shuffle.i34 to <4 x i32>410  %11 = bitcast <8 x i16> %shuffle.i36 to <4 x i32>411  %shuffle.i38 = shufflevector <4 x i32> %10, <4 x i32> %11, <4 x i32> <i32 0, i32 5, i32 3, i32 6>412  %vzip.i = shufflevector <4 x i32> %shuffle.i37, <4 x i32> %shuffle.i38, <4 x i32> <i32 0, i32 4, i32 1, i32 5>413  %vzip1.i = shufflevector <4 x i32> %shuffle.i37, <4 x i32> %shuffle.i38, <4 x i32> <i32 2, i32 6, i32 3, i32 7>414  store <4 x i32> %vzip.i, ptr %a, align 16415  store <4 x i32> %vzip1.i, ptr %arrayidx5, align 16416  ret void417}418 419 420define void @transpose_s16_8x8(ptr nocapture noundef %0, ptr nocapture noundef %1, ptr nocapture noundef %2, ptr nocapture noundef %3, ptr nocapture noundef %4, ptr nocapture noundef %5, ptr nocapture noundef %6, ptr nocapture noundef %7) {421; CHECK-LABEL: transpose_s16_8x8:422; CHECK:       .Lfunc_begin9:423; CHECK-NEXT:    .cfi_startproc424; CHECK-NEXT:  // %bb.0:425; CHECK-NEXT:    ldr q0, [x0]426; CHECK-NEXT:    ldr q1, [x1]427; CHECK-NEXT:    ldr q3, [x4]428; CHECK-NEXT:    ldr q4, [x5]429; CHECK-NEXT:    ldr q2, [x2]430; CHECK-NEXT:    ldr q5, [x3]431; CHECK-NEXT:    trn1 v16.8h, v0.8h, v1.8h432; CHECK-NEXT:    trn2 v0.8h, v0.8h, v1.8h433; CHECK-NEXT:    ldr q6, [x6]434; CHECK-NEXT:    ldr q7, [x7]435; CHECK-NEXT:    trn1 v17.8h, v3.8h, v4.8h436; CHECK-NEXT:    trn2 v1.8h, v3.8h, v4.8h437; CHECK-NEXT:    trn1 v18.8h, v2.8h, v5.8h438; CHECK-NEXT:    trn2 v2.8h, v2.8h, v5.8h439; CHECK-NEXT:    trn1 v19.8h, v6.8h, v7.8h440; CHECK-NEXT:    trn2 v3.8h, v6.8h, v7.8h441; CHECK-NEXT:    trn1 v4.4s, v16.4s, v17.4s442; CHECK-NEXT:    trn1 v6.4s, v0.4s, v1.4s443; CHECK-NEXT:    trn2 v16.4s, v16.4s, v17.4s444; CHECK-NEXT:    trn2 v0.4s, v0.4s, v1.4s445; CHECK-NEXT:    trn1 v5.4s, v18.4s, v19.4s446; CHECK-NEXT:    trn1 v7.4s, v2.4s, v3.4s447; CHECK-NEXT:    trn2 v17.4s, v18.4s, v19.4s448; CHECK-NEXT:    trn2 v1.4s, v2.4s, v3.4s449; CHECK-NEXT:    st2 { v4.2s, v5.2s }, [x0]450; CHECK-NEXT:    zip2 v2.4s, v4.4s, v5.4s451; CHECK-NEXT:    zip2 v3.4s, v6.4s, v7.4s452; CHECK-NEXT:    zip2 v4.4s, v16.4s, v17.4s453; CHECK-NEXT:    st2 { v6.2s, v7.2s }, [x1]454; CHECK-NEXT:    st2 { v16.2s, v17.2s }, [x2]455; CHECK-NEXT:    st2 { v0.2s, v1.2s }, [x3]456; CHECK-NEXT:    zip2 v0.4s, v0.4s, v1.4s457; CHECK-NEXT:    str q2, [x4]458; CHECK-NEXT:    str q3, [x5]459; CHECK-NEXT:    str q4, [x6]460; CHECK-NEXT:    str q0, [x7]461; CHECK-NEXT:    ret462  %9 = load <8 x i16>, ptr %0, align 16463  %10 = load <8 x i16>, ptr %1, align 16464  %11 = shufflevector <8 x i16> %9, <8 x i16> %10, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>465  %12 = shufflevector <8 x i16> %9, <8 x i16> %10, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>466  %13 = load <8 x i16>, ptr %2, align 16467  %14 = load <8 x i16>, ptr %3, align 16468  %15 = shufflevector <8 x i16> %13, <8 x i16> %14, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>469  %16 = shufflevector <8 x i16> %13, <8 x i16> %14, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>470  %17 = load <8 x i16>, ptr %4, align 16471  %18 = load <8 x i16>, ptr %5, align 16472  %19 = shufflevector <8 x i16> %17, <8 x i16> %18, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>473  %20 = shufflevector <8 x i16> %17, <8 x i16> %18, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>474  %21 = load <8 x i16>, ptr %6, align 16475  %22 = load <8 x i16>, ptr %7, align 16476  %23 = shufflevector <8 x i16> %21, <8 x i16> %22, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>477  %24 = shufflevector <8 x i16> %21, <8 x i16> %22, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>478  %25 = bitcast <8 x i16> %11 to <4 x i32>479  %26 = bitcast <8 x i16> %19 to <4 x i32>480  %27 = shufflevector <4 x i32> %25, <4 x i32> %26, <4 x i32> <i32 0, i32 4, i32 2, i32 6>481  %28 = shufflevector <4 x i32> %25, <4 x i32> %26, <4 x i32> <i32 1, i32 5, i32 3, i32 7>482  %29 = bitcast <8 x i16> %12 to <4 x i32>483  %30 = bitcast <8 x i16> %20 to <4 x i32>484  %31 = shufflevector <4 x i32> %29, <4 x i32> %30, <4 x i32> <i32 0, i32 4, i32 2, i32 6>485  %32 = shufflevector <4 x i32> %29, <4 x i32> %30, <4 x i32> <i32 1, i32 5, i32 3, i32 7>486  %33 = bitcast <8 x i16> %15 to <4 x i32>487  %34 = bitcast <8 x i16> %23 to <4 x i32>488  %35 = shufflevector <4 x i32> %33, <4 x i32> %34, <4 x i32> <i32 0, i32 4, i32 2, i32 6>489  %36 = shufflevector <4 x i32> %33, <4 x i32> %34, <4 x i32> <i32 1, i32 5, i32 3, i32 7>490  %37 = bitcast <8 x i16> %16 to <4 x i32>491  %38 = bitcast <8 x i16> %24 to <4 x i32>492  %39 = shufflevector <4 x i32> %37, <4 x i32> %38, <4 x i32> <i32 0, i32 4, i32 2, i32 6>493  %40 = shufflevector <4 x i32> %37, <4 x i32> %38, <4 x i32> <i32 1, i32 5, i32 3, i32 7>494  %41 = shufflevector <4 x i32> %27, <4 x i32> %35, <4 x i32> <i32 0, i32 4, i32 1, i32 5>495  %42 = shufflevector <4 x i32> %27, <4 x i32> %35, <4 x i32> <i32 2, i32 6, i32 3, i32 7>496  %43 = shufflevector <4 x i32> %31, <4 x i32> %39, <4 x i32> <i32 0, i32 4, i32 1, i32 5>497  %44 = shufflevector <4 x i32> %31, <4 x i32> %39, <4 x i32> <i32 2, i32 6, i32 3, i32 7>498  %45 = shufflevector <4 x i32> %28, <4 x i32> %36, <4 x i32> <i32 0, i32 4, i32 1, i32 5>499  %46 = shufflevector <4 x i32> %28, <4 x i32> %36, <4 x i32> <i32 2, i32 6, i32 3, i32 7>500  %47 = shufflevector <4 x i32> %32, <4 x i32> %40, <4 x i32> <i32 0, i32 4, i32 1, i32 5>501  %48 = shufflevector <4 x i32> %32, <4 x i32> %40, <4 x i32> <i32 2, i32 6, i32 3, i32 7>502  store <4 x i32> %41, ptr %0, align 16503  store <4 x i32> %43, ptr %1, align 16504  store <4 x i32> %45, ptr %2, align 16505  store <4 x i32> %47, ptr %3, align 16506  store <4 x i32> %42, ptr %4, align 16507  store <4 x i32> %44, ptr %5, align 16508  store <4 x i32> %46, ptr %6, align 16509  store <4 x i32> %48, ptr %7, align 16510  ret void511}512 513define void @transpose_s16_8x8_(ptr nocapture noundef %0) {514; CHECK-LABEL: transpose_s16_8x8_:515; CHECK:       .Lfunc_begin10:516; CHECK-NEXT:    .cfi_startproc517; CHECK-NEXT:  // %bb.0:518; CHECK-NEXT:    ldp q0, q1, [x0]519; CHECK-NEXT:    ldp q2, q3, [x0, #32]520; CHECK-NEXT:    ldp q4, q5, [x0, #64]521; CHECK-NEXT:    ldp q6, q7, [x0, #96]522; CHECK-NEXT:    trn1 v16.8h, v0.8h, v1.8h523; CHECK-NEXT:    trn2 v0.8h, v0.8h, v1.8h524; CHECK-NEXT:    trn1 v1.8h, v2.8h, v3.8h525; CHECK-NEXT:    trn2 v2.8h, v2.8h, v3.8h526; CHECK-NEXT:    trn1 v17.8h, v4.8h, v5.8h527; CHECK-NEXT:    trn2 v3.8h, v4.8h, v5.8h528; CHECK-NEXT:    trn1 v18.8h, v6.8h, v7.8h529; CHECK-NEXT:    trn2 v4.8h, v6.8h, v7.8h530; CHECK-NEXT:    trn1 v5.4s, v16.4s, v17.4s531; CHECK-NEXT:    trn1 v7.4s, v0.4s, v3.4s532; CHECK-NEXT:    trn2 v16.4s, v16.4s, v17.4s533; CHECK-NEXT:    trn1 v6.4s, v1.4s, v18.4s534; CHECK-NEXT:    trn1 v19.4s, v2.4s, v4.4s535; CHECK-NEXT:    trn2 v1.4s, v1.4s, v18.4s536; CHECK-NEXT:    trn2 v0.4s, v0.4s, v3.4s537; CHECK-NEXT:    trn2 v2.4s, v2.4s, v4.4s538; CHECK-NEXT:    zip1 v3.4s, v5.4s, v6.4s539; CHECK-NEXT:    zip1 v4.4s, v7.4s, v19.4s540; CHECK-NEXT:    zip1 v17.4s, v16.4s, v1.4s541; CHECK-NEXT:    zip1 v18.4s, v0.4s, v2.4s542; CHECK-NEXT:    zip2 v5.4s, v5.4s, v6.4s543; CHECK-NEXT:    zip2 v1.4s, v16.4s, v1.4s544; CHECK-NEXT:    zip2 v0.4s, v0.4s, v2.4s545; CHECK-NEXT:    stp q3, q4, [x0]546; CHECK-NEXT:    zip2 v3.4s, v7.4s, v19.4s547; CHECK-NEXT:    stp q17, q18, [x0, #32]548; CHECK-NEXT:    stp q1, q0, [x0, #96]549; CHECK-NEXT:    stp q5, q3, [x0, #64]550; CHECK-NEXT:    ret551  %2 = load <8 x i16>, ptr %0, align 16552  %3 = getelementptr inbounds <8 x i16>, ptr %0, i64 1553  %4 = load <8 x i16>, ptr %3, align 1554  %5 = shufflevector <8 x i16> %2, <8 x i16> %4, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>555  %6 = shufflevector <8 x i16> %2, <8 x i16> %4, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>556  %7 = getelementptr inbounds <8 x i16>, ptr %0, i64 2557  %8 = load <8 x i16>, ptr %7, align 16558  %9 = getelementptr inbounds <8 x i16>, ptr %0, i64 3559  %10 = load <8 x i16>, ptr %9, align 16560  %11 = shufflevector <8 x i16> %8, <8 x i16> %10, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>561  %12 = shufflevector <8 x i16> %8, <8 x i16> %10, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>562  %13 = getelementptr inbounds <8 x i16>, ptr %0, i64 4563  %14 = load <8 x i16>, ptr %13, align 16564  %15 = getelementptr inbounds <8 x i16>, ptr %0, i64 5565  %16 = load <8 x i16>, ptr %15, align 16566  %17 = shufflevector <8 x i16> %14, <8 x i16> %16, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>567  %18 = shufflevector <8 x i16> %14, <8 x i16> %16, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>568  %19 = getelementptr inbounds <8 x i16>, ptr %0, i64 6569  %20 = load <8 x i16>, ptr %19, align 16570  %21 = getelementptr inbounds <8 x i16>, ptr %0, i64 7571  %22 = load <8 x i16>, ptr %21, align 16572  %23 = shufflevector <8 x i16> %20, <8 x i16> %22, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>573  %24 = shufflevector <8 x i16> %20, <8 x i16> %22, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>574  %25 = bitcast <8 x i16> %5 to <4 x i32>575  %26 = bitcast <8 x i16> %17 to <4 x i32>576  %27 = shufflevector <4 x i32> %25, <4 x i32> %26, <4 x i32> <i32 0, i32 4, i32 2, i32 6>577  %28 = shufflevector <4 x i32> %25, <4 x i32> %26, <4 x i32> <i32 1, i32 5, i32 3, i32 7>578  %29 = bitcast <8 x i16> %6 to <4 x i32>579  %30 = bitcast <8 x i16> %18 to <4 x i32>580  %31 = shufflevector <4 x i32> %29, <4 x i32> %30, <4 x i32> <i32 0, i32 4, i32 2, i32 6>581  %32 = shufflevector <4 x i32> %29, <4 x i32> %30, <4 x i32> <i32 1, i32 5, i32 3, i32 7>582  %33 = bitcast <8 x i16> %11 to <4 x i32>583  %34 = bitcast <8 x i16> %23 to <4 x i32>584  %35 = shufflevector <4 x i32> %33, <4 x i32> %34, <4 x i32> <i32 0, i32 4, i32 2, i32 6>585  %36 = shufflevector <4 x i32> %33, <4 x i32> %34, <4 x i32> <i32 1, i32 5, i32 3, i32 7>586  %37 = bitcast <8 x i16> %12 to <4 x i32>587  %38 = bitcast <8 x i16> %24 to <4 x i32>588  %39 = shufflevector <4 x i32> %37, <4 x i32> %38, <4 x i32> <i32 0, i32 4, i32 2, i32 6>589  %40 = shufflevector <4 x i32> %37, <4 x i32> %38, <4 x i32> <i32 1, i32 5, i32 3, i32 7>590  %41 = shufflevector <4 x i32> %27, <4 x i32> %35, <4 x i32> <i32 0, i32 4, i32 1, i32 5>591  %42 = shufflevector <4 x i32> %27, <4 x i32> %35, <4 x i32> <i32 2, i32 6, i32 3, i32 7>592  %43 = shufflevector <4 x i32> %31, <4 x i32> %39, <4 x i32> <i32 0, i32 4, i32 1, i32 5>593  %44 = shufflevector <4 x i32> %31, <4 x i32> %39, <4 x i32> <i32 2, i32 6, i32 3, i32 7>594  %45 = shufflevector <4 x i32> %28, <4 x i32> %36, <4 x i32> <i32 0, i32 4, i32 1, i32 5>595  %46 = shufflevector <4 x i32> %28, <4 x i32> %36, <4 x i32> <i32 2, i32 6, i32 3, i32 7>596  %47 = shufflevector <4 x i32> %32, <4 x i32> %40, <4 x i32> <i32 0, i32 4, i32 1, i32 5>597  %48 = shufflevector <4 x i32> %32, <4 x i32> %40, <4 x i32> <i32 2, i32 6, i32 3, i32 7>598  store <4 x i32> %41, ptr %0, align 16599  store <4 x i32> %43, ptr %3, align 16600  store <4 x i32> %45, ptr %7, align 16601  store <4 x i32> %47, ptr %9, align 16602  store <4 x i32> %42, ptr %13, align 16603  store <4 x i32> %44, ptr %15, align 16604  store <4 x i32> %46, ptr %19, align 16605  store <4 x i32> %48, ptr %21, align 16606  ret void607}608 609define void @store_factor2(ptr %ptr, <4 x i32> %a0, <4 x i32> %a1) {610; CHECK-LABEL: store_factor2:611; CHECK:       .Lfunc_begin11:612; CHECK-NEXT:    .cfi_startproc613; CHECK-NEXT:  // %bb.0:614; CHECK-NEXT:    trn1 v2.4s, v0.4s, v1.4s615; CHECK-NEXT:    trn1 v3.4s, v1.4s, v0.4s616; CHECK-NEXT:    st2 { v2.4s, v3.4s }, [x0]617; CHECK-NEXT:    ret618  %v0 = shufflevector <4 x i32> %a0, <4 x i32> %a1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>619  %v1 = shufflevector <4 x i32> %a1, <4 x i32> %a0, <4 x i32> <i32 0, i32 4, i32 2, i32 6>620  %interleaved.vec = shufflevector <4 x i32> %v0, <4 x i32> %v1, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>621  store <8 x i32> %interleaved.vec, ptr %ptr, align 4622  ret void623}624 625define void @store_factor2_high(ptr %ptr, ptr %ptr2, <4 x i32> %a0, <4 x i32> %a1) {626; CHECK-LABEL: store_factor2_high:627; CHECK:       .Lfunc_begin12:628; CHECK-NEXT:    .cfi_startproc629; CHECK-NEXT:  // %bb.0:630; CHECK-NEXT:    trn1 v2.4s, v0.4s, v1.4s631; CHECK-NEXT:    trn1 v0.4s, v1.4s, v0.4s632; CHECK-NEXT:    zip1 v1.4s, v2.4s, v0.4s633; CHECK-NEXT:    trn1 v1.4s, v1.4s, v0.4s634; CHECK-NEXT:    zip2 v0.4s, v2.4s, v0.4s635; CHECK-NEXT:    str q1, [x0]636; CHECK-NEXT:    str q0, [x1]637; CHECK-NEXT:    ret638  %v0 = shufflevector <4 x i32> %a0, <4 x i32> %a1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>639  %v1 = shufflevector <4 x i32> %a1, <4 x i32> %a0, <4 x i32> <i32 0, i32 4, i32 2, i32 6>640  %interleaved.vec = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> <i32 0, i32 4, i32 1, i32 6>641  %interleaved.vec2 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> <i32 2, i32 6, i32 3, i32 7>642  store <4 x i32> %interleaved.vec, ptr %ptr, align 4643  store <4 x i32> %interleaved.vec2, ptr %ptr2, align 4644  ret void645}646 647define void @store_factor2_high2(ptr %ptr, ptr %ptr2, <4 x i32> %a0, <4 x i32> %a1) {648; CHECK-LABEL: store_factor2_high2:649; CHECK:       .Lfunc_begin13:650; CHECK-NEXT:    .cfi_startproc651; CHECK-NEXT:  // %bb.0:652; CHECK-NEXT:    zip1 v2.4s, v0.4s, v1.4s653; CHECK-NEXT:    zip2 v0.4s, v0.4s, v1.4s654; CHECK-NEXT:    trn1 v2.4s, v2.4s, v1.4s655; CHECK-NEXT:    str q2, [x0]656; CHECK-NEXT:    str q0, [x1]657; CHECK-NEXT:    ret658  %interleaved.vec = shufflevector <4 x i32> %a0, <4 x i32> %a1, <4 x i32> <i32 0, i32 4, i32 1, i32 6>659  %interleaved.vec2 = shufflevector <4 x i32> %a0, <4 x i32> %a1, <4 x i32> <i32 2, i32 6, i32 3, i32 7>660  store <4 x i32> %interleaved.vec, ptr %ptr, align 4661  store <4 x i32> %interleaved.vec2, ptr %ptr2, align 4662  ret void663}664 665define void @store_factor3(ptr %ptr, <4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2) {666; CHECK-LABEL: store_factor3:667; CHECK:       .Lfunc_begin14:668; CHECK-NEXT:    .cfi_startproc669; CHECK-NEXT:  // %bb.0:670; CHECK-NEXT:    ext v3.16b, v0.16b, v1.16b, #12671; CHECK-NEXT:    ext v6.16b, v1.16b, v2.16b, #12672; CHECK-NEXT:    zip2 v3.4s, v0.4s, v3.4s673; CHECK-NEXT:    mov v3.s[0], v0.s[0]674; CHECK-NEXT:    ext v0.16b, v2.16b, v0.16b, #12675; CHECK-NEXT:    zip2 v4.4s, v1.4s, v6.4s676; CHECK-NEXT:    mov v4.s[0], v1.s[0]677; CHECK-NEXT:    zip2 v5.4s, v2.4s, v0.4s678; CHECK-NEXT:    mov v5.s[0], v2.s[0]679; CHECK-NEXT:    st3 { v3.4s, v4.4s, v5.4s }, [x0]680; CHECK-NEXT:    ret681  %v0 = shufflevector <4 x i32> %a0, <4 x i32> %a1, <4 x i32> <i32 0, i32 5, i32 3, i32 6>682  %v1 = shufflevector <4 x i32> %a1, <4 x i32> %a2, <4 x i32> <i32 0, i32 5, i32 3, i32 6>683  %v2 = shufflevector <4 x i32> %a2, <4 x i32> %a0, <4 x i32> <i32 0, i32 5, i32 3, i32 6>684  %s0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>685  %s1 = shufflevector <4 x i32> %v2, <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>686  %interleaved.vec = shufflevector <8 x i32> %s0, <8 x i32> %s1, <12 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6, i32 10, i32 3, i32 7, i32 11>687  store <12 x i32> %interleaved.vec, ptr %ptr, align 4688  ret void689}690 691define void @store_factor4(ptr %ptr, <4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2, <4 x i32> %a3) {692; CHECK-LABEL: store_factor4:693; CHECK:       .Lfunc_begin15:694; CHECK-NEXT:    .cfi_startproc695; CHECK-NEXT:  // %bb.0:696; CHECK-NEXT:    trn1 v4.4s, v0.4s, v1.4s697; CHECK-NEXT:    trn1 v5.4s, v1.4s, v2.4s698; CHECK-NEXT:    trn1 v6.4s, v2.4s, v3.4s699; CHECK-NEXT:    trn1 v7.4s, v3.4s, v0.4s700; CHECK-NEXT:    st4 { v4.4s, v5.4s, v6.4s, v7.4s }, [x0]701; CHECK-NEXT:    ret702  %v0 = shufflevector <4 x i32> %a0, <4 x i32> %a1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>703  %v1 = shufflevector <4 x i32> %a1, <4 x i32> %a2, <4 x i32> <i32 0, i32 4, i32 2, i32 6>704  %v2 = shufflevector <4 x i32> %a2, <4 x i32> %a3, <4 x i32> <i32 0, i32 4, i32 2, i32 6>705  %v3 = shufflevector <4 x i32> %a3, <4 x i32> %a0, <4 x i32> <i32 0, i32 4, i32 2, i32 6>706  %s0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>707  %s1 = shufflevector <4 x i32> %v2, <4 x i32> %v3, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>708  %interleaved.vec = shufflevector <8 x i32> %s0, <8 x i32> %s1, <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 1, i32 5, i32 9, i32 13, i32 2, i32 6, i32 10, i32 14, i32 3, i32 7, i32 11, i32 15>709  store <16 x i32> %interleaved.vec, ptr %ptr, align 4710  ret void711}712 713define void @debuginfo(ptr nocapture noundef writeonly %buf, <8 x i16> noundef %a) {714; CHECK-LABEL: debuginfo:715; CHECK:       .Lfunc_begin16:716; CHECK-NEXT:    .cfi_startproc717; CHECK-NEXT:  // %bb.0: // %entry718; CHECK-NEXT:    movi v1.2d, #0000000000000000719; CHECK-NEXT:    zip1 v2.8h, v0.8h, v1.8h720; CHECK-NEXT:    zip2 v0.8h, v0.8h, v1.8h721; CHECK-NEXT:    stp q2, q0, [x0]722; CHECK-NEXT:    ret723entry:724  %vzip.i = shufflevector <8 x i16> %a, <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 poison, i16 poison, i16 poison, i16 poison>, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>725  %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> <i16 poison, i16 poison, i16 poison, i16 poison, i16 0, i16 0, i16 0, i16 0>, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>726  store <8 x i16> %vzip.i, ptr %buf, align 4727  call void @llvm.dbg.value(metadata <8 x i16> %vzip1.i, metadata !21, metadata !DIExpression()), !dbg !23728  %add.ptr = getelementptr inbounds i32, ptr %buf, i64 4729  store <8 x i16> %vzip1.i, ptr %add.ptr, align 4730  ret void731}732 733declare void @llvm.dbg.value(metadata, metadata, metadata)734 735!llvm.dbg.cu = !{!0}736!llvm.module.flags = !{!6, !7, !8, !9, !10, !11}737 738!0 = distinct !DICompileUnit(language: DW_LANG_C11, file: !1, producer: "", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, retainedTypes: !2, splitDebugInlining: false, nameTableKind: None)739!1 = !DIFile(filename: "a64.c", directory: "", checksumkind: CSK_MD5, checksum: "a1a236fb20d703d1ea5963e75545b91a")740!2 = !{!15}741!3 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)742!4 = !{!5}743!5 = !DISubrange(count: 8)744!6 = !{i32 7, !"Dwarf Version", i32 5}745!7 = !{i32 2, !"Debug Info Version", i32 3}746!8 = !{i32 1, !"wchar_size", i32 4}747!9 = !{i32 7, !"uwtable", i32 2}748!10 = !{i32 7, !"frame-pointer", i32 1}749!11 = !{i32 7, !"debug-info-assignment-tracking", i1 true}750!12 = !DISubroutineType(types: !13)751!13 = !{null, !14, !15}752!14 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !3, size: 64)753!15 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !16)754!16 = !DIDerivedType(tag: DW_TAG_typedef, name: "int16x8_t", file: !1, line: 57, baseType: !17)755!17 = !DICompositeType(tag: DW_TAG_array_type, baseType: !18, size: 128, flags: DIFlagVector, elements: !4)756!18 = !DIBasicType(name: "short", size: 16, encoding: DW_ATE_signed)757!19 = distinct !DISubprogram(name: "store_s16q_to_tran_low_", scope: !1, file: !1, line: 13, type: !12, scopeLine: 13, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !20)758!20 = !{!21}759!21 = !DILocalVariable(name: "__s1", scope: !22, file: !1, line: 16, type: !16)760!22 = distinct !DILexicalBlock(scope: !19, file: !1, line: 16, column: 3)761!23 = !DILocation(line: 0, scope: !22)762