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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define i8 @xtn_i16_to_i8(i16 %a) {6; CHECK-LABEL: xtn_i16_to_i8:7; CHECK: // %bb.0: // %entry8; CHECK-NEXT: ret9entry:10 %arg1 = trunc i16 %a to i811 ret i8 %arg112}13 14define i8 @xtn_i32_to_i8(i32 %a) {15; CHECK-LABEL: xtn_i32_to_i8:16; CHECK: // %bb.0: // %entry17; CHECK-NEXT: ret18entry:19 %arg1 = trunc i32 %a to i820 ret i8 %arg121}22 23define i8 @xtn_i64_to_i8(i64 %a) {24; CHECK-LABEL: xtn_i64_to_i8:25; CHECK: // %bb.0: // %entry26; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x027; CHECK-NEXT: ret28entry:29 %arg1 = trunc i64 %a to i830 ret i8 %arg131}32 33define i8 @xtn_i128_to_i8(i128 %a) {34; CHECK-LABEL: xtn_i128_to_i8:35; CHECK: // %bb.0: // %entry36; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x037; CHECK-NEXT: ret38entry:39 %arg1 = trunc i128 %a to i840 ret i8 %arg141}42 43define i16 @xtn_i32_to_i16(i32 %a) {44; CHECK-LABEL: xtn_i32_to_i16:45; CHECK: // %bb.0: // %entry46; CHECK-NEXT: ret47entry:48 %arg1 = trunc i32 %a to i1649 ret i16 %arg150}51 52define i16 @xtn_i64_to_i16(i64 %a) {53; CHECK-LABEL: xtn_i64_to_i16:54; CHECK: // %bb.0: // %entry55; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x056; CHECK-NEXT: ret57entry:58 %arg1 = trunc i64 %a to i1659 ret i16 %arg160}61 62define i16 @xtn_i128_to_i16(i128 %a) {63; CHECK-LABEL: xtn_i128_to_i16:64; CHECK: // %bb.0: // %entry65; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x066; CHECK-NEXT: ret67entry:68 %arg1 = trunc i128 %a to i1669 ret i16 %arg170}71 72define i32 @xtn_i64_to_i32(i64 %a) {73; CHECK-LABEL: xtn_i64_to_i32:74; CHECK: // %bb.0: // %entry75; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x076; CHECK-NEXT: ret77entry:78 %arg1 = trunc i64 %a to i3279 ret i32 %arg180}81 82define i32 @xtn_i128_to_i32(i128 %a) {83; CHECK-LABEL: xtn_i128_to_i32:84; CHECK: // %bb.0: // %entry85; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x086; CHECK-NEXT: ret87entry:88 %arg1 = trunc i128 %a to i3289 ret i32 %arg190}91 92define i64 @xtn_i128_to_i64(i128 %a) {93; CHECK-LABEL: xtn_i128_to_i64:94; CHECK: // %bb.0: // %entry95; CHECK-NEXT: ret96entry:97 %arg1 = trunc i128 %a to i6498 ret i64 %arg199}100 101define <2 x i8> @xtn_v2i16_v2i8(<2 x i16> %a) {102; CHECK-LABEL: xtn_v2i16_v2i8:103; CHECK: // %bb.0: // %entry104; CHECK-NEXT: ret105entry:106 %arg1 = trunc <2 x i16> %a to <2 x i8>107 ret <2 x i8> %arg1108}109 110define <2 x i8> @xtn_v2i32_v2i8(<2 x i32> %a) {111; CHECK-LABEL: xtn_v2i32_v2i8:112; CHECK: // %bb.0: // %entry113; CHECK-NEXT: ret114entry:115 %arg1 = trunc <2 x i32> %a to <2 x i8>116 ret <2 x i8> %arg1117}118 119define <2 x i8> @xtn_v2i64_v2i8(<2 x i64> %a) {120; CHECK-LABEL: xtn_v2i64_v2i8:121; CHECK: // %bb.0: // %entry122; CHECK-NEXT: xtn v0.2s, v0.2d123; CHECK-NEXT: ret124entry:125 %arg1 = trunc <2 x i64> %a to <2 x i8>126 ret <2 x i8> %arg1127}128 129define <2 x i8> @xtn_v2i128_v2i8(<2 x i128> %a) {130; CHECK-LABEL: xtn_v2i128_v2i8:131; CHECK: // %bb.0: // %entry132; CHECK-NEXT: fmov s0, w0133; CHECK-NEXT: mov v0.s[1], w2134; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0135; CHECK-NEXT: ret136entry:137 %arg1 = trunc <2 x i128> %a to <2 x i8>138 ret <2 x i8> %arg1139}140 141define <2 x i16> @xtn_v2i32_v2i16(<2 x i32> %a) {142; CHECK-LABEL: xtn_v2i32_v2i16:143; CHECK: // %bb.0: // %entry144; CHECK-NEXT: ret145entry:146 %arg1 = trunc <2 x i32> %a to <2 x i16>147 ret <2 x i16> %arg1148}149 150define <2 x i16> @xtn_v2i64_v2i16(<2 x i64> %a) {151; CHECK-LABEL: xtn_v2i64_v2i16:152; CHECK: // %bb.0: // %entry153; CHECK-NEXT: xtn v0.2s, v0.2d154; CHECK-NEXT: ret155entry:156 %arg1 = trunc <2 x i64> %a to <2 x i16>157 ret <2 x i16> %arg1158}159 160define <2 x i16> @xtn_v2i128_v2i16(<2 x i128> %a) {161; CHECK-LABEL: xtn_v2i128_v2i16:162; CHECK: // %bb.0: // %entry163; CHECK-NEXT: fmov s0, w0164; CHECK-NEXT: mov v0.s[1], w2165; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0166; CHECK-NEXT: ret167entry:168 %arg1 = trunc <2 x i128> %a to <2 x i16>169 ret <2 x i16> %arg1170}171 172define <2 x i32> @xtn_v2i64_v2i32(<2 x i64> %a) {173; CHECK-LABEL: xtn_v2i64_v2i32:174; CHECK: // %bb.0: // %entry175; CHECK-NEXT: xtn v0.2s, v0.2d176; CHECK-NEXT: ret177entry:178 %arg1 = trunc <2 x i64> %a to <2 x i32>179 ret <2 x i32> %arg1180}181 182define <2 x i32> @xtn_v2i128_v2i32(<2 x i128> %a) {183; CHECK-LABEL: xtn_v2i128_v2i32:184; CHECK: // %bb.0: // %entry185; CHECK-NEXT: fmov s0, w0186; CHECK-NEXT: mov v0.s[1], w2187; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0188; CHECK-NEXT: ret189entry:190 %arg1 = trunc <2 x i128> %a to <2 x i32>191 ret <2 x i32> %arg1192}193 194define <2 x i64> @xtn_v2i128_v2i64(<2 x i128> %a) {195; CHECK-LABEL: xtn_v2i128_v2i64:196; CHECK: // %bb.0: // %entry197; CHECK-NEXT: fmov d0, x0198; CHECK-NEXT: mov v0.d[1], x2199; CHECK-NEXT: ret200entry:201 %arg1 = trunc <2 x i128> %a to <2 x i64>202 ret <2 x i64> %arg1203}204 205define <3 x i8> @xtn_v3i16_v3i8(<3 x i16> %a) {206; CHECK-LABEL: xtn_v3i16_v3i8:207; CHECK: // %bb.0: // %entry208; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0209; CHECK-NEXT: umov w0, v0.h[0]210; CHECK-NEXT: umov w1, v0.h[1]211; CHECK-NEXT: umov w2, v0.h[2]212; CHECK-NEXT: ret213entry:214 %arg1 = trunc <3 x i16> %a to <3 x i8>215 ret <3 x i8> %arg1216}217 218define <3 x i8> @xtn_v3i32_v3i8(<3 x i32> %a) {219; CHECK-SD-LABEL: xtn_v3i32_v3i8:220; CHECK-SD: // %bb.0: // %entry221; CHECK-SD-NEXT: xtn v0.4h, v0.4s222; CHECK-SD-NEXT: umov w0, v0.h[0]223; CHECK-SD-NEXT: umov w1, v0.h[1]224; CHECK-SD-NEXT: umov w2, v0.h[2]225; CHECK-SD-NEXT: ret226;227; CHECK-GI-LABEL: xtn_v3i32_v3i8:228; CHECK-GI: // %bb.0: // %entry229; CHECK-GI-NEXT: mov s1, v0.s[1]230; CHECK-GI-NEXT: mov s2, v0.s[2]231; CHECK-GI-NEXT: fmov w0, s0232; CHECK-GI-NEXT: fmov w1, s1233; CHECK-GI-NEXT: fmov w2, s2234; CHECK-GI-NEXT: ret235entry:236 %arg1 = trunc <3 x i32> %a to <3 x i8>237 ret <3 x i8> %arg1238}239 240define <3 x i8> @xtn_v3i64_v3i8(<3 x i64> %a) {241; CHECK-SD-LABEL: xtn_v3i64_v3i8:242; CHECK-SD: // %bb.0: // %entry243; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0244; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1245; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2246; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]247; CHECK-SD-NEXT: xtn v1.2s, v2.2d248; CHECK-SD-NEXT: xtn v0.2s, v0.2d249; CHECK-SD-NEXT: fmov w2, s1250; CHECK-SD-NEXT: mov w1, v0.s[1]251; CHECK-SD-NEXT: fmov w0, s0252; CHECK-SD-NEXT: ret253;254; CHECK-GI-LABEL: xtn_v3i64_v3i8:255; CHECK-GI: // %bb.0: // %entry256; CHECK-GI-NEXT: fmov x0, d0257; CHECK-GI-NEXT: fmov x1, d1258; CHECK-GI-NEXT: fmov x2, d2259; CHECK-GI-NEXT: // kill: def $w0 killed $w0 killed $x0260; CHECK-GI-NEXT: // kill: def $w1 killed $w1 killed $x1261; CHECK-GI-NEXT: // kill: def $w2 killed $w2 killed $x2262; CHECK-GI-NEXT: ret263entry:264 %arg1 = trunc <3 x i64> %a to <3 x i8>265 ret <3 x i8> %arg1266}267 268define <3 x i16> @xtn_v3i32_v3i16(<3 x i32> %a) {269; CHECK-LABEL: xtn_v3i32_v3i16:270; CHECK: // %bb.0: // %entry271; CHECK-NEXT: xtn v0.4h, v0.4s272; CHECK-NEXT: ret273entry:274 %arg1 = trunc <3 x i32> %a to <3 x i16>275 ret <3 x i16> %arg1276}277 278define <3 x i16> @xtn_v3i64_v3i16(<3 x i64> %a) {279; CHECK-SD-LABEL: xtn_v3i64_v3i16:280; CHECK-SD: // %bb.0: // %entry281; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0282; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1283; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2284; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]285; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v2.4s286; CHECK-SD-NEXT: xtn v0.4h, v0.4s287; CHECK-SD-NEXT: ret288;289; CHECK-GI-LABEL: xtn_v3i64_v3i16:290; CHECK-GI: // %bb.0: // %entry291; CHECK-GI-NEXT: fmov x8, d0292; CHECK-GI-NEXT: fmov x9, d1293; CHECK-GI-NEXT: fmov s0, w8294; CHECK-GI-NEXT: fmov x8, d2295; CHECK-GI-NEXT: mov v0.h[1], w9296; CHECK-GI-NEXT: mov v0.h[2], w8297; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0298; CHECK-GI-NEXT: ret299entry:300 %arg1 = trunc <3 x i64> %a to <3 x i16>301 ret <3 x i16> %arg1302}303 304define <3 x i32> @xtn_v3i64_v3i32(<3 x i64> %a) {305; CHECK-SD-LABEL: xtn_v3i64_v3i32:306; CHECK-SD: // %bb.0: // %entry307; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0308; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1309; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2310; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]311; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v2.4s312; CHECK-SD-NEXT: ret313;314; CHECK-GI-LABEL: xtn_v3i64_v3i32:315; CHECK-GI: // %bb.0: // %entry316; CHECK-GI-NEXT: fmov x8, d0317; CHECK-GI-NEXT: fmov x9, d1318; CHECK-GI-NEXT: fmov s0, w8319; CHECK-GI-NEXT: fmov x8, d2320; CHECK-GI-NEXT: mov v0.s[1], w9321; CHECK-GI-NEXT: mov v0.s[2], w8322; CHECK-GI-NEXT: ret323entry:324 %arg1 = trunc <3 x i64> %a to <3 x i32>325 ret <3 x i32> %arg1326}327 328define <4 x i8> @xtn_v4i16_v4i8(<4 x i16> %a) {329; CHECK-LABEL: xtn_v4i16_v4i8:330; CHECK: // %bb.0: // %entry331; CHECK-NEXT: ret332entry:333 %arg1 = trunc <4 x i16> %a to <4 x i8>334 ret <4 x i8> %arg1335}336 337define <4 x i8> @xtn_v4i32_v4i8(<4 x i32> %a) {338; CHECK-LABEL: xtn_v4i32_v4i8:339; CHECK: // %bb.0: // %entry340; CHECK-NEXT: xtn v0.4h, v0.4s341; CHECK-NEXT: ret342entry:343 %arg1 = trunc <4 x i32> %a to <4 x i8>344 ret <4 x i8> %arg1345}346 347define <4 x i8> @xtn_v4i64_v4i8(<4 x i64> %a) {348; CHECK-LABEL: xtn_v4i64_v4i8:349; CHECK: // %bb.0: // %entry350; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s351; CHECK-NEXT: xtn v0.4h, v0.4s352; CHECK-NEXT: ret353entry:354 %arg1 = trunc <4 x i64> %a to <4 x i8>355 ret <4 x i8> %arg1356}357 358define <4 x i16> @xtn_v4i32_v4i16(<4 x i32> %a) {359; CHECK-LABEL: xtn_v4i32_v4i16:360; CHECK: // %bb.0: // %entry361; CHECK-NEXT: xtn v0.4h, v0.4s362; CHECK-NEXT: ret363entry:364 %arg1 = trunc <4 x i32> %a to <4 x i16>365 ret <4 x i16> %arg1366}367 368define <4 x i16> @xtn_v4i64_v4i16(<4 x i64> %a) {369; CHECK-LABEL: xtn_v4i64_v4i16:370; CHECK: // %bb.0: // %entry371; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s372; CHECK-NEXT: xtn v0.4h, v0.4s373; CHECK-NEXT: ret374entry:375 %arg1 = trunc <4 x i64> %a to <4 x i16>376 ret <4 x i16> %arg1377}378 379define <4 x i32> @xtn_v4i64_v4i32(<4 x i64> %a) {380; CHECK-LABEL: xtn_v4i64_v4i32:381; CHECK: // %bb.0: // %entry382; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s383; CHECK-NEXT: ret384entry:385 %arg1 = trunc <4 x i64> %a to <4 x i32>386 ret <4 x i32> %arg1387}388 389define <8 x i8> @xtn_v8i16_v8i8(<8 x i16> %a) {390; CHECK-LABEL: xtn_v8i16_v8i8:391; CHECK: // %bb.0: // %entry392; CHECK-NEXT: xtn v0.8b, v0.8h393; CHECK-NEXT: ret394entry:395 %arg1 = trunc <8 x i16> %a to <8 x i8>396 ret <8 x i8> %arg1397}398 399define <8 x i8> @xtn_v8i32_v8i8(<8 x i32> %a) {400; CHECK-LABEL: xtn_v8i32_v8i8:401; CHECK: // %bb.0: // %entry402; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h403; CHECK-NEXT: xtn v0.8b, v0.8h404; CHECK-NEXT: ret405entry:406 %arg1 = trunc <8 x i32> %a to <8 x i8>407 ret <8 x i8> %arg1408}409 410define <8 x i16> @xtn_v8i32_v8i16(<8 x i32> %a) {411; CHECK-LABEL: xtn_v8i32_v8i16:412; CHECK: // %bb.0: // %entry413; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h414; CHECK-NEXT: ret415entry:416 %arg1 = trunc <8 x i32> %a to <8 x i16>417 ret <8 x i16> %arg1418}419 420define <16 x i8> @xtn_v16i16_v16i8(<16 x i16> %a) {421; CHECK-LABEL: xtn_v16i16_v16i8:422; CHECK: // %bb.0: // %entry423; CHECK-NEXT: uzp1 v0.16b, v0.16b, v1.16b424; CHECK-NEXT: ret425entry:426 %arg1 = trunc <16 x i16> %a to <16 x i8>427 ret <16 x i8> %arg1428}429