27 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32# RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -run-pass amdgpu-prelegalizer-combiner %s -o - | FileCheck -check-prefix=GCN %s3 4---5name: non_inlineable_imm_splat6body: |7 bb.1:8 liveins: $vgpr09 10 ; GCN-LABEL: name: non_inlineable_imm_splat11 ; GCN: liveins: $vgpr012 ; GCN-NEXT: {{ $}}13 ; GCN-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr014 ; GCN-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH420015 ; GCN-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[C]](s16), [[C]](s16)16 ; GCN-NEXT: [[SUB:%[0-9]+]]:_(<2 x s16>) = G_SUB [[COPY]], [[BUILD_VECTOR]]17 ; GCN-NEXT: $vgpr0 = COPY [[SUB]](<2 x s16>)18 ; GCN-NEXT: SI_RETURN implicit $vgpr019 %0:_(<2 x s16>) = COPY $vgpr020 %2:_(s16) = G_FCONSTANT half 0xH420021 %1:_(<2 x s16>) = G_BUILD_VECTOR %2(s16), %2(s16)22 %3:_(<2 x s16>) = G_SUB %0, %123 $vgpr0 = COPY %3(<2 x s16>)24 SI_RETURN implicit $vgpr025 26...27