83 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GPRIDX %s3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji < %s | FileCheck -check-prefixes=GCN,MOVREL %s4; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10PLUS,GFX10 %s5; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX10PLUS,GFX11 %s6define void @main(<19 x i32> %arg) {7; GCN-LABEL: main:8; GCN: ; %bb.0: ; %bb9; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10; GCN-NEXT: s_mov_b32 s4, 011; GCN-NEXT: s_mov_b32 s12, s412; GCN-NEXT: v_cmp_eq_u16_e32 vcc, 0, v013; GCN-NEXT: v_mov_b32_e32 v1, 014; GCN-NEXT: s_mov_b32 s13, s415; GCN-NEXT: v_mov_b32_e32 v4, s1216; GCN-NEXT: s_mov_b32 s5, s417; GCN-NEXT: s_mov_b32 s6, s418; GCN-NEXT: s_mov_b32 s7, s419; GCN-NEXT: s_mov_b32 s8, s420; GCN-NEXT: s_mov_b32 s9, s421; GCN-NEXT: s_mov_b32 s10, s422; GCN-NEXT: s_mov_b32 s11, s423; GCN-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc24; GCN-NEXT: v_mov_b32_e32 v2, v125; GCN-NEXT: v_mov_b32_e32 v3, v126; GCN-NEXT: v_mov_b32_e32 v5, s1327; GCN-NEXT: image_store v[0:3], v[4:5], s[4:11] unorm28; GCN-NEXT: s_waitcnt vmcnt(0)29; GCN-NEXT: s_setpc_b64 s[30:31]30;31; GFX10-LABEL: main:32; GFX10: ; %bb.0: ; %bb33; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)34; GFX10-NEXT: v_mov_b32_e32 v1, 035; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v036; GFX10-NEXT: s_mov_b32 s4, 037; GFX10-NEXT: s_mov_b32 s5, s438; GFX10-NEXT: v_mov_b32_e32 v2, v139; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo40; GFX10-NEXT: v_mov_b32_e32 v3, v141; GFX10-NEXT: s_mov_b32 s6, s442; GFX10-NEXT: s_mov_b32 s7, s443; GFX10-NEXT: s_mov_b32 s8, s444; GFX10-NEXT: s_mov_b32 s9, s445; GFX10-NEXT: s_mov_b32 s10, s446; GFX10-NEXT: s_mov_b32 s11, s447; GFX10-NEXT: image_store v[0:3], [v1, v1], s[4:11] dim:SQ_RSRC_IMG_2D unorm48; GFX10-NEXT: s_setpc_b64 s[30:31]49;50; GFX11-LABEL: main:51; GFX11: ; %bb.0: ; %bb52; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)53; GFX11-NEXT: v_mov_b32_e32 v1, 054; GFX11-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v055; GFX11-NEXT: s_mov_b32 s0, 056; GFX11-NEXT: s_mov_b32 s1, s057; GFX11-NEXT: v_mov_b32_e32 v2, v158; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo59; GFX11-NEXT: v_mov_b32_e32 v3, v160; GFX11-NEXT: s_mov_b32 s2, s061; GFX11-NEXT: s_mov_b32 s3, s062; GFX11-NEXT: s_mov_b32 s4, s063; GFX11-NEXT: s_mov_b32 s5, s064; GFX11-NEXT: s_mov_b32 s6, s065; GFX11-NEXT: s_mov_b32 s7, s066; GFX11-NEXT: image_store v[0:3], [v1, v1], s[0:7] dim:SQ_RSRC_IMG_2D unorm67; GFX11-NEXT: s_setpc_b64 s[30:31]68bb:69 %i = bitcast <19 x i32> %arg to <38 x i16>70 %i1 = extractelement <38 x i16> %i, i64 071 %i2 = icmp eq i16 %i1, 072 %i3 = zext i1 %i2 to i3273 %i4 = bitcast i32 %i3 to float74 %i5 = insertelement <4 x float> zeroinitializer, float %i4, i64 075 call void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float> %i5, i32 0, i32 0, i32 0, <8 x i32> zeroinitializer, i32 0, i32 0)76 ret void77}78declare void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float>, i32 immarg, i32, i32, <8 x i32>, i32 immarg, i32 immarg)79;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:80; GFX10PLUS: {{.*}}81; GPRIDX: {{.*}}82; MOVREL: {{.*}}83