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1; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN %s2 3; GCN-LABEL: {{^}}test1:4; GCN: buffer_store_dword5; GCN: buffer_load_dword6; GCN: buffer_store_dword7define amdgpu_cs void @test1(<4 x i32> inreg %buf, i32 %off) {8.entry:9 call void @llvm.amdgcn.raw.buffer.store.i32(i32 0, <4 x i32> %buf, i32 8, i32 0, i32 0)10 %val = call i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32> %buf, i32 %off, i32 0, i32 0)11 call void @llvm.amdgcn.raw.buffer.store.i32(i32 %val, <4 x i32> %buf, i32 0, i32 0, i32 0)12 ret void13}14 15; GCN-LABEL: {{^}}test1_ptrs:16; GCN: buffer_store_dword17; GCN: buffer_load_dword18; GCN: buffer_store_dword19define amdgpu_cs void @test1_ptrs(ptr addrspace(8) inreg %buf, i32 %off) {20.entry:21 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 0, ptr addrspace(8) %buf, i32 8, i32 0, i32 0)22 %val = call i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) %buf, i32 %off, i32 0, i32 0)23 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 %val, ptr addrspace(8) %buf, i32 0, i32 0, i32 0)24 ret void25}26 27;; In the future, the stores should be reorderable because they'd be known to be28;; at distinct offsets.29; GCN-LABEL: {{^}}test1_ptrs_reorderable:30; GCN: buffer_store_dword31; GCN: buffer_load_dword32; GCN: buffer_store_dword33define amdgpu_cs void @test1_ptrs_reorderable(ptr addrspace(8) inreg %buf, i32 %off) {34.entry:35 %shifted.off = shl i32 %off, 436 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 0, ptr addrspace(8) %buf, i32 8, i32 0, i32 0)37 %val = call i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) %buf, i32 %shifted.off, i32 0, i32 0)38 call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 %val, ptr addrspace(8) %buf, i32 0, i32 0, i32 0)39 ret void40}41 42declare i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32>, i32, i32, i32) #243 44declare void @llvm.amdgcn.raw.buffer.store.i32(i32, <4 x i32>, i32, i32, i32) #345 46declare i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) nocapture, i32, i32, i32) #447 48declare void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #549 50attributes #2 = { nounwind readonly }51attributes #3 = { nounwind writeonly }52attributes #4 = { nounwind memory(argmem: read) }53attributes #5 = { nounwind memory(argmem: write) }54