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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-amd-mesa3d -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10 %s3; RUN: llc -global-isel -mtriple=amdgcn-amd-mesa3d -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefix=GFX12 %s4 5define float @test_min_max_ValK0_K1_f32(float %a) #0 {6; GFX10-LABEL: test_min_max_ValK0_K1_f32:7; GFX10: ; %bb.0:8; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9; GFX10-NEXT: v_mul_f32_e64 v0, v0, 2.0 clamp10; GFX10-NEXT: s_setpc_b64 s[30:31]11;12; GFX12-LABEL: test_min_max_ValK0_K1_f32:13; GFX12: ; %bb.0:14; GFX12-NEXT: s_wait_loadcnt_dscnt 0x015; GFX12-NEXT: s_wait_expcnt 0x016; GFX12-NEXT: s_wait_samplecnt 0x017; GFX12-NEXT: s_wait_bvhcnt 0x018; GFX12-NEXT: s_wait_kmcnt 0x019; GFX12-NEXT: v_mul_f32_e64 v0, v0, 2.0 clamp20; GFX12-NEXT: s_setpc_b64 s[30:31]21 %fmul = fmul float %a, 2.022 %maxnum = call nnan float @llvm.maxnum.f32(float %fmul, float 0.0)23 %fmed = call nnan float @llvm.minnum.f32(float %maxnum, float 1.0)24 ret float %fmed25}26 27define double @test_min_max_K0Val_K1_f64(double %a) #1 {28; GFX10-LABEL: test_min_max_K0Val_K1_f64:29; GFX10: ; %bb.0:30; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)31; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], 2.0 clamp32; GFX10-NEXT: s_setpc_b64 s[30:31]33;34; GFX12-LABEL: test_min_max_K0Val_K1_f64:35; GFX12: ; %bb.0:36; GFX12-NEXT: s_wait_loadcnt_dscnt 0x037; GFX12-NEXT: s_wait_expcnt 0x038; GFX12-NEXT: s_wait_samplecnt 0x039; GFX12-NEXT: s_wait_bvhcnt 0x040; GFX12-NEXT: s_wait_kmcnt 0x041; GFX12-NEXT: v_mul_f64_e64 v[0:1], v[0:1], 2.0 clamp42; GFX12-NEXT: s_setpc_b64 s[30:31]43 %fmul = fmul double %a, 2.044 %maxnum = call nnan double @llvm.maxnum.f64(double 0.0, double %fmul)45 %fmed = call nnan double @llvm.minnum.f64(double %maxnum, double 1.0)46 ret double %fmed47}48 49; min-max patterns for ieee=true, dx10_clamp=true don't have to check for NaNs50define half @test_min_K1max_ValK0_f16(half %a) #2 {51; GFX10-LABEL: test_min_K1max_ValK0_f16:52; GFX10: ; %bb.0:53; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)54; GFX10-NEXT: v_mul_f16_e64 v0, v0, 2.0 clamp55; GFX10-NEXT: s_setpc_b64 s[30:31]56;57; GFX12-LABEL: test_min_K1max_ValK0_f16:58; GFX12: ; %bb.0:59; GFX12-NEXT: s_wait_loadcnt_dscnt 0x060; GFX12-NEXT: s_wait_expcnt 0x061; GFX12-NEXT: s_wait_samplecnt 0x062; GFX12-NEXT: s_wait_bvhcnt 0x063; GFX12-NEXT: s_wait_kmcnt 0x064; GFX12-NEXT: v_mul_f16_e64 v0, v0, 2.0 clamp65; GFX12-NEXT: s_setpc_b64 s[30:31]66 %fmul = fmul half %a, 2.067 %maxnum = call half @llvm.maxnum.f16(half %fmul, half 0.0)68 %fmed = call half @llvm.minnum.f16(half 1.0, half %maxnum)69 ret half %fmed70}71 72define <2 x half> @test_min_K1max_K0Val_f16(<2 x half> %a) #1 {73; GFX10-LABEL: test_min_K1max_K0Val_f16:74; GFX10: ; %bb.0:75; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)76; GFX10-NEXT: v_pk_mul_f16 v0, v0, 2.0 op_sel_hi:[1,0] clamp77; GFX10-NEXT: s_setpc_b64 s[30:31]78;79; GFX12-LABEL: test_min_K1max_K0Val_f16:80; GFX12: ; %bb.0:81; GFX12-NEXT: s_wait_loadcnt_dscnt 0x082; GFX12-NEXT: s_wait_expcnt 0x083; GFX12-NEXT: s_wait_samplecnt 0x084; GFX12-NEXT: s_wait_bvhcnt 0x085; GFX12-NEXT: s_wait_kmcnt 0x086; GFX12-NEXT: v_pk_mul_f16 v0, v0, 2.0 op_sel_hi:[1,0] clamp87; GFX12-NEXT: s_setpc_b64 s[30:31]88 %fmul = fmul <2 x half> %a, <half 2.0, half 2.0>89 %maxnum = call nnan <2 x half> @llvm.maxnum.v2f16(<2 x half> <half 0.0, half 0.0>, <2 x half> %fmul)90 %fmed = call nnan <2 x half> @llvm.minnum.v2f16(<2 x half> <half 1.0, half 1.0>, <2 x half> %maxnum)91 ret <2 x half> %fmed92}93 94define <2 x half> @test_min_max_splat_padded_with_undef(<2 x half> %a) #2 {95; GFX10-LABEL: test_min_max_splat_padded_with_undef:96; GFX10: ; %bb.0:97; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)98; GFX10-NEXT: v_pk_mul_f16 v0, v0, 2.0 op_sel_hi:[1,0] clamp99; GFX10-NEXT: s_setpc_b64 s[30:31]100;101; GFX12-LABEL: test_min_max_splat_padded_with_undef:102; GFX12: ; %bb.0:103; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0104; GFX12-NEXT: s_wait_expcnt 0x0105; GFX12-NEXT: s_wait_samplecnt 0x0106; GFX12-NEXT: s_wait_bvhcnt 0x0107; GFX12-NEXT: s_wait_kmcnt 0x0108; GFX12-NEXT: v_pk_mul_f16 v0, v0, 2.0 op_sel_hi:[1,0] clamp109; GFX12-NEXT: s_setpc_b64 s[30:31]110 %fmul = fmul <2 x half> %a, <half 2.0, half 2.0>111 %maxnum = call <2 x half> @llvm.maxnum.v2f16(<2 x half> <half 0.0, half poison>, <2 x half> %fmul)112 %fmed = call <2 x half> @llvm.minnum.v2f16(<2 x half> <half 1.0, half poison>, <2 x half> %maxnum)113 ret <2 x half> %fmed114}115 116; max-mix patterns work only for known non-NaN inputs117 118define float @test_max_min_ValK1_K0_f32(float %a) #0 {119; GFX10-LABEL: test_max_min_ValK1_K0_f32:120; GFX10: ; %bb.0:121; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)122; GFX10-NEXT: v_mul_f32_e64 v0, v0, 2.0 clamp123; GFX10-NEXT: s_setpc_b64 s[30:31]124;125; GFX12-LABEL: test_max_min_ValK1_K0_f32:126; GFX12: ; %bb.0:127; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0128; GFX12-NEXT: s_wait_expcnt 0x0129; GFX12-NEXT: s_wait_samplecnt 0x0130; GFX12-NEXT: s_wait_bvhcnt 0x0131; GFX12-NEXT: s_wait_kmcnt 0x0132; GFX12-NEXT: v_mul_f32_e64 v0, v0, 2.0 clamp133; GFX12-NEXT: s_setpc_b64 s[30:31]134 %fmul = fmul float %a, 2.0135 %minnum = call nnan float @llvm.minnum.f32(float %fmul, float 1.0)136 %fmed = call nnan float @llvm.maxnum.f32(float %minnum, float 0.0)137 ret float %fmed138}139 140define double @test_max_min_K1Val_K0_f64(double %a) #1 {141; GFX10-LABEL: test_max_min_K1Val_K0_f64:142; GFX10: ; %bb.0:143; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)144; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], 2.0 clamp145; GFX10-NEXT: s_setpc_b64 s[30:31]146;147; GFX12-LABEL: test_max_min_K1Val_K0_f64:148; GFX12: ; %bb.0:149; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0150; GFX12-NEXT: s_wait_expcnt 0x0151; GFX12-NEXT: s_wait_samplecnt 0x0152; GFX12-NEXT: s_wait_bvhcnt 0x0153; GFX12-NEXT: s_wait_kmcnt 0x0154; GFX12-NEXT: v_mul_f64_e64 v[0:1], v[0:1], 2.0 clamp155; GFX12-NEXT: s_setpc_b64 s[30:31]156 %fmul = fmul double %a, 2.0157 %minnum = call nnan double @llvm.minnum.f64(double 1.0, double %fmul)158 %fmed = call nnan double @llvm.maxnum.f64(double %minnum, double 0.0)159 ret double %fmed160}161 162define half @test_max_K0min_ValK1_f16(half %a) #0 {163; GFX10-LABEL: test_max_K0min_ValK1_f16:164; GFX10: ; %bb.0:165; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)166; GFX10-NEXT: v_mul_f16_e64 v0, v0, 2.0 clamp167; GFX10-NEXT: s_setpc_b64 s[30:31]168;169; GFX12-LABEL: test_max_K0min_ValK1_f16:170; GFX12: ; %bb.0:171; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0172; GFX12-NEXT: s_wait_expcnt 0x0173; GFX12-NEXT: s_wait_samplecnt 0x0174; GFX12-NEXT: s_wait_bvhcnt 0x0175; GFX12-NEXT: s_wait_kmcnt 0x0176; GFX12-NEXT: v_mul_f16_e64 v0, v0, 2.0 clamp177; GFX12-NEXT: s_setpc_b64 s[30:31]178 %fmul = fmul half %a, 2.0179 %minnum = call nnan half @llvm.minnum.f16(half %fmul, half 1.0)180 %fmed = call nnan half @llvm.maxnum.f16(half 0.0, half %minnum)181 ret half %fmed182}183 184; treat undef as value that will result in a constant splat185define <2 x half> @test_max_K0min_K1Val_v2f16(<2 x half> %a) #1 {186; GFX10-LABEL: test_max_K0min_K1Val_v2f16:187; GFX10: ; %bb.0:188; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)189; GFX10-NEXT: v_pk_mul_f16 v0, v0, 2.0 op_sel_hi:[1,0] clamp190; GFX10-NEXT: s_setpc_b64 s[30:31]191;192; GFX12-LABEL: test_max_K0min_K1Val_v2f16:193; GFX12: ; %bb.0:194; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0195; GFX12-NEXT: s_wait_expcnt 0x0196; GFX12-NEXT: s_wait_samplecnt 0x0197; GFX12-NEXT: s_wait_bvhcnt 0x0198; GFX12-NEXT: s_wait_kmcnt 0x0199; GFX12-NEXT: v_pk_mul_f16 v0, v0, 2.0 op_sel_hi:[1,0] clamp200; GFX12-NEXT: s_setpc_b64 s[30:31]201 %fmul = fmul <2 x half> %a, <half 2.0, half 2.0>202 %minnum = call nnan <2 x half> @llvm.minnum.v2f16(<2 x half> <half 1.0, half poison>, <2 x half> %fmul)203 %fmed = call nnan <2 x half> @llvm.maxnum.v2f16(<2 x half> <half poison, half 0.0>, <2 x half> %minnum)204 ret <2 x half> %fmed205}206 207; global nnan function attribute always forces clamp combine208 209define float @test_min_max_global_nnan(float %a) {210; GFX10-LABEL: test_min_max_global_nnan:211; GFX10: ; %bb.0:212; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)213; GFX10-NEXT: v_max_f32_e64 v0, v0, v0 clamp214; GFX10-NEXT: s_setpc_b64 s[30:31]215;216; GFX12-LABEL: test_min_max_global_nnan:217; GFX12: ; %bb.0:218; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0219; GFX12-NEXT: s_wait_expcnt 0x0220; GFX12-NEXT: s_wait_samplecnt 0x0221; GFX12-NEXT: s_wait_bvhcnt 0x0222; GFX12-NEXT: s_wait_kmcnt 0x0223; GFX12-NEXT: v_max_num_f32_e64 v0, v0, v0 clamp224; GFX12-NEXT: s_setpc_b64 s[30:31]225 %maxnum = call float @llvm.maxnum.f32(float %a, float 0.0)226 %fmed = call nnan float @llvm.minnum.f32(float %maxnum, float 1.0)227 ret float %fmed228}229 230define float @test_max_min_global_nnan(float %a) {231; GFX10-LABEL: test_max_min_global_nnan:232; GFX10: ; %bb.0:233; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)234; GFX10-NEXT: v_max_f32_e64 v0, v0, v0 clamp235; GFX10-NEXT: s_setpc_b64 s[30:31]236;237; GFX12-LABEL: test_max_min_global_nnan:238; GFX12: ; %bb.0:239; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0240; GFX12-NEXT: s_wait_expcnt 0x0241; GFX12-NEXT: s_wait_samplecnt 0x0242; GFX12-NEXT: s_wait_bvhcnt 0x0243; GFX12-NEXT: s_wait_kmcnt 0x0244; GFX12-NEXT: v_max_num_f32_e64 v0, v0, v0 clamp245; GFX12-NEXT: s_setpc_b64 s[30:31]246 %minnum = call float @llvm.minnum.f32(float %a, float 1.0)247 %fmed = call nnan float @llvm.maxnum.f32(float %minnum, float 0.0)248 ret float %fmed249}250 251; ------------------------------------------------------------------------------252; Negative patterns253; ------------------------------------------------------------------------------254 255; min(max(Val, 1.0), 0.0), should be min(max(Val, 0.0), 1.0)256define float @test_min_max_K0_gt_K1(float %a) #0 {257; GFX10-LABEL: test_min_max_K0_gt_K1:258; GFX10: ; %bb.0:259; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)260; GFX10-NEXT: v_max_f32_e32 v0, 1.0, v0261; GFX10-NEXT: v_min_f32_e32 v0, 0, v0262; GFX10-NEXT: s_setpc_b64 s[30:31]263;264; GFX12-LABEL: test_min_max_K0_gt_K1:265; GFX12: ; %bb.0:266; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0267; GFX12-NEXT: s_wait_expcnt 0x0268; GFX12-NEXT: s_wait_samplecnt 0x0269; GFX12-NEXT: s_wait_bvhcnt 0x0270; GFX12-NEXT: s_wait_kmcnt 0x0271; GFX12-NEXT: v_maxmin_num_f32 v0, v0, 1.0, 0272; GFX12-NEXT: s_setpc_b64 s[30:31]273 %maxnum = call nnan float @llvm.maxnum.f32(float %a, float 1.0)274 %fmed = call nnan float @llvm.minnum.f32(float %maxnum, float 0.0)275 ret float %fmed276}277 278; max(min(Val, 0.0), 1.0), should be max(min(Val, 1.0), 0.0)279define float @test_max_min_K0_gt_K1(float %a) #0 {280; GFX10-LABEL: test_max_min_K0_gt_K1:281; GFX10: ; %bb.0:282; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)283; GFX10-NEXT: v_min_f32_e32 v0, 0, v0284; GFX10-NEXT: v_max_f32_e32 v0, 1.0, v0285; GFX10-NEXT: s_setpc_b64 s[30:31]286;287; GFX12-LABEL: test_max_min_K0_gt_K1:288; GFX12: ; %bb.0:289; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0290; GFX12-NEXT: s_wait_expcnt 0x0291; GFX12-NEXT: s_wait_samplecnt 0x0292; GFX12-NEXT: s_wait_bvhcnt 0x0293; GFX12-NEXT: s_wait_kmcnt 0x0294; GFX12-NEXT: v_minmax_num_f32 v0, v0, 0, 1.0295; GFX12-NEXT: s_setpc_b64 s[30:31]296 %minnum = call nnan float @llvm.minnum.f32(float %a, float 0.0)297 %fmed = call nnan float @llvm.maxnum.f32(float %minnum, float 1.0)298 ret float %fmed299}300 301; Input that can be NaN302 303; min-max patterns for ieee=false require known non-NaN input304define float @test_min_max_maybe_NaN_input_ieee_false(float %a) #1 {305; GFX10-LABEL: test_min_max_maybe_NaN_input_ieee_false:306; GFX10: ; %bb.0:307; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)308; GFX10-NEXT: v_mul_f32_e32 v0, 2.0, v0309; GFX10-NEXT: v_max_f32_e32 v0, 0, v0310; GFX10-NEXT: v_min_f32_e32 v0, 1.0, v0311; GFX10-NEXT: s_setpc_b64 s[30:31]312;313; GFX12-LABEL: test_min_max_maybe_NaN_input_ieee_false:314; GFX12: ; %bb.0:315; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0316; GFX12-NEXT: s_wait_expcnt 0x0317; GFX12-NEXT: s_wait_samplecnt 0x0318; GFX12-NEXT: s_wait_bvhcnt 0x0319; GFX12-NEXT: s_wait_kmcnt 0x0320; GFX12-NEXT: v_mul_f32_e64 v0, v0, 2.0 clamp321; GFX12-NEXT: s_setpc_b64 s[30:31]322 %fmul = fmul float %a, 2.0323 %maxnum = call float @llvm.maxnum.f32(float %fmul, float 0.0)324 %fmed = call float @llvm.minnum.f32(float %maxnum, float 1.0)325 ret float %fmed326}327 328; clamp fails here since input can be NaN and dx10_clamp=false; fmed3 succeds329define float @test_min_max_maybe_NaN_input_ieee_true_dx10clamp_false(float %a) #4 {330; GFX10-LABEL: test_min_max_maybe_NaN_input_ieee_true_dx10clamp_false:331; GFX10: ; %bb.0:332; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)333; GFX10-NEXT: v_mul_f32_e32 v0, 2.0, v0334; GFX10-NEXT: v_med3_f32 v0, v0, 0, 1.0335; GFX10-NEXT: s_setpc_b64 s[30:31]336;337; GFX12-LABEL: test_min_max_maybe_NaN_input_ieee_true_dx10clamp_false:338; GFX12: ; %bb.0:339; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0340; GFX12-NEXT: s_wait_expcnt 0x0341; GFX12-NEXT: s_wait_samplecnt 0x0342; GFX12-NEXT: s_wait_bvhcnt 0x0343; GFX12-NEXT: s_wait_kmcnt 0x0344; GFX12-NEXT: v_mul_f32_e64 v0, v0, 2.0 clamp345; GFX12-NEXT: s_setpc_b64 s[30:31]346 %fmul = fmul float %a, 2.0347 %maxnum = call float @llvm.maxnum.f32(float %fmul, float 0.0)348 %fmed = call float @llvm.minnum.f32(float %maxnum, float 1.0)349 ret float %fmed350}351 352; max-min patterns always require known non-NaN input353 354define float @test_max_min_maybe_NaN_input_ieee_true(float %a) #0 {355; GFX10-LABEL: test_max_min_maybe_NaN_input_ieee_true:356; GFX10: ; %bb.0:357; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)358; GFX10-NEXT: v_mul_f32_e32 v0, 2.0, v0359; GFX10-NEXT: v_min_f32_e32 v0, 1.0, v0360; GFX10-NEXT: v_max_f32_e32 v0, 0, v0361; GFX10-NEXT: s_setpc_b64 s[30:31]362;363; GFX12-LABEL: test_max_min_maybe_NaN_input_ieee_true:364; GFX12: ; %bb.0:365; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0366; GFX12-NEXT: s_wait_expcnt 0x0367; GFX12-NEXT: s_wait_samplecnt 0x0368; GFX12-NEXT: s_wait_bvhcnt 0x0369; GFX12-NEXT: s_wait_kmcnt 0x0370; GFX12-NEXT: v_mul_f32_e32 v0, 2.0, v0371; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)372; GFX12-NEXT: v_minmax_num_f32 v0, v0, 1.0, 0373; GFX12-NEXT: s_setpc_b64 s[30:31]374 %fmul = fmul float %a, 2.0375 %minnum = call float @llvm.minnum.f32(float %fmul, float 1.0)376 %fmed = call float @llvm.maxnum.f32(float %minnum, float 0.0)377 ret float %fmed378}379 380define float @test_max_min_maybe_NaN_input_ieee_false(float %a) #1 {381; GFX10-LABEL: test_max_min_maybe_NaN_input_ieee_false:382; GFX10: ; %bb.0:383; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)384; GFX10-NEXT: v_mul_f32_e32 v0, 2.0, v0385; GFX10-NEXT: v_min_f32_e32 v0, 1.0, v0386; GFX10-NEXT: v_max_f32_e32 v0, 0, v0387; GFX10-NEXT: s_setpc_b64 s[30:31]388;389; GFX12-LABEL: test_max_min_maybe_NaN_input_ieee_false:390; GFX12: ; %bb.0:391; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0392; GFX12-NEXT: s_wait_expcnt 0x0393; GFX12-NEXT: s_wait_samplecnt 0x0394; GFX12-NEXT: s_wait_bvhcnt 0x0395; GFX12-NEXT: s_wait_kmcnt 0x0396; GFX12-NEXT: v_mul_f32_e32 v0, 2.0, v0397; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)398; GFX12-NEXT: v_minmax_num_f32 v0, v0, 1.0, 0399; GFX12-NEXT: s_setpc_b64 s[30:31]400 %fmul = fmul float %a, 2.0401 %minnum = call float @llvm.minnum.f32(float %fmul, float 1.0)402 %fmed = call float @llvm.maxnum.f32(float %minnum, float 0.0)403 ret float %fmed404}405 406declare half @llvm.minnum.f16(half, half)407declare half @llvm.maxnum.f16(half, half)408declare float @llvm.minnum.f32(float, float)409declare float @llvm.maxnum.f32(float, float)410declare double @llvm.minnum.f64(double, double)411declare double @llvm.maxnum.f64(double, double)412declare <2 x half> @llvm.minnum.v2f16(<2 x half>, <2 x half>)413declare <2 x half> @llvm.maxnum.v2f16(<2 x half>, <2 x half>)414attributes #0 = {"amdgpu-ieee"="true"}415attributes #1 = {"amdgpu-ieee"="false"}416attributes #2 = {"amdgpu-ieee"="true" "amdgpu-dx10-clamp"="true"}417attributes #4 = {"amdgpu-ieee"="true" "amdgpu-dx10-clamp"="false"}418