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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s3 4---5name: test_fcanonicalize6tracksRegLiveness: true7legalized: true8body: |9  bb.0:10    liveins: $vgpr011 12    ; CHECK-LABEL: name: test_fcanonicalize13    ; CHECK: liveins: $vgpr014    ; CHECK-NEXT: {{  $}}15    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr016    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]17    ; CHECK-NEXT: $vgpr0 = COPY [[FCANONICALIZE]](s32)18    %0:_(s32) = COPY $vgpr019    %1:_(s32) = G_FCANONICALIZE %020    %2:_(s32) = G_FCANONICALIZE %121    $vgpr0 = COPY %2(s32)22...23 24---25name: test_fconstant26tracksRegLiveness: true27legalized: true28body: |29  bb.0:30 31    ; CHECK-LABEL: name: test_fconstant32    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+1033    ; CHECK-NEXT: $vgpr0 = COPY [[C]](s32)34    %0:_(s32) = G_FCONSTANT float 1.0e1035    %1:_(s32) = G_FCANONICALIZE %036    $vgpr0 = COPY %1(s32)37...38 39# FIXME: Mode fields are redundant and not considered.40---41name: test_denormal_fconstant42tracksRegLiveness: true43legalized: true44machineFunctionInfo:45  mode:46    fp64-fp16-output-denormals: false47    fp64-fp16-input-denormals: false48body: |49  bb.0:50 51    ; CHECK-LABEL: name: test_denormal_fconstant52    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.618950e-31953    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[C]](s64)54    %0:_(s64) = G_FCONSTANT double 0x000000000000800055    %1:_(s64) = G_FCANONICALIZE %056    $vgpr0_vgpr1 = COPY %1(s64)57...58 59---60name: test_fminnum_with_fminnum_argument_s32_ieee_mode_on61tracksRegLiveness: true62legalized: true63machineFunctionInfo:64  mode:65    ieee: true66body: |67  bb.0:68    liveins: $vgpr0, $vgpr1, $vgpr269 70    ; CHECK-LABEL: name: test_fminnum_with_fminnum_argument_s32_ieee_mode_on71    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr272    ; CHECK-NEXT: {{  $}}73    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr074    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr175    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]76    ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]]77    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]]78    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr279    ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]]80    ; CHECK-NEXT: [[FMINNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FMINNUM_IEEE]], [[FCANONICALIZE2]]81    ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE1]](s32)82    %0:_(s32) = COPY $vgpr083    %1:_(s32) = COPY $vgpr184    %7:_(s32) = G_FCANONICALIZE %085    %8:_(s32) = G_FCANONICALIZE %186    %2:_(s32) = G_FMINNUM_IEEE %7, %887    %3:_(s32) = COPY $vgpr288    %5:_(s32) = G_FCANONICALIZE %289    %6:_(s32) = G_FCANONICALIZE %390    %4:_(s32) = G_FMINNUM_IEEE %5, %691    $vgpr0 = COPY %4(s32)92...93 94---95name: test_fminnum_with_fmaxnum_argument_s32_ieee_mode_on96tracksRegLiveness: true97legalized: true98machineFunctionInfo:99  mode:100    ieee: true101body: |102  bb.0:103    liveins: $vgpr0, $vgpr1, $vgpr2104 105    ; CHECK-LABEL: name: test_fminnum_with_fmaxnum_argument_s32_ieee_mode_on106    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2107    ; CHECK-NEXT: {{  $}}108    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0109    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1110    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]111    ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]]112    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]]113    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2114    ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]]115    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FMAXNUM_IEEE]], [[FCANONICALIZE2]]116    ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE]](s32)117    %0:_(s32) = COPY $vgpr0118    %1:_(s32) = COPY $vgpr1119    %7:_(s32) = G_FCANONICALIZE %0120    %8:_(s32) = G_FCANONICALIZE %1121    %2:_(s32) = G_FMAXNUM_IEEE %7, %8122    %3:_(s32) = COPY $vgpr2123    %5:_(s32) = G_FCANONICALIZE %2124    %6:_(s32) = G_FCANONICALIZE %3125    %4:_(s32) = G_FMINNUM_IEEE %5, %6126    $vgpr0 = COPY %4(s32)127...128 129---130name: test_fmaxnum_with_fmaxnum_argument_s32_ieee_mode_on131tracksRegLiveness: true132legalized: true133machineFunctionInfo:134  mode:135    ieee: true136body: |137  bb.0:138    liveins: $vgpr0, $vgpr1, $vgpr2139 140    ; CHECK-LABEL: name: test_fmaxnum_with_fmaxnum_argument_s32_ieee_mode_on141    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2142    ; CHECK-NEXT: {{  $}}143    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0144    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1145    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]146    ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]]147    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]]148    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2149    ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]]150    ; CHECK-NEXT: [[FMAXNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FMAXNUM_IEEE]], [[FCANONICALIZE2]]151    ; CHECK-NEXT: $vgpr0 = COPY [[FMAXNUM_IEEE1]](s32)152    %0:_(s32) = COPY $vgpr0153    %1:_(s32) = COPY $vgpr1154    %7:_(s32) = G_FCANONICALIZE %0155    %8:_(s32) = G_FCANONICALIZE %1156    %2:_(s32) = G_FMAXNUM_IEEE %7, %8157    %3:_(s32) = COPY $vgpr2158    %5:_(s32) = G_FCANONICALIZE %2159    %6:_(s32) = G_FCANONICALIZE %3160    %4:_(s32) = G_FMAXNUM_IEEE %5, %6161    $vgpr0 = COPY %4(s32)162...163 164---165name: test_fmaxnum_with_fminnum_argument_s32_ieee_mode_on166tracksRegLiveness: true167legalized: true168machineFunctionInfo:169  mode:170    ieee: true171body: |172  bb.0:173    liveins: $vgpr0, $vgpr1, $vgpr2174 175    ; CHECK-LABEL: name: test_fmaxnum_with_fminnum_argument_s32_ieee_mode_on176    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2177    ; CHECK-NEXT: {{  $}}178    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0179    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1180    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]181    ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]]182    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]]183    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2184    ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]]185    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FMINNUM_IEEE]], [[FCANONICALIZE2]]186    ; CHECK-NEXT: $vgpr0 = COPY [[FMAXNUM_IEEE]](s32)187    %0:_(s32) = COPY $vgpr0188    %1:_(s32) = COPY $vgpr1189    %7:_(s32) = G_FCANONICALIZE %0190    %8:_(s32) = G_FCANONICALIZE %1191    %2:_(s32) = G_FMINNUM_IEEE %7, %8192    %3:_(s32) = COPY $vgpr2193    %5:_(s32) = G_FCANONICALIZE %2194    %6:_(s32) = G_FCANONICALIZE %3195    %4:_(s32) = G_FMAXNUM_IEEE %5, %6196    $vgpr0 = COPY %4(s32)197...198 199---200name: test_multiple_uses201tracksRegLiveness: true202legalized: true203machineFunctionInfo:204  mode:205    ieee: true206body: |207  bb.0:208    liveins: $vgpr0, $vgpr1209 210    ; CHECK-LABEL: name: test_multiple_uses211    ; CHECK: liveins: $vgpr0, $vgpr1212    ; CHECK-NEXT: {{  $}}213    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0214    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1215    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]216    ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]]217    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]]218    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FMINNUM_IEEE]], [[FMINNUM_IEEE]]219    ; CHECK-NEXT: $vgpr0 = COPY [[FMAXNUM_IEEE]](s32)220    %0:_(s32) = COPY $vgpr0221    %1:_(s32) = COPY $vgpr1222    %6:_(s32) = G_FCANONICALIZE %0223    %7:_(s32) = G_FCANONICALIZE %1224    %2:_(s32) = G_FMINNUM_IEEE %6, %7225    %4:_(s32) = G_FCANONICALIZE %2226    %5:_(s32) = G_FCANONICALIZE %2227    %3:_(s32) = G_FMAXNUM_IEEE %4, %5228    $vgpr0 = COPY %3(s32)229...230 231---232name: test_splat_padded_with_undef233tracksRegLiveness: true234legalized: true235machineFunctionInfo:236  mode:237    ieee: true238body: |239  bb.0 :240    liveins: $vgpr0241 242    ; CHECK-LABEL: name: test_splat_padded_with_undef243    ; CHECK: liveins: $vgpr0244    ; CHECK-NEXT: {{  $}}245    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0246    ; CHECK-NEXT: %two:_(s16) = G_FCONSTANT half 0xH4000247    ; CHECK-NEXT: %two_s32:_(s32) = G_ANYEXT %two(s16)248    ; CHECK-NEXT: %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32)249    ; CHECK-NEXT: %zero:_(s16) = G_FCONSTANT half 0xH0000250    ; CHECK-NEXT: %zero_s32:_(s32) = G_ANYEXT %zero(s16)251    ; CHECK-NEXT: %undef:_(s32) = G_IMPLICIT_DEF252    ; CHECK-NEXT: %zero_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %zero_s32(s32), %undef(s32)253    ; CHECK-NEXT: %one:_(s16) = G_FCONSTANT half 0xH3C00254    ; CHECK-NEXT: %one_s32:_(s32) = G_ANYEXT %one(s16)255    ; CHECK-NEXT: %one_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %one_s32(s32), %undef(s32)256    ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<2 x s16>) = G_FMUL [[COPY]], %two_splat257    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMAXNUM_IEEE [[FMUL]], %zero_undef258    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMINNUM_IEEE [[FMAXNUM_IEEE]], %one_undef259    ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE]](<2 x s16>)260    %0:_(<2 x s16>) = COPY $vgpr0261    %two:_(s16) = G_FCONSTANT half 0xH4000262    %two_s32:_(s32) = G_ANYEXT %two(s16)263    %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32)264    %zero:_(s16) = G_FCONSTANT half 0xH0000265    %zero_s32:_(s32) = G_ANYEXT %zero(s16)266    %undef:_(s32) = G_IMPLICIT_DEF267    %zero_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %zero_s32(s32), %undef(s32)268    %one:_(s16) = G_FCONSTANT half 0xH3C00269    %one_s32:_(s32) = G_ANYEXT %one(s16)270    %one_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %one_s32(s32), %undef(s32)271    %4:_(<2 x s16>) = G_FMUL %0, %two_splat272    %zero_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %zero_undef273    %16:_(<2 x s16>) = G_FCANONICALIZE %4274    %8:_(<2 x s16>) = G_FMAXNUM_IEEE %zero_undef_fcan, %16275    %one_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %one_undef276    %14:_(<2 x s16>) = G_FCANONICALIZE %8277    %11:_(<2 x s16>) = G_FMINNUM_IEEE %one_undef_fcan, %14278    $vgpr0 = COPY %11(<2 x s16>)279...280 281---282name: test_splat_SNaN_and_QNaN_padded_with_undef283tracksRegLiveness: true284legalized: true285machineFunctionInfo:286  mode:287    ieee: true288body: |289  bb.0 :290    liveins: $vgpr0291 292    ; CHECK-LABEL: name: test_splat_SNaN_and_QNaN_padded_with_undef293    ; CHECK: liveins: $vgpr0294    ; CHECK-NEXT: {{  $}}295    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0296    ; CHECK-NEXT: %two:_(s16) = G_FCONSTANT half 0xH4000297    ; CHECK-NEXT: %two_s32:_(s32) = G_ANYEXT %two(s16)298    ; CHECK-NEXT: %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32)299    ; CHECK-NEXT: %snan:_(s16) = G_FCONSTANT half 0xH7C01300    ; CHECK-NEXT: %snan_s32:_(s32) = G_ANYEXT %snan(s16)301    ; CHECK-NEXT: %undef:_(s32) = G_IMPLICIT_DEF302    ; CHECK-NEXT: %snan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %snan_s32(s32), %undef(s32)303    ; CHECK-NEXT: %qnan:_(s16) = G_FCONSTANT half 0xH7E01304    ; CHECK-NEXT: %qnan_s32:_(s32) = G_ANYEXT %qnan(s16)305    ; CHECK-NEXT: %qnan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %qnan_s32(s32), %undef(s32)306    ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<2 x s16>) = G_FMUL [[COPY]], %two_splat307    ; CHECK-NEXT: %snan_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %snan_undef308    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMAXNUM_IEEE %snan_undef_fcan, [[FMUL]]309    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMINNUM_IEEE [[FMAXNUM_IEEE]], %qnan_undef310    ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE]](<2 x s16>)311    %0:_(<2 x s16>) = COPY $vgpr0312    %two:_(s16) = G_FCONSTANT half 0xH4000313    %two_s32:_(s32) = G_ANYEXT %two(s16)314    %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32)315    %snan:_(s16) = G_FCONSTANT half 0xH7C01316    %snan_s32:_(s32) = G_ANYEXT %snan(s16)317    %undef:_(s32) = G_IMPLICIT_DEF318    %snan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %snan_s32(s32), %undef(s32)319    %qnan:_(s16) = G_FCONSTANT half 0xH7E01320    %qnan_s32:_(s32) = G_ANYEXT %qnan(s16)321    %qnan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %qnan_s32(s32), %undef(s32)322    %4:_(<2 x s16>) = G_FMUL %0, %two_splat323    %snan_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %snan_undef324    %16:_(<2 x s16>) = G_FCANONICALIZE %4325    %8:_(<2 x s16>) = G_FMAXNUM_IEEE %snan_undef_fcan, %16326    %qnan_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %qnan_undef327    %14:_(<2 x s16>) = G_FCANONICALIZE %8328    %11:_(<2 x s16>) = G_FMINNUM_IEEE %qnan_undef_fcan, %14329    $vgpr0 = COPY %11(<2 x s16>)330...331 332---333name: test_fcanonicalize_log334tracksRegLiveness: true335legalized: true336body: |337  bb.0:338    liveins: $vgpr0339 340    ; CHECK-LABEL: name: test_fcanonicalize_log341    ; CHECK: liveins: $vgpr0342    ; CHECK-NEXT: {{  $}}343    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0344    ; CHECK-NEXT: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.log), [[COPY]](s32)345    ; CHECK-NEXT: $vgpr0 = COPY [[INT]](s32)346    %0:_(s32) = COPY $vgpr0347    %1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.log), %0348    %2:_(s32) = G_FCANONICALIZE %1349    $vgpr0 = COPY %2(s32)350...351 352---353name: test_fcanonicalize_exp2354tracksRegLiveness: true355legalized: true356body: |357  bb.0:358    liveins: $vgpr0359 360    ; CHECK-LABEL: name: test_fcanonicalize_exp2361    ; CHECK: liveins: $vgpr0362    ; CHECK-NEXT: {{  $}}363    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0364    ; CHECK-NEXT: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), [[COPY]](s32)365    ; CHECK-NEXT: $vgpr0 = COPY [[INT]](s32)366    %0:_(s32) = COPY $vgpr0367    %1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), %0368    %2:_(s32) = G_FCANONICALIZE %1369    $vgpr0 = COPY %2(s32)370...371