280 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s3 4---5name: uitofp_char_to_f326tracksRegLiveness: true7body: |8 bb.0:9 liveins: $vgpr010 11 ; CHECK-LABEL: name: uitofp_char_to_f3212 ; CHECK: liveins: $vgpr013 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr015 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25516 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]17 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]18 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)19 %0:_(s32) = COPY $vgpr020 %1:_(s32) = G_CONSTANT i32 25521 %2:_(s32) = G_AND %0, %122 %3:_(s32) = G_UITOFP %223 $vgpr0 = COPY %324...25 26---27name: uitofp_too_many_bits_to_f3228tracksRegLiveness: true29body: |30 bb.0:31 liveins: $vgpr032 33 ; CHECK-LABEL: name: uitofp_too_many_bits_to_f3234 ; CHECK: liveins: $vgpr035 ; CHECK-NEXT: {{ $}}36 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr037 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25638 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]39 ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[AND]](s32)40 ; CHECK-NEXT: $vgpr0 = COPY [[UITOFP]](s32)41 %0:_(s32) = COPY $vgpr042 %1:_(s32) = G_CONSTANT i32 25643 %2:_(s32) = G_AND %0, %144 %3:_(s32) = G_UITOFP %245 $vgpr0 = COPY %346...47 48---49name: sitofp_char_to_f3250tracksRegLiveness: true51body: |52 bb.0:53 liveins: $vgpr054 55 ; CHECK-LABEL: name: sitofp_char_to_f3256 ; CHECK: liveins: $vgpr057 ; CHECK-NEXT: {{ $}}58 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr059 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25560 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]61 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]62 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)63 %0:_(s32) = COPY $vgpr064 %1:_(s32) = G_CONSTANT i32 25565 %2:_(s32) = G_AND %0, %166 %3:_(s32) = G_SITOFP %267 $vgpr0 = COPY %368...69 70---71name: sitofp_bits127_to_f3272tracksRegLiveness: true73body: |74 bb.0:75 liveins: $vgpr076 77 ; CHECK-LABEL: name: sitofp_bits127_to_f3278 ; CHECK: liveins: $vgpr079 ; CHECK-NEXT: {{ $}}80 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr081 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12782 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]83 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]84 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)85 %0:_(s32) = COPY $vgpr086 %1:_(s32) = G_CONSTANT i32 12787 %2:_(s32) = G_AND %0, %188 %3:_(s32) = G_SITOFP %289 $vgpr0 = COPY %390...91 92---93name: sitofp_bits128_to_f3294tracksRegLiveness: true95body: |96 bb.0:97 liveins: $vgpr098 99 ; CHECK-LABEL: name: sitofp_bits128_to_f32100 ; CHECK: liveins: $vgpr0101 ; CHECK-NEXT: {{ $}}102 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0103 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 128104 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]105 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]106 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)107 %0:_(s32) = COPY $vgpr0108 %1:_(s32) = G_CONSTANT i32 128109 %2:_(s32) = G_AND %0, %1110 %3:_(s32) = G_SITOFP %2111 $vgpr0 = COPY %3112...113---114name: sitofp_too_many_bits_to_f32115tracksRegLiveness: true116body: |117 bb.0:118 liveins: $vgpr0119 120 ; CHECK-LABEL: name: sitofp_too_many_bits_to_f32121 ; CHECK: liveins: $vgpr0122 ; CHECK-NEXT: {{ $}}123 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0124 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256125 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]126 ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[AND]](s32)127 ; CHECK-NEXT: $vgpr0 = COPY [[SITOFP]](s32)128 %0:_(s32) = COPY $vgpr0129 %1:_(s32) = G_CONSTANT i32 256130 %2:_(s32) = G_AND %0, %1131 %3:_(s32) = G_SITOFP %2132 $vgpr0 = COPY %3133...134 135---136name: uitofp_char_to_f16137tracksRegLiveness: true138body: |139 bb.0:140 liveins: $vgpr0141 142 ; CHECK-LABEL: name: uitofp_char_to_f16143 ; CHECK: liveins: $vgpr0144 ; CHECK-NEXT: {{ $}}145 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0146 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255147 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]148 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]149 ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[AMDGPU_CVT_F32_UBYTE0_]](s32)150 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)151 ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)152 %0:_(s32) = COPY $vgpr0153 %1:_(s32) = G_CONSTANT i32 255154 %2:_(s32) = G_AND %0, %1155 %3:_(s16) = G_UITOFP %2156 %4:_(s32) = G_ANYEXT %3157 $vgpr0 = COPY %4158...159 160---161name: sitofp_char_to_f16162tracksRegLiveness: true163body: |164 bb.0:165 liveins: $vgpr0166 167 ; CHECK-LABEL: name: sitofp_char_to_f16168 ; CHECK: liveins: $vgpr0169 ; CHECK-NEXT: {{ $}}170 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0171 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255172 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]173 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]174 ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[AMDGPU_CVT_F32_UBYTE0_]](s32)175 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)176 ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)177 %0:_(s32) = COPY $vgpr0178 %1:_(s32) = G_CONSTANT i32 255179 %2:_(s32) = G_AND %0, %1180 %3:_(s16) = G_SITOFP %2181 %4:_(s32) = G_ANYEXT %3182 $vgpr0 = COPY %4183...184 185---186name: uitofp_s64_char_to_f32187tracksRegLiveness: true188body: |189 bb.0:190 liveins: $vgpr0_vgpr1191 192 ; CHECK-LABEL: name: uitofp_s64_char_to_f32193 ; CHECK: liveins: $vgpr0_vgpr1194 ; CHECK-NEXT: {{ $}}195 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1196 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)197 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255198 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]199 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]200 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)201 %0:_(s64) = COPY $vgpr0_vgpr1202 %1:_(s64) = G_CONSTANT i64 255203 %2:_(s64) = G_AND %0, %1204 %3:_(s32) = G_UITOFP %2205 $vgpr0 = COPY %3206...207 208---209name: sitofp_s64_char_to_f32210tracksRegLiveness: true211body: |212 bb.0:213 liveins: $vgpr0_vgpr1214 215 ; CHECK-LABEL: name: sitofp_s64_char_to_f32216 ; CHECK: liveins: $vgpr0_vgpr1217 ; CHECK-NEXT: {{ $}}218 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1219 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)220 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255221 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]222 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]223 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)224 %0:_(s64) = COPY $vgpr0_vgpr1225 %1:_(s64) = G_CONSTANT i64 255226 %2:_(s64) = G_AND %0, %1227 %3:_(s32) = G_SITOFP %2228 $vgpr0 = COPY %3229...230 231---232name: uitofp_s16_char_to_f32233tracksRegLiveness: true234body: |235 bb.0:236 liveins: $vgpr0237 238 ; CHECK-LABEL: name: uitofp_s16_char_to_f32239 ; CHECK: liveins: $vgpr0240 ; CHECK-NEXT: {{ $}}241 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0242 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)243 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255244 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]245 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s16)246 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[ANYEXT]]247 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)248 %0:_(s32) = COPY $vgpr0249 %1:_(s16) = G_TRUNC %0250 %2:_(s16) = G_CONSTANT i16 255251 %3:_(s16) = G_AND %1, %2252 %4:_(s32) = G_UITOFP %3253 $vgpr0 = COPY %4254...255 256---257name: sitofp_s16_char_to_f32258tracksRegLiveness: true259body: |260 bb.0:261 liveins: $vgpr0262 263 ; CHECK-LABEL: name: sitofp_s16_char_to_f32264 ; CHECK: liveins: $vgpr0265 ; CHECK-NEXT: {{ $}}266 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0267 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)268 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255269 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]270 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s16)271 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[ANYEXT]]272 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)273 %0:_(s32) = COPY $vgpr0274 %1:_(s16) = G_TRUNC %0275 %2:_(s16) = G_CONSTANT i16 255276 %3:_(s16) = G_AND %1, %2277 %4:_(s32) = G_SITOFP %3278 $vgpr0 = COPY %4279...280