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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s3 4---5name: narrow_lshr_s64_32_s64amt6tracksRegLiveness: true7body: |8 bb.0:9 liveins: $vgpr0_vgpr110 11 ; CHECK-LABEL: name: narrow_lshr_s64_32_s64amt12 ; CHECK: liveins: $vgpr0_vgpr113 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr115 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)16 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV1]](s32)17 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)18 %0:_(s64) = COPY $vgpr0_vgpr119 %1:_(s64) = G_CONSTANT i64 3220 %2:_(s64) = G_LSHR %0, %121 $vgpr0_vgpr1 = COPY %222...23 24---25name: narrow_lshr_s64_3226tracksRegLiveness: true27body: |28 bb.0:29 liveins: $vgpr0_vgpr130 31 ; CHECK-LABEL: name: narrow_lshr_s64_3232 ; CHECK: liveins: $vgpr0_vgpr133 ; CHECK-NEXT: {{ $}}34 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr135 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)36 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV1]](s32)37 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)38 %0:_(s64) = COPY $vgpr0_vgpr139 %1:_(s32) = G_CONSTANT i32 3240 %2:_(s64) = G_LSHR %0, %141 $vgpr0_vgpr1 = COPY %242...43 44---45name: narrow_lshr_s64_3346tracksRegLiveness: true47body: |48 bb.0:49 liveins: $vgpr0_vgpr150 51 ; CHECK-LABEL: name: narrow_lshr_s64_3352 ; CHECK: liveins: $vgpr0_vgpr153 ; CHECK-NEXT: {{ $}}54 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr155 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)56 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 157 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32)58 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[LSHR]](s32)59 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)60 %0:_(s64) = COPY $vgpr0_vgpr161 %1:_(s32) = G_CONSTANT i32 3362 %2:_(s64) = G_LSHR %0, %163 $vgpr0_vgpr1 = COPY %264...65 66---67name: narrow_lshr_s64_3168tracksRegLiveness: true69body: |70 bb.0:71 liveins: $vgpr0_vgpr172 73 ; CHECK-LABEL: name: narrow_lshr_s64_3174 ; CHECK: liveins: $vgpr0_vgpr175 ; CHECK-NEXT: {{ $}}76 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr177 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3178 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[C]](s32)79 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[LSHR]](s64)80 %0:_(s64) = COPY $vgpr0_vgpr181 %1:_(s32) = G_CONSTANT i32 3182 %2:_(s64) = G_LSHR %0, %183 $vgpr0_vgpr1 = COPY %284...85 86---87name: narrow_lshr_s64_6388tracksRegLiveness: true89body: |90 bb.0:91 liveins: $vgpr0_vgpr192 93 ; CHECK-LABEL: name: narrow_lshr_s64_6394 ; CHECK: liveins: $vgpr0_vgpr195 ; CHECK-NEXT: {{ $}}96 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr197 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)98 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3199 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32)100 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[LSHR]](s32)101 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)102 %0:_(s64) = COPY $vgpr0_vgpr1103 %1:_(s32) = G_CONSTANT i32 63104 %2:_(s64) = G_LSHR %0, %1105 $vgpr0_vgpr1 = COPY %2106...107 108---109name: narrow_lshr_s64_64110tracksRegLiveness: true111body: |112 bb.0:113 liveins: $vgpr0_vgpr1114 115 ; CHECK-LABEL: name: narrow_lshr_s64_64116 ; CHECK: liveins: $vgpr0_vgpr1117 ; CHECK-NEXT: {{ $}}118 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF119 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[DEF]](s64)120 %0:_(s64) = COPY $vgpr0_vgpr1121 %1:_(s32) = G_CONSTANT i32 64122 %2:_(s64) = G_LSHR %0, %1123 $vgpr0_vgpr1 = COPY %2124...125 126---127name: narrow_lshr_s64_65128tracksRegLiveness: true129body: |130 bb.0:131 liveins: $vgpr0_vgpr1132 133 ; CHECK-LABEL: name: narrow_lshr_s64_65134 ; CHECK: liveins: $vgpr0_vgpr1135 ; CHECK-NEXT: {{ $}}136 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF137 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[DEF]](s64)138 %0:_(s64) = COPY $vgpr0_vgpr1139 %1:_(s32) = G_CONSTANT i32 65140 %2:_(s64) = G_LSHR %0, %1141 $vgpr0_vgpr1 = COPY %2142...143 144---145name: narrow_lshr_s32_16146tracksRegLiveness: true147body: |148 bb.0:149 liveins: $vgpr0150 151 ; CHECK-LABEL: name: narrow_lshr_s32_16152 ; CHECK: liveins: $vgpr0153 ; CHECK-NEXT: {{ $}}154 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0155 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16156 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)157 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)158 %0:_(s32) = COPY $vgpr0159 %1:_(s32) = G_CONSTANT i32 16160 %2:_(s32) = G_LSHR %0, %1161 $vgpr0 = COPY %2162...163 164---165name: narrow_lshr_s32_17166tracksRegLiveness: true167body: |168 bb.0:169 liveins: $vgpr0170 171 ; CHECK-LABEL: name: narrow_lshr_s32_17172 ; CHECK: liveins: $vgpr0173 ; CHECK-NEXT: {{ $}}174 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0175 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 17176 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)177 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)178 %0:_(s32) = COPY $vgpr0179 %1:_(s32) = G_CONSTANT i32 17180 %2:_(s32) = G_LSHR %0, %1181 $vgpr0 = COPY %2182...183 184---185name: narrow_lshr_v2s32_17186tracksRegLiveness: true187body: |188 bb.0:189 liveins: $vgpr0_vgpr1190 191 ; CHECK-LABEL: name: narrow_lshr_v2s32_17192 ; CHECK: liveins: $vgpr0_vgpr1193 ; CHECK-NEXT: {{ $}}194 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1195 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 17196 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)197 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(<2 x s32>) = G_LSHR [[COPY]], [[BUILD_VECTOR]](<2 x s32>)198 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[LSHR]](<2 x s32>)199 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1200 %1:_(s32) = G_CONSTANT i32 17201 %2:_(<2 x s32>) = G_BUILD_VECTOR %1, %1202 %3:_(<2 x s32>) = G_LSHR %0, %2203 $vgpr0_vgpr1 = COPY %3204...205