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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s3 4---5name: rotl_i326tracksRegLiveness: true7body: |8 bb.0:9 liveins: $vgpr0, $vgpr1, $vgpr210 11 ; CHECK-LABEL: name: rotl_i3212 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr213 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr015 ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr116 ; CHECK-NEXT: %or:_(s32) = G_ROTL %a, %amt(s32)17 ; CHECK-NEXT: $vgpr2 = COPY %or(s32)18 %a:_(s32) = COPY $vgpr019 %amt:_(s32) = COPY $vgpr120 %bw:_(s32) = G_CONSTANT i32 3221 %shl:_(s32) = G_SHL %a, %amt22 %sub:_(s32) = G_SUB %bw, %amt23 %lshr:_(s32) = G_LSHR %a, %sub24 %or:_(s32) = G_OR %shl, %lshr25 $vgpr2 = COPY %or26...27 28---29name: rotl_v2i3230tracksRegLiveness: true31body: |32 bb.0:33 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr534 35 ; CHECK-LABEL: name: rotl_v2i3236 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr537 ; CHECK-NEXT: {{ $}}38 ; CHECK-NEXT: %a:_(<2 x s32>) = COPY $vgpr0_vgpr139 ; CHECK-NEXT: %amt:_(<2 x s32>) = COPY $vgpr2_vgpr340 ; CHECK-NEXT: %or:_(<2 x s32>) = G_ROTL %a, %amt(<2 x s32>)41 ; CHECK-NEXT: $vgpr4_vgpr5 = COPY %or(<2 x s32>)42 %a:_(<2 x s32>) = COPY $vgpr0_vgpr143 %amt:_(<2 x s32>) = COPY $vgpr2_vgpr344 %scalar_bw:_(s32) = G_CONSTANT i32 3245 %bw:_(<2 x s32>) = G_BUILD_VECTOR %scalar_bw, %scalar_bw46 %shl:_(<2 x s32>) = G_SHL %a, %amt47 %sub:_(<2 x s32>) = G_SUB %bw, %amt48 %lshr:_(<2 x s32>) = G_LSHR %a, %sub49 %or:_(<2 x s32>) = G_OR %shl, %lshr50 $vgpr4_vgpr5 = COPY %or51...52 53---54name: rotl_commute_i3255tracksRegLiveness: true56body: |57 bb.0:58 liveins: $vgpr0, $vgpr1, $vgpr259 60 ; CHECK-LABEL: name: rotl_commute_i3261 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr262 ; CHECK-NEXT: {{ $}}63 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr064 ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr165 ; CHECK-NEXT: %or:_(s32) = G_ROTL %a, %amt(s32)66 ; CHECK-NEXT: $vgpr2 = COPY %or(s32)67 %a:_(s32) = COPY $vgpr068 %amt:_(s32) = COPY $vgpr169 %bw:_(s32) = G_CONSTANT i32 3270 %shl:_(s32) = G_SHL %a, %amt71 %sub:_(s32) = G_SUB %bw, %amt72 %lshr:_(s32) = G_LSHR %a, %sub73 %or:_(s32) = G_OR %lshr, %shl74 $vgpr2 = COPY %or75...76 77---78name: rotr_i3279tracksRegLiveness: true80body: |81 bb.0:82 liveins: $vgpr0, $vgpr1, $vgpr283 84 ; CHECK-LABEL: name: rotr_i3285 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr286 ; CHECK-NEXT: {{ $}}87 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr088 ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr189 ; CHECK-NEXT: %or:_(s32) = G_ROTR %a, %amt(s32)90 ; CHECK-NEXT: $vgpr2 = COPY %or(s32)91 %a:_(s32) = COPY $vgpr092 %amt:_(s32) = COPY $vgpr193 %bw:_(s32) = G_CONSTANT i32 3294 %lshr:_(s32) = G_LSHR %a, %amt95 %sub:_(s32) = G_SUB %bw, %amt96 %shl:_(s32) = G_SHL %a, %sub97 %or:_(s32) = G_OR %shl, %lshr98 $vgpr2 = COPY %or99...100 101---102name: rot_i32_const103tracksRegLiveness: true104body: |105 bb.0:106 liveins: $vgpr0, $vgpr1107 108 ; CHECK-LABEL: name: rot_i32_const109 ; CHECK: liveins: $vgpr0, $vgpr1110 ; CHECK-NEXT: {{ $}}111 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0112 ; CHECK-NEXT: %amt1:_(s32) = G_CONSTANT i32 12113 ; CHECK-NEXT: %or:_(s32) = G_ROTR %a, %amt1(s32)114 ; CHECK-NEXT: $vgpr1 = COPY %or(s32)115 %a:_(s32) = COPY $vgpr0116 %amt0:_(s32) = G_CONSTANT i32 20117 %amt1:_(s32) = G_CONSTANT i32 12118 %shl:_(s32) = G_SHL %a, %amt0119 %lshr:_(s32) = G_LSHR %a, %amt1120 %or:_(s32) = G_OR %shl, %lshr121 $vgpr1 = COPY %or122...123 124---125name: rot_v2i32_const126tracksRegLiveness: true127body: |128 bb.0:129 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3130 131 ; CHECK-LABEL: name: rot_v2i32_const132 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3133 ; CHECK-NEXT: {{ $}}134 ; CHECK-NEXT: %a:_(<2 x s32>) = COPY $vgpr0_vgpr1135 ; CHECK-NEXT: %scalar_amt1:_(s32) = G_CONSTANT i32 12136 ; CHECK-NEXT: %amt1:_(<2 x s32>) = G_BUILD_VECTOR %scalar_amt1(s32), %scalar_amt1(s32)137 ; CHECK-NEXT: %or:_(<2 x s32>) = G_ROTR %a, %amt1(<2 x s32>)138 ; CHECK-NEXT: $vgpr2_vgpr3 = COPY %or(<2 x s32>)139 %a:_(<2 x s32>) = COPY $vgpr0_vgpr1140 %scalar_amt0:_(s32) = G_CONSTANT i32 20141 %amt0:_(<2 x s32>) = G_BUILD_VECTOR %scalar_amt0, %scalar_amt0142 %scalar_amt1:_(s32) = G_CONSTANT i32 12143 %amt1:_(<2 x s32>) = G_BUILD_VECTOR %scalar_amt1, %scalar_amt1144 %shl:_(<2 x s32>) = G_SHL %a, %amt0145 %lshr:_(<2 x s32>) = G_LSHR %a, %amt1146 %or:_(<2 x s32>) = G_OR %shl, %lshr147 $vgpr2_vgpr3 = COPY %or148...149 150---151name: rot_i32_bad_const152tracksRegLiveness: true153body: |154 bb.0:155 liveins: $vgpr0, $vgpr1156 157 ; CHECK-LABEL: name: rot_i32_bad_const158 ; CHECK: liveins: $vgpr0, $vgpr1159 ; CHECK-NEXT: {{ $}}160 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0161 ; CHECK-NEXT: %amt0:_(s32) = G_CONSTANT i32 20162 ; CHECK-NEXT: %amt1:_(s32) = G_CONSTANT i32 11163 ; CHECK-NEXT: %shl:_(s32) = G_SHL %a, %amt0(s32)164 ; CHECK-NEXT: %lshr:_(s32) = G_LSHR %a, %amt1(s32)165 ; CHECK-NEXT: %or:_(s32) = G_OR %shl, %lshr166 ; CHECK-NEXT: $vgpr1 = COPY %or(s32)167 %a:_(s32) = COPY $vgpr0168 %amt0:_(s32) = G_CONSTANT i32 20169 %amt1:_(s32) = G_CONSTANT i32 11170 %shl:_(s32) = G_SHL %a, %amt0171 %lshr:_(s32) = G_LSHR %a, %amt1172 %or:_(s32) = G_OR %shl, %lshr173 $vgpr1 = COPY %or174...175 176 177---178name: rotl_i32_bad_bw179tracksRegLiveness: true180body: |181 bb.0:182 liveins: $vgpr0, $vgpr1, $vgpr2183 184 ; CHECK-LABEL: name: rotl_i32_bad_bw185 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2186 ; CHECK-NEXT: {{ $}}187 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0188 ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1189 ; CHECK-NEXT: %bw:_(s32) = G_CONSTANT i32 31190 ; CHECK-NEXT: %shl:_(s32) = G_SHL %a, %amt(s32)191 ; CHECK-NEXT: %sub:_(s32) = G_SUB %bw, %amt192 ; CHECK-NEXT: %lshr:_(s32) = G_LSHR %a, %sub(s32)193 ; CHECK-NEXT: %or:_(s32) = G_OR %shl, %lshr194 ; CHECK-NEXT: $vgpr2 = COPY %or(s32)195 %a:_(s32) = COPY $vgpr0196 %amt:_(s32) = COPY $vgpr1197 %bw:_(s32) = G_CONSTANT i32 31198 %shl:_(s32) = G_SHL %a, %amt199 %sub:_(s32) = G_SUB %bw, %amt200 %lshr:_(s32) = G_LSHR %a, %sub201 %or:_(s32) = G_OR %shl, %lshr202 $vgpr2 = COPY %or203...204 205---206name: rotl_i32_bad_amt_reg207tracksRegLiveness: true208body: |209 bb.0:210 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3211 212 ; CHECK-LABEL: name: rotl_i32_bad_amt_reg213 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3214 ; CHECK-NEXT: {{ $}}215 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0216 ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1217 ; CHECK-NEXT: %amt1:_(s32) = COPY $vgpr2218 ; CHECK-NEXT: %bw:_(s32) = G_CONSTANT i32 32219 ; CHECK-NEXT: %shl:_(s32) = G_SHL %a, %amt(s32)220 ; CHECK-NEXT: %sub:_(s32) = G_SUB %bw, %amt1221 ; CHECK-NEXT: %lshr:_(s32) = G_LSHR %a, %sub(s32)222 ; CHECK-NEXT: %or:_(s32) = G_OR %shl, %lshr223 ; CHECK-NEXT: $vgpr3 = COPY %or(s32)224 %a:_(s32) = COPY $vgpr0225 %amt:_(s32) = COPY $vgpr1226 %amt1:_(s32) = COPY $vgpr2227 %bw:_(s32) = G_CONSTANT i32 32228 %shl:_(s32) = G_SHL %a, %amt229 %sub:_(s32) = G_SUB %bw, %amt1230 %lshr:_(s32) = G_LSHR %a, %sub231 %or:_(s32) = G_OR %shl, %lshr232 $vgpr3 = COPY %or233...234