471 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 -new-reg-bank-select < %s | FileCheck -check-prefix=GFX10 %s3 4define void @temporal_divergent_i1_phi(float %val, ptr %addr) {5; GFX10-LABEL: temporal_divergent_i1_phi:6; GFX10: ; %bb.0: ; %entry7; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8; GFX10-NEXT: s_mov_b32 s4, 09; GFX10-NEXT: s_mov_b32 s5, 110; GFX10-NEXT: s_mov_b32 s6, 011; GFX10-NEXT: ; implicit-def: $sgpr712; GFX10-NEXT: .LBB0_1: ; %loop13; GFX10-NEXT: ; =>This Inner Loop Header: Depth=114; GFX10-NEXT: v_cvt_f32_u32_e32 v3, s615; GFX10-NEXT: s_and_b32 s8, s5, 116; GFX10-NEXT: s_cmp_lg_u32 s8, 017; GFX10-NEXT: s_cselect_b32 s8, exec_lo, 018; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v019; GFX10-NEXT: s_xor_b32 s5, s5, 120; GFX10-NEXT: s_add_i32 s6, s6, 121; GFX10-NEXT: s_or_b32 s4, vcc_lo, s422; GFX10-NEXT: s_andn2_b32 s7, s7, exec_lo23; GFX10-NEXT: s_and_b32 s8, exec_lo, s824; GFX10-NEXT: s_or_b32 s7, s7, s825; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s426; GFX10-NEXT: s_cbranch_execnz .LBB0_127; GFX10-NEXT: ; %bb.2: ; %exit28; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s429; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s730; GFX10-NEXT: flat_store_dword v[1:2], v031; GFX10-NEXT: s_waitcnt lgkmcnt(0)32; GFX10-NEXT: s_setpc_b64 s[30:31]33entry:34 br label %loop35 36loop:37 %counter = phi i32 [ 0, %entry ], [ %counterPlus1, %loop ]38 %bool_counter = phi i1 [ true, %entry ], [ %neg_bool_counter, %loop ]39 %neg_bool_counter = xor i1 %bool_counter, true40 %fcounter = uitofp i32 %counter to float41 %cond = fcmp ogt float %fcounter, %val42 %counterPlus1 = add i32 %counter, 143 br i1 %cond, label %exit, label %loop44 45exit:46 %select = select i1 %bool_counter, float 1.000000e+00, float 0.000000e+0047 store float %select, ptr %addr48 ret void49}50 51define void @temporal_divergent_i1_non_phi(float %val, ptr %addr) {52; GFX10-LABEL: temporal_divergent_i1_non_phi:53; GFX10: ; %bb.0: ; %entry54; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)55; GFX10-NEXT: s_mov_b32 s4, 056; GFX10-NEXT: s_mov_b32 s5, 157; GFX10-NEXT: s_mov_b32 s6, 058; GFX10-NEXT: ; implicit-def: $sgpr759; GFX10-NEXT: .LBB1_1: ; %loop60; GFX10-NEXT: ; =>This Inner Loop Header: Depth=161; GFX10-NEXT: v_cvt_f32_u32_e32 v3, s662; GFX10-NEXT: s_xor_b32 s5, s5, 163; GFX10-NEXT: s_and_b32 s8, s5, 164; GFX10-NEXT: s_cmp_lg_u32 s8, 065; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v066; GFX10-NEXT: s_cselect_b32 s8, exec_lo, 067; GFX10-NEXT: s_add_i32 s6, s6, 168; GFX10-NEXT: s_or_b32 s4, vcc_lo, s469; GFX10-NEXT: s_andn2_b32 s7, s7, exec_lo70; GFX10-NEXT: s_and_b32 s8, exec_lo, s871; GFX10-NEXT: s_or_b32 s7, s7, s872; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s473; GFX10-NEXT: s_cbranch_execnz .LBB1_174; GFX10-NEXT: ; %bb.2: ; %exit75; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s476; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, s777; GFX10-NEXT: flat_store_dword v[1:2], v078; GFX10-NEXT: s_waitcnt lgkmcnt(0)79; GFX10-NEXT: s_setpc_b64 s[30:31]80entry:81 br label %loop82 83loop:84 %counter = phi i32 [ 0, %entry ], [ %counterPlus1, %loop ]85 %bool_counter = phi i1 [ true, %entry ], [ %neg_bool_counter, %loop ]86 %neg_bool_counter = xor i1 %bool_counter, true87 %fcounter = uitofp i32 %counter to float88 %cond = fcmp ogt float %fcounter, %val89 %counterPlus1 = add i32 %counter, 190 br i1 %cond, label %exit, label %loop91 92exit:93 %select = select i1 %neg_bool_counter, float 1.000000e+00, float 0.000000e+0094 store float %select, ptr %addr95 ret void96}97 98; This is temporal divergent uniform i1 structurize-cfg phi.99; Loop has uniform condition if with body with break at the end.100define amdgpu_cs void @loop_with_1break(ptr addrspace(1) %x, i32 %x.size, ptr addrspace(1) inreg %a, ptr addrspace(1) inreg %a.break) {101; GFX10-LABEL: loop_with_1break:102; GFX10: ; %bb.0: ; %entry103; GFX10-NEXT: v_mov_b32_e32 v3, 0104; GFX10-NEXT: s_mov_b32 s4, 0105; GFX10-NEXT: s_mov_b32 s8, 0106; GFX10-NEXT: ; implicit-def: $sgpr10107; GFX10-NEXT: ; implicit-def: $sgpr9108; GFX10-NEXT: s_branch .LBB2_3109; GFX10-NEXT: .LBB2_1: ; %loop.body110; GFX10-NEXT: ; in Loop: Header=BB2_3 Depth=1111; GFX10-NEXT: v_mov_b32_e32 v4, s6112; GFX10-NEXT: v_mov_b32_e32 v5, s7113; GFX10-NEXT: s_andn2_b32 s6, s10, exec_lo114; GFX10-NEXT: s_mov_b32 s5, 0115; GFX10-NEXT: v_add_co_u32 v4, vcc_lo, v0, v4116; GFX10-NEXT: v_add_co_ci_u32_e32 v5, vcc_lo, v1, v5, vcc_lo117; GFX10-NEXT: v_cmp_lt_u32_e32 vcc_lo, s4, v2118; GFX10-NEXT: s_add_i32 s4, s4, 1119; GFX10-NEXT: global_load_dword v6, v[4:5], off120; GFX10-NEXT: s_and_b32 s7, exec_lo, vcc_lo121; GFX10-NEXT: s_or_b32 s10, s6, s7122; GFX10-NEXT: s_waitcnt vmcnt(0)123; GFX10-NEXT: v_add_nc_u32_e32 v6, 1, v6124; GFX10-NEXT: global_store_dword v[4:5], v6, off125; GFX10-NEXT: .LBB2_2: ; %Flow126; GFX10-NEXT: ; in Loop: Header=BB2_3 Depth=1127; GFX10-NEXT: s_cmp_lg_u32 s5, 0128; GFX10-NEXT: s_cselect_b32 s5, exec_lo, 0129; GFX10-NEXT: s_and_b32 s6, exec_lo, s10130; GFX10-NEXT: s_or_b32 s8, s6, s8131; GFX10-NEXT: s_andn2_b32 s6, s9, exec_lo132; GFX10-NEXT: s_and_b32 s5, exec_lo, s5133; GFX10-NEXT: s_or_b32 s9, s6, s5134; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)135; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s8136; GFX10-NEXT: s_cbranch_execz .LBB2_5137; GFX10-NEXT: .LBB2_3: ; %A138; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1139; GFX10-NEXT: s_ashr_i32 s5, s4, 31140; GFX10-NEXT: s_lshl_b64 s[6:7], s[4:5], 2141; GFX10-NEXT: s_add_u32 s12, s0, s6142; GFX10-NEXT: s_addc_u32 s13, s1, s7143; GFX10-NEXT: global_load_dword v4, v3, s[12:13]144; GFX10-NEXT: s_waitcnt vmcnt(0)145; GFX10-NEXT: v_readfirstlane_b32 s5, v4146; GFX10-NEXT: s_cmp_lg_u32 s5, 0147; GFX10-NEXT: s_cselect_b32 s5, 1, 0148; GFX10-NEXT: s_andn2_b32 s10, s10, exec_lo149; GFX10-NEXT: s_and_b32 s11, exec_lo, exec_lo150; GFX10-NEXT: s_or_b32 s10, s10, s11151; GFX10-NEXT: s_cmp_lg_u32 s5, 0152; GFX10-NEXT: s_cbranch_scc1 .LBB2_1153; GFX10-NEXT: ; %bb.4: ; in Loop: Header=BB2_3 Depth=1154; GFX10-NEXT: s_mov_b32 s5, 1155; GFX10-NEXT: ; implicit-def: $sgpr4156; GFX10-NEXT: s_branch .LBB2_2157; GFX10-NEXT: .LBB2_5: ; %loop.exit.guard158; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s8159; GFX10-NEXT: s_and_saveexec_b32 s0, s9160; GFX10-NEXT: s_xor_b32 s0, exec_lo, s0161; GFX10-NEXT: s_cbranch_execz .LBB2_7162; GFX10-NEXT: ; %bb.6: ; %break.body163; GFX10-NEXT: v_mov_b32_e32 v0, 10164; GFX10-NEXT: v_mov_b32_e32 v1, 0165; GFX10-NEXT: global_store_dword v1, v0, s[2:3]166; GFX10-NEXT: .LBB2_7: ; %exit167; GFX10-NEXT: s_endpgm168entry:169 br label %A170 171A:172 %counter = phi i32 [ %counter.plus.1, %loop.body ], [ 0, %entry ]173 %a.plus.counter = getelementptr inbounds i32, ptr addrspace(1) %a, i32 %counter174 %a.val = load i32, ptr addrspace(1) %a.plus.counter175 %a.cond = icmp eq i32 %a.val, 0176 br i1 %a.cond, label %break.body, label %loop.body177 178break.body:179 store i32 10, ptr addrspace(1) %a.break180 br label %exit181 182loop.body:183 %x.plus.counter = getelementptr inbounds i32, ptr addrspace(1) %x, i32 %counter184 %x.val = load i32, ptr addrspace(1) %x.plus.counter185 %x.val.plus.1 = add i32 %x.val, 1186 store i32 %x.val.plus.1, ptr addrspace(1) %x.plus.counter187 %counter.plus.1 = add i32 %counter, 1188 %x.cond = icmp ult i32 %counter, %x.size189 br i1 %x.cond, label %exit, label %A190 191exit:192 ret void193}194 195; Temporal divergence i1 across inner and outer nested loops196define void @nested_loops_temporal_divergence_inner(float %pre.cond.val, i32 %n.i, ptr %mat, ptr %mat.oe, ptr %arr) {197; GFX10-LABEL: nested_loops_temporal_divergence_inner:198; GFX10: ; %bb.0: ; %entry199; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)200; GFX10-NEXT: v_cmp_lt_f32_e64 s5, 1.0, v0201; GFX10-NEXT: s_mov_b32 s6, 0202; GFX10-NEXT: s_mov_b32 s8, 0203; GFX10-NEXT: .LBB3_1: ; %OuterHeader204; GFX10-NEXT: ; =>This Loop Header: Depth=1205; GFX10-NEXT: ; Child Loop BB3_2 Depth 2206; GFX10-NEXT: s_ashr_i32 s7, s6, 31207; GFX10-NEXT: s_mov_b32 s4, s5208; GFX10-NEXT: s_lshl_b64 s[10:11], s[6:7], 2209; GFX10-NEXT: ; implicit-def: $sgpr9210; GFX10-NEXT: v_mov_b32_e32 v6, s10211; GFX10-NEXT: v_mov_b32_e32 v7, s11212; GFX10-NEXT: s_mov_b32 s10, 0213; GFX10-NEXT: s_mov_b32 s11, 0214; GFX10-NEXT: v_add_co_u32 v6, vcc_lo, v2, v6215; GFX10-NEXT: v_add_co_ci_u32_e32 v7, vcc_lo, v3, v7, vcc_lo216; GFX10-NEXT: flat_load_dword v0, v[6:7]217; GFX10-NEXT: .LBB3_2: ; %InnerHeader218; GFX10-NEXT: ; Parent Loop BB3_1 Depth=1219; GFX10-NEXT: ; => This Inner Loop Header: Depth=2220; GFX10-NEXT: v_cvt_f32_u32_e32 v6, s11221; GFX10-NEXT: s_mov_b32 s12, exec_lo222; GFX10-NEXT: s_add_i32 s11, s11, 1223; GFX10-NEXT: s_xor_b32 s4, s4, s12224; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)225; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, v6, v0226; GFX10-NEXT: s_or_b32 s10, vcc_lo, s10227; GFX10-NEXT: s_andn2_b32 s9, s9, exec_lo228; GFX10-NEXT: s_and_b32 s12, exec_lo, s4229; GFX10-NEXT: s_or_b32 s9, s9, s12230; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s10231; GFX10-NEXT: s_cbranch_execnz .LBB3_2232; GFX10-NEXT: ; %bb.3: ; %UseInst233; GFX10-NEXT: ; in Loop: Header=BB3_1 Depth=1234; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s10235; GFX10-NEXT: v_mov_b32_e32 v6, s6236; GFX10-NEXT: v_mov_b32_e32 v7, s7237; GFX10-NEXT: v_cmp_lt_u32_e32 vcc_lo, s6, v1238; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, s9239; GFX10-NEXT: s_add_i32 s6, s6, 1240; GFX10-NEXT: v_add_co_u32 v6, s4, v4, v6241; GFX10-NEXT: v_add_co_ci_u32_e64 v7, s4, v5, v7, s4242; GFX10-NEXT: s_or_b32 s8, vcc_lo, s8243; GFX10-NEXT: flat_store_byte v[6:7], v0244; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)245; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s8246; GFX10-NEXT: s_cbranch_execnz .LBB3_1247; GFX10-NEXT: ; %bb.4: ; %exit248; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s8249; GFX10-NEXT: s_waitcnt lgkmcnt(0)250; GFX10-NEXT: s_setpc_b64 s[30:31]251entry:252 %pre.cond = fcmp ogt float %pre.cond.val, 1.0253 br label %OuterHeader254 255OuterHeader:256 %i = phi i32 [ 0, %entry ], [ %i.plus.1, %OuterLatch ]257 %mat.i = getelementptr float, ptr %mat, i32 %i258 %val.i = load float, ptr %mat.i259 br label %InnerHeader260 261InnerHeader:262 %j = phi i32 [ 0, %OuterHeader ], [ %j.plus.1, %InnerHeader ]263 %bool.counter = phi i1 [ %pre.cond, %OuterHeader ], [ %odd.even.counter, %InnerHeader ]264 265 %odd.even.counter = xor i1 %bool.counter, true266 267 %f.j = uitofp i32 %j to float268 %j.plus.1 = add i32 %j, 1269 %cond.j = fcmp ogt float %f.j, %val.i270 br i1 %cond.j, label %UseInst, label %InnerHeader271 272UseInst:273 %mat.oe.i = getelementptr i1, ptr %mat.oe, i32 %i274 ; mat.oe[i] = oddOReven(mat[i])275 store i1 %odd.even.counter, ptr %mat.oe.i276 br label %OuterLatch277 278OuterLatch:279 %cond.i = icmp ult i32 %i, %n.i280 %i.plus.1 = add i32 %i, 1281 br i1 %cond.i, label %exit, label %OuterHeader282 283exit:284 ret void285}286 287define void @nested_loops_temporal_divergence_outer(float %pre.cond.val, i32 %n.i, ptr %mat, ptr %mat.oe, ptr %arr) {288; GFX10-LABEL: nested_loops_temporal_divergence_outer:289; GFX10: ; %bb.0: ; %entry290; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)291; GFX10-NEXT: v_cmp_lt_f32_e64 s5, 1.0, v0292; GFX10-NEXT: s_mov_b32 s6, 0293; GFX10-NEXT: s_mov_b32 s8, 0294; GFX10-NEXT: .LBB4_1: ; %OuterHeader295; GFX10-NEXT: ; =>This Loop Header: Depth=1296; GFX10-NEXT: ; Child Loop BB4_2 Depth 2297; GFX10-NEXT: s_ashr_i32 s7, s6, 31298; GFX10-NEXT: s_mov_b32 s4, s5299; GFX10-NEXT: s_lshl_b64 s[10:11], s[6:7], 2300; GFX10-NEXT: ; implicit-def: $sgpr9301; GFX10-NEXT: v_mov_b32_e32 v6, s10302; GFX10-NEXT: v_mov_b32_e32 v7, s11303; GFX10-NEXT: s_mov_b32 s10, 0304; GFX10-NEXT: s_mov_b32 s11, 0305; GFX10-NEXT: v_add_co_u32 v6, vcc_lo, v2, v6306; GFX10-NEXT: v_add_co_ci_u32_e32 v7, vcc_lo, v3, v7, vcc_lo307; GFX10-NEXT: flat_load_dword v0, v[6:7]308; GFX10-NEXT: .LBB4_2: ; %InnerHeader309; GFX10-NEXT: ; Parent Loop BB4_1 Depth=1310; GFX10-NEXT: ; => This Inner Loop Header: Depth=2311; GFX10-NEXT: v_cvt_f32_u32_e32 v6, s11312; GFX10-NEXT: s_mov_b32 s12, exec_lo313; GFX10-NEXT: s_add_i32 s11, s11, 1314; GFX10-NEXT: s_xor_b32 s4, s4, s12315; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)316; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, v6, v0317; GFX10-NEXT: s_or_b32 s10, vcc_lo, s10318; GFX10-NEXT: s_andn2_b32 s9, s9, exec_lo319; GFX10-NEXT: s_and_b32 s12, exec_lo, s4320; GFX10-NEXT: s_or_b32 s9, s9, s12321; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s10322; GFX10-NEXT: s_cbranch_execnz .LBB4_2323; GFX10-NEXT: ; %bb.3: ; %UseInst324; GFX10-NEXT: ; in Loop: Header=BB4_1 Depth=1325; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s10326; GFX10-NEXT: v_mov_b32_e32 v6, s6327; GFX10-NEXT: v_mov_b32_e32 v7, s7328; GFX10-NEXT: v_cmp_lt_u32_e32 vcc_lo, s6, v1329; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, s9330; GFX10-NEXT: s_add_i32 s6, s6, 1331; GFX10-NEXT: v_add_co_u32 v6, s4, v4, v6332; GFX10-NEXT: v_add_co_ci_u32_e64 v7, s4, v5, v7, s4333; GFX10-NEXT: s_or_b32 s8, vcc_lo, s8334; GFX10-NEXT: flat_store_byte v[6:7], v0335; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)336; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s8337; GFX10-NEXT: s_cbranch_execnz .LBB4_1338; GFX10-NEXT: ; %bb.4: ; %exit339; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s8340; GFX10-NEXT: s_waitcnt lgkmcnt(0)341; GFX10-NEXT: s_setpc_b64 s[30:31]342entry:343 %pre.cond = fcmp ogt float %pre.cond.val, 1.0344 br label %OuterHeader345 346OuterHeader:347 %i = phi i32 [ 0, %entry ], [ %i.plus.1, %OuterLatch ]348 %mat.i = getelementptr float, ptr %mat, i32 %i349 %val.i = load float, ptr %mat.i350 br label %InnerHeader351 352InnerHeader:353 %j = phi i32 [ 0, %OuterHeader ], [ %j.plus.1, %InnerHeader ]354 %bool.counter = phi i1 [ %pre.cond, %OuterHeader ], [ %odd.even.counter, %InnerHeader ]355 356 %odd.even.counter = xor i1 %bool.counter, true357 358 %f.j = uitofp i32 %j to float359 %j.plus.1 = add i32 %j, 1360 %cond.j = fcmp ogt float %f.j, %val.i361 br i1 %cond.j, label %UseInst, label %InnerHeader362 363UseInst:364 %mat.oe.i = getelementptr i1, ptr %mat.oe, i32 %i365 ; mat.oe[i] = oddOReven(mat[i])366 store i1 %odd.even.counter, ptr %mat.oe.i367 br label %OuterLatch368 369OuterLatch:370 %cond.i = icmp ult i32 %i, %n.i371 %i.plus.1 = add i32 %i, 1372 br i1 %cond.i, label %exit, label %OuterHeader373 374exit:375 ret void376}377 378define void @nested_loops_temporal_divergence_both(float %pre.cond.val, i32 %n.i, ptr %mat, ptr %mat.oe, ptr %arr) {379; GFX10-LABEL: nested_loops_temporal_divergence_both:380; GFX10: ; %bb.0: ; %entry381; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)382; GFX10-NEXT: v_cmp_lt_f32_e64 s5, 1.0, v0383; GFX10-NEXT: s_mov_b32 s6, 0384; GFX10-NEXT: s_mov_b32 s8, 0385; GFX10-NEXT: ; implicit-def: $sgpr9386; GFX10-NEXT: .LBB5_1: ; %OuterHeader387; GFX10-NEXT: ; =>This Loop Header: Depth=1388; GFX10-NEXT: ; Child Loop BB5_2 Depth 2389; GFX10-NEXT: s_ashr_i32 s7, s6, 31390; GFX10-NEXT: s_mov_b32 s4, s5391; GFX10-NEXT: s_lshl_b64 s[10:11], s[6:7], 2392; GFX10-NEXT: v_mov_b32_e32 v8, s10393; GFX10-NEXT: v_mov_b32_e32 v9, s11394; GFX10-NEXT: s_mov_b32 s10, 0395; GFX10-NEXT: s_mov_b32 s11, 0396; GFX10-NEXT: v_add_co_u32 v8, vcc_lo, v2, v8397; GFX10-NEXT: v_add_co_ci_u32_e32 v9, vcc_lo, v3, v9, vcc_lo398; GFX10-NEXT: flat_load_dword v0, v[8:9]399; GFX10-NEXT: .LBB5_2: ; %InnerHeader400; GFX10-NEXT: ; Parent Loop BB5_1 Depth=1401; GFX10-NEXT: ; => This Inner Loop Header: Depth=2402; GFX10-NEXT: v_cvt_f32_u32_e32 v8, s11403; GFX10-NEXT: s_mov_b32 s12, exec_lo404; GFX10-NEXT: s_add_i32 s11, s11, 1405; GFX10-NEXT: s_xor_b32 s4, s4, s12406; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)407; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, v8, v0408; GFX10-NEXT: s_or_b32 s10, vcc_lo, s10409; GFX10-NEXT: s_andn2_b32 s9, s9, exec_lo410; GFX10-NEXT: s_and_b32 s12, exec_lo, s4411; GFX10-NEXT: s_or_b32 s9, s9, s12412; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s10413; GFX10-NEXT: s_cbranch_execnz .LBB5_2414; GFX10-NEXT: ; %bb.3: ; %UseInst415; GFX10-NEXT: ; in Loop: Header=BB5_1 Depth=1416; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s10417; GFX10-NEXT: v_mov_b32_e32 v9, s7418; GFX10-NEXT: v_mov_b32_e32 v8, s6419; GFX10-NEXT: v_cmp_lt_u32_e32 vcc_lo, s6, v1420; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, s9421; GFX10-NEXT: s_add_i32 s6, s6, 1422; GFX10-NEXT: v_add_co_u32 v8, s4, v4, v8423; GFX10-NEXT: v_add_co_ci_u32_e64 v9, s4, v5, v9, s4424; GFX10-NEXT: s_or_b32 s8, vcc_lo, s8425; GFX10-NEXT: flat_store_byte v[8:9], v0426; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)427; GFX10-NEXT: s_andn2_b32 exec_lo, exec_lo, s8428; GFX10-NEXT: s_cbranch_execnz .LBB5_1429; GFX10-NEXT: ; %bb.4: ; %exit430; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s8431; GFX10-NEXT: flat_store_byte v[6:7], v0432; GFX10-NEXT: s_waitcnt lgkmcnt(0)433; GFX10-NEXT: s_setpc_b64 s[30:31]434entry:435 %pre.cond = fcmp ogt float %pre.cond.val, 1.0436 br label %OuterHeader437 438OuterHeader:439 %i = phi i32 [ 0, %entry ], [ %i.plus.1, %OuterLatch ]440 %mat.i = getelementptr float, ptr %mat, i32 %i441 %val.i = load float, ptr %mat.i442 br label %InnerHeader443 444InnerHeader:445 %j = phi i32 [ 0, %OuterHeader ], [ %j.plus.1, %InnerHeader ]446 %bool.counter = phi i1 [ %pre.cond, %OuterHeader ], [ %odd.even.counter, %InnerHeader ]447 448 %odd.even.counter = xor i1 %bool.counter, true449 450 %f.j = uitofp i32 %j to float451 %j.plus.1 = add i32 %j, 1452 %cond.j = fcmp ogt float %f.j, %val.i453 br i1 %cond.j, label %UseInst, label %InnerHeader454 455UseInst:456 %mat.oe.i = getelementptr i1, ptr %mat.oe, i32 %i457 ; mat.oe[i] = oddOReven(mat[i])458 store i1 %odd.even.counter, ptr %mat.oe.i459 br label %OuterLatch460 461OuterLatch:462 %cond.i = icmp ult i32 %i, %n.i463 %i.plus.1 = add i32 %i, 1464 br i1 %cond.i, label %exit, label %OuterHeader465 466exit:467 ; arr = oddOReven(mat[n.i - 1])468 store i1 %odd.even.counter, ptr %arr469 ret void470}471