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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GPRIDX %s3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji < %s | FileCheck -check-prefixes=GCN,MOVREL %s4; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10PLUS,GFX10 %s5; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX10PLUS,GFX11 %s6 7define float @dyn_extract_v8f32_const_s_v(i32 %sel) {8; GCN-LABEL: dyn_extract_v8f32_const_s_v:9; GCN: ; %bb.0: ; %entry10; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v012; GCN-NEXT: v_mov_b32_e32 v1, 0x4040000013; GCN-NEXT: v_cndmask_b32_e64 v6, 1.0, 2.0, vcc14; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v015; GCN-NEXT: v_cndmask_b32_e32 v1, v6, v1, vcc16; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v017; GCN-NEXT: v_mov_b32_e32 v2, 0x40a0000018; GCN-NEXT: v_cndmask_b32_e64 v1, v1, 4.0, vcc19; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v020; GCN-NEXT: v_mov_b32_e32 v3, 0x40c0000021; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc22; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v023; GCN-NEXT: v_mov_b32_e32 v4, 0x40e0000024; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc25; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v026; GCN-NEXT: v_mov_b32_e32 v5, 0x4100000027; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc28; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v029; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v5, vcc30; GCN-NEXT: s_setpc_b64 s[30:31]31;32; GFX10PLUS-LABEL: dyn_extract_v8f32_const_s_v:33; GFX10PLUS: ; %bb.0: ; %entry34; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)35; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v036; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc_lo37; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v038; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, 0x40400000, vcc_lo39; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v040; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, 4.0, vcc_lo41; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v042; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, 0x40a00000, vcc_lo43; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v044; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, 0x40c00000, vcc_lo45; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v046; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, 0x40e00000, vcc_lo47; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v048; GFX10PLUS-NEXT: v_cndmask_b32_e64 v0, v1, 0x41000000, vcc_lo49; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]50entry:51 %ext = extractelement <8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, i32 %sel52 ret float %ext53}54 55define amdgpu_ps float @dyn_extract_v8f32_const_s_s(i32 inreg %sel) {56; GPRIDX-LABEL: dyn_extract_v8f32_const_s_s:57; GPRIDX: ; %bb.0: ; %entry58; GPRIDX-NEXT: s_cmp_eq_u32 s2, 159; GPRIDX-NEXT: s_cselect_b32 s0, 2.0, 1.060; GPRIDX-NEXT: s_cmp_eq_u32 s2, 261; GPRIDX-NEXT: s_cselect_b32 s0, 0x40400000, s062; GPRIDX-NEXT: s_cmp_eq_u32 s2, 363; GPRIDX-NEXT: s_cselect_b32 s0, 4.0, s064; GPRIDX-NEXT: s_cmp_eq_u32 s2, 465; GPRIDX-NEXT: s_cselect_b32 s0, 0x40a00000, s066; GPRIDX-NEXT: s_cmp_eq_u32 s2, 567; GPRIDX-NEXT: s_cselect_b32 s0, 0x40c00000, s068; GPRIDX-NEXT: s_cmp_eq_u32 s2, 669; GPRIDX-NEXT: s_cselect_b32 s0, 0x40e00000, s070; GPRIDX-NEXT: s_cmp_eq_u32 s2, 771; GPRIDX-NEXT: s_cselect_b32 s0, 0x41000000, s072; GPRIDX-NEXT: v_mov_b32_e32 v0, s073; GPRIDX-NEXT: ; return to shader part epilog74;75; MOVREL-LABEL: dyn_extract_v8f32_const_s_s:76; MOVREL: ; %bb.0: ; %entry77; MOVREL-NEXT: s_mov_b32 s4, 1.078; MOVREL-NEXT: s_mov_b32 m0, s279; MOVREL-NEXT: s_mov_b32 s11, 0x4100000080; MOVREL-NEXT: s_mov_b32 s10, 0x40e0000081; MOVREL-NEXT: s_mov_b32 s9, 0x40c0000082; MOVREL-NEXT: s_mov_b32 s8, 0x40a0000083; MOVREL-NEXT: s_mov_b32 s7, 4.084; MOVREL-NEXT: s_mov_b32 s6, 0x4040000085; MOVREL-NEXT: s_mov_b32 s5, 2.086; MOVREL-NEXT: s_movrels_b32 s0, s487; MOVREL-NEXT: v_mov_b32_e32 v0, s088; MOVREL-NEXT: ; return to shader part epilog89;90; GFX10PLUS-LABEL: dyn_extract_v8f32_const_s_s:91; GFX10PLUS: ; %bb.0: ; %entry92; GFX10PLUS-NEXT: s_mov_b32 s4, 1.093; GFX10PLUS-NEXT: s_mov_b32 m0, s294; GFX10PLUS-NEXT: s_mov_b32 s11, 0x4100000095; GFX10PLUS-NEXT: s_mov_b32 s10, 0x40e0000096; GFX10PLUS-NEXT: s_mov_b32 s9, 0x40c0000097; GFX10PLUS-NEXT: s_mov_b32 s8, 0x40a0000098; GFX10PLUS-NEXT: s_mov_b32 s7, 4.099; GFX10PLUS-NEXT: s_mov_b32 s6, 0x40400000100; GFX10PLUS-NEXT: s_mov_b32 s5, 2.0101; GFX10PLUS-NEXT: s_movrels_b32 s0, s4102; GFX10PLUS-NEXT: v_mov_b32_e32 v0, s0103; GFX10PLUS-NEXT: ; return to shader part epilog104entry:105 %ext = extractelement <8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, i32 %sel106 ret float %ext107}108 109define amdgpu_ps float @dyn_extract_v8f32_s_v(<8 x float> inreg %vec, i32 %sel) {110; GCN-LABEL: dyn_extract_v8f32_s_v:111; GCN: ; %bb.0: ; %entry112; GCN-NEXT: v_mov_b32_e32 v1, s2113; GCN-NEXT: v_mov_b32_e32 v2, s3114; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0115; GCN-NEXT: v_mov_b32_e32 v3, s4116; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc117; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v0118; GCN-NEXT: v_mov_b32_e32 v4, s5119; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc120; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v0121; GCN-NEXT: v_mov_b32_e32 v5, s6122; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc123; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v0124; GCN-NEXT: v_mov_b32_e32 v6, s7125; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc126; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v0127; GCN-NEXT: v_mov_b32_e32 v7, s8128; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc129; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v0130; GCN-NEXT: v_mov_b32_e32 v8, s9131; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc132; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v0133; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v8, vcc134; GCN-NEXT: ; return to shader part epilog135;136; GFX10PLUS-LABEL: dyn_extract_v8f32_s_v:137; GFX10PLUS: ; %bb.0: ; %entry138; GFX10PLUS-NEXT: v_mov_b32_e32 v1, s3139; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0140; GFX10PLUS-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo141; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v0142; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s4, vcc_lo143; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v0144; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s5, vcc_lo145; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v0146; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo147; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v0148; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s7, vcc_lo149; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v0150; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s8, vcc_lo151; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v0152; GFX10PLUS-NEXT: v_cndmask_b32_e64 v0, v1, s9, vcc_lo153; GFX10PLUS-NEXT: ; return to shader part epilog154entry:155 %ext = extractelement <8 x float> %vec, i32 %sel156 ret float %ext157}158 159define float @dyn_extract_v8f32_v_v(<8 x float> %vec, i32 %sel) {160; GCN-LABEL: dyn_extract_v8f32_v_v:161; GCN: ; %bb.0: ; %entry162; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)163; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v8164; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc165; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v8166; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc167; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v8168; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc169; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v8170; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc171; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v8172; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc173; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v8174; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc175; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v8176; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc177; GCN-NEXT: s_setpc_b64 s[30:31]178;179; GFX10PLUS-LABEL: dyn_extract_v8f32_v_v:180; GFX10PLUS: ; %bb.0: ; %entry181; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)182; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v8183; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo184; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v8185; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo186; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v8187; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo188; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v8189; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo190; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v8191; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo192; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v8193; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo194; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v8195; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo196; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]197entry:198 %ext = extractelement <8 x float> %vec, i32 %sel199 ret float %ext200}201 202define amdgpu_ps float @dyn_extract_v8f32_v_s(<8 x float> %vec, i32 inreg %sel) {203; GPRIDX-LABEL: dyn_extract_v8f32_v_s:204; GPRIDX: ; %bb.0: ; %entry205; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s2, 1206; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc207; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s2, 2208; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc209; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s2, 3210; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc211; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s2, 4212; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc213; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s2, 5214; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc215; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s2, 6216; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc217; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s2, 7218; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc219; GPRIDX-NEXT: ; return to shader part epilog220;221; MOVREL-LABEL: dyn_extract_v8f32_v_s:222; MOVREL: ; %bb.0: ; %entry223; MOVREL-NEXT: s_mov_b32 m0, s2224; MOVREL-NEXT: v_movrels_b32_e32 v0, v0225; MOVREL-NEXT: ; return to shader part epilog226;227; GFX10PLUS-LABEL: dyn_extract_v8f32_v_s:228; GFX10PLUS: ; %bb.0: ; %entry229; GFX10PLUS-NEXT: s_mov_b32 m0, s2230; GFX10PLUS-NEXT: v_movrels_b32_e32 v0, v0231; GFX10PLUS-NEXT: ; return to shader part epilog232entry:233 %ext = extractelement <8 x float> %vec, i32 %sel234 ret float %ext235}236 237define amdgpu_ps float @dyn_extract_v8f32_s_s(<8 x float> inreg %vec, i32 inreg %sel) {238; GPRIDX-LABEL: dyn_extract_v8f32_s_s:239; GPRIDX: ; %bb.0: ; %entry240; GPRIDX-NEXT: s_cmp_eq_u32 s10, 1241; GPRIDX-NEXT: s_cselect_b32 s0, s3, s2242; GPRIDX-NEXT: s_cmp_eq_u32 s10, 2243; GPRIDX-NEXT: s_cselect_b32 s0, s4, s0244; GPRIDX-NEXT: s_cmp_eq_u32 s10, 3245; GPRIDX-NEXT: s_cselect_b32 s0, s5, s0246; GPRIDX-NEXT: s_cmp_eq_u32 s10, 4247; GPRIDX-NEXT: s_cselect_b32 s0, s6, s0248; GPRIDX-NEXT: s_cmp_eq_u32 s10, 5249; GPRIDX-NEXT: s_cselect_b32 s0, s7, s0250; GPRIDX-NEXT: s_cmp_eq_u32 s10, 6251; GPRIDX-NEXT: s_cselect_b32 s0, s8, s0252; GPRIDX-NEXT: s_cmp_eq_u32 s10, 7253; GPRIDX-NEXT: s_cselect_b32 s0, s9, s0254; GPRIDX-NEXT: v_mov_b32_e32 v0, s0255; GPRIDX-NEXT: ; return to shader part epilog256;257; MOVREL-LABEL: dyn_extract_v8f32_s_s:258; MOVREL: ; %bb.0: ; %entry259; MOVREL-NEXT: s_mov_b32 s0, s2260; MOVREL-NEXT: s_mov_b32 m0, s10261; MOVREL-NEXT: s_mov_b32 s1, s3262; MOVREL-NEXT: s_mov_b32 s2, s4263; MOVREL-NEXT: s_mov_b32 s3, s5264; MOVREL-NEXT: s_mov_b32 s4, s6265; MOVREL-NEXT: s_mov_b32 s5, s7266; MOVREL-NEXT: s_mov_b32 s6, s8267; MOVREL-NEXT: s_mov_b32 s7, s9268; MOVREL-NEXT: s_movrels_b32 s0, s0269; MOVREL-NEXT: v_mov_b32_e32 v0, s0270; MOVREL-NEXT: ; return to shader part epilog271;272; GFX10PLUS-LABEL: dyn_extract_v8f32_s_s:273; GFX10PLUS: ; %bb.0: ; %entry274; GFX10PLUS-NEXT: s_mov_b32 s0, s2275; GFX10PLUS-NEXT: s_mov_b32 m0, s10276; GFX10PLUS-NEXT: s_mov_b32 s1, s3277; GFX10PLUS-NEXT: s_mov_b32 s2, s4278; GFX10PLUS-NEXT: s_mov_b32 s3, s5279; GFX10PLUS-NEXT: s_mov_b32 s4, s6280; GFX10PLUS-NEXT: s_mov_b32 s5, s7281; GFX10PLUS-NEXT: s_mov_b32 s6, s8282; GFX10PLUS-NEXT: s_mov_b32 s7, s9283; GFX10PLUS-NEXT: s_movrels_b32 s0, s0284; GFX10PLUS-NEXT: v_mov_b32_e32 v0, s0285; GFX10PLUS-NEXT: ; return to shader part epilog286entry:287 %ext = extractelement <8 x float> %vec, i32 %sel288 ret float %ext289}290 291define i64 @dyn_extract_v8i64_const_s_v(i32 %sel) {292; GCN-LABEL: dyn_extract_v8i64_const_s_v:293; GCN: ; %bb.0: ; %entry294; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)295; GCN-NEXT: s_mov_b64 s[16:17], 2296; GCN-NEXT: s_mov_b64 s[18:19], 1297; GCN-NEXT: s_mov_b64 s[14:15], 3298; GCN-NEXT: v_mov_b32_e32 v1, s18299; GCN-NEXT: v_mov_b32_e32 v2, s19300; GCN-NEXT: v_mov_b32_e32 v3, s16301; GCN-NEXT: v_mov_b32_e32 v4, s17302; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0303; GCN-NEXT: s_mov_b64 s[12:13], 4304; GCN-NEXT: v_mov_b32_e32 v5, s14305; GCN-NEXT: v_mov_b32_e32 v6, s15306; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc307; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc308; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v0309; GCN-NEXT: s_mov_b64 s[10:11], 5310; GCN-NEXT: v_mov_b32_e32 v7, s12311; GCN-NEXT: v_mov_b32_e32 v8, s13312; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc313; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc314; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v0315; GCN-NEXT: s_mov_b64 s[8:9], 6316; GCN-NEXT: v_mov_b32_e32 v9, s10317; GCN-NEXT: v_mov_b32_e32 v10, s11318; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc319; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc320; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v0321; GCN-NEXT: s_mov_b64 s[6:7], 7322; GCN-NEXT: v_mov_b32_e32 v11, s8323; GCN-NEXT: v_mov_b32_e32 v12, s9324; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc325; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc326; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v0327; GCN-NEXT: s_mov_b64 s[4:5], 8328; GCN-NEXT: v_mov_b32_e32 v13, s6329; GCN-NEXT: v_mov_b32_e32 v14, s7330; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc331; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc332; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v0333; GCN-NEXT: v_mov_b32_e32 v15, s4334; GCN-NEXT: v_mov_b32_e32 v16, s5335; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc336; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v14, vcc337; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v0338; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v15, vcc339; GCN-NEXT: v_cndmask_b32_e32 v1, v2, v16, vcc340; GCN-NEXT: s_setpc_b64 s[30:31]341;342; GFX10-LABEL: dyn_extract_v8i64_const_s_v:343; GFX10: ; %bb.0: ; %entry344; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)345; GFX10-NEXT: s_mov_b64 s[4:5], 2346; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0347; GFX10-NEXT: v_mov_b32_e32 v1, s4348; GFX10-NEXT: v_mov_b32_e32 v2, s5349; GFX10-NEXT: s_mov_b64 s[6:7], 1350; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 2, v0351; GFX10-NEXT: s_mov_b64 s[8:9], 3352; GFX10-NEXT: v_cndmask_b32_e32 v1, s6, v1, vcc_lo353; GFX10-NEXT: v_cndmask_b32_e32 v2, s7, v2, vcc_lo354; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v0355; GFX10-NEXT: s_mov_b64 s[6:7], 4356; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s8, s4357; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s9, s4358; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 4, v0359; GFX10-NEXT: s_mov_b64 s[8:9], 5360; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo361; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s7, vcc_lo362; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v0363; GFX10-NEXT: s_mov_b64 s[6:7], 6364; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s8, s4365; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s9, s4366; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 6, v0367; GFX10-NEXT: s_mov_b64 s[8:9], 7368; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo369; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s7, vcc_lo370; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v0371; GFX10-NEXT: s_mov_b64 s[6:7], 8372; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s8, s4373; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s9, s4374; GFX10-NEXT: v_cndmask_b32_e64 v0, v1, s6, vcc_lo375; GFX10-NEXT: v_cndmask_b32_e64 v1, v2, s7, vcc_lo376; GFX10-NEXT: s_setpc_b64 s[30:31]377;378; GFX11-LABEL: dyn_extract_v8i64_const_s_v:379; GFX11: ; %bb.0: ; %entry380; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)381; GFX11-NEXT: s_mov_b64 s[0:1], 2382; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0383; GFX11-NEXT: v_dual_mov_b32 v1, s0 :: v_dual_mov_b32 v2, s1384; GFX11-NEXT: s_mov_b64 s[2:3], 1385; GFX11-NEXT: v_cmp_eq_u32_e64 s0, 2, v0386; GFX11-NEXT: s_mov_b64 s[4:5], 3387; GFX11-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo388; GFX11-NEXT: v_cndmask_b32_e32 v2, s3, v2, vcc_lo389; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v0390; GFX11-NEXT: s_mov_b64 s[2:3], 4391; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s4, s0392; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s5, s0393; GFX11-NEXT: v_cmp_eq_u32_e64 s0, 4, v0394; GFX11-NEXT: s_mov_b64 s[4:5], 5395; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s2, vcc_lo396; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s3, vcc_lo397; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v0398; GFX11-NEXT: s_mov_b64 s[2:3], 6399; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s4, s0400; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s5, s0401; GFX11-NEXT: v_cmp_eq_u32_e64 s0, 6, v0402; GFX11-NEXT: s_mov_b64 s[4:5], 7403; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s2, vcc_lo404; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s3, vcc_lo405; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v0406; GFX11-NEXT: s_mov_b64 s[2:3], 8407; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s4, s0408; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s5, s0409; GFX11-NEXT: v_cndmask_b32_e64 v0, v1, s2, vcc_lo410; GFX11-NEXT: v_cndmask_b32_e64 v1, v2, s3, vcc_lo411; GFX11-NEXT: s_setpc_b64 s[30:31]412entry:413 %ext = extractelement <8 x i64> <i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8>, i32 %sel414 ret i64 %ext415}416 417define amdgpu_ps void @dyn_extract_v8i64_const_s_s(i32 inreg %sel) {418; GPRIDX-LABEL: dyn_extract_v8i64_const_s_s:419; GPRIDX: ; %bb.0: ; %entry420; GPRIDX-NEXT: s_mov_b64 s[4:5], 1421; GPRIDX-NEXT: s_mov_b32 m0, s2422; GPRIDX-NEXT: s_mov_b64 s[18:19], 8423; GPRIDX-NEXT: s_mov_b64 s[16:17], 7424; GPRIDX-NEXT: s_mov_b64 s[14:15], 6425; GPRIDX-NEXT: s_mov_b64 s[12:13], 5426; GPRIDX-NEXT: s_mov_b64 s[10:11], 4427; GPRIDX-NEXT: s_mov_b64 s[8:9], 3428; GPRIDX-NEXT: s_mov_b64 s[6:7], 2429; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[4:5]430; GPRIDX-NEXT: v_mov_b32_e32 v0, s0431; GPRIDX-NEXT: v_mov_b32_e32 v1, s1432; GPRIDX-NEXT: global_store_dwordx2 v[0:1], v[0:1], off433; GPRIDX-NEXT: s_endpgm434;435; MOVREL-LABEL: dyn_extract_v8i64_const_s_s:436; MOVREL: ; %bb.0: ; %entry437; MOVREL-NEXT: s_mov_b64 s[4:5], 1438; MOVREL-NEXT: s_mov_b32 m0, s2439; MOVREL-NEXT: s_mov_b64 s[18:19], 8440; MOVREL-NEXT: s_mov_b64 s[16:17], 7441; MOVREL-NEXT: s_mov_b64 s[14:15], 6442; MOVREL-NEXT: s_mov_b64 s[12:13], 5443; MOVREL-NEXT: s_mov_b64 s[10:11], 4444; MOVREL-NEXT: s_mov_b64 s[8:9], 3445; MOVREL-NEXT: s_mov_b64 s[6:7], 2446; MOVREL-NEXT: s_movrels_b64 s[0:1], s[4:5]447; MOVREL-NEXT: v_mov_b32_e32 v0, s0448; MOVREL-NEXT: v_mov_b32_e32 v1, s1449; MOVREL-NEXT: flat_store_dwordx2 v[0:1], v[0:1]450; MOVREL-NEXT: s_endpgm451;452; GFX10-LABEL: dyn_extract_v8i64_const_s_s:453; GFX10: ; %bb.0: ; %entry454; GFX10-NEXT: s_mov_b64 s[4:5], 1455; GFX10-NEXT: s_mov_b32 m0, s2456; GFX10-NEXT: s_mov_b64 s[18:19], 8457; GFX10-NEXT: s_mov_b64 s[16:17], 7458; GFX10-NEXT: s_mov_b64 s[14:15], 6459; GFX10-NEXT: s_mov_b64 s[12:13], 5460; GFX10-NEXT: s_mov_b64 s[10:11], 4461; GFX10-NEXT: s_mov_b64 s[8:9], 3462; GFX10-NEXT: s_mov_b64 s[6:7], 2463; GFX10-NEXT: s_movrels_b64 s[0:1], s[4:5]464; GFX10-NEXT: v_mov_b32_e32 v0, s0465; GFX10-NEXT: v_mov_b32_e32 v1, s1466; GFX10-NEXT: global_store_dwordx2 v[0:1], v[0:1], off467; GFX10-NEXT: s_endpgm468;469; GFX11-LABEL: dyn_extract_v8i64_const_s_s:470; GFX11: ; %bb.0: ; %entry471; GFX11-NEXT: s_mov_b64 s[4:5], 1472; GFX11-NEXT: s_mov_b32 m0, s2473; GFX11-NEXT: s_mov_b64 s[18:19], 8474; GFX11-NEXT: s_mov_b64 s[16:17], 7475; GFX11-NEXT: s_mov_b64 s[14:15], 6476; GFX11-NEXT: s_mov_b64 s[12:13], 5477; GFX11-NEXT: s_mov_b64 s[10:11], 4478; GFX11-NEXT: s_mov_b64 s[8:9], 3479; GFX11-NEXT: s_mov_b64 s[6:7], 2480; GFX11-NEXT: s_movrels_b64 s[0:1], s[4:5]481; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1482; GFX11-NEXT: global_store_b64 v[0:1], v[0:1], off483; GFX11-NEXT: s_endpgm484entry:485 %ext = extractelement <8 x i64> <i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8>, i32 %sel486 store i64 %ext, ptr addrspace(1) poison487 ret void488}489 490define amdgpu_ps void @dyn_extract_v8i64_s_v(<8 x i64> inreg %vec, i32 %sel) {491; GPRIDX-LABEL: dyn_extract_v8i64_s_v:492; GPRIDX: ; %bb.0: ; %entry493; GPRIDX-NEXT: v_mov_b32_e32 v1, s2494; GPRIDX-NEXT: v_mov_b32_e32 v2, s3495; GPRIDX-NEXT: v_mov_b32_e32 v3, s4496; GPRIDX-NEXT: v_mov_b32_e32 v4, s5497; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0498; GPRIDX-NEXT: v_mov_b32_e32 v5, s6499; GPRIDX-NEXT: v_mov_b32_e32 v6, s7500; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc501; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc502; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v0503; GPRIDX-NEXT: v_mov_b32_e32 v7, s8504; GPRIDX-NEXT: v_mov_b32_e32 v8, s9505; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc506; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc507; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v0508; GPRIDX-NEXT: v_mov_b32_e32 v9, s10509; GPRIDX-NEXT: v_mov_b32_e32 v10, s11510; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc511; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc512; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v0513; GPRIDX-NEXT: v_mov_b32_e32 v11, s12514; GPRIDX-NEXT: v_mov_b32_e32 v12, s13515; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc516; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc517; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v0518; GPRIDX-NEXT: v_mov_b32_e32 v13, s14519; GPRIDX-NEXT: v_mov_b32_e32 v14, s15520; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc521; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc522; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v0523; GPRIDX-NEXT: v_mov_b32_e32 v15, s16524; GPRIDX-NEXT: v_mov_b32_e32 v16, s17525; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc526; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v2, v14, vcc527; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v0528; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v1, v15, vcc529; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v2, v16, vcc530; GPRIDX-NEXT: global_store_dwordx2 v[0:1], v[0:1], off531; GPRIDX-NEXT: s_endpgm532;533; MOVREL-LABEL: dyn_extract_v8i64_s_v:534; MOVREL: ; %bb.0: ; %entry535; MOVREL-NEXT: v_mov_b32_e32 v1, s2536; MOVREL-NEXT: v_mov_b32_e32 v2, s3537; MOVREL-NEXT: v_mov_b32_e32 v3, s4538; MOVREL-NEXT: v_mov_b32_e32 v4, s5539; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0540; MOVREL-NEXT: v_mov_b32_e32 v5, s6541; MOVREL-NEXT: v_mov_b32_e32 v6, s7542; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc543; MOVREL-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc544; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 2, v0545; MOVREL-NEXT: v_mov_b32_e32 v7, s8546; MOVREL-NEXT: v_mov_b32_e32 v8, s9547; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc548; MOVREL-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc549; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 3, v0550; MOVREL-NEXT: v_mov_b32_e32 v9, s10551; MOVREL-NEXT: v_mov_b32_e32 v10, s11552; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc553; MOVREL-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc554; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 4, v0555; MOVREL-NEXT: v_mov_b32_e32 v11, s12556; MOVREL-NEXT: v_mov_b32_e32 v12, s13557; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc558; MOVREL-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc559; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 5, v0560; MOVREL-NEXT: v_mov_b32_e32 v13, s14561; MOVREL-NEXT: v_mov_b32_e32 v14, s15562; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc563; MOVREL-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc564; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 6, v0565; MOVREL-NEXT: v_mov_b32_e32 v15, s16566; MOVREL-NEXT: v_mov_b32_e32 v16, s17567; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc568; MOVREL-NEXT: v_cndmask_b32_e32 v2, v2, v14, vcc569; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 7, v0570; MOVREL-NEXT: v_cndmask_b32_e32 v0, v1, v15, vcc571; MOVREL-NEXT: v_cndmask_b32_e32 v1, v2, v16, vcc572; MOVREL-NEXT: flat_store_dwordx2 v[0:1], v[0:1]573; MOVREL-NEXT: s_endpgm574;575; GFX10-LABEL: dyn_extract_v8i64_s_v:576; GFX10: ; %bb.0: ; %entry577; GFX10-NEXT: v_mov_b32_e32 v1, s4578; GFX10-NEXT: v_mov_b32_e32 v2, s5579; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0580; GFX10-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo581; GFX10-NEXT: v_cndmask_b32_e32 v2, s3, v2, vcc_lo582; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v0583; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo584; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s7, vcc_lo585; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v0586; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s8, vcc_lo587; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s9, vcc_lo588; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v0589; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s10, vcc_lo590; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s11, vcc_lo591; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v0592; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s12, vcc_lo593; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s13, vcc_lo594; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v0595; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s14, vcc_lo596; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s15, vcc_lo597; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v0598; GFX10-NEXT: v_cndmask_b32_e64 v0, v1, s16, vcc_lo599; GFX10-NEXT: v_cndmask_b32_e64 v1, v2, s17, vcc_lo600; GFX10-NEXT: global_store_dwordx2 v[0:1], v[0:1], off601; GFX10-NEXT: s_endpgm602;603; GFX11-LABEL: dyn_extract_v8i64_s_v:604; GFX11: ; %bb.0: ; %entry605; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5606; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0607; GFX11-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo608; GFX11-NEXT: v_cndmask_b32_e32 v2, s3, v2, vcc_lo609; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v0610; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo611; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s7, vcc_lo612; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v0613; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s8, vcc_lo614; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s9, vcc_lo615; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v0616; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s10, vcc_lo617; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s11, vcc_lo618; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v0619; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s12, vcc_lo620; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s13, vcc_lo621; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v0622; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s14, vcc_lo623; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s15, vcc_lo624; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v0625; GFX11-NEXT: v_cndmask_b32_e64 v0, v1, s16, vcc_lo626; GFX11-NEXT: v_cndmask_b32_e64 v1, v2, s17, vcc_lo627; GFX11-NEXT: global_store_b64 v[0:1], v[0:1], off628; GFX11-NEXT: s_endpgm629entry:630 %ext = extractelement <8 x i64> %vec, i32 %sel631 store i64 %ext, ptr addrspace(1) poison632 ret void633}634 635define i64 @dyn_extract_v8i64_v_v(<8 x i64> %vec, i32 %sel) {636; GCN-LABEL: dyn_extract_v8i64_v_v:637; GCN: ; %bb.0: ; %entry638; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)639; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v16640; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc641; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc642; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v16643; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc644; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc645; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v16646; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc647; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc648; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v16649; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc650; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc651; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v16652; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc653; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc654; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v16655; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc656; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc657; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v16658; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc659; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v15, vcc660; GCN-NEXT: s_setpc_b64 s[30:31]661;662; GFX10-LABEL: dyn_extract_v8i64_v_v:663; GFX10: ; %bb.0: ; %entry664; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)665; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v16666; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo667; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc_lo668; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v16669; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo670; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo671; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v16672; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo673; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo674; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v16675; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc_lo676; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo677; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v16678; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo679; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo680; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v16681; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc_lo682; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc_lo683; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v16684; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc_lo685; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v15, vcc_lo686; GFX10-NEXT: s_setpc_b64 s[30:31]687;688; GFX11-LABEL: dyn_extract_v8i64_v_v:689; GFX11: ; %bb.0: ; %entry690; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)691; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v16692; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v2 :: v_dual_cndmask_b32 v1, v1, v3693; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v16694; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v4 :: v_dual_cndmask_b32 v1, v1, v5695; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v16696; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v6 :: v_dual_cndmask_b32 v1, v1, v7697; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v16698; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v8 :: v_dual_cndmask_b32 v1, v1, v9699; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v16700; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v10 :: v_dual_cndmask_b32 v1, v1, v11701; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v16702; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v12 :: v_dual_cndmask_b32 v1, v1, v13703; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v16704; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v14 :: v_dual_cndmask_b32 v1, v1, v15705; GFX11-NEXT: s_setpc_b64 s[30:31]706entry:707 %ext = extractelement <8 x i64> %vec, i32 %sel708 ret i64 %ext709}710 711define amdgpu_ps void @dyn_extract_v8i64_v_s(<8 x i64> %vec, i32 inreg %sel) {712; GPRIDX-LABEL: dyn_extract_v8i64_v_s:713; GPRIDX: ; %bb.0: ; %entry714; GPRIDX-NEXT: s_lshl_b32 s0, s2, 1715; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(SRC0)716; GPRIDX-NEXT: v_mov_b32_e32 v16, v0717; GPRIDX-NEXT: v_mov_b32_e32 v17, v1718; GPRIDX-NEXT: s_set_gpr_idx_off719; GPRIDX-NEXT: global_store_dwordx2 v[0:1], v[16:17], off720; GPRIDX-NEXT: s_endpgm721;722; MOVREL-LABEL: dyn_extract_v8i64_v_s:723; MOVREL: ; %bb.0: ; %entry724; MOVREL-NEXT: s_lshl_b32 m0, s2, 1725; MOVREL-NEXT: v_movrels_b32_e32 v16, v0726; MOVREL-NEXT: v_movrels_b32_e32 v17, v1727; MOVREL-NEXT: flat_store_dwordx2 v[0:1], v[16:17]728; MOVREL-NEXT: s_endpgm729;730; GFX10-LABEL: dyn_extract_v8i64_v_s:731; GFX10: ; %bb.0: ; %entry732; GFX10-NEXT: s_lshl_b32 m0, s2, 1733; GFX10-NEXT: v_movrels_b32_e32 v16, v0734; GFX10-NEXT: v_movrels_b32_e32 v17, v1735; GFX10-NEXT: global_store_dwordx2 v[0:1], v[16:17], off736; GFX10-NEXT: s_endpgm737;738; GFX11-LABEL: dyn_extract_v8i64_v_s:739; GFX11: ; %bb.0: ; %entry740; GFX11-NEXT: s_lshl_b32 m0, s2, 1741; GFX11-NEXT: v_movrels_b32_e32 v16, v0742; GFX11-NEXT: v_movrels_b32_e32 v17, v1743; GFX11-NEXT: global_store_b64 v[0:1], v[16:17], off744; GFX11-NEXT: s_endpgm745entry:746 %ext = extractelement <8 x i64> %vec, i32 %sel747 store i64 %ext, ptr addrspace(1) poison748 ret void749}750 751define amdgpu_ps void @dyn_extract_v8i64_s_s(<8 x i64> inreg %vec, i32 inreg %sel) {752; GPRIDX-LABEL: dyn_extract_v8i64_s_s:753; GPRIDX: ; %bb.0: ; %entry754; GPRIDX-NEXT: s_mov_b32 s0, s2755; GPRIDX-NEXT: s_mov_b32 s1, s3756; GPRIDX-NEXT: s_mov_b32 m0, s18757; GPRIDX-NEXT: s_mov_b32 s2, s4758; GPRIDX-NEXT: s_mov_b32 s3, s5759; GPRIDX-NEXT: s_mov_b32 s4, s6760; GPRIDX-NEXT: s_mov_b32 s5, s7761; GPRIDX-NEXT: s_mov_b32 s6, s8762; GPRIDX-NEXT: s_mov_b32 s7, s9763; GPRIDX-NEXT: s_mov_b32 s8, s10764; GPRIDX-NEXT: s_mov_b32 s9, s11765; GPRIDX-NEXT: s_mov_b32 s10, s12766; GPRIDX-NEXT: s_mov_b32 s11, s13767; GPRIDX-NEXT: s_mov_b32 s12, s14768; GPRIDX-NEXT: s_mov_b32 s13, s15769; GPRIDX-NEXT: s_mov_b32 s14, s16770; GPRIDX-NEXT: s_mov_b32 s15, s17771; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[0:1]772; GPRIDX-NEXT: v_mov_b32_e32 v0, s0773; GPRIDX-NEXT: v_mov_b32_e32 v1, s1774; GPRIDX-NEXT: global_store_dwordx2 v[0:1], v[0:1], off775; GPRIDX-NEXT: s_endpgm776;777; MOVREL-LABEL: dyn_extract_v8i64_s_s:778; MOVREL: ; %bb.0: ; %entry779; MOVREL-NEXT: s_mov_b32 s0, s2780; MOVREL-NEXT: s_mov_b32 s1, s3781; MOVREL-NEXT: s_mov_b32 m0, s18782; MOVREL-NEXT: s_mov_b32 s2, s4783; MOVREL-NEXT: s_mov_b32 s3, s5784; MOVREL-NEXT: s_mov_b32 s4, s6785; MOVREL-NEXT: s_mov_b32 s5, s7786; MOVREL-NEXT: s_mov_b32 s6, s8787; MOVREL-NEXT: s_mov_b32 s7, s9788; MOVREL-NEXT: s_mov_b32 s8, s10789; MOVREL-NEXT: s_mov_b32 s9, s11790; MOVREL-NEXT: s_mov_b32 s10, s12791; MOVREL-NEXT: s_mov_b32 s11, s13792; MOVREL-NEXT: s_mov_b32 s12, s14793; MOVREL-NEXT: s_mov_b32 s13, s15794; MOVREL-NEXT: s_mov_b32 s14, s16795; MOVREL-NEXT: s_mov_b32 s15, s17796; MOVREL-NEXT: s_movrels_b64 s[0:1], s[0:1]797; MOVREL-NEXT: v_mov_b32_e32 v0, s0798; MOVREL-NEXT: v_mov_b32_e32 v1, s1799; MOVREL-NEXT: flat_store_dwordx2 v[0:1], v[0:1]800; MOVREL-NEXT: s_endpgm801;802; GFX10-LABEL: dyn_extract_v8i64_s_s:803; GFX10: ; %bb.0: ; %entry804; GFX10-NEXT: s_mov_b32 s0, s2805; GFX10-NEXT: s_mov_b32 s1, s3806; GFX10-NEXT: s_mov_b32 m0, s18807; GFX10-NEXT: s_mov_b32 s2, s4808; GFX10-NEXT: s_mov_b32 s3, s5809; GFX10-NEXT: s_mov_b32 s4, s6810; GFX10-NEXT: s_mov_b32 s5, s7811; GFX10-NEXT: s_mov_b32 s6, s8812; GFX10-NEXT: s_mov_b32 s7, s9813; GFX10-NEXT: s_mov_b32 s8, s10814; GFX10-NEXT: s_mov_b32 s9, s11815; GFX10-NEXT: s_mov_b32 s10, s12816; GFX10-NEXT: s_mov_b32 s11, s13817; GFX10-NEXT: s_mov_b32 s12, s14818; GFX10-NEXT: s_mov_b32 s13, s15819; GFX10-NEXT: s_mov_b32 s14, s16820; GFX10-NEXT: s_mov_b32 s15, s17821; GFX10-NEXT: s_movrels_b64 s[0:1], s[0:1]822; GFX10-NEXT: v_mov_b32_e32 v0, s0823; GFX10-NEXT: v_mov_b32_e32 v1, s1824; GFX10-NEXT: global_store_dwordx2 v[0:1], v[0:1], off825; GFX10-NEXT: s_endpgm826;827; GFX11-LABEL: dyn_extract_v8i64_s_s:828; GFX11: ; %bb.0: ; %entry829; GFX11-NEXT: s_mov_b32 s0, s2830; GFX11-NEXT: s_mov_b32 s1, s3831; GFX11-NEXT: s_mov_b32 m0, s18832; GFX11-NEXT: s_mov_b32 s2, s4833; GFX11-NEXT: s_mov_b32 s3, s5834; GFX11-NEXT: s_mov_b32 s4, s6835; GFX11-NEXT: s_mov_b32 s5, s7836; GFX11-NEXT: s_mov_b32 s6, s8837; GFX11-NEXT: s_mov_b32 s7, s9838; GFX11-NEXT: s_mov_b32 s8, s10839; GFX11-NEXT: s_mov_b32 s9, s11840; GFX11-NEXT: s_mov_b32 s10, s12841; GFX11-NEXT: s_mov_b32 s11, s13842; GFX11-NEXT: s_mov_b32 s12, s14843; GFX11-NEXT: s_mov_b32 s13, s15844; GFX11-NEXT: s_mov_b32 s14, s16845; GFX11-NEXT: s_mov_b32 s15, s17846; GFX11-NEXT: s_movrels_b64 s[0:1], s[0:1]847; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1848; GFX11-NEXT: global_store_b64 v[0:1], v[0:1], off849; GFX11-NEXT: s_endpgm850entry:851 %ext = extractelement <8 x i64> %vec, i32 %sel852 store i64 %ext, ptr addrspace(1) poison853 ret void854}855 856define amdgpu_ps float @dyn_extract_v8f32_s_s_offset3(<8 x float> inreg %vec, i32 inreg %sel) {857; GPRIDX-LABEL: dyn_extract_v8f32_s_s_offset3:858; GPRIDX: ; %bb.0: ; %entry859; GPRIDX-NEXT: s_add_i32 s10, s10, 3860; GPRIDX-NEXT: s_cmp_eq_u32 s10, 1861; GPRIDX-NEXT: s_cselect_b32 s0, s3, s2862; GPRIDX-NEXT: s_cmp_eq_u32 s10, 2863; GPRIDX-NEXT: s_cselect_b32 s0, s4, s0864; GPRIDX-NEXT: s_cmp_eq_u32 s10, 3865; GPRIDX-NEXT: s_cselect_b32 s0, s5, s0866; GPRIDX-NEXT: s_cmp_eq_u32 s10, 4867; GPRIDX-NEXT: s_cselect_b32 s0, s6, s0868; GPRIDX-NEXT: s_cmp_eq_u32 s10, 5869; GPRIDX-NEXT: s_cselect_b32 s0, s7, s0870; GPRIDX-NEXT: s_cmp_eq_u32 s10, 6871; GPRIDX-NEXT: s_cselect_b32 s0, s8, s0872; GPRIDX-NEXT: s_cmp_eq_u32 s10, 7873; GPRIDX-NEXT: s_cselect_b32 s0, s9, s0874; GPRIDX-NEXT: v_mov_b32_e32 v0, s0875; GPRIDX-NEXT: ; return to shader part epilog876;877; MOVREL-LABEL: dyn_extract_v8f32_s_s_offset3:878; MOVREL: ; %bb.0: ; %entry879; MOVREL-NEXT: s_mov_b32 s0, s2880; MOVREL-NEXT: s_mov_b32 s1, s3881; MOVREL-NEXT: s_mov_b32 s3, s5882; MOVREL-NEXT: s_mov_b32 m0, s10883; MOVREL-NEXT: s_mov_b32 s2, s4884; MOVREL-NEXT: s_mov_b32 s4, s6885; MOVREL-NEXT: s_mov_b32 s5, s7886; MOVREL-NEXT: s_mov_b32 s6, s8887; MOVREL-NEXT: s_mov_b32 s7, s9888; MOVREL-NEXT: s_movrels_b32 s0, s3889; MOVREL-NEXT: v_mov_b32_e32 v0, s0890; MOVREL-NEXT: ; return to shader part epilog891;892; GFX10PLUS-LABEL: dyn_extract_v8f32_s_s_offset3:893; GFX10PLUS: ; %bb.0: ; %entry894; GFX10PLUS-NEXT: s_mov_b32 s1, s3895; GFX10PLUS-NEXT: s_mov_b32 s3, s5896; GFX10PLUS-NEXT: s_mov_b32 m0, s10897; GFX10PLUS-NEXT: s_mov_b32 s0, s2898; GFX10PLUS-NEXT: s_mov_b32 s2, s4899; GFX10PLUS-NEXT: s_mov_b32 s4, s6900; GFX10PLUS-NEXT: s_mov_b32 s5, s7901; GFX10PLUS-NEXT: s_mov_b32 s6, s8902; GFX10PLUS-NEXT: s_mov_b32 s7, s9903; GFX10PLUS-NEXT: s_movrels_b32 s0, s3904; GFX10PLUS-NEXT: v_mov_b32_e32 v0, s0905; GFX10PLUS-NEXT: ; return to shader part epilog906entry:907 %add = add i32 %sel, 3908 %ext = extractelement <8 x float> %vec, i32 %add909 ret float %ext910}911 912define float @dyn_extract_v8f32_v_v_offset3(<8 x float> %vec, i32 %sel) {913; GPRIDX-LABEL: dyn_extract_v8f32_v_v_offset3:914; GPRIDX: ; %bb.0: ; %entry915; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)916; GPRIDX-NEXT: v_add_u32_e32 v8, 3, v8917; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v8918; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc919; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v8920; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc921; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v8922; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc923; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v8924; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc925; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v8926; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc927; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v8928; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc929; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v8930; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc931; GPRIDX-NEXT: s_setpc_b64 s[30:31]932;933; MOVREL-LABEL: dyn_extract_v8f32_v_v_offset3:934; MOVREL: ; %bb.0: ; %entry935; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)936; MOVREL-NEXT: v_add_u32_e32 v8, vcc, 3, v8937; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 1, v8938; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc939; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 2, v8940; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc941; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 3, v8942; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc943; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 4, v8944; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc945; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 5, v8946; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc947; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 6, v8948; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc949; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 7, v8950; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc951; MOVREL-NEXT: s_setpc_b64 s[30:31]952;953; GFX10PLUS-LABEL: dyn_extract_v8f32_v_v_offset3:954; GFX10PLUS: ; %bb.0: ; %entry955; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)956; GFX10PLUS-NEXT: v_add_nc_u32_e32 v8, 3, v8957; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v8958; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo959; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v8960; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo961; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v8962; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo963; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v8964; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo965; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v8966; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo967; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v8968; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo969; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v8970; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo971; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]972entry:973 %add = add i32 %sel, 3974 %ext = extractelement <8 x float> %vec, i32 %add975 ret float %ext976}977 978define amdgpu_ps double @dyn_extract_v8f64_s_s_offset1(<8 x double> inreg %vec, i32 inreg %sel) {979; GCN-LABEL: dyn_extract_v8f64_s_s_offset1:980; GCN: ; %bb.0: ; %entry981; GCN-NEXT: s_mov_b32 s0, s2982; GCN-NEXT: s_mov_b32 s1, s3983; GCN-NEXT: s_mov_b32 s2, s4984; GCN-NEXT: s_mov_b32 s3, s5985; GCN-NEXT: s_mov_b32 m0, s18986; GCN-NEXT: s_mov_b32 s4, s6987; GCN-NEXT: s_mov_b32 s5, s7988; GCN-NEXT: s_mov_b32 s6, s8989; GCN-NEXT: s_mov_b32 s7, s9990; GCN-NEXT: s_mov_b32 s8, s10991; GCN-NEXT: s_mov_b32 s9, s11992; GCN-NEXT: s_mov_b32 s10, s12993; GCN-NEXT: s_mov_b32 s11, s13994; GCN-NEXT: s_mov_b32 s12, s14995; GCN-NEXT: s_mov_b32 s13, s15996; GCN-NEXT: s_mov_b32 s14, s16997; GCN-NEXT: s_mov_b32 s15, s17998; GCN-NEXT: s_movrels_b64 s[0:1], s[2:3]999; GCN-NEXT: ; return to shader part epilog1000;1001; GFX10PLUS-LABEL: dyn_extract_v8f64_s_s_offset1:1002; GFX10PLUS: ; %bb.0: ; %entry1003; GFX10PLUS-NEXT: s_mov_b32 s0, s21004; GFX10PLUS-NEXT: s_mov_b32 s1, s31005; GFX10PLUS-NEXT: s_mov_b32 s2, s41006; GFX10PLUS-NEXT: s_mov_b32 s3, s51007; GFX10PLUS-NEXT: s_mov_b32 m0, s181008; GFX10PLUS-NEXT: s_mov_b32 s4, s61009; GFX10PLUS-NEXT: s_mov_b32 s5, s71010; GFX10PLUS-NEXT: s_mov_b32 s6, s81011; GFX10PLUS-NEXT: s_mov_b32 s7, s91012; GFX10PLUS-NEXT: s_mov_b32 s8, s101013; GFX10PLUS-NEXT: s_mov_b32 s9, s111014; GFX10PLUS-NEXT: s_mov_b32 s10, s121015; GFX10PLUS-NEXT: s_mov_b32 s11, s131016; GFX10PLUS-NEXT: s_mov_b32 s12, s141017; GFX10PLUS-NEXT: s_mov_b32 s13, s151018; GFX10PLUS-NEXT: s_mov_b32 s14, s161019; GFX10PLUS-NEXT: s_mov_b32 s15, s171020; GFX10PLUS-NEXT: s_movrels_b64 s[0:1], s[2:3]1021; GFX10PLUS-NEXT: ; return to shader part epilog1022entry:1023 %add = add i32 %sel, 11024 %ext = extractelement <8 x double> %vec, i32 %add1025 ret double %ext1026}1027 1028define amdgpu_ps double @dyn_extract_v8f64_s_s_offset2(<8 x double> inreg %vec, i32 inreg %sel) {1029; GCN-LABEL: dyn_extract_v8f64_s_s_offset2:1030; GCN: ; %bb.0: ; %entry1031; GCN-NEXT: s_mov_b32 s0, s21032; GCN-NEXT: s_mov_b32 s1, s31033; GCN-NEXT: s_mov_b32 s2, s41034; GCN-NEXT: s_mov_b32 s3, s51035; GCN-NEXT: s_mov_b32 s4, s61036; GCN-NEXT: s_mov_b32 s5, s71037; GCN-NEXT: s_mov_b32 m0, s181038; GCN-NEXT: s_mov_b32 s6, s81039; GCN-NEXT: s_mov_b32 s7, s91040; GCN-NEXT: s_mov_b32 s8, s101041; GCN-NEXT: s_mov_b32 s9, s111042; GCN-NEXT: s_mov_b32 s10, s121043; GCN-NEXT: s_mov_b32 s11, s131044; GCN-NEXT: s_mov_b32 s12, s141045; GCN-NEXT: s_mov_b32 s13, s151046; GCN-NEXT: s_mov_b32 s14, s161047; GCN-NEXT: s_mov_b32 s15, s171048; GCN-NEXT: s_movrels_b64 s[0:1], s[4:5]1049; GCN-NEXT: ; return to shader part epilog1050;1051; GFX10PLUS-LABEL: dyn_extract_v8f64_s_s_offset2:1052; GFX10PLUS: ; %bb.0: ; %entry1053; GFX10PLUS-NEXT: s_mov_b32 s0, s21054; GFX10PLUS-NEXT: s_mov_b32 s1, s31055; GFX10PLUS-NEXT: s_mov_b32 s2, s41056; GFX10PLUS-NEXT: s_mov_b32 s3, s51057; GFX10PLUS-NEXT: s_mov_b32 s4, s61058; GFX10PLUS-NEXT: s_mov_b32 s5, s71059; GFX10PLUS-NEXT: s_mov_b32 m0, s181060; GFX10PLUS-NEXT: s_mov_b32 s6, s81061; GFX10PLUS-NEXT: s_mov_b32 s7, s91062; GFX10PLUS-NEXT: s_mov_b32 s8, s101063; GFX10PLUS-NEXT: s_mov_b32 s9, s111064; GFX10PLUS-NEXT: s_mov_b32 s10, s121065; GFX10PLUS-NEXT: s_mov_b32 s11, s131066; GFX10PLUS-NEXT: s_mov_b32 s12, s141067; GFX10PLUS-NEXT: s_mov_b32 s13, s151068; GFX10PLUS-NEXT: s_mov_b32 s14, s161069; GFX10PLUS-NEXT: s_mov_b32 s15, s171070; GFX10PLUS-NEXT: s_movrels_b64 s[0:1], s[4:5]1071; GFX10PLUS-NEXT: ; return to shader part epilog1072entry:1073 %add = add i32 %sel, 21074 %ext = extractelement <8 x double> %vec, i32 %add1075 ret double %ext1076}1077 1078define amdgpu_ps double @dyn_extract_v8f64_s_s_offset3(<8 x double> inreg %vec, i32 inreg %sel) {1079; GCN-LABEL: dyn_extract_v8f64_s_s_offset3:1080; GCN: ; %bb.0: ; %entry1081; GCN-NEXT: s_mov_b32 s0, s21082; GCN-NEXT: s_mov_b32 s1, s31083; GCN-NEXT: s_mov_b32 s2, s41084; GCN-NEXT: s_mov_b32 s3, s51085; GCN-NEXT: s_mov_b32 s4, s61086; GCN-NEXT: s_mov_b32 s5, s71087; GCN-NEXT: s_mov_b32 s6, s81088; GCN-NEXT: s_mov_b32 s7, s91089; GCN-NEXT: s_mov_b32 m0, s181090; GCN-NEXT: s_mov_b32 s8, s101091; GCN-NEXT: s_mov_b32 s9, s111092; GCN-NEXT: s_mov_b32 s10, s121093; GCN-NEXT: s_mov_b32 s11, s131094; GCN-NEXT: s_mov_b32 s12, s141095; GCN-NEXT: s_mov_b32 s13, s151096; GCN-NEXT: s_mov_b32 s14, s161097; GCN-NEXT: s_mov_b32 s15, s171098; GCN-NEXT: s_movrels_b64 s[0:1], s[6:7]1099; GCN-NEXT: ; return to shader part epilog1100;1101; GFX10PLUS-LABEL: dyn_extract_v8f64_s_s_offset3:1102; GFX10PLUS: ; %bb.0: ; %entry1103; GFX10PLUS-NEXT: s_mov_b32 s0, s21104; GFX10PLUS-NEXT: s_mov_b32 s1, s31105; GFX10PLUS-NEXT: s_mov_b32 s2, s41106; GFX10PLUS-NEXT: s_mov_b32 s3, s51107; GFX10PLUS-NEXT: s_mov_b32 s4, s61108; GFX10PLUS-NEXT: s_mov_b32 s5, s71109; GFX10PLUS-NEXT: s_mov_b32 s6, s81110; GFX10PLUS-NEXT: s_mov_b32 s7, s91111; GFX10PLUS-NEXT: s_mov_b32 m0, s181112; GFX10PLUS-NEXT: s_mov_b32 s8, s101113; GFX10PLUS-NEXT: s_mov_b32 s9, s111114; GFX10PLUS-NEXT: s_mov_b32 s10, s121115; GFX10PLUS-NEXT: s_mov_b32 s11, s131116; GFX10PLUS-NEXT: s_mov_b32 s12, s141117; GFX10PLUS-NEXT: s_mov_b32 s13, s151118; GFX10PLUS-NEXT: s_mov_b32 s14, s161119; GFX10PLUS-NEXT: s_mov_b32 s15, s171120; GFX10PLUS-NEXT: s_movrels_b64 s[0:1], s[6:7]1121; GFX10PLUS-NEXT: ; return to shader part epilog1122entry:1123 %add = add i32 %sel, 31124 %ext = extractelement <8 x double> %vec, i32 %add1125 ret double %ext1126}1127 1128define amdgpu_ps double @dyn_extract_v8f64_s_s_offset4(<8 x double> inreg %vec, i32 inreg %sel) {1129; GCN-LABEL: dyn_extract_v8f64_s_s_offset4:1130; GCN: ; %bb.0: ; %entry1131; GCN-NEXT: s_mov_b32 s0, s21132; GCN-NEXT: s_mov_b32 s1, s31133; GCN-NEXT: s_mov_b32 s2, s41134; GCN-NEXT: s_mov_b32 s3, s51135; GCN-NEXT: s_mov_b32 s4, s61136; GCN-NEXT: s_mov_b32 s5, s71137; GCN-NEXT: s_mov_b32 s6, s81138; GCN-NEXT: s_mov_b32 s7, s91139; GCN-NEXT: s_mov_b32 s8, s101140; GCN-NEXT: s_mov_b32 s9, s111141; GCN-NEXT: s_mov_b32 m0, s181142; GCN-NEXT: s_mov_b32 s10, s121143; GCN-NEXT: s_mov_b32 s11, s131144; GCN-NEXT: s_mov_b32 s12, s141145; GCN-NEXT: s_mov_b32 s13, s151146; GCN-NEXT: s_mov_b32 s14, s161147; GCN-NEXT: s_mov_b32 s15, s171148; GCN-NEXT: s_movrels_b64 s[0:1], s[8:9]1149; GCN-NEXT: ; return to shader part epilog1150;1151; GFX10PLUS-LABEL: dyn_extract_v8f64_s_s_offset4:1152; GFX10PLUS: ; %bb.0: ; %entry1153; GFX10PLUS-NEXT: s_mov_b32 s0, s21154; GFX10PLUS-NEXT: s_mov_b32 s1, s31155; GFX10PLUS-NEXT: s_mov_b32 s2, s41156; GFX10PLUS-NEXT: s_mov_b32 s3, s51157; GFX10PLUS-NEXT: s_mov_b32 s4, s61158; GFX10PLUS-NEXT: s_mov_b32 s5, s71159; GFX10PLUS-NEXT: s_mov_b32 s6, s81160; GFX10PLUS-NEXT: s_mov_b32 s7, s91161; GFX10PLUS-NEXT: s_mov_b32 s8, s101162; GFX10PLUS-NEXT: s_mov_b32 s9, s111163; GFX10PLUS-NEXT: s_mov_b32 m0, s181164; GFX10PLUS-NEXT: s_mov_b32 s10, s121165; GFX10PLUS-NEXT: s_mov_b32 s11, s131166; GFX10PLUS-NEXT: s_mov_b32 s12, s141167; GFX10PLUS-NEXT: s_mov_b32 s13, s151168; GFX10PLUS-NEXT: s_mov_b32 s14, s161169; GFX10PLUS-NEXT: s_mov_b32 s15, s171170; GFX10PLUS-NEXT: s_movrels_b64 s[0:1], s[8:9]1171; GFX10PLUS-NEXT: ; return to shader part epilog1172entry:1173 %add = add i32 %sel, 41174 %ext = extractelement <8 x double> %vec, i32 %add1175 ret double %ext1176}1177 1178define amdgpu_ps double @dyn_extract_v8f64_s_s_offset5(<8 x double> inreg %vec, i32 inreg %sel) {1179; GCN-LABEL: dyn_extract_v8f64_s_s_offset5:1180; GCN: ; %bb.0: ; %entry1181; GCN-NEXT: s_mov_b32 s0, s21182; GCN-NEXT: s_mov_b32 s1, s31183; GCN-NEXT: s_mov_b32 s2, s41184; GCN-NEXT: s_mov_b32 s3, s51185; GCN-NEXT: s_mov_b32 s4, s61186; GCN-NEXT: s_mov_b32 s5, s71187; GCN-NEXT: s_mov_b32 s6, s81188; GCN-NEXT: s_mov_b32 s7, s91189; GCN-NEXT: s_mov_b32 s8, s101190; GCN-NEXT: s_mov_b32 s9, s111191; GCN-NEXT: s_mov_b32 s10, s121192; GCN-NEXT: s_mov_b32 s11, s131193; GCN-NEXT: s_mov_b32 m0, s181194; GCN-NEXT: s_mov_b32 s12, s141195; GCN-NEXT: s_mov_b32 s13, s151196; GCN-NEXT: s_mov_b32 s14, s161197; GCN-NEXT: s_mov_b32 s15, s171198; GCN-NEXT: s_movrels_b64 s[0:1], s[10:11]1199; GCN-NEXT: ; return to shader part epilog1200;1201; GFX10PLUS-LABEL: dyn_extract_v8f64_s_s_offset5:1202; GFX10PLUS: ; %bb.0: ; %entry1203; GFX10PLUS-NEXT: s_mov_b32 s0, s21204; GFX10PLUS-NEXT: s_mov_b32 s1, s31205; GFX10PLUS-NEXT: s_mov_b32 s2, s41206; GFX10PLUS-NEXT: s_mov_b32 s3, s51207; GFX10PLUS-NEXT: s_mov_b32 s4, s61208; GFX10PLUS-NEXT: s_mov_b32 s5, s71209; GFX10PLUS-NEXT: s_mov_b32 s6, s81210; GFX10PLUS-NEXT: s_mov_b32 s7, s91211; GFX10PLUS-NEXT: s_mov_b32 s8, s101212; GFX10PLUS-NEXT: s_mov_b32 s9, s111213; GFX10PLUS-NEXT: s_mov_b32 s10, s121214; GFX10PLUS-NEXT: s_mov_b32 s11, s131215; GFX10PLUS-NEXT: s_mov_b32 m0, s181216; GFX10PLUS-NEXT: s_mov_b32 s12, s141217; GFX10PLUS-NEXT: s_mov_b32 s13, s151218; GFX10PLUS-NEXT: s_mov_b32 s14, s161219; GFX10PLUS-NEXT: s_mov_b32 s15, s171220; GFX10PLUS-NEXT: s_movrels_b64 s[0:1], s[10:11]1221; GFX10PLUS-NEXT: ; return to shader part epilog1222entry:1223 %add = add i32 %sel, 51224 %ext = extractelement <8 x double> %vec, i32 %add1225 ret double %ext1226}1227 1228define amdgpu_ps double @dyn_extract_v8f64_s_s_offset6(<8 x double> inreg %vec, i32 inreg %sel) {1229; GCN-LABEL: dyn_extract_v8f64_s_s_offset6:1230; GCN: ; %bb.0: ; %entry1231; GCN-NEXT: s_mov_b32 s0, s21232; GCN-NEXT: s_mov_b32 s1, s31233; GCN-NEXT: s_mov_b32 s2, s41234; GCN-NEXT: s_mov_b32 s3, s51235; GCN-NEXT: s_mov_b32 s4, s61236; GCN-NEXT: s_mov_b32 s5, s71237; GCN-NEXT: s_mov_b32 s6, s81238; GCN-NEXT: s_mov_b32 s7, s91239; GCN-NEXT: s_mov_b32 s8, s101240; GCN-NEXT: s_mov_b32 s9, s111241; GCN-NEXT: s_mov_b32 s10, s121242; GCN-NEXT: s_mov_b32 s11, s131243; GCN-NEXT: s_mov_b32 s12, s141244; GCN-NEXT: s_mov_b32 s13, s151245; GCN-NEXT: s_mov_b32 m0, s181246; GCN-NEXT: s_mov_b32 s14, s161247; GCN-NEXT: s_mov_b32 s15, s171248; GCN-NEXT: s_movrels_b64 s[0:1], s[12:13]1249; GCN-NEXT: ; return to shader part epilog1250;1251; GFX10PLUS-LABEL: dyn_extract_v8f64_s_s_offset6:1252; GFX10PLUS: ; %bb.0: ; %entry1253; GFX10PLUS-NEXT: s_mov_b32 s0, s21254; GFX10PLUS-NEXT: s_mov_b32 s1, s31255; GFX10PLUS-NEXT: s_mov_b32 s2, s41256; GFX10PLUS-NEXT: s_mov_b32 s3, s51257; GFX10PLUS-NEXT: s_mov_b32 s4, s61258; GFX10PLUS-NEXT: s_mov_b32 s5, s71259; GFX10PLUS-NEXT: s_mov_b32 s6, s81260; GFX10PLUS-NEXT: s_mov_b32 s7, s91261; GFX10PLUS-NEXT: s_mov_b32 s8, s101262; GFX10PLUS-NEXT: s_mov_b32 s9, s111263; GFX10PLUS-NEXT: s_mov_b32 s10, s121264; GFX10PLUS-NEXT: s_mov_b32 s11, s131265; GFX10PLUS-NEXT: s_mov_b32 s12, s141266; GFX10PLUS-NEXT: s_mov_b32 s13, s151267; GFX10PLUS-NEXT: s_mov_b32 m0, s181268; GFX10PLUS-NEXT: s_mov_b32 s14, s161269; GFX10PLUS-NEXT: s_mov_b32 s15, s171270; GFX10PLUS-NEXT: s_movrels_b64 s[0:1], s[12:13]1271; GFX10PLUS-NEXT: ; return to shader part epilog1272entry:1273 %add = add i32 %sel, 61274 %ext = extractelement <8 x double> %vec, i32 %add1275 ret double %ext1276}1277 1278define amdgpu_ps double @dyn_extract_v8f64_s_s_offset7(<8 x double> inreg %vec, i32 inreg %sel) {1279; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset7:1280; GPRIDX: ; %bb.0: ; %entry1281; GPRIDX-NEXT: s_mov_b32 s0, s21282; GPRIDX-NEXT: s_mov_b32 s1, s31283; GPRIDX-NEXT: s_mov_b32 s2, s41284; GPRIDX-NEXT: s_mov_b32 s3, s51285; GPRIDX-NEXT: s_mov_b32 s4, s61286; GPRIDX-NEXT: s_mov_b32 s5, s71287; GPRIDX-NEXT: s_mov_b32 s6, s81288; GPRIDX-NEXT: s_mov_b32 s7, s91289; GPRIDX-NEXT: s_mov_b32 s8, s101290; GPRIDX-NEXT: s_mov_b32 s9, s111291; GPRIDX-NEXT: s_mov_b32 s10, s121292; GPRIDX-NEXT: s_mov_b32 s11, s131293; GPRIDX-NEXT: s_mov_b32 s12, s141294; GPRIDX-NEXT: s_mov_b32 s13, s151295; GPRIDX-NEXT: s_mov_b32 s14, s161296; GPRIDX-NEXT: s_mov_b32 s15, s171297; GPRIDX-NEXT: s_mov_b32 m0, s181298; GPRIDX-NEXT: s_nop 01299; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[14:15]1300; GPRIDX-NEXT: ; return to shader part epilog1301;1302; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset7:1303; MOVREL: ; %bb.0: ; %entry1304; MOVREL-NEXT: s_mov_b32 s0, s21305; MOVREL-NEXT: s_mov_b32 s1, s31306; MOVREL-NEXT: s_mov_b32 s2, s41307; MOVREL-NEXT: s_mov_b32 s3, s51308; MOVREL-NEXT: s_mov_b32 s4, s61309; MOVREL-NEXT: s_mov_b32 s5, s71310; MOVREL-NEXT: s_mov_b32 s6, s81311; MOVREL-NEXT: s_mov_b32 s7, s91312; MOVREL-NEXT: s_mov_b32 s8, s101313; MOVREL-NEXT: s_mov_b32 s9, s111314; MOVREL-NEXT: s_mov_b32 s10, s121315; MOVREL-NEXT: s_mov_b32 s11, s131316; MOVREL-NEXT: s_mov_b32 s12, s141317; MOVREL-NEXT: s_mov_b32 s13, s151318; MOVREL-NEXT: s_mov_b32 s14, s161319; MOVREL-NEXT: s_mov_b32 s15, s171320; MOVREL-NEXT: s_mov_b32 m0, s181321; MOVREL-NEXT: s_movrels_b64 s[0:1], s[14:15]1322; MOVREL-NEXT: ; return to shader part epilog1323;1324; GFX10PLUS-LABEL: dyn_extract_v8f64_s_s_offset7:1325; GFX10PLUS: ; %bb.0: ; %entry1326; GFX10PLUS-NEXT: s_mov_b32 s0, s21327; GFX10PLUS-NEXT: s_mov_b32 s1, s31328; GFX10PLUS-NEXT: s_mov_b32 s2, s41329; GFX10PLUS-NEXT: s_mov_b32 s3, s51330; GFX10PLUS-NEXT: s_mov_b32 s4, s61331; GFX10PLUS-NEXT: s_mov_b32 s5, s71332; GFX10PLUS-NEXT: s_mov_b32 s6, s81333; GFX10PLUS-NEXT: s_mov_b32 s7, s91334; GFX10PLUS-NEXT: s_mov_b32 s8, s101335; GFX10PLUS-NEXT: s_mov_b32 s9, s111336; GFX10PLUS-NEXT: s_mov_b32 s10, s121337; GFX10PLUS-NEXT: s_mov_b32 s11, s131338; GFX10PLUS-NEXT: s_mov_b32 s12, s141339; GFX10PLUS-NEXT: s_mov_b32 s13, s151340; GFX10PLUS-NEXT: s_mov_b32 s14, s161341; GFX10PLUS-NEXT: s_mov_b32 s15, s171342; GFX10PLUS-NEXT: s_mov_b32 m0, s181343; GFX10PLUS-NEXT: s_movrels_b64 s[0:1], s[14:15]1344; GFX10PLUS-NEXT: ; return to shader part epilog1345entry:1346 %add = add i32 %sel, 71347 %ext = extractelement <8 x double> %vec, i32 %add1348 ret double %ext1349}1350 1351define amdgpu_ps double @dyn_extract_v8f64_s_s_offsetm1(<8 x double> inreg %vec, i32 inreg %sel) {1352; GCN-LABEL: dyn_extract_v8f64_s_s_offsetm1:1353; GCN: ; %bb.0: ; %entry1354; GCN-NEXT: s_mov_b32 s0, s21355; GCN-NEXT: s_mov_b32 s1, s31356; GCN-NEXT: s_add_i32 m0, s18, -11357; GCN-NEXT: s_mov_b32 s2, s41358; GCN-NEXT: s_mov_b32 s3, s51359; GCN-NEXT: s_mov_b32 s4, s61360; GCN-NEXT: s_mov_b32 s5, s71361; GCN-NEXT: s_mov_b32 s6, s81362; GCN-NEXT: s_mov_b32 s7, s91363; GCN-NEXT: s_mov_b32 s8, s101364; GCN-NEXT: s_mov_b32 s9, s111365; GCN-NEXT: s_mov_b32 s10, s121366; GCN-NEXT: s_mov_b32 s11, s131367; GCN-NEXT: s_mov_b32 s12, s141368; GCN-NEXT: s_mov_b32 s13, s151369; GCN-NEXT: s_mov_b32 s14, s161370; GCN-NEXT: s_mov_b32 s15, s171371; GCN-NEXT: s_movrels_b64 s[0:1], s[0:1]1372; GCN-NEXT: ; return to shader part epilog1373;1374; GFX10PLUS-LABEL: dyn_extract_v8f64_s_s_offsetm1:1375; GFX10PLUS: ; %bb.0: ; %entry1376; GFX10PLUS-NEXT: s_mov_b32 s0, s21377; GFX10PLUS-NEXT: s_mov_b32 s1, s31378; GFX10PLUS-NEXT: s_add_i32 m0, s18, -11379; GFX10PLUS-NEXT: s_mov_b32 s2, s41380; GFX10PLUS-NEXT: s_mov_b32 s3, s51381; GFX10PLUS-NEXT: s_mov_b32 s4, s61382; GFX10PLUS-NEXT: s_mov_b32 s5, s71383; GFX10PLUS-NEXT: s_mov_b32 s6, s81384; GFX10PLUS-NEXT: s_mov_b32 s7, s91385; GFX10PLUS-NEXT: s_mov_b32 s8, s101386; GFX10PLUS-NEXT: s_mov_b32 s9, s111387; GFX10PLUS-NEXT: s_mov_b32 s10, s121388; GFX10PLUS-NEXT: s_mov_b32 s11, s131389; GFX10PLUS-NEXT: s_mov_b32 s12, s141390; GFX10PLUS-NEXT: s_mov_b32 s13, s151391; GFX10PLUS-NEXT: s_mov_b32 s14, s161392; GFX10PLUS-NEXT: s_mov_b32 s15, s171393; GFX10PLUS-NEXT: s_movrels_b64 s[0:1], s[0:1]1394; GFX10PLUS-NEXT: ; return to shader part epilog1395entry:1396 %add = add i32 %sel, -11397 %ext = extractelement <8 x double> %vec, i32 %add1398 ret double %ext1399}1400 1401define double @dyn_extract_v8f64_v_v_offset3(<8 x double> %vec, i32 %sel) {1402; GPRIDX-LABEL: dyn_extract_v8f64_v_v_offset3:1403; GPRIDX: ; %bb.0: ; %entry1404; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1405; GPRIDX-NEXT: v_add_u32_e32 v16, 3, v161406; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v161407; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1408; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc1409; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v161410; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc1411; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc1412; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v161413; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc1414; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc1415; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v161416; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc1417; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc1418; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v161419; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc1420; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc1421; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v161422; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc1423; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc1424; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v161425; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc1426; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v15, vcc1427; GPRIDX-NEXT: s_setpc_b64 s[30:31]1428;1429; MOVREL-LABEL: dyn_extract_v8f64_v_v_offset3:1430; MOVREL: ; %bb.0: ; %entry1431; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1432; MOVREL-NEXT: v_add_u32_e32 v16, vcc, 3, v161433; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 1, v161434; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1435; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc1436; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 2, v161437; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc1438; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc1439; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 3, v161440; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc1441; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc1442; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 4, v161443; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc1444; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc1445; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 5, v161446; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc1447; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc1448; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 6, v161449; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc1450; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc1451; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 7, v161452; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc1453; MOVREL-NEXT: v_cndmask_b32_e32 v1, v1, v15, vcc1454; MOVREL-NEXT: s_setpc_b64 s[30:31]1455;1456; GFX10-LABEL: dyn_extract_v8f64_v_v_offset3:1457; GFX10: ; %bb.0: ; %entry1458; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1459; GFX10-NEXT: v_add_nc_u32_e32 v16, 3, v161460; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v161461; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo1462; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc_lo1463; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v161464; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo1465; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo1466; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v161467; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo1468; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo1469; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v161470; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc_lo1471; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo1472; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v161473; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo1474; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo1475; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v161476; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc_lo1477; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc_lo1478; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v161479; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc_lo1480; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v15, vcc_lo1481; GFX10-NEXT: s_setpc_b64 s[30:31]1482;1483; GFX11-LABEL: dyn_extract_v8f64_v_v_offset3:1484; GFX11: ; %bb.0: ; %entry1485; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1486; GFX11-NEXT: v_add_nc_u32_e32 v16, 3, v161487; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v161488; GFX11-NEXT: v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v0, v0, v21489; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v161490; GFX11-NEXT: v_dual_cndmask_b32 v1, v1, v5 :: v_dual_cndmask_b32 v0, v0, v41491; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v161492; GFX11-NEXT: v_dual_cndmask_b32 v1, v1, v7 :: v_dual_cndmask_b32 v0, v0, v61493; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v161494; GFX11-NEXT: v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v81495; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v161496; GFX11-NEXT: v_dual_cndmask_b32 v1, v1, v11 :: v_dual_cndmask_b32 v0, v0, v101497; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v161498; GFX11-NEXT: v_dual_cndmask_b32 v1, v1, v13 :: v_dual_cndmask_b32 v0, v0, v121499; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v161500; GFX11-NEXT: v_dual_cndmask_b32 v1, v1, v15 :: v_dual_cndmask_b32 v0, v0, v141501; GFX11-NEXT: s_setpc_b64 s[30:31]1502entry:1503 %add = add i32 %sel, 31504 %ext = extractelement <8 x double> %vec, i32 %add1505 ret double %ext1506}1507 1508define ptr addrspace(3) @dyn_extract_v8p3_v_v(<8 x ptr addrspace(3)> %vec, i32 %idx) {1509; GCN-LABEL: dyn_extract_v8p3_v_v:1510; GCN: ; %bb.0: ; %entry1511; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1512; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v81513; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1514; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v81515; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1516; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v81517; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc1518; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v81519; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc1520; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v81521; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc1522; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v81523; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc1524; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v81525; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc1526; GCN-NEXT: s_setpc_b64 s[30:31]1527;1528; GFX10PLUS-LABEL: dyn_extract_v8p3_v_v:1529; GFX10PLUS: ; %bb.0: ; %entry1530; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1531; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v81532; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1533; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v81534; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo1535; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v81536; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo1537; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v81538; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo1539; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v81540; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo1541; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v81542; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo1543; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v81544; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo1545; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]1546entry:1547 %ext = extractelement <8 x ptr addrspace(3)> %vec, i32 %idx1548 ret ptr addrspace(3) %ext1549}1550 1551define amdgpu_ps void @dyn_extract_v8p3_s_s(<8 x ptr addrspace(3)> inreg %vec, i32 inreg %idx) {1552; GPRIDX-LABEL: dyn_extract_v8p3_s_s:1553; GPRIDX: ; %bb.0: ; %entry1554; GPRIDX-NEXT: s_cmp_eq_u32 s10, 11555; GPRIDX-NEXT: s_cselect_b32 s0, s3, s21556; GPRIDX-NEXT: s_cmp_eq_u32 s10, 21557; GPRIDX-NEXT: s_cselect_b32 s0, s4, s01558; GPRIDX-NEXT: s_cmp_eq_u32 s10, 31559; GPRIDX-NEXT: s_cselect_b32 s0, s5, s01560; GPRIDX-NEXT: s_cmp_eq_u32 s10, 41561; GPRIDX-NEXT: s_cselect_b32 s0, s6, s01562; GPRIDX-NEXT: s_cmp_eq_u32 s10, 51563; GPRIDX-NEXT: s_cselect_b32 s0, s7, s01564; GPRIDX-NEXT: s_cmp_eq_u32 s10, 61565; GPRIDX-NEXT: s_cselect_b32 s0, s8, s01566; GPRIDX-NEXT: s_cmp_eq_u32 s10, 71567; GPRIDX-NEXT: s_cselect_b32 s0, s9, s01568; GPRIDX-NEXT: v_mov_b32_e32 v0, s01569; GPRIDX-NEXT: ds_write_b32 v0, v01570; GPRIDX-NEXT: s_endpgm1571;1572; MOVREL-LABEL: dyn_extract_v8p3_s_s:1573; MOVREL: ; %bb.0: ; %entry1574; MOVREL-NEXT: s_mov_b32 s0, s21575; MOVREL-NEXT: s_mov_b32 m0, s101576; MOVREL-NEXT: s_mov_b32 s1, s31577; MOVREL-NEXT: s_mov_b32 s2, s41578; MOVREL-NEXT: s_mov_b32 s3, s51579; MOVREL-NEXT: s_mov_b32 s4, s61580; MOVREL-NEXT: s_mov_b32 s5, s71581; MOVREL-NEXT: s_mov_b32 s6, s81582; MOVREL-NEXT: s_mov_b32 s7, s91583; MOVREL-NEXT: s_movrels_b32 s0, s01584; MOVREL-NEXT: v_mov_b32_e32 v0, s01585; MOVREL-NEXT: s_mov_b32 m0, -11586; MOVREL-NEXT: ds_write_b32 v0, v01587; MOVREL-NEXT: s_endpgm1588;1589; GFX10-LABEL: dyn_extract_v8p3_s_s:1590; GFX10: ; %bb.0: ; %entry1591; GFX10-NEXT: s_mov_b32 s0, s21592; GFX10-NEXT: s_mov_b32 m0, s101593; GFX10-NEXT: s_mov_b32 s1, s31594; GFX10-NEXT: s_mov_b32 s2, s41595; GFX10-NEXT: s_mov_b32 s3, s51596; GFX10-NEXT: s_mov_b32 s4, s61597; GFX10-NEXT: s_mov_b32 s5, s71598; GFX10-NEXT: s_mov_b32 s6, s81599; GFX10-NEXT: s_mov_b32 s7, s91600; GFX10-NEXT: s_movrels_b32 s0, s01601; GFX10-NEXT: v_mov_b32_e32 v0, s01602; GFX10-NEXT: ds_write_b32 v0, v01603; GFX10-NEXT: s_endpgm1604;1605; GFX11-LABEL: dyn_extract_v8p3_s_s:1606; GFX11: ; %bb.0: ; %entry1607; GFX11-NEXT: s_mov_b32 s0, s21608; GFX11-NEXT: s_mov_b32 m0, s101609; GFX11-NEXT: s_mov_b32 s1, s31610; GFX11-NEXT: s_mov_b32 s2, s41611; GFX11-NEXT: s_mov_b32 s3, s51612; GFX11-NEXT: s_mov_b32 s4, s61613; GFX11-NEXT: s_mov_b32 s5, s71614; GFX11-NEXT: s_mov_b32 s6, s81615; GFX11-NEXT: s_mov_b32 s7, s91616; GFX11-NEXT: s_movrels_b32 s0, s01617; GFX11-NEXT: v_mov_b32_e32 v0, s01618; GFX11-NEXT: ds_store_b32 v0, v01619; GFX11-NEXT: s_endpgm1620entry:1621 %ext = extractelement <8 x ptr addrspace(3)> %vec, i32 %idx1622 store ptr addrspace(3) %ext, ptr addrspace(3) poison1623 ret void1624}1625 1626define ptr addrspace(1) @dyn_extract_v8p1_v_v(<8 x ptr addrspace(1)> %vec, i32 %idx) {1627; GCN-LABEL: dyn_extract_v8p1_v_v:1628; GCN: ; %bb.0: ; %entry1629; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1630; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v161631; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1632; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc1633; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v161634; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc1635; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc1636; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v161637; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc1638; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc1639; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v161640; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc1641; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc1642; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v161643; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc1644; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc1645; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v161646; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc1647; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc1648; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v161649; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc1650; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v15, vcc1651; GCN-NEXT: s_setpc_b64 s[30:31]1652;1653; GFX10-LABEL: dyn_extract_v8p1_v_v:1654; GFX10: ; %bb.0: ; %entry1655; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1656; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v161657; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo1658; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc_lo1659; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v161660; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo1661; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo1662; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v161663; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo1664; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo1665; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v161666; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc_lo1667; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo1668; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v161669; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo1670; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo1671; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v161672; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc_lo1673; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc_lo1674; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v161675; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc_lo1676; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v15, vcc_lo1677; GFX10-NEXT: s_setpc_b64 s[30:31]1678;1679; GFX11-LABEL: dyn_extract_v8p1_v_v:1680; GFX11: ; %bb.0: ; %entry1681; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1682; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v161683; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v2 :: v_dual_cndmask_b32 v1, v1, v31684; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v161685; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v4 :: v_dual_cndmask_b32 v1, v1, v51686; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v161687; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v6 :: v_dual_cndmask_b32 v1, v1, v71688; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v161689; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v8 :: v_dual_cndmask_b32 v1, v1, v91690; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v161691; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v10 :: v_dual_cndmask_b32 v1, v1, v111692; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v161693; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v12 :: v_dual_cndmask_b32 v1, v1, v131694; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v161695; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v14 :: v_dual_cndmask_b32 v1, v1, v151696; GFX11-NEXT: s_setpc_b64 s[30:31]1697entry:1698 %ext = extractelement <8 x ptr addrspace(1)> %vec, i32 %idx1699 ret ptr addrspace(1) %ext1700}1701 1702define amdgpu_ps void @dyn_extract_v8p1_s_s(<8 x ptr addrspace(1)> inreg %vec, i32 inreg %idx) {1703; GPRIDX-LABEL: dyn_extract_v8p1_s_s:1704; GPRIDX: ; %bb.0: ; %entry1705; GPRIDX-NEXT: s_mov_b32 s0, s21706; GPRIDX-NEXT: s_mov_b32 s1, s31707; GPRIDX-NEXT: s_mov_b32 m0, s181708; GPRIDX-NEXT: s_mov_b32 s2, s41709; GPRIDX-NEXT: s_mov_b32 s3, s51710; GPRIDX-NEXT: s_mov_b32 s4, s61711; GPRIDX-NEXT: s_mov_b32 s5, s71712; GPRIDX-NEXT: s_mov_b32 s6, s81713; GPRIDX-NEXT: s_mov_b32 s7, s91714; GPRIDX-NEXT: s_mov_b32 s8, s101715; GPRIDX-NEXT: s_mov_b32 s9, s111716; GPRIDX-NEXT: s_mov_b32 s10, s121717; GPRIDX-NEXT: s_mov_b32 s11, s131718; GPRIDX-NEXT: s_mov_b32 s12, s141719; GPRIDX-NEXT: s_mov_b32 s13, s151720; GPRIDX-NEXT: s_mov_b32 s14, s161721; GPRIDX-NEXT: s_mov_b32 s15, s171722; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[0:1]1723; GPRIDX-NEXT: v_mov_b32_e32 v0, s01724; GPRIDX-NEXT: v_mov_b32_e32 v1, s11725; GPRIDX-NEXT: global_store_dwordx2 v[0:1], v[0:1], off1726; GPRIDX-NEXT: s_endpgm1727;1728; MOVREL-LABEL: dyn_extract_v8p1_s_s:1729; MOVREL: ; %bb.0: ; %entry1730; MOVREL-NEXT: s_mov_b32 s0, s21731; MOVREL-NEXT: s_mov_b32 s1, s31732; MOVREL-NEXT: s_mov_b32 m0, s181733; MOVREL-NEXT: s_mov_b32 s2, s41734; MOVREL-NEXT: s_mov_b32 s3, s51735; MOVREL-NEXT: s_mov_b32 s4, s61736; MOVREL-NEXT: s_mov_b32 s5, s71737; MOVREL-NEXT: s_mov_b32 s6, s81738; MOVREL-NEXT: s_mov_b32 s7, s91739; MOVREL-NEXT: s_mov_b32 s8, s101740; MOVREL-NEXT: s_mov_b32 s9, s111741; MOVREL-NEXT: s_mov_b32 s10, s121742; MOVREL-NEXT: s_mov_b32 s11, s131743; MOVREL-NEXT: s_mov_b32 s12, s141744; MOVREL-NEXT: s_mov_b32 s13, s151745; MOVREL-NEXT: s_mov_b32 s14, s161746; MOVREL-NEXT: s_mov_b32 s15, s171747; MOVREL-NEXT: s_movrels_b64 s[0:1], s[0:1]1748; MOVREL-NEXT: v_mov_b32_e32 v0, s01749; MOVREL-NEXT: v_mov_b32_e32 v1, s11750; MOVREL-NEXT: flat_store_dwordx2 v[0:1], v[0:1]1751; MOVREL-NEXT: s_endpgm1752;1753; GFX10-LABEL: dyn_extract_v8p1_s_s:1754; GFX10: ; %bb.0: ; %entry1755; GFX10-NEXT: s_mov_b32 s0, s21756; GFX10-NEXT: s_mov_b32 s1, s31757; GFX10-NEXT: s_mov_b32 m0, s181758; GFX10-NEXT: s_mov_b32 s2, s41759; GFX10-NEXT: s_mov_b32 s3, s51760; GFX10-NEXT: s_mov_b32 s4, s61761; GFX10-NEXT: s_mov_b32 s5, s71762; GFX10-NEXT: s_mov_b32 s6, s81763; GFX10-NEXT: s_mov_b32 s7, s91764; GFX10-NEXT: s_mov_b32 s8, s101765; GFX10-NEXT: s_mov_b32 s9, s111766; GFX10-NEXT: s_mov_b32 s10, s121767; GFX10-NEXT: s_mov_b32 s11, s131768; GFX10-NEXT: s_mov_b32 s12, s141769; GFX10-NEXT: s_mov_b32 s13, s151770; GFX10-NEXT: s_mov_b32 s14, s161771; GFX10-NEXT: s_mov_b32 s15, s171772; GFX10-NEXT: s_movrels_b64 s[0:1], s[0:1]1773; GFX10-NEXT: v_mov_b32_e32 v0, s01774; GFX10-NEXT: v_mov_b32_e32 v1, s11775; GFX10-NEXT: global_store_dwordx2 v[0:1], v[0:1], off1776; GFX10-NEXT: s_endpgm1777;1778; GFX11-LABEL: dyn_extract_v8p1_s_s:1779; GFX11: ; %bb.0: ; %entry1780; GFX11-NEXT: s_mov_b32 s0, s21781; GFX11-NEXT: s_mov_b32 s1, s31782; GFX11-NEXT: s_mov_b32 m0, s181783; GFX11-NEXT: s_mov_b32 s2, s41784; GFX11-NEXT: s_mov_b32 s3, s51785; GFX11-NEXT: s_mov_b32 s4, s61786; GFX11-NEXT: s_mov_b32 s5, s71787; GFX11-NEXT: s_mov_b32 s6, s81788; GFX11-NEXT: s_mov_b32 s7, s91789; GFX11-NEXT: s_mov_b32 s8, s101790; GFX11-NEXT: s_mov_b32 s9, s111791; GFX11-NEXT: s_mov_b32 s10, s121792; GFX11-NEXT: s_mov_b32 s11, s131793; GFX11-NEXT: s_mov_b32 s12, s141794; GFX11-NEXT: s_mov_b32 s13, s151795; GFX11-NEXT: s_mov_b32 s14, s161796; GFX11-NEXT: s_mov_b32 s15, s171797; GFX11-NEXT: s_movrels_b64 s[0:1], s[0:1]1798; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11799; GFX11-NEXT: global_store_b64 v[0:1], v[0:1], off1800; GFX11-NEXT: s_endpgm1801entry:1802 %ext = extractelement <8 x ptr addrspace(1)> %vec, i32 %idx1803 store ptr addrspace(1) %ext, ptr addrspace(1) poison1804 ret void1805}1806 1807define amdgpu_ps float @dyn_extract_v16f32_v_s(<16 x float> %vec, i32 inreg %sel) {1808; GPRIDX-LABEL: dyn_extract_v16f32_v_s:1809; GPRIDX: ; %bb.0: ; %entry1810; GPRIDX-NEXT: s_set_gpr_idx_on s2, gpr_idx(SRC0)1811; GPRIDX-NEXT: v_mov_b32_e32 v0, v01812; GPRIDX-NEXT: s_set_gpr_idx_off1813; GPRIDX-NEXT: ; return to shader part epilog1814;1815; MOVREL-LABEL: dyn_extract_v16f32_v_s:1816; MOVREL: ; %bb.0: ; %entry1817; MOVREL-NEXT: s_mov_b32 m0, s21818; MOVREL-NEXT: v_movrels_b32_e32 v0, v01819; MOVREL-NEXT: ; return to shader part epilog1820;1821; GFX10PLUS-LABEL: dyn_extract_v16f32_v_s:1822; GFX10PLUS: ; %bb.0: ; %entry1823; GFX10PLUS-NEXT: s_mov_b32 m0, s21824; GFX10PLUS-NEXT: v_movrels_b32_e32 v0, v01825; GFX10PLUS-NEXT: ; return to shader part epilog1826entry:1827 %ext = extractelement <16 x float> %vec, i32 %sel1828 ret float %ext1829}1830 1831define amdgpu_ps float @dyn_extract_v32f32_v_s(<32 x float> %vec, i32 inreg %sel) {1832; GPRIDX-LABEL: dyn_extract_v32f32_v_s:1833; GPRIDX: ; %bb.0: ; %entry1834; GPRIDX-NEXT: s_set_gpr_idx_on s2, gpr_idx(SRC0)1835; GPRIDX-NEXT: v_mov_b32_e32 v0, v01836; GPRIDX-NEXT: s_set_gpr_idx_off1837; GPRIDX-NEXT: ; return to shader part epilog1838;1839; MOVREL-LABEL: dyn_extract_v32f32_v_s:1840; MOVREL: ; %bb.0: ; %entry1841; MOVREL-NEXT: s_mov_b32 m0, s21842; MOVREL-NEXT: v_movrels_b32_e32 v0, v01843; MOVREL-NEXT: ; return to shader part epilog1844;1845; GFX10PLUS-LABEL: dyn_extract_v32f32_v_s:1846; GFX10PLUS: ; %bb.0: ; %entry1847; GFX10PLUS-NEXT: s_mov_b32 m0, s21848; GFX10PLUS-NEXT: v_movrels_b32_e32 v0, v01849; GFX10PLUS-NEXT: ; return to shader part epilog1850entry:1851 %ext = extractelement <32 x float> %vec, i32 %sel1852 ret float %ext1853}1854 1855define amdgpu_ps double @dyn_extract_v16f64_v_s(<16 x double> %vec, i32 inreg %sel) {1856; GPRIDX-LABEL: dyn_extract_v16f64_v_s:1857; GPRIDX: ; %bb.0: ; %entry1858; GPRIDX-NEXT: s_lshl_b32 s0, s2, 11859; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(SRC0)1860; GPRIDX-NEXT: v_mov_b32_e32 v32, v01861; GPRIDX-NEXT: v_mov_b32_e32 v0, v11862; GPRIDX-NEXT: s_set_gpr_idx_off1863; GPRIDX-NEXT: v_readfirstlane_b32 s0, v321864; GPRIDX-NEXT: v_readfirstlane_b32 s1, v01865; GPRIDX-NEXT: ; return to shader part epilog1866;1867; MOVREL-LABEL: dyn_extract_v16f64_v_s:1868; MOVREL: ; %bb.0: ; %entry1869; MOVREL-NEXT: s_lshl_b32 m0, s2, 11870; MOVREL-NEXT: v_movrels_b32_e32 v32, v01871; MOVREL-NEXT: v_movrels_b32_e32 v0, v11872; MOVREL-NEXT: v_readfirstlane_b32 s0, v321873; MOVREL-NEXT: v_readfirstlane_b32 s1, v01874; MOVREL-NEXT: ; return to shader part epilog1875;1876; GFX10PLUS-LABEL: dyn_extract_v16f64_v_s:1877; GFX10PLUS: ; %bb.0: ; %entry1878; GFX10PLUS-NEXT: s_lshl_b32 m0, s2, 11879; GFX10PLUS-NEXT: v_movrels_b32_e32 v32, v01880; GFX10PLUS-NEXT: v_movrels_b32_e32 v0, v11881; GFX10PLUS-NEXT: v_readfirstlane_b32 s0, v321882; GFX10PLUS-NEXT: v_readfirstlane_b32 s1, v01883; GFX10PLUS-NEXT: ; return to shader part epilog1884entry:1885 %ext = extractelement <16 x double> %vec, i32 %sel1886 ret double %ext1887}1888 1889define amdgpu_ps float @dyn_extract_v16f32_s_s(i32 inreg %sel) {1890; GCN-LABEL: dyn_extract_v16f32_s_s:1891; GCN: ; %bb.0: ; %entry1892; GCN-NEXT: s_mov_b32 s4, 1.01893; GCN-NEXT: s_mov_b32 m0, s21894; GCN-NEXT: s_mov_b32 s19, 0x418000001895; GCN-NEXT: s_mov_b32 s18, 0x417000001896; GCN-NEXT: s_mov_b32 s17, 0x416000001897; GCN-NEXT: s_mov_b32 s16, 0x415000001898; GCN-NEXT: s_mov_b32 s15, 0x414000001899; GCN-NEXT: s_mov_b32 s14, 0x413000001900; GCN-NEXT: s_mov_b32 s13, 0x412000001901; GCN-NEXT: s_mov_b32 s12, 0x411000001902; GCN-NEXT: s_mov_b32 s11, 0x410000001903; GCN-NEXT: s_mov_b32 s10, 0x40e000001904; GCN-NEXT: s_mov_b32 s9, 0x40c000001905; GCN-NEXT: s_mov_b32 s8, 0x40a000001906; GCN-NEXT: s_mov_b32 s7, 4.01907; GCN-NEXT: s_mov_b32 s6, 0x404000001908; GCN-NEXT: s_mov_b32 s5, 2.01909; GCN-NEXT: s_movrels_b32 s0, s41910; GCN-NEXT: v_mov_b32_e32 v0, s01911; GCN-NEXT: ; return to shader part epilog1912;1913; GFX10PLUS-LABEL: dyn_extract_v16f32_s_s:1914; GFX10PLUS: ; %bb.0: ; %entry1915; GFX10PLUS-NEXT: s_mov_b32 s4, 1.01916; GFX10PLUS-NEXT: s_mov_b32 m0, s21917; GFX10PLUS-NEXT: s_mov_b32 s19, 0x418000001918; GFX10PLUS-NEXT: s_mov_b32 s18, 0x417000001919; GFX10PLUS-NEXT: s_mov_b32 s17, 0x416000001920; GFX10PLUS-NEXT: s_mov_b32 s16, 0x415000001921; GFX10PLUS-NEXT: s_mov_b32 s15, 0x414000001922; GFX10PLUS-NEXT: s_mov_b32 s14, 0x413000001923; GFX10PLUS-NEXT: s_mov_b32 s13, 0x412000001924; GFX10PLUS-NEXT: s_mov_b32 s12, 0x411000001925; GFX10PLUS-NEXT: s_mov_b32 s11, 0x410000001926; GFX10PLUS-NEXT: s_mov_b32 s10, 0x40e000001927; GFX10PLUS-NEXT: s_mov_b32 s9, 0x40c000001928; GFX10PLUS-NEXT: s_mov_b32 s8, 0x40a000001929; GFX10PLUS-NEXT: s_mov_b32 s7, 4.01930; GFX10PLUS-NEXT: s_mov_b32 s6, 0x404000001931; GFX10PLUS-NEXT: s_mov_b32 s5, 2.01932; GFX10PLUS-NEXT: s_movrels_b32 s0, s41933; GFX10PLUS-NEXT: v_mov_b32_e32 v0, s01934; GFX10PLUS-NEXT: ; return to shader part epilog1935entry:1936 %ext = extractelement <16 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, float 11.0, float 12.0, float 13.0, float 14.0, float 15.0, float 16.0>, i32 %sel1937 ret float %ext1938}1939 1940define amdgpu_ps float @dyn_extract_v32f32_s_s(i32 inreg %sel) {1941; GCN-LABEL: dyn_extract_v32f32_s_s:1942; GCN: ; %bb.0: ; %entry1943; GCN-NEXT: s_mov_b32 s36, 1.01944; GCN-NEXT: s_mov_b32 m0, s21945; GCN-NEXT: s_mov_b32 s67, 0x420000001946; GCN-NEXT: s_mov_b32 s66, 0x41f800001947; GCN-NEXT: s_mov_b32 s65, 0x41f000001948; GCN-NEXT: s_mov_b32 s64, 0x41e800001949; GCN-NEXT: s_mov_b32 s63, 0x41e000001950; GCN-NEXT: s_mov_b32 s62, 0x41d800001951; GCN-NEXT: s_mov_b32 s61, 0x41d000001952; GCN-NEXT: s_mov_b32 s60, 0x41c800001953; GCN-NEXT: s_mov_b32 s59, 0x41c000001954; GCN-NEXT: s_mov_b32 s58, 0x41b800001955; GCN-NEXT: s_mov_b32 s57, 0x41b000001956; GCN-NEXT: s_mov_b32 s56, 0x41a800001957; GCN-NEXT: s_mov_b32 s55, 0x41a000001958; GCN-NEXT: s_mov_b32 s54, 0x419800001959; GCN-NEXT: s_mov_b32 s53, 0x419000001960; GCN-NEXT: s_mov_b32 s52, 0x418800001961; GCN-NEXT: s_mov_b32 s51, 0x418000001962; GCN-NEXT: s_mov_b32 s50, 0x417000001963; GCN-NEXT: s_mov_b32 s49, 0x416000001964; GCN-NEXT: s_mov_b32 s48, 0x415000001965; GCN-NEXT: s_mov_b32 s47, 0x414000001966; GCN-NEXT: s_mov_b32 s46, 0x413000001967; GCN-NEXT: s_mov_b32 s45, 0x412000001968; GCN-NEXT: s_mov_b32 s44, 0x411000001969; GCN-NEXT: s_mov_b32 s43, 0x410000001970; GCN-NEXT: s_mov_b32 s42, 0x40e000001971; GCN-NEXT: s_mov_b32 s41, 0x40c000001972; GCN-NEXT: s_mov_b32 s40, 0x40a000001973; GCN-NEXT: s_mov_b32 s39, 4.01974; GCN-NEXT: s_mov_b32 s38, 0x404000001975; GCN-NEXT: s_mov_b32 s37, 2.01976; GCN-NEXT: s_movrels_b32 s0, s361977; GCN-NEXT: v_mov_b32_e32 v0, s01978; GCN-NEXT: ; return to shader part epilog1979;1980; GFX10PLUS-LABEL: dyn_extract_v32f32_s_s:1981; GFX10PLUS: ; %bb.0: ; %entry1982; GFX10PLUS-NEXT: s_mov_b32 s36, 1.01983; GFX10PLUS-NEXT: s_mov_b32 m0, s21984; GFX10PLUS-NEXT: s_mov_b32 s67, 0x420000001985; GFX10PLUS-NEXT: s_mov_b32 s66, 0x41f800001986; GFX10PLUS-NEXT: s_mov_b32 s65, 0x41f000001987; GFX10PLUS-NEXT: s_mov_b32 s64, 0x41e800001988; GFX10PLUS-NEXT: s_mov_b32 s63, 0x41e000001989; GFX10PLUS-NEXT: s_mov_b32 s62, 0x41d800001990; GFX10PLUS-NEXT: s_mov_b32 s61, 0x41d000001991; GFX10PLUS-NEXT: s_mov_b32 s60, 0x41c800001992; GFX10PLUS-NEXT: s_mov_b32 s59, 0x41c000001993; GFX10PLUS-NEXT: s_mov_b32 s58, 0x41b800001994; GFX10PLUS-NEXT: s_mov_b32 s57, 0x41b000001995; GFX10PLUS-NEXT: s_mov_b32 s56, 0x41a800001996; GFX10PLUS-NEXT: s_mov_b32 s55, 0x41a000001997; GFX10PLUS-NEXT: s_mov_b32 s54, 0x419800001998; GFX10PLUS-NEXT: s_mov_b32 s53, 0x419000001999; GFX10PLUS-NEXT: s_mov_b32 s52, 0x418800002000; GFX10PLUS-NEXT: s_mov_b32 s51, 0x418000002001; GFX10PLUS-NEXT: s_mov_b32 s50, 0x417000002002; GFX10PLUS-NEXT: s_mov_b32 s49, 0x416000002003; GFX10PLUS-NEXT: s_mov_b32 s48, 0x415000002004; GFX10PLUS-NEXT: s_mov_b32 s47, 0x414000002005; GFX10PLUS-NEXT: s_mov_b32 s46, 0x413000002006; GFX10PLUS-NEXT: s_mov_b32 s45, 0x412000002007; GFX10PLUS-NEXT: s_mov_b32 s44, 0x411000002008; GFX10PLUS-NEXT: s_mov_b32 s43, 0x410000002009; GFX10PLUS-NEXT: s_mov_b32 s42, 0x40e000002010; GFX10PLUS-NEXT: s_mov_b32 s41, 0x40c000002011; GFX10PLUS-NEXT: s_mov_b32 s40, 0x40a000002012; GFX10PLUS-NEXT: s_mov_b32 s39, 4.02013; GFX10PLUS-NEXT: s_mov_b32 s38, 0x404000002014; GFX10PLUS-NEXT: s_mov_b32 s37, 2.02015; GFX10PLUS-NEXT: s_movrels_b32 s0, s362016; GFX10PLUS-NEXT: v_mov_b32_e32 v0, s02017; GFX10PLUS-NEXT: ; return to shader part epilog2018entry:2019 %ext = extractelement <32 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, float 11.0, float 12.0, float 13.0, float 14.0, float 15.0, float 16.0, float 17.0, float 18.0, float 19.0, float 20.0, float 21.0, float 22.0, float 23.0, float 24.0, float 25.0, float 26.0, float 27.0, float 28.0, float 29.0, float 30.0, float 31.0, float 32.0>, i32 %sel2020 ret float %ext2021}2022 2023define amdgpu_ps double @dyn_extract_v16f64_s_s(i32 inreg %sel) {2024; GCN-LABEL: dyn_extract_v16f64_s_s:2025; GCN: ; %bb.0: ; %entry2026; GCN-NEXT: s_mov_b32 s66, 02027; GCN-NEXT: s_mov_b32 s64, 02028; GCN-NEXT: s_mov_b32 s62, 02029; GCN-NEXT: s_mov_b32 s60, 02030; GCN-NEXT: s_mov_b32 s58, 02031; GCN-NEXT: s_mov_b32 s56, 02032; GCN-NEXT: s_mov_b32 s54, 02033; GCN-NEXT: s_mov_b32 s52, 02034; GCN-NEXT: s_mov_b32 s50, 02035; GCN-NEXT: s_mov_b32 s48, 02036; GCN-NEXT: s_mov_b32 s46, 02037; GCN-NEXT: s_mov_b32 s44, 02038; GCN-NEXT: s_mov_b32 s40, 02039; GCN-NEXT: s_mov_b64 s[36:37], 1.02040; GCN-NEXT: s_mov_b32 m0, s22041; GCN-NEXT: s_mov_b32 s67, 0x403000002042; GCN-NEXT: s_mov_b32 s65, 0x402e00002043; GCN-NEXT: s_mov_b32 s63, 0x402c00002044; GCN-NEXT: s_mov_b32 s61, 0x402a00002045; GCN-NEXT: s_mov_b32 s59, 0x402800002046; GCN-NEXT: s_mov_b32 s57, 0x402600002047; GCN-NEXT: s_mov_b32 s55, 0x402400002048; GCN-NEXT: s_mov_b32 s53, 0x402200002049; GCN-NEXT: s_mov_b32 s51, 0x402000002050; GCN-NEXT: s_mov_b32 s49, 0x401c00002051; GCN-NEXT: s_mov_b32 s47, 0x401800002052; GCN-NEXT: s_mov_b32 s45, 0x401400002053; GCN-NEXT: s_mov_b64 s[42:43], 4.02054; GCN-NEXT: s_mov_b32 s41, 0x400800002055; GCN-NEXT: s_mov_b64 s[38:39], 2.02056; GCN-NEXT: s_movrels_b64 s[0:1], s[36:37]2057; GCN-NEXT: ; return to shader part epilog2058;2059; GFX10PLUS-LABEL: dyn_extract_v16f64_s_s:2060; GFX10PLUS: ; %bb.0: ; %entry2061; GFX10PLUS-NEXT: s_mov_b64 s[36:37], 1.02062; GFX10PLUS-NEXT: s_mov_b32 m0, s22063; GFX10PLUS-NEXT: s_mov_b32 s66, 02064; GFX10PLUS-NEXT: s_mov_b32 s64, 02065; GFX10PLUS-NEXT: s_mov_b32 s62, 02066; GFX10PLUS-NEXT: s_mov_b32 s60, 02067; GFX10PLUS-NEXT: s_mov_b32 s58, 02068; GFX10PLUS-NEXT: s_mov_b32 s56, 02069; GFX10PLUS-NEXT: s_mov_b32 s54, 02070; GFX10PLUS-NEXT: s_mov_b32 s52, 02071; GFX10PLUS-NEXT: s_mov_b32 s50, 02072; GFX10PLUS-NEXT: s_mov_b32 s48, 02073; GFX10PLUS-NEXT: s_mov_b32 s46, 02074; GFX10PLUS-NEXT: s_mov_b32 s44, 02075; GFX10PLUS-NEXT: s_mov_b32 s40, 02076; GFX10PLUS-NEXT: s_mov_b32 s67, 0x403000002077; GFX10PLUS-NEXT: s_mov_b32 s65, 0x402e00002078; GFX10PLUS-NEXT: s_mov_b32 s63, 0x402c00002079; GFX10PLUS-NEXT: s_mov_b32 s61, 0x402a00002080; GFX10PLUS-NEXT: s_mov_b32 s59, 0x402800002081; GFX10PLUS-NEXT: s_mov_b32 s57, 0x402600002082; GFX10PLUS-NEXT: s_mov_b32 s55, 0x402400002083; GFX10PLUS-NEXT: s_mov_b32 s53, 0x402200002084; GFX10PLUS-NEXT: s_mov_b32 s51, 0x402000002085; GFX10PLUS-NEXT: s_mov_b32 s49, 0x401c00002086; GFX10PLUS-NEXT: s_mov_b32 s47, 0x401800002087; GFX10PLUS-NEXT: s_mov_b32 s45, 0x401400002088; GFX10PLUS-NEXT: s_mov_b64 s[42:43], 4.02089; GFX10PLUS-NEXT: s_mov_b32 s41, 0x400800002090; GFX10PLUS-NEXT: s_mov_b64 s[38:39], 2.02091; GFX10PLUS-NEXT: s_movrels_b64 s[0:1], s[36:37]2092; GFX10PLUS-NEXT: ; return to shader part epilog2093entry:2094 %ext = extractelement <16 x double> <double 1.0, double 2.0, double 3.0, double 4.0, double 5.0, double 6.0, double 7.0, double 8.0, double 9.0, double 10.0, double 11.0, double 12.0, double 13.0, double 14.0, double 15.0, double 16.0>, i32 %sel2095 ret double %ext2096}2097 2098define amdgpu_ps float @dyn_extract_v6f32_s_v(<6 x float> inreg %vec, i32 %sel) {2099; GCN-LABEL: dyn_extract_v6f32_s_v:2100; GCN: ; %bb.0: ; %entry2101; GCN-NEXT: v_mov_b32_e32 v1, s22102; GCN-NEXT: v_mov_b32_e32 v2, s32103; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v02104; GCN-NEXT: v_mov_b32_e32 v3, s42105; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc2106; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v02107; GCN-NEXT: v_mov_b32_e32 v4, s52108; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc2109; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v02110; GCN-NEXT: v_mov_b32_e32 v5, s62111; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc2112; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v02113; GCN-NEXT: v_mov_b32_e32 v6, s72114; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc2115; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v02116; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v6, vcc2117; GCN-NEXT: ; return to shader part epilog2118;2119; GFX10PLUS-LABEL: dyn_extract_v6f32_s_v:2120; GFX10PLUS: ; %bb.0: ; %entry2121; GFX10PLUS-NEXT: v_mov_b32_e32 v1, s32122; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v02123; GFX10PLUS-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo2124; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v02125; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s4, vcc_lo2126; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v02127; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s5, vcc_lo2128; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v02129; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo2130; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v02131; GFX10PLUS-NEXT: v_cndmask_b32_e64 v0, v1, s7, vcc_lo2132; GFX10PLUS-NEXT: ; return to shader part epilog2133entry:2134 %ext = extractelement <6 x float> %vec, i32 %sel2135 ret float %ext2136}2137 2138define float @dyn_extract_v6f32_v_v(<6 x float> %vec, i32 %sel) {2139; GCN-LABEL: dyn_extract_v6f32_v_v:2140; GCN: ; %bb.0: ; %entry2141; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2142; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v62143; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2144; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v62145; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2146; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v62147; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc2148; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v62149; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc2150; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v62151; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc2152; GCN-NEXT: s_setpc_b64 s[30:31]2153;2154; GFX10PLUS-LABEL: dyn_extract_v6f32_v_v:2155; GFX10PLUS: ; %bb.0: ; %entry2156; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2157; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v62158; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2159; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v62160; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2161; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v62162; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo2163; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v62164; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo2165; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v62166; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo2167; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]2168entry:2169 %ext = extractelement <6 x float> %vec, i32 %sel2170 ret float %ext2171}2172 2173define amdgpu_ps float @dyn_extract_v6f32_v_s(<6 x float> %vec, i32 inreg %sel) {2174; GCN-LABEL: dyn_extract_v6f32_v_s:2175; GCN: ; %bb.0: ; %entry2176; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s2, 12177; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2178; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s2, 22179; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2180; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s2, 32181; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc2182; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s2, 42183; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc2184; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s2, 52185; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc2186; GCN-NEXT: ; return to shader part epilog2187;2188; GFX10PLUS-LABEL: dyn_extract_v6f32_v_s:2189; GFX10PLUS: ; %bb.0: ; %entry2190; GFX10PLUS-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 12191; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2192; GFX10PLUS-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 22193; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2194; GFX10PLUS-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 32195; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo2196; GFX10PLUS-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 42197; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo2198; GFX10PLUS-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 52199; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo2200; GFX10PLUS-NEXT: ; return to shader part epilog2201entry:2202 %ext = extractelement <6 x float> %vec, i32 %sel2203 ret float %ext2204}2205 2206define amdgpu_ps float @dyn_extract_v6f32_s_s(<6 x float> inreg %vec, i32 inreg %sel) {2207; GCN-LABEL: dyn_extract_v6f32_s_s:2208; GCN: ; %bb.0: ; %entry2209; GCN-NEXT: s_cmp_eq_u32 s8, 12210; GCN-NEXT: s_cselect_b32 s0, s3, s22211; GCN-NEXT: s_cmp_eq_u32 s8, 22212; GCN-NEXT: s_cselect_b32 s0, s4, s02213; GCN-NEXT: s_cmp_eq_u32 s8, 32214; GCN-NEXT: s_cselect_b32 s0, s5, s02215; GCN-NEXT: s_cmp_eq_u32 s8, 42216; GCN-NEXT: s_cselect_b32 s0, s6, s02217; GCN-NEXT: s_cmp_eq_u32 s8, 52218; GCN-NEXT: s_cselect_b32 s0, s7, s02219; GCN-NEXT: v_mov_b32_e32 v0, s02220; GCN-NEXT: ; return to shader part epilog2221;2222; GFX10PLUS-LABEL: dyn_extract_v6f32_s_s:2223; GFX10PLUS: ; %bb.0: ; %entry2224; GFX10PLUS-NEXT: s_cmp_eq_u32 s8, 12225; GFX10PLUS-NEXT: s_cselect_b32 s0, s3, s22226; GFX10PLUS-NEXT: s_cmp_eq_u32 s8, 22227; GFX10PLUS-NEXT: s_cselect_b32 s0, s4, s02228; GFX10PLUS-NEXT: s_cmp_eq_u32 s8, 32229; GFX10PLUS-NEXT: s_cselect_b32 s0, s5, s02230; GFX10PLUS-NEXT: s_cmp_eq_u32 s8, 42231; GFX10PLUS-NEXT: s_cselect_b32 s0, s6, s02232; GFX10PLUS-NEXT: s_cmp_eq_u32 s8, 52233; GFX10PLUS-NEXT: s_cselect_b32 s0, s7, s02234; GFX10PLUS-NEXT: v_mov_b32_e32 v0, s02235; GFX10PLUS-NEXT: ; return to shader part epilog2236entry:2237 %ext = extractelement <6 x float> %vec, i32 %sel2238 ret float %ext2239}2240 2241define amdgpu_ps float @dyn_extract_v7f32_s_v(<7 x float> inreg %vec, i32 %sel) {2242; GCN-LABEL: dyn_extract_v7f32_s_v:2243; GCN: ; %bb.0: ; %entry2244; GCN-NEXT: v_mov_b32_e32 v1, s22245; GCN-NEXT: v_mov_b32_e32 v2, s32246; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v02247; GCN-NEXT: v_mov_b32_e32 v3, s42248; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc2249; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v02250; GCN-NEXT: v_mov_b32_e32 v4, s52251; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc2252; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v02253; GCN-NEXT: v_mov_b32_e32 v5, s62254; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc2255; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v02256; GCN-NEXT: v_mov_b32_e32 v6, s72257; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc2258; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v02259; GCN-NEXT: v_mov_b32_e32 v7, s82260; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc2261; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v02262; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v7, vcc2263; GCN-NEXT: ; return to shader part epilog2264;2265; GFX10PLUS-LABEL: dyn_extract_v7f32_s_v:2266; GFX10PLUS: ; %bb.0: ; %entry2267; GFX10PLUS-NEXT: v_mov_b32_e32 v1, s32268; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v02269; GFX10PLUS-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo2270; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v02271; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s4, vcc_lo2272; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v02273; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s5, vcc_lo2274; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v02275; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo2276; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v02277; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s7, vcc_lo2278; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v02279; GFX10PLUS-NEXT: v_cndmask_b32_e64 v0, v1, s8, vcc_lo2280; GFX10PLUS-NEXT: ; return to shader part epilog2281entry:2282 %ext = extractelement <7 x float> %vec, i32 %sel2283 ret float %ext2284}2285 2286define float @dyn_extract_v7f32_v_v(<7 x float> %vec, i32 %sel) {2287; GCN-LABEL: dyn_extract_v7f32_v_v:2288; GCN: ; %bb.0: ; %entry2289; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2290; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v72291; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2292; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v72293; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2294; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v72295; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc2296; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v72297; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc2298; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v72299; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc2300; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v72301; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc2302; GCN-NEXT: s_setpc_b64 s[30:31]2303;2304; GFX10PLUS-LABEL: dyn_extract_v7f32_v_v:2305; GFX10PLUS: ; %bb.0: ; %entry2306; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2307; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v72308; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2309; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v72310; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2311; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v72312; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo2313; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v72314; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo2315; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v72316; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo2317; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v72318; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo2319; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]2320entry:2321 %ext = extractelement <7 x float> %vec, i32 %sel2322 ret float %ext2323}2324 2325define amdgpu_ps float @dyn_extract_v7f32_v_s(<7 x float> %vec, i32 inreg %sel) {2326; GCN-LABEL: dyn_extract_v7f32_v_s:2327; GCN: ; %bb.0: ; %entry2328; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s2, 12329; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2330; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s2, 22331; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2332; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s2, 32333; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc2334; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s2, 42335; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc2336; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s2, 52337; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc2338; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s2, 62339; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc2340; GCN-NEXT: ; return to shader part epilog2341;2342; GFX10PLUS-LABEL: dyn_extract_v7f32_v_s:2343; GFX10PLUS: ; %bb.0: ; %entry2344; GFX10PLUS-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 12345; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2346; GFX10PLUS-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 22347; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2348; GFX10PLUS-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 32349; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo2350; GFX10PLUS-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 42351; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo2352; GFX10PLUS-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 52353; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo2354; GFX10PLUS-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 62355; GFX10PLUS-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo2356; GFX10PLUS-NEXT: ; return to shader part epilog2357entry:2358 %ext = extractelement <7 x float> %vec, i32 %sel2359 ret float %ext2360}2361 2362define amdgpu_ps float @dyn_extract_v7f32_s_s(<7 x float> inreg %vec, i32 inreg %sel) {2363; GCN-LABEL: dyn_extract_v7f32_s_s:2364; GCN: ; %bb.0: ; %entry2365; GCN-NEXT: s_cmp_eq_u32 s9, 12366; GCN-NEXT: s_cselect_b32 s0, s3, s22367; GCN-NEXT: s_cmp_eq_u32 s9, 22368; GCN-NEXT: s_cselect_b32 s0, s4, s02369; GCN-NEXT: s_cmp_eq_u32 s9, 32370; GCN-NEXT: s_cselect_b32 s0, s5, s02371; GCN-NEXT: s_cmp_eq_u32 s9, 42372; GCN-NEXT: s_cselect_b32 s0, s6, s02373; GCN-NEXT: s_cmp_eq_u32 s9, 52374; GCN-NEXT: s_cselect_b32 s0, s7, s02375; GCN-NEXT: s_cmp_eq_u32 s9, 62376; GCN-NEXT: s_cselect_b32 s0, s8, s02377; GCN-NEXT: v_mov_b32_e32 v0, s02378; GCN-NEXT: ; return to shader part epilog2379;2380; GFX10PLUS-LABEL: dyn_extract_v7f32_s_s:2381; GFX10PLUS: ; %bb.0: ; %entry2382; GFX10PLUS-NEXT: s_cmp_eq_u32 s9, 12383; GFX10PLUS-NEXT: s_cselect_b32 s0, s3, s22384; GFX10PLUS-NEXT: s_cmp_eq_u32 s9, 22385; GFX10PLUS-NEXT: s_cselect_b32 s0, s4, s02386; GFX10PLUS-NEXT: s_cmp_eq_u32 s9, 32387; GFX10PLUS-NEXT: s_cselect_b32 s0, s5, s02388; GFX10PLUS-NEXT: s_cmp_eq_u32 s9, 42389; GFX10PLUS-NEXT: s_cselect_b32 s0, s6, s02390; GFX10PLUS-NEXT: s_cmp_eq_u32 s9, 52391; GFX10PLUS-NEXT: s_cselect_b32 s0, s7, s02392; GFX10PLUS-NEXT: s_cmp_eq_u32 s9, 62393; GFX10PLUS-NEXT: s_cselect_b32 s0, s8, s02394; GFX10PLUS-NEXT: v_mov_b32_e32 v0, s02395; GFX10PLUS-NEXT: ; return to shader part epilog2396entry:2397 %ext = extractelement <7 x float> %vec, i32 %sel2398 ret float %ext2399}2400 2401define amdgpu_ps double @dyn_extract_v6f64_s_v(<6 x double> inreg %vec, i32 %sel) {2402; GCN-LABEL: dyn_extract_v6f64_s_v:2403; GCN: ; %bb.0: ; %entry2404; GCN-NEXT: v_mov_b32_e32 v1, s22405; GCN-NEXT: v_mov_b32_e32 v2, s32406; GCN-NEXT: v_mov_b32_e32 v3, s42407; GCN-NEXT: v_mov_b32_e32 v4, s52408; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v02409; GCN-NEXT: v_mov_b32_e32 v5, s62410; GCN-NEXT: v_mov_b32_e32 v6, s72411; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc2412; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc2413; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v02414; GCN-NEXT: v_mov_b32_e32 v7, s82415; GCN-NEXT: v_mov_b32_e32 v8, s92416; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc2417; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc2418; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v02419; GCN-NEXT: v_mov_b32_e32 v9, s102420; GCN-NEXT: v_mov_b32_e32 v10, s112421; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc2422; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc2423; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v02424; GCN-NEXT: v_mov_b32_e32 v11, s122425; GCN-NEXT: v_mov_b32_e32 v12, s132426; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc2427; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc2428; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v02429; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v11, vcc2430; GCN-NEXT: v_cndmask_b32_e32 v1, v2, v12, vcc2431; GCN-NEXT: v_readfirstlane_b32 s0, v02432; GCN-NEXT: v_readfirstlane_b32 s1, v12433; GCN-NEXT: ; return to shader part epilog2434;2435; GFX10-LABEL: dyn_extract_v6f64_s_v:2436; GFX10: ; %bb.0: ; %entry2437; GFX10-NEXT: v_mov_b32_e32 v1, s42438; GFX10-NEXT: v_mov_b32_e32 v2, s52439; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v02440; GFX10-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo2441; GFX10-NEXT: v_cndmask_b32_e32 v2, s3, v2, vcc_lo2442; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v02443; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo2444; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s7, vcc_lo2445; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v02446; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s8, vcc_lo2447; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s9, vcc_lo2448; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v02449; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s10, vcc_lo2450; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s11, vcc_lo2451; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v02452; GFX10-NEXT: v_cndmask_b32_e64 v0, v1, s12, vcc_lo2453; GFX10-NEXT: v_cndmask_b32_e64 v1, v2, s13, vcc_lo2454; GFX10-NEXT: v_readfirstlane_b32 s0, v02455; GFX10-NEXT: v_readfirstlane_b32 s1, v12456; GFX10-NEXT: ; return to shader part epilog2457;2458; GFX11-LABEL: dyn_extract_v6f64_s_v:2459; GFX11: ; %bb.0: ; %entry2460; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s52461; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v02462; GFX11-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo2463; GFX11-NEXT: v_cndmask_b32_e32 v2, s3, v2, vcc_lo2464; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v02465; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo2466; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s7, vcc_lo2467; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v02468; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s8, vcc_lo2469; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s9, vcc_lo2470; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v02471; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s10, vcc_lo2472; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s11, vcc_lo2473; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v02474; GFX11-NEXT: v_cndmask_b32_e64 v0, v1, s12, vcc_lo2475; GFX11-NEXT: v_cndmask_b32_e64 v1, v2, s13, vcc_lo2476; GFX11-NEXT: v_readfirstlane_b32 s0, v02477; GFX11-NEXT: v_readfirstlane_b32 s1, v12478; GFX11-NEXT: ; return to shader part epilog2479entry:2480 %ext = extractelement <6 x double> %vec, i32 %sel2481 ret double %ext2482}2483 2484define double @dyn_extract_v6f64_v_v(<6 x double> %vec, i32 %sel) {2485; GCN-LABEL: dyn_extract_v6f64_v_v:2486; GCN: ; %bb.0: ; %entry2487; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2488; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v122489; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2490; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc2491; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v122492; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc2493; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc2494; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v122495; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc2496; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc2497; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v122498; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc2499; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc2500; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v122501; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc2502; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc2503; GCN-NEXT: s_setpc_b64 s[30:31]2504;2505; GFX10-LABEL: dyn_extract_v6f64_v_v:2506; GFX10: ; %bb.0: ; %entry2507; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2508; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v122509; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2510; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc_lo2511; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v122512; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo2513; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo2514; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v122515; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo2516; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo2517; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v122518; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc_lo2519; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo2520; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v122521; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo2522; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo2523; GFX10-NEXT: s_setpc_b64 s[30:31]2524;2525; GFX11-LABEL: dyn_extract_v6f64_v_v:2526; GFX11: ; %bb.0: ; %entry2527; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2528; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v122529; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v2 :: v_dual_cndmask_b32 v1, v1, v32530; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v122531; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v4 :: v_dual_cndmask_b32 v1, v1, v52532; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v122533; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v6 :: v_dual_cndmask_b32 v1, v1, v72534; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v122535; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v8 :: v_dual_cndmask_b32 v1, v1, v92536; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v122537; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v10 :: v_dual_cndmask_b32 v1, v1, v112538; GFX11-NEXT: s_setpc_b64 s[30:31]2539entry:2540 %ext = extractelement <6 x double> %vec, i32 %sel2541 ret double %ext2542}2543 2544define amdgpu_ps double @dyn_extract_v6f64_v_s(<6 x double> %vec, i32 inreg %sel) {2545; GPRIDX-LABEL: dyn_extract_v6f64_v_s:2546; GPRIDX: ; %bb.0: ; %entry2547; GPRIDX-NEXT: s_lshl_b32 s0, s2, 12548; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(SRC0)2549; GPRIDX-NEXT: v_mov_b32_e32 v12, v02550; GPRIDX-NEXT: v_mov_b32_e32 v0, v12551; GPRIDX-NEXT: s_set_gpr_idx_off2552; GPRIDX-NEXT: v_readfirstlane_b32 s0, v122553; GPRIDX-NEXT: v_readfirstlane_b32 s1, v02554; GPRIDX-NEXT: ; return to shader part epilog2555;2556; MOVREL-LABEL: dyn_extract_v6f64_v_s:2557; MOVREL: ; %bb.0: ; %entry2558; MOVREL-NEXT: s_lshl_b32 m0, s2, 12559; MOVREL-NEXT: v_movrels_b32_e32 v12, v02560; MOVREL-NEXT: v_movrels_b32_e32 v0, v12561; MOVREL-NEXT: v_readfirstlane_b32 s0, v122562; MOVREL-NEXT: v_readfirstlane_b32 s1, v02563; MOVREL-NEXT: ; return to shader part epilog2564;2565; GFX10PLUS-LABEL: dyn_extract_v6f64_v_s:2566; GFX10PLUS: ; %bb.0: ; %entry2567; GFX10PLUS-NEXT: s_lshl_b32 m0, s2, 12568; GFX10PLUS-NEXT: v_movrels_b32_e32 v12, v02569; GFX10PLUS-NEXT: v_movrels_b32_e32 v0, v12570; GFX10PLUS-NEXT: v_readfirstlane_b32 s0, v122571; GFX10PLUS-NEXT: v_readfirstlane_b32 s1, v02572; GFX10PLUS-NEXT: ; return to shader part epilog2573entry:2574 %ext = extractelement <6 x double> %vec, i32 %sel2575 ret double %ext2576}2577 2578define amdgpu_ps double @dyn_extract_v6f64_s_s(<6 x double> inreg %vec, i32 inreg %sel) {2579; GCN-LABEL: dyn_extract_v6f64_s_s:2580; GCN: ; %bb.0: ; %entry2581; GCN-NEXT: s_mov_b32 s0, s22582; GCN-NEXT: s_mov_b32 s1, s32583; GCN-NEXT: s_mov_b32 m0, s142584; GCN-NEXT: s_mov_b32 s2, s42585; GCN-NEXT: s_mov_b32 s3, s52586; GCN-NEXT: s_mov_b32 s4, s62587; GCN-NEXT: s_mov_b32 s5, s72588; GCN-NEXT: s_mov_b32 s6, s82589; GCN-NEXT: s_mov_b32 s7, s92590; GCN-NEXT: s_mov_b32 s8, s102591; GCN-NEXT: s_mov_b32 s9, s112592; GCN-NEXT: s_mov_b32 s10, s122593; GCN-NEXT: s_mov_b32 s11, s132594; GCN-NEXT: s_movrels_b64 s[0:1], s[0:1]2595; GCN-NEXT: ; return to shader part epilog2596;2597; GFX10PLUS-LABEL: dyn_extract_v6f64_s_s:2598; GFX10PLUS: ; %bb.0: ; %entry2599; GFX10PLUS-NEXT: s_mov_b32 s0, s22600; GFX10PLUS-NEXT: s_mov_b32 s1, s32601; GFX10PLUS-NEXT: s_mov_b32 m0, s142602; GFX10PLUS-NEXT: s_mov_b32 s2, s42603; GFX10PLUS-NEXT: s_mov_b32 s3, s52604; GFX10PLUS-NEXT: s_mov_b32 s4, s62605; GFX10PLUS-NEXT: s_mov_b32 s5, s72606; GFX10PLUS-NEXT: s_mov_b32 s6, s82607; GFX10PLUS-NEXT: s_mov_b32 s7, s92608; GFX10PLUS-NEXT: s_mov_b32 s8, s102609; GFX10PLUS-NEXT: s_mov_b32 s9, s112610; GFX10PLUS-NEXT: s_mov_b32 s10, s122611; GFX10PLUS-NEXT: s_mov_b32 s11, s132612; GFX10PLUS-NEXT: s_movrels_b64 s[0:1], s[0:1]2613; GFX10PLUS-NEXT: ; return to shader part epilog2614entry:2615 %ext = extractelement <6 x double> %vec, i32 %sel2616 ret double %ext2617}2618 2619define amdgpu_ps double @dyn_extract_v7f64_s_v_bitcast(<14 x float> inreg %userData, i32 %sel) {2620; GCN-LABEL: dyn_extract_v7f64_s_v_bitcast:2621; GCN: ; %bb.0: ; %entry2622; GCN-NEXT: v_mov_b32_e32 v1, s22623; GCN-NEXT: v_mov_b32_e32 v2, s32624; GCN-NEXT: v_mov_b32_e32 v3, s42625; GCN-NEXT: v_mov_b32_e32 v4, s52626; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v02627; GCN-NEXT: v_mov_b32_e32 v5, s62628; GCN-NEXT: v_mov_b32_e32 v6, s72629; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc2630; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc2631; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v02632; GCN-NEXT: v_mov_b32_e32 v7, s82633; GCN-NEXT: v_mov_b32_e32 v8, s92634; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc2635; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc2636; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v02637; GCN-NEXT: v_mov_b32_e32 v9, s102638; GCN-NEXT: v_mov_b32_e32 v10, s112639; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc2640; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc2641; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v02642; GCN-NEXT: v_mov_b32_e32 v11, s122643; GCN-NEXT: v_mov_b32_e32 v12, s132644; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc2645; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc2646; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v02647; GCN-NEXT: v_mov_b32_e32 v13, s142648; GCN-NEXT: v_mov_b32_e32 v14, s152649; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc2650; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc2651; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v02652; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc2653; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v14, vcc2654; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v02655; GCN-NEXT: ; kill: def $vgpr15 killed $sgpr2 killed $exec2656; GCN-NEXT: ; kill: def $vgpr16 killed $sgpr3 killed $exec2657; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v15, vcc2658; GCN-NEXT: v_cndmask_b32_e32 v1, v2, v16, vcc2659; GCN-NEXT: v_readfirstlane_b32 s0, v02660; GCN-NEXT: v_readfirstlane_b32 s1, v12661; GCN-NEXT: ; return to shader part epilog2662;2663; GFX10-LABEL: dyn_extract_v7f64_s_v_bitcast:2664; GFX10: ; %bb.0: ; %entry2665; GFX10-NEXT: v_mov_b32_e32 v1, s42666; GFX10-NEXT: v_mov_b32_e32 v2, s52667; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v02668; GFX10-NEXT: s_mov_b32 s0, s142669; GFX10-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo2670; GFX10-NEXT: v_cndmask_b32_e32 v2, s3, v2, vcc_lo2671; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v02672; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo2673; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s7, vcc_lo2674; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v02675; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s8, vcc_lo2676; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s9, vcc_lo2677; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v02678; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s10, vcc_lo2679; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s11, vcc_lo2680; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v02681; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s12, vcc_lo2682; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s13, vcc_lo2683; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v02684; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s0, vcc_lo2685; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s15, vcc_lo2686; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v02687; GFX10-NEXT: v_cndmask_b32_e64 v0, v1, s2, vcc_lo2688; GFX10-NEXT: v_cndmask_b32_e64 v1, v2, s3, vcc_lo2689; GFX10-NEXT: v_readfirstlane_b32 s0, v02690; GFX10-NEXT: v_readfirstlane_b32 s1, v12691; GFX10-NEXT: ; return to shader part epilog2692;2693; GFX11-LABEL: dyn_extract_v7f64_s_v_bitcast:2694; GFX11: ; %bb.0: ; %entry2695; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s52696; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v02697; GFX11-NEXT: s_mov_b32 s0, s142698; GFX11-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo2699; GFX11-NEXT: v_cndmask_b32_e32 v2, s3, v2, vcc_lo2700; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v02701; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo2702; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s7, vcc_lo2703; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v02704; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s8, vcc_lo2705; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s9, vcc_lo2706; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v02707; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s10, vcc_lo2708; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s11, vcc_lo2709; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v02710; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s12, vcc_lo2711; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s13, vcc_lo2712; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v02713; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s0, vcc_lo2714; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s15, vcc_lo2715; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v02716; GFX11-NEXT: v_cndmask_b32_e64 v0, v1, s2, vcc_lo2717; GFX11-NEXT: v_cndmask_b32_e64 v1, v2, s3, vcc_lo2718; GFX11-NEXT: v_readfirstlane_b32 s0, v02719; GFX11-NEXT: v_readfirstlane_b32 s1, v12720; GFX11-NEXT: ; return to shader part epilog2721entry:2722 %bc = bitcast <14 x float> %userData to <7 x double>2723 %ext = extractelement <7 x double> %bc, i32 %sel2724 ret double %ext2725}2726 2727define amdgpu_ps i64 @dyn_extract_v7i64_s_v_bitcast(<14 x i32> inreg %userData, i32 %sel) {2728; GCN-LABEL: dyn_extract_v7i64_s_v_bitcast:2729; GCN: ; %bb.0: ; %entry2730; GCN-NEXT: s_mov_b32 s0, s102731; GCN-NEXT: s_mov_b32 s1, s112732; GCN-NEXT: ; return to shader part epilog2733;2734; GFX10PLUS-LABEL: dyn_extract_v7i64_s_v_bitcast:2735; GFX10PLUS: ; %bb.0: ; %entry2736; GFX10PLUS-NEXT: s_mov_b32 s0, s102737; GFX10PLUS-NEXT: s_mov_b32 s1, s112738; GFX10PLUS-NEXT: ; return to shader part epilog2739entry:2740 %.bc = bitcast <14 x i32> %userData to <7 x i64>2741 %ext = extractelement <7 x i64> %.bc, i32 42742 ret i64 %ext2743}2744 2745define amdgpu_ps double @dyn_extract_v7f64_s_v(<7 x double> inreg %vec, i32 %sel) {2746; GCN-LABEL: dyn_extract_v7f64_s_v:2747; GCN: ; %bb.0: ; %entry2748; GCN-NEXT: v_mov_b32_e32 v1, s22749; GCN-NEXT: v_mov_b32_e32 v2, s32750; GCN-NEXT: v_mov_b32_e32 v3, s42751; GCN-NEXT: v_mov_b32_e32 v4, s52752; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v02753; GCN-NEXT: v_mov_b32_e32 v5, s62754; GCN-NEXT: v_mov_b32_e32 v6, s72755; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc2756; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc2757; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v02758; GCN-NEXT: v_mov_b32_e32 v7, s82759; GCN-NEXT: v_mov_b32_e32 v8, s92760; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc2761; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc2762; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v02763; GCN-NEXT: v_mov_b32_e32 v9, s102764; GCN-NEXT: v_mov_b32_e32 v10, s112765; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc2766; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc2767; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v02768; GCN-NEXT: v_mov_b32_e32 v11, s122769; GCN-NEXT: v_mov_b32_e32 v12, s132770; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc2771; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc2772; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v02773; GCN-NEXT: v_mov_b32_e32 v13, s142774; GCN-NEXT: v_mov_b32_e32 v14, s152775; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc2776; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc2777; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v02778; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc2779; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v14, vcc2780; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v02781; GCN-NEXT: ; kill: def $vgpr15 killed $sgpr2 killed $exec2782; GCN-NEXT: ; kill: def $vgpr16 killed $sgpr3 killed $exec2783; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v15, vcc2784; GCN-NEXT: v_cndmask_b32_e32 v1, v2, v16, vcc2785; GCN-NEXT: v_readfirstlane_b32 s0, v02786; GCN-NEXT: v_readfirstlane_b32 s1, v12787; GCN-NEXT: ; return to shader part epilog2788;2789; GFX10-LABEL: dyn_extract_v7f64_s_v:2790; GFX10: ; %bb.0: ; %entry2791; GFX10-NEXT: v_mov_b32_e32 v1, s42792; GFX10-NEXT: v_mov_b32_e32 v2, s52793; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v02794; GFX10-NEXT: s_mov_b32 s0, s142795; GFX10-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo2796; GFX10-NEXT: v_cndmask_b32_e32 v2, s3, v2, vcc_lo2797; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v02798; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo2799; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s7, vcc_lo2800; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v02801; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s8, vcc_lo2802; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s9, vcc_lo2803; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v02804; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s10, vcc_lo2805; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s11, vcc_lo2806; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v02807; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s12, vcc_lo2808; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s13, vcc_lo2809; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v02810; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s0, vcc_lo2811; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s15, vcc_lo2812; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v02813; GFX10-NEXT: v_cndmask_b32_e64 v0, v1, s2, vcc_lo2814; GFX10-NEXT: v_cndmask_b32_e64 v1, v2, s3, vcc_lo2815; GFX10-NEXT: v_readfirstlane_b32 s0, v02816; GFX10-NEXT: v_readfirstlane_b32 s1, v12817; GFX10-NEXT: ; return to shader part epilog2818;2819; GFX11-LABEL: dyn_extract_v7f64_s_v:2820; GFX11: ; %bb.0: ; %entry2821; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s52822; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v02823; GFX11-NEXT: s_mov_b32 s0, s142824; GFX11-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo2825; GFX11-NEXT: v_cndmask_b32_e32 v2, s3, v2, vcc_lo2826; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v02827; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo2828; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s7, vcc_lo2829; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v02830; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s8, vcc_lo2831; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s9, vcc_lo2832; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v02833; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s10, vcc_lo2834; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s11, vcc_lo2835; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v02836; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s12, vcc_lo2837; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s13, vcc_lo2838; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v02839; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, s0, vcc_lo2840; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s15, vcc_lo2841; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v02842; GFX11-NEXT: v_cndmask_b32_e64 v0, v1, s2, vcc_lo2843; GFX11-NEXT: v_cndmask_b32_e64 v1, v2, s3, vcc_lo2844; GFX11-NEXT: v_readfirstlane_b32 s0, v02845; GFX11-NEXT: v_readfirstlane_b32 s1, v12846; GFX11-NEXT: ; return to shader part epilog2847entry:2848 %ext = extractelement <7 x double> %vec, i32 %sel2849 ret double %ext2850}2851 2852define double @dyn_extract_v7f64_v_v(<7 x double> %vec, i32 %sel) {2853; GCN-LABEL: dyn_extract_v7f64_v_v:2854; GCN: ; %bb.0: ; %entry2855; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2856; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v142857; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2858; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc2859; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v142860; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc2861; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc2862; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v142863; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc2864; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc2865; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v142866; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc2867; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc2868; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v142869; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc2870; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc2871; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v142872; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc2873; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc2874; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v142875; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v0, vcc2876; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v1, vcc2877; GCN-NEXT: s_setpc_b64 s[30:31]2878;2879; GFX10-LABEL: dyn_extract_v7f64_v_v:2880; GFX10: ; %bb.0: ; %entry2881; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2882; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v142883; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2884; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc_lo2885; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v142886; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo2887; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo2888; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v142889; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo2890; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo2891; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v142892; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc_lo2893; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo2894; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v142895; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo2896; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo2897; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v142898; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc_lo2899; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc_lo2900; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v142901; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v0, vcc_lo2902; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v1, vcc_lo2903; GFX10-NEXT: s_setpc_b64 s[30:31]2904;2905; GFX11-LABEL: dyn_extract_v7f64_v_v:2906; GFX11: ; %bb.0: ; %entry2907; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2908; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v142909; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v2 :: v_dual_cndmask_b32 v1, v1, v32910; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v142911; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v4 :: v_dual_cndmask_b32 v1, v1, v52912; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v142913; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v6 :: v_dual_cndmask_b32 v1, v1, v72914; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v142915; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v8 :: v_dual_cndmask_b32 v1, v1, v92916; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v142917; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v10 :: v_dual_cndmask_b32 v1, v1, v112918; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v142919; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v12 :: v_dual_cndmask_b32 v1, v1, v132920; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v142921; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v0 :: v_dual_cndmask_b32 v1, v1, v12922; GFX11-NEXT: s_setpc_b64 s[30:31]2923entry:2924 %ext = extractelement <7 x double> %vec, i32 %sel2925 ret double %ext2926}2927 2928define amdgpu_ps double @dyn_extract_v7f64_v_s(<7 x double> %vec, i32 inreg %sel) {2929; GPRIDX-LABEL: dyn_extract_v7f64_v_s:2930; GPRIDX: ; %bb.0: ; %entry2931; GPRIDX-NEXT: s_lshl_b32 s0, s2, 12932; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(SRC0)2933; GPRIDX-NEXT: v_mov_b32_e32 v14, v02934; GPRIDX-NEXT: v_mov_b32_e32 v0, v12935; GPRIDX-NEXT: s_set_gpr_idx_off2936; GPRIDX-NEXT: v_readfirstlane_b32 s0, v142937; GPRIDX-NEXT: v_readfirstlane_b32 s1, v02938; GPRIDX-NEXT: ; return to shader part epilog2939;2940; MOVREL-LABEL: dyn_extract_v7f64_v_s:2941; MOVREL: ; %bb.0: ; %entry2942; MOVREL-NEXT: s_lshl_b32 m0, s2, 12943; MOVREL-NEXT: v_movrels_b32_e32 v14, v02944; MOVREL-NEXT: v_movrels_b32_e32 v0, v12945; MOVREL-NEXT: v_readfirstlane_b32 s0, v142946; MOVREL-NEXT: v_readfirstlane_b32 s1, v02947; MOVREL-NEXT: ; return to shader part epilog2948;2949; GFX10PLUS-LABEL: dyn_extract_v7f64_v_s:2950; GFX10PLUS: ; %bb.0: ; %entry2951; GFX10PLUS-NEXT: s_lshl_b32 m0, s2, 12952; GFX10PLUS-NEXT: v_movrels_b32_e32 v14, v02953; GFX10PLUS-NEXT: v_movrels_b32_e32 v0, v12954; GFX10PLUS-NEXT: v_readfirstlane_b32 s0, v142955; GFX10PLUS-NEXT: v_readfirstlane_b32 s1, v02956; GFX10PLUS-NEXT: ; return to shader part epilog2957entry:2958 %ext = extractelement <7 x double> %vec, i32 %sel2959 ret double %ext2960}2961 2962define amdgpu_ps double @dyn_extract_v7f64_s_s(<7 x double> inreg %vec, i32 inreg %sel) {2963; GCN-LABEL: dyn_extract_v7f64_s_s:2964; GCN: ; %bb.0: ; %entry2965; GCN-NEXT: s_mov_b32 s0, s22966; GCN-NEXT: s_mov_b32 s1, s32967; GCN-NEXT: s_mov_b32 m0, s162968; GCN-NEXT: s_mov_b32 s2, s42969; GCN-NEXT: s_mov_b32 s3, s52970; GCN-NEXT: s_mov_b32 s4, s62971; GCN-NEXT: s_mov_b32 s5, s72972; GCN-NEXT: s_mov_b32 s6, s82973; GCN-NEXT: s_mov_b32 s7, s92974; GCN-NEXT: s_mov_b32 s8, s102975; GCN-NEXT: s_mov_b32 s9, s112976; GCN-NEXT: s_mov_b32 s10, s122977; GCN-NEXT: s_mov_b32 s11, s132978; GCN-NEXT: s_mov_b32 s12, s142979; GCN-NEXT: s_mov_b32 s13, s152980; GCN-NEXT: s_movrels_b64 s[0:1], s[0:1]2981; GCN-NEXT: ; return to shader part epilog2982;2983; GFX10PLUS-LABEL: dyn_extract_v7f64_s_s:2984; GFX10PLUS: ; %bb.0: ; %entry2985; GFX10PLUS-NEXT: s_mov_b32 s0, s22986; GFX10PLUS-NEXT: s_mov_b32 s1, s32987; GFX10PLUS-NEXT: s_mov_b32 m0, s162988; GFX10PLUS-NEXT: s_mov_b32 s2, s42989; GFX10PLUS-NEXT: s_mov_b32 s3, s52990; GFX10PLUS-NEXT: s_mov_b32 s4, s62991; GFX10PLUS-NEXT: s_mov_b32 s5, s72992; GFX10PLUS-NEXT: s_mov_b32 s6, s82993; GFX10PLUS-NEXT: s_mov_b32 s7, s92994; GFX10PLUS-NEXT: s_mov_b32 s8, s102995; GFX10PLUS-NEXT: s_mov_b32 s9, s112996; GFX10PLUS-NEXT: s_mov_b32 s10, s122997; GFX10PLUS-NEXT: s_mov_b32 s11, s132998; GFX10PLUS-NEXT: s_mov_b32 s12, s142999; GFX10PLUS-NEXT: s_mov_b32 s13, s153000; GFX10PLUS-NEXT: s_movrels_b64 s[0:1], s[0:1]3001; GFX10PLUS-NEXT: ; return to shader part epilog3002entry:3003 %ext = extractelement <7 x double> %vec, i32 %sel3004 ret double %ext3005}3006 3007define amdgpu_kernel void @dyn_extract_v5f64_s_s(ptr addrspace(1) %out, i32 %sel) {3008; GPRIDX-LABEL: dyn_extract_v5f64_s_s:3009; GPRIDX: .amd_kernel_code_t3010; GPRIDX-NEXT: amd_code_version_major = 13011; GPRIDX-NEXT: amd_code_version_minor = 23012; GPRIDX-NEXT: amd_machine_kind = 13013; GPRIDX-NEXT: amd_machine_version_major = 93014; GPRIDX-NEXT: amd_machine_version_minor = 03015; GPRIDX-NEXT: amd_machine_version_stepping = 03016; GPRIDX-NEXT: kernel_code_entry_byte_offset = 2563017; GPRIDX-NEXT: kernel_code_prefetch_byte_size = 03018; GPRIDX-NEXT: granulated_workitem_vgpr_count = 03019; GPRIDX-NEXT: granulated_wavefront_sgpr_count = 23020; GPRIDX-NEXT: priority = 03021; GPRIDX-NEXT: float_mode = 2403022; GPRIDX-NEXT: priv = 03023; GPRIDX-NEXT: enable_dx10_clamp = 13024; GPRIDX-NEXT: debug_mode = 03025; GPRIDX-NEXT: enable_ieee_mode = 13026; GPRIDX-NEXT: enable_wgp_mode = 03027; GPRIDX-NEXT: enable_mem_ordered = 03028; GPRIDX-NEXT: enable_fwd_progress = 03029; GPRIDX-NEXT: enable_sgpr_private_segment_wave_byte_offset = 03030; GPRIDX-NEXT: user_sgpr_count = 143031; GPRIDX-NEXT: enable_trap_handler = 03032; GPRIDX-NEXT: enable_sgpr_workgroup_id_x = 13033; GPRIDX-NEXT: enable_sgpr_workgroup_id_y = 13034; GPRIDX-NEXT: enable_sgpr_workgroup_id_z = 13035; GPRIDX-NEXT: enable_sgpr_workgroup_info = 03036; GPRIDX-NEXT: enable_vgpr_workitem_id = 23037; GPRIDX-NEXT: enable_exception_msb = 03038; GPRIDX-NEXT: granulated_lds_size = 03039; GPRIDX-NEXT: enable_exception = 03040; GPRIDX-NEXT: enable_sgpr_private_segment_buffer = 13041; GPRIDX-NEXT: enable_sgpr_dispatch_ptr = 13042; GPRIDX-NEXT: enable_sgpr_queue_ptr = 13043; GPRIDX-NEXT: enable_sgpr_kernarg_segment_ptr = 13044; GPRIDX-NEXT: enable_sgpr_dispatch_id = 13045; GPRIDX-NEXT: enable_sgpr_flat_scratch_init = 13046; GPRIDX-NEXT: enable_sgpr_private_segment_size = 03047; GPRIDX-NEXT: enable_sgpr_grid_workgroup_count_x = 03048; GPRIDX-NEXT: enable_sgpr_grid_workgroup_count_y = 03049; GPRIDX-NEXT: enable_sgpr_grid_workgroup_count_z = 03050; GPRIDX-NEXT: enable_wavefront_size32 = 03051; GPRIDX-NEXT: enable_ordered_append_gds = 03052; GPRIDX-NEXT: private_element_size = 13053; GPRIDX-NEXT: is_ptr64 = 13054; GPRIDX-NEXT: is_dynamic_callstack = 03055; GPRIDX-NEXT: is_debug_enabled = 03056; GPRIDX-NEXT: is_xnack_enabled = 13057; GPRIDX-NEXT: workitem_private_segment_byte_size = 03058; GPRIDX-NEXT: workgroup_group_segment_byte_size = 03059; GPRIDX-NEXT: gds_segment_byte_size = 03060; GPRIDX-NEXT: kernarg_segment_byte_size = 283061; GPRIDX-NEXT: workgroup_fbarrier_count = 03062; GPRIDX-NEXT: wavefront_sgpr_count = 173063; GPRIDX-NEXT: workitem_vgpr_count = 33064; GPRIDX-NEXT: reserved_vgpr_first = 03065; GPRIDX-NEXT: reserved_vgpr_count = 03066; GPRIDX-NEXT: reserved_sgpr_first = 03067; GPRIDX-NEXT: reserved_sgpr_count = 03068; GPRIDX-NEXT: debug_wavefront_private_segment_offset_sgpr = 03069; GPRIDX-NEXT: debug_private_segment_buffer_sgpr = 03070; GPRIDX-NEXT: kernarg_segment_alignment = 43071; GPRIDX-NEXT: group_segment_alignment = 43072; GPRIDX-NEXT: private_segment_alignment = 43073; GPRIDX-NEXT: wavefront_size = 63074; GPRIDX-NEXT: call_convention = -13075; GPRIDX-NEXT: runtime_loader_kernel_symbol = 03076; GPRIDX-NEXT: .end_amd_kernel_code_t3077; GPRIDX-NEXT: ; %bb.0: ; %entry3078; GPRIDX-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x03079; GPRIDX-NEXT: s_load_dword s10, s[8:9], 0x83080; GPRIDX-NEXT: s_mov_b32 s4, 03081; GPRIDX-NEXT: s_mov_b32 s5, 0x400800003082; GPRIDX-NEXT: s_mov_b32 s2, 03083; GPRIDX-NEXT: s_mov_b32 s3, 0x401400003084; GPRIDX-NEXT: s_waitcnt lgkmcnt(0)3085; GPRIDX-NEXT: s_cmp_eq_u32 s10, 13086; GPRIDX-NEXT: s_cselect_b64 s[6:7], 2.0, 1.03087; GPRIDX-NEXT: s_cmp_eq_u32 s10, 23088; GPRIDX-NEXT: s_cselect_b64 s[4:5], s[4:5], s[6:7]3089; GPRIDX-NEXT: s_cmp_eq_u32 s10, 33090; GPRIDX-NEXT: s_cselect_b64 s[4:5], 4.0, s[4:5]3091; GPRIDX-NEXT: s_cmp_eq_u32 s10, 43092; GPRIDX-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5]3093; GPRIDX-NEXT: v_mov_b32_e32 v0, s23094; GPRIDX-NEXT: v_mov_b32_e32 v1, s33095; GPRIDX-NEXT: v_mov_b32_e32 v2, 03096; GPRIDX-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3097; GPRIDX-NEXT: s_endpgm3098;3099; MOVREL-LABEL: dyn_extract_v5f64_s_s:3100; MOVREL: .amd_kernel_code_t3101; MOVREL-NEXT: amd_code_version_major = 13102; MOVREL-NEXT: amd_code_version_minor = 23103; MOVREL-NEXT: amd_machine_kind = 13104; MOVREL-NEXT: amd_machine_version_major = 83105; MOVREL-NEXT: amd_machine_version_minor = 03106; MOVREL-NEXT: amd_machine_version_stepping = 33107; MOVREL-NEXT: kernel_code_entry_byte_offset = 2563108; MOVREL-NEXT: kernel_code_prefetch_byte_size = 03109; MOVREL-NEXT: granulated_workitem_vgpr_count = 03110; MOVREL-NEXT: granulated_wavefront_sgpr_count = 23111; MOVREL-NEXT: priority = 03112; MOVREL-NEXT: float_mode = 2403113; MOVREL-NEXT: priv = 03114; MOVREL-NEXT: enable_dx10_clamp = 13115; MOVREL-NEXT: debug_mode = 03116; MOVREL-NEXT: enable_ieee_mode = 13117; MOVREL-NEXT: enable_wgp_mode = 03118; MOVREL-NEXT: enable_mem_ordered = 03119; MOVREL-NEXT: enable_fwd_progress = 03120; MOVREL-NEXT: enable_sgpr_private_segment_wave_byte_offset = 03121; MOVREL-NEXT: user_sgpr_count = 143122; MOVREL-NEXT: enable_trap_handler = 03123; MOVREL-NEXT: enable_sgpr_workgroup_id_x = 13124; MOVREL-NEXT: enable_sgpr_workgroup_id_y = 13125; MOVREL-NEXT: enable_sgpr_workgroup_id_z = 13126; MOVREL-NEXT: enable_sgpr_workgroup_info = 03127; MOVREL-NEXT: enable_vgpr_workitem_id = 23128; MOVREL-NEXT: enable_exception_msb = 03129; MOVREL-NEXT: granulated_lds_size = 03130; MOVREL-NEXT: enable_exception = 03131; MOVREL-NEXT: enable_sgpr_private_segment_buffer = 13132; MOVREL-NEXT: enable_sgpr_dispatch_ptr = 13133; MOVREL-NEXT: enable_sgpr_queue_ptr = 13134; MOVREL-NEXT: enable_sgpr_kernarg_segment_ptr = 13135; MOVREL-NEXT: enable_sgpr_dispatch_id = 13136; MOVREL-NEXT: enable_sgpr_flat_scratch_init = 13137; MOVREL-NEXT: enable_sgpr_private_segment_size = 03138; MOVREL-NEXT: enable_sgpr_grid_workgroup_count_x = 03139; MOVREL-NEXT: enable_sgpr_grid_workgroup_count_y = 03140; MOVREL-NEXT: enable_sgpr_grid_workgroup_count_z = 03141; MOVREL-NEXT: enable_wavefront_size32 = 03142; MOVREL-NEXT: enable_ordered_append_gds = 03143; MOVREL-NEXT: private_element_size = 13144; MOVREL-NEXT: is_ptr64 = 13145; MOVREL-NEXT: is_dynamic_callstack = 03146; MOVREL-NEXT: is_debug_enabled = 03147; MOVREL-NEXT: is_xnack_enabled = 03148; MOVREL-NEXT: workitem_private_segment_byte_size = 03149; MOVREL-NEXT: workgroup_group_segment_byte_size = 03150; MOVREL-NEXT: gds_segment_byte_size = 03151; MOVREL-NEXT: kernarg_segment_byte_size = 283152; MOVREL-NEXT: workgroup_fbarrier_count = 03153; MOVREL-NEXT: wavefront_sgpr_count = 243154; MOVREL-NEXT: workitem_vgpr_count = 43155; MOVREL-NEXT: reserved_vgpr_first = 03156; MOVREL-NEXT: reserved_vgpr_count = 03157; MOVREL-NEXT: reserved_sgpr_first = 03158; MOVREL-NEXT: reserved_sgpr_count = 03159; MOVREL-NEXT: debug_wavefront_private_segment_offset_sgpr = 03160; MOVREL-NEXT: debug_private_segment_buffer_sgpr = 03161; MOVREL-NEXT: kernarg_segment_alignment = 43162; MOVREL-NEXT: group_segment_alignment = 43163; MOVREL-NEXT: private_segment_alignment = 43164; MOVREL-NEXT: wavefront_size = 63165; MOVREL-NEXT: call_convention = -13166; MOVREL-NEXT: runtime_loader_kernel_symbol = 03167; MOVREL-NEXT: .end_amd_kernel_code_t3168; MOVREL-NEXT: ; %bb.0: ; %entry3169; MOVREL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x03170; MOVREL-NEXT: s_load_dword s8, s[8:9], 0x83171; MOVREL-NEXT: s_add_i32 s12, s12, s173172; MOVREL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 83173; MOVREL-NEXT: s_mov_b32 s4, 03174; MOVREL-NEXT: s_mov_b32 s5, 0x400800003175; MOVREL-NEXT: s_waitcnt lgkmcnt(0)3176; MOVREL-NEXT: s_cmp_eq_u32 s8, 13177; MOVREL-NEXT: s_cselect_b64 s[6:7], 2.0, 1.03178; MOVREL-NEXT: s_cmp_eq_u32 s8, 23179; MOVREL-NEXT: s_mov_b32 s2, 03180; MOVREL-NEXT: s_cselect_b64 s[4:5], s[4:5], s[6:7]3181; MOVREL-NEXT: s_cmp_eq_u32 s8, 33182; MOVREL-NEXT: s_mov_b32 s3, 0x401400003183; MOVREL-NEXT: s_cselect_b64 s[4:5], 4.0, s[4:5]3184; MOVREL-NEXT: s_cmp_eq_u32 s8, 43185; MOVREL-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5]3186; MOVREL-NEXT: v_mov_b32_e32 v0, s23187; MOVREL-NEXT: v_mov_b32_e32 v3, s13188; MOVREL-NEXT: s_mov_b32 flat_scratch_lo, s133189; MOVREL-NEXT: v_mov_b32_e32 v1, s33190; MOVREL-NEXT: v_mov_b32_e32 v2, s03191; MOVREL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]3192; MOVREL-NEXT: s_endpgm3193;3194; GFX10-LABEL: dyn_extract_v5f64_s_s:3195; GFX10: .amd_kernel_code_t3196; GFX10-NEXT: amd_code_version_major = 13197; GFX10-NEXT: amd_code_version_minor = 23198; GFX10-NEXT: amd_machine_kind = 13199; GFX10-NEXT: amd_machine_version_major = 103200; GFX10-NEXT: amd_machine_version_minor = 13201; GFX10-NEXT: amd_machine_version_stepping = 03202; GFX10-NEXT: kernel_code_entry_byte_offset = 2563203; GFX10-NEXT: kernel_code_prefetch_byte_size = 03204; GFX10-NEXT: granulated_workitem_vgpr_count = 03205; GFX10-NEXT: granulated_wavefront_sgpr_count = 03206; GFX10-NEXT: priority = 03207; GFX10-NEXT: float_mode = 2403208; GFX10-NEXT: priv = 03209; GFX10-NEXT: enable_dx10_clamp = 13210; GFX10-NEXT: debug_mode = 03211; GFX10-NEXT: enable_ieee_mode = 13212; GFX10-NEXT: enable_wgp_mode = 13213; GFX10-NEXT: enable_mem_ordered = 13214; GFX10-NEXT: enable_fwd_progress = 13215; GFX10-NEXT: enable_sgpr_private_segment_wave_byte_offset = 03216; GFX10-NEXT: user_sgpr_count = 143217; GFX10-NEXT: enable_trap_handler = 03218; GFX10-NEXT: enable_sgpr_workgroup_id_x = 13219; GFX10-NEXT: enable_sgpr_workgroup_id_y = 13220; GFX10-NEXT: enable_sgpr_workgroup_id_z = 13221; GFX10-NEXT: enable_sgpr_workgroup_info = 03222; GFX10-NEXT: enable_vgpr_workitem_id = 23223; GFX10-NEXT: enable_exception_msb = 03224; GFX10-NEXT: granulated_lds_size = 03225; GFX10-NEXT: enable_exception = 03226; GFX10-NEXT: enable_sgpr_private_segment_buffer = 13227; GFX10-NEXT: enable_sgpr_dispatch_ptr = 13228; GFX10-NEXT: enable_sgpr_queue_ptr = 13229; GFX10-NEXT: enable_sgpr_kernarg_segment_ptr = 13230; GFX10-NEXT: enable_sgpr_dispatch_id = 13231; GFX10-NEXT: enable_sgpr_flat_scratch_init = 13232; GFX10-NEXT: enable_sgpr_private_segment_size = 03233; GFX10-NEXT: enable_sgpr_grid_workgroup_count_x = 03234; GFX10-NEXT: enable_sgpr_grid_workgroup_count_y = 03235; GFX10-NEXT: enable_sgpr_grid_workgroup_count_z = 03236; GFX10-NEXT: enable_wavefront_size32 = 13237; GFX10-NEXT: enable_ordered_append_gds = 03238; GFX10-NEXT: private_element_size = 13239; GFX10-NEXT: is_ptr64 = 13240; GFX10-NEXT: is_dynamic_callstack = 03241; GFX10-NEXT: is_debug_enabled = 03242; GFX10-NEXT: is_xnack_enabled = 13243; GFX10-NEXT: workitem_private_segment_byte_size = 03244; GFX10-NEXT: workgroup_group_segment_byte_size = 03245; GFX10-NEXT: gds_segment_byte_size = 03246; GFX10-NEXT: kernarg_segment_byte_size = 283247; GFX10-NEXT: workgroup_fbarrier_count = 03248; GFX10-NEXT: wavefront_sgpr_count = 103249; GFX10-NEXT: workitem_vgpr_count = 33250; GFX10-NEXT: reserved_vgpr_first = 03251; GFX10-NEXT: reserved_vgpr_count = 03252; GFX10-NEXT: reserved_sgpr_first = 03253; GFX10-NEXT: reserved_sgpr_count = 03254; GFX10-NEXT: debug_wavefront_private_segment_offset_sgpr = 03255; GFX10-NEXT: debug_private_segment_buffer_sgpr = 03256; GFX10-NEXT: kernarg_segment_alignment = 43257; GFX10-NEXT: group_segment_alignment = 43258; GFX10-NEXT: private_segment_alignment = 43259; GFX10-NEXT: wavefront_size = 53260; GFX10-NEXT: call_convention = -13261; GFX10-NEXT: runtime_loader_kernel_symbol = 03262; GFX10-NEXT: .end_amd_kernel_code_t3263; GFX10-NEXT: ; %bb.0: ; %entry3264; GFX10-NEXT: s_clause 0x13265; GFX10-NEXT: s_load_dword s6, s[8:9], 0x83266; GFX10-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x03267; GFX10-NEXT: s_mov_b32 s2, 03268; GFX10-NEXT: s_mov_b32 s3, 0x400800003269; GFX10-NEXT: v_mov_b32_e32 v2, 03270; GFX10-NEXT: s_waitcnt lgkmcnt(0)3271; GFX10-NEXT: s_cmp_eq_u32 s6, 13272; GFX10-NEXT: s_cselect_b64 s[4:5], 2.0, 1.03273; GFX10-NEXT: s_cmp_eq_u32 s6, 23274; GFX10-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5]3275; GFX10-NEXT: s_cmp_eq_u32 s6, 33276; GFX10-NEXT: s_mov_b32 s4, 03277; GFX10-NEXT: s_mov_b32 s5, 0x401400003278; GFX10-NEXT: s_cselect_b64 s[2:3], 4.0, s[2:3]3279; GFX10-NEXT: s_cmp_eq_u32 s6, 43280; GFX10-NEXT: s_cselect_b64 s[2:3], s[4:5], s[2:3]3281; GFX10-NEXT: v_mov_b32_e32 v0, s23282; GFX10-NEXT: v_mov_b32_e32 v1, s33283; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3284; GFX10-NEXT: s_endpgm3285;3286; GFX11-LABEL: dyn_extract_v5f64_s_s:3287; GFX11: .amd_kernel_code_t3288; GFX11-NEXT: amd_code_version_major = 13289; GFX11-NEXT: amd_code_version_minor = 23290; GFX11-NEXT: amd_machine_kind = 13291; GFX11-NEXT: amd_machine_version_major = 113292; GFX11-NEXT: amd_machine_version_minor = 03293; GFX11-NEXT: amd_machine_version_stepping = 03294; GFX11-NEXT: kernel_code_entry_byte_offset = 2563295; GFX11-NEXT: kernel_code_prefetch_byte_size = 03296; GFX11-NEXT: granulated_workitem_vgpr_count = 03297; GFX11-NEXT: granulated_wavefront_sgpr_count = 03298; GFX11-NEXT: priority = 03299; GFX11-NEXT: float_mode = 2403300; GFX11-NEXT: priv = 03301; GFX11-NEXT: enable_dx10_clamp = 13302; GFX11-NEXT: debug_mode = 03303; GFX11-NEXT: enable_ieee_mode = 13304; GFX11-NEXT: enable_wgp_mode = 13305; GFX11-NEXT: enable_mem_ordered = 13306; GFX11-NEXT: enable_fwd_progress = 13307; GFX11-NEXT: enable_sgpr_private_segment_wave_byte_offset = 03308; GFX11-NEXT: user_sgpr_count = 133309; GFX11-NEXT: enable_trap_handler = 03310; GFX11-NEXT: enable_sgpr_workgroup_id_x = 13311; GFX11-NEXT: enable_sgpr_workgroup_id_y = 13312; GFX11-NEXT: enable_sgpr_workgroup_id_z = 13313; GFX11-NEXT: enable_sgpr_workgroup_info = 03314; GFX11-NEXT: enable_vgpr_workitem_id = 23315; GFX11-NEXT: enable_exception_msb = 03316; GFX11-NEXT: granulated_lds_size = 03317; GFX11-NEXT: enable_exception = 03318; GFX11-NEXT: enable_sgpr_private_segment_buffer = 03319; GFX11-NEXT: enable_sgpr_dispatch_ptr = 13320; GFX11-NEXT: enable_sgpr_queue_ptr = 13321; GFX11-NEXT: enable_sgpr_kernarg_segment_ptr = 13322; GFX11-NEXT: enable_sgpr_dispatch_id = 13323; GFX11-NEXT: enable_sgpr_flat_scratch_init = 03324; GFX11-NEXT: enable_sgpr_private_segment_size = 03325; GFX11-NEXT: enable_sgpr_grid_workgroup_count_x = 03326; GFX11-NEXT: enable_sgpr_grid_workgroup_count_y = 03327; GFX11-NEXT: enable_sgpr_grid_workgroup_count_z = 03328; GFX11-NEXT: enable_wavefront_size32 = 13329; GFX11-NEXT: enable_ordered_append_gds = 03330; GFX11-NEXT: private_element_size = 13331; GFX11-NEXT: is_ptr64 = 13332; GFX11-NEXT: is_dynamic_callstack = 03333; GFX11-NEXT: is_debug_enabled = 03334; GFX11-NEXT: is_xnack_enabled = 03335; GFX11-NEXT: workitem_private_segment_byte_size = 03336; GFX11-NEXT: workgroup_group_segment_byte_size = 03337; GFX11-NEXT: gds_segment_byte_size = 03338; GFX11-NEXT: kernarg_segment_byte_size = 283339; GFX11-NEXT: workgroup_fbarrier_count = 03340; GFX11-NEXT: wavefront_sgpr_count = 73341; GFX11-NEXT: workitem_vgpr_count = 33342; GFX11-NEXT: reserved_vgpr_first = 03343; GFX11-NEXT: reserved_vgpr_count = 03344; GFX11-NEXT: reserved_sgpr_first = 03345; GFX11-NEXT: reserved_sgpr_count = 03346; GFX11-NEXT: debug_wavefront_private_segment_offset_sgpr = 03347; GFX11-NEXT: debug_private_segment_buffer_sgpr = 03348; GFX11-NEXT: kernarg_segment_alignment = 43349; GFX11-NEXT: group_segment_alignment = 43350; GFX11-NEXT: private_segment_alignment = 43351; GFX11-NEXT: wavefront_size = 53352; GFX11-NEXT: call_convention = -13353; GFX11-NEXT: runtime_loader_kernel_symbol = 03354; GFX11-NEXT: .end_amd_kernel_code_t3355; GFX11-NEXT: ; %bb.0: ; %entry3356; GFX11-NEXT: s_clause 0x13357; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x83358; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x03359; GFX11-NEXT: s_mov_b32 s2, 03360; GFX11-NEXT: s_mov_b32 s3, 0x400800003361; GFX11-NEXT: v_mov_b32_e32 v2, 03362; GFX11-NEXT: s_waitcnt lgkmcnt(0)3363; GFX11-NEXT: s_cmp_eq_u32 s6, 13364; GFX11-NEXT: s_cselect_b64 s[4:5], 2.0, 1.03365; GFX11-NEXT: s_cmp_eq_u32 s6, 23366; GFX11-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5]3367; GFX11-NEXT: s_cmp_eq_u32 s6, 33368; GFX11-NEXT: s_mov_b32 s4, 03369; GFX11-NEXT: s_mov_b32 s5, 0x401400003370; GFX11-NEXT: s_cselect_b64 s[2:3], 4.0, s[2:3]3371; GFX11-NEXT: s_cmp_eq_u32 s6, 43372; GFX11-NEXT: s_cselect_b64 s[2:3], s[4:5], s[2:3]3373; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s33374; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]3375; GFX11-NEXT: s_endpgm3376entry:3377 %ext = extractelement <5 x double> <double 1.0, double 2.0, double 3.0, double 4.0, double 5.0>, i32 %sel3378 store double %ext, ptr addrspace(1) %out3379 ret void3380}3381 3382define float @dyn_extract_v15f32_const_s_v(i32 %sel) {3383; GCN-LABEL: dyn_extract_v15f32_const_s_v:3384; GCN: ; %bb.0: ; %entry3385; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3386; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v03387; GCN-NEXT: v_mov_b32_e32 v1, 0x404000003388; GCN-NEXT: v_cndmask_b32_e64 v13, 1.0, 2.0, vcc3389; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v03390; GCN-NEXT: v_cndmask_b32_e32 v1, v13, v1, vcc3391; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v03392; GCN-NEXT: v_mov_b32_e32 v2, 0x40a000003393; GCN-NEXT: v_cndmask_b32_e64 v1, v1, 4.0, vcc3394; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v03395; GCN-NEXT: v_mov_b32_e32 v3, 0x40c000003396; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3397; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v03398; GCN-NEXT: v_mov_b32_e32 v4, 0x40e000003399; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc3400; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v03401; GCN-NEXT: v_mov_b32_e32 v5, 0x410000003402; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc3403; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v03404; GCN-NEXT: v_mov_b32_e32 v6, 0x411000003405; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc3406; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 8, v03407; GCN-NEXT: v_mov_b32_e32 v7, 0x412000003408; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc3409; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 9, v03410; GCN-NEXT: v_mov_b32_e32 v8, 0x413000003411; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc3412; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 10, v03413; GCN-NEXT: v_mov_b32_e32 v9, 0x414000003414; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc3415; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 11, v03416; GCN-NEXT: v_mov_b32_e32 v10, 0x415000003417; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc3418; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 12, v03419; GCN-NEXT: v_mov_b32_e32 v11, 0x416000003420; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc3421; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 13, v03422; GCN-NEXT: v_mov_b32_e32 v12, 0x417000003423; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc3424; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 14, v03425; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v12, vcc3426; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 15, v03427; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3428; GCN-NEXT: s_setpc_b64 s[30:31]3429;3430; GFX10-LABEL: dyn_extract_v15f32_const_s_v:3431; GFX10: ; %bb.0: ; %entry3432; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3433; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v03434; GFX10-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc_lo3435; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v03436; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x40400000, vcc_lo3437; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v03438; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 4.0, vcc_lo3439; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v03440; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x40a00000, vcc_lo3441; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v03442; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x40c00000, vcc_lo3443; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v03444; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x40e00000, vcc_lo3445; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v03446; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x41000000, vcc_lo3447; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 8, v03448; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x41100000, vcc_lo3449; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 9, v03450; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x41200000, vcc_lo3451; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 10, v03452; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x41300000, vcc_lo3453; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 11, v03454; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x41400000, vcc_lo3455; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 12, v03456; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x41500000, vcc_lo3457; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 13, v03458; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x41600000, vcc_lo3459; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 14, v03460; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, 0x41700000, vcc_lo3461; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 15, v03462; GFX10-NEXT: v_cndmask_b32_e64 v0, v1, s4, vcc_lo3463; GFX10-NEXT: s_setpc_b64 s[30:31]3464;3465; GFX11-LABEL: dyn_extract_v15f32_const_s_v:3466; GFX11: ; %bb.0: ; %entry3467; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3468; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v03469; GFX11-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc_lo3470; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v03471; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x40400000, vcc_lo3472; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v03473; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 4.0, vcc_lo3474; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v03475; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x40a00000, vcc_lo3476; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v03477; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x40c00000, vcc_lo3478; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v03479; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x40e00000, vcc_lo3480; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v03481; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x41000000, vcc_lo3482; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 8, v03483; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x41100000, vcc_lo3484; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 9, v03485; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x41200000, vcc_lo3486; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 10, v03487; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x41300000, vcc_lo3488; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 11, v03489; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x41400000, vcc_lo3490; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 12, v03491; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x41500000, vcc_lo3492; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 13, v03493; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x41600000, vcc_lo3494; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 14, v03495; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, 0x41700000, vcc_lo3496; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 15, v03497; GFX11-NEXT: v_cndmask_b32_e64 v0, v1, s0, vcc_lo3498; GFX11-NEXT: s_setpc_b64 s[30:31]3499entry:3500 %ext = extractelement <15 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, float 11.0, float 12.0, float 13.0, float 14.0, float 15.0>, i32 %sel3501 ret float %ext3502}3503 3504define amdgpu_ps float @dyn_extract_v15f32_const_s_s(i32 inreg %sel) {3505; GCN-LABEL: dyn_extract_v15f32_const_s_s:3506; GCN: ; %bb.0: ; %entry3507; GCN-NEXT: s_mov_b32 s4, 1.03508; GCN-NEXT: s_mov_b32 m0, s23509; GCN-NEXT: s_mov_b32 s18, 0x417000003510; GCN-NEXT: s_mov_b32 s17, 0x416000003511; GCN-NEXT: s_mov_b32 s16, 0x415000003512; GCN-NEXT: s_mov_b32 s15, 0x414000003513; GCN-NEXT: s_mov_b32 s14, 0x413000003514; GCN-NEXT: s_mov_b32 s13, 0x412000003515; GCN-NEXT: s_mov_b32 s12, 0x411000003516; GCN-NEXT: s_mov_b32 s11, 0x410000003517; GCN-NEXT: s_mov_b32 s10, 0x40e000003518; GCN-NEXT: s_mov_b32 s9, 0x40c000003519; GCN-NEXT: s_mov_b32 s8, 0x40a000003520; GCN-NEXT: s_mov_b32 s7, 4.03521; GCN-NEXT: s_mov_b32 s6, 0x404000003522; GCN-NEXT: s_mov_b32 s5, 2.03523; GCN-NEXT: s_movrels_b32 s0, s43524; GCN-NEXT: v_mov_b32_e32 v0, s03525; GCN-NEXT: ; return to shader part epilog3526;3527; GFX10PLUS-LABEL: dyn_extract_v15f32_const_s_s:3528; GFX10PLUS: ; %bb.0: ; %entry3529; GFX10PLUS-NEXT: s_mov_b32 s4, 1.03530; GFX10PLUS-NEXT: s_mov_b32 m0, s23531; GFX10PLUS-NEXT: s_mov_b32 s18, 0x417000003532; GFX10PLUS-NEXT: s_mov_b32 s17, 0x416000003533; GFX10PLUS-NEXT: s_mov_b32 s16, 0x415000003534; GFX10PLUS-NEXT: s_mov_b32 s15, 0x414000003535; GFX10PLUS-NEXT: s_mov_b32 s14, 0x413000003536; GFX10PLUS-NEXT: s_mov_b32 s13, 0x412000003537; GFX10PLUS-NEXT: s_mov_b32 s12, 0x411000003538; GFX10PLUS-NEXT: s_mov_b32 s11, 0x410000003539; GFX10PLUS-NEXT: s_mov_b32 s10, 0x40e000003540; GFX10PLUS-NEXT: s_mov_b32 s9, 0x40c000003541; GFX10PLUS-NEXT: s_mov_b32 s8, 0x40a000003542; GFX10PLUS-NEXT: s_mov_b32 s7, 4.03543; GFX10PLUS-NEXT: s_mov_b32 s6, 0x404000003544; GFX10PLUS-NEXT: s_mov_b32 s5, 2.03545; GFX10PLUS-NEXT: s_movrels_b32 s0, s43546; GFX10PLUS-NEXT: v_mov_b32_e32 v0, s03547; GFX10PLUS-NEXT: ; return to shader part epilog3548entry:3549 %ext = extractelement <15 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, float 11.0, float 12.0, float 13.0, float 14.0, float 15.0>, i32 %sel3550 ret float %ext3551}3552 3553define amdgpu_ps float @dyn_extract_v15f32_s_v(<15 x float> inreg %vec, i32 %sel) {3554; GCN-LABEL: dyn_extract_v15f32_s_v:3555; GCN: ; %bb.0: ; %entry3556; GCN-NEXT: v_mov_b32_e32 v1, s23557; GCN-NEXT: v_mov_b32_e32 v2, s33558; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v03559; GCN-NEXT: v_mov_b32_e32 v3, s43560; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3561; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v03562; GCN-NEXT: v_mov_b32_e32 v4, s53563; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc3564; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v03565; GCN-NEXT: v_mov_b32_e32 v5, s63566; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc3567; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v03568; GCN-NEXT: v_mov_b32_e32 v6, s73569; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc3570; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v03571; GCN-NEXT: v_mov_b32_e32 v7, s83572; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc3573; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v03574; GCN-NEXT: v_mov_b32_e32 v8, s93575; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc3576; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v03577; GCN-NEXT: v_mov_b32_e32 v9, s103578; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc3579; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 8, v03580; GCN-NEXT: v_mov_b32_e32 v10, s113581; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc3582; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 9, v03583; GCN-NEXT: v_mov_b32_e32 v11, s123584; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc3585; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 10, v03586; GCN-NEXT: v_mov_b32_e32 v12, s133587; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc3588; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 11, v03589; GCN-NEXT: v_mov_b32_e32 v13, s143590; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v12, vcc3591; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 12, v03592; GCN-NEXT: v_mov_b32_e32 v14, s153593; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc3594; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 13, v03595; GCN-NEXT: v_mov_b32_e32 v15, s163596; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v14, vcc3597; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 14, v03598; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v15, vcc3599; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 15, v03600; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3601; GCN-NEXT: ; return to shader part epilog3602;3603; GFX10PLUS-LABEL: dyn_extract_v15f32_s_v:3604; GFX10PLUS: ; %bb.0: ; %entry3605; GFX10PLUS-NEXT: v_mov_b32_e32 v1, s33606; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v03607; GFX10PLUS-NEXT: v_cndmask_b32_e32 v1, s2, v1, vcc_lo3608; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v03609; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s4, vcc_lo3610; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v03611; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s5, vcc_lo3612; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v03613; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s6, vcc_lo3614; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v03615; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s7, vcc_lo3616; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v03617; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s8, vcc_lo3618; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v03619; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s9, vcc_lo3620; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 8, v03621; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s10, vcc_lo3622; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 9, v03623; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s11, vcc_lo3624; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 10, v03625; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s12, vcc_lo3626; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 11, v03627; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s13, vcc_lo3628; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 12, v03629; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s14, vcc_lo3630; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 13, v03631; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s15, vcc_lo3632; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 14, v03633; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, s16, vcc_lo3634; GFX10PLUS-NEXT: v_cmp_eq_u32_e32 vcc_lo, 15, v03635; GFX10PLUS-NEXT: v_cndmask_b32_e64 v0, v1, s0, vcc_lo3636; GFX10PLUS-NEXT: ; return to shader part epilog3637entry:3638 %ext = extractelement <15 x float> %vec, i32 %sel3639 ret float %ext3640}3641 3642define float @dyn_extract_v15f32_v_v(<15 x float> %vec, i32 %sel) {3643; GCN-LABEL: dyn_extract_v15f32_v_v:3644; GCN: ; %bb.0: ; %entry3645; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3646; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v153647; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3648; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v153649; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3650; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v153651; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc3652; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v153653; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc3654; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v153655; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc3656; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v153657; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc3658; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v153659; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc3660; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 8, v153661; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc3662; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 9, v153663; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc3664; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 10, v153665; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc3666; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 11, v153667; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v11, vcc3668; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 12, v153669; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc3670; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 13, v153671; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v13, vcc3672; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 14, v153673; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc3674; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 15, v153675; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v0, vcc3676; GCN-NEXT: s_setpc_b64 s[30:31]3677;3678; GFX10-LABEL: dyn_extract_v15f32_v_v:3679; GFX10: ; %bb.0: ; %entry3680; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3681; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v153682; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo3683; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v153684; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo3685; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v153686; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo3687; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v153688; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo3689; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v153690; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo3691; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v153692; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo3693; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v153694; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo3695; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 8, v153696; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc_lo3697; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 9, v153698; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc_lo3699; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 10, v153700; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo3701; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 11, v153702; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v11, vcc_lo3703; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 12, v153704; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc_lo3705; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 13, v153706; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v13, vcc_lo3707; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 14, v153708; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc_lo3709; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 15, v153710; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, s4, vcc_lo3711; GFX10-NEXT: s_setpc_b64 s[30:31]3712;3713; GFX11-LABEL: dyn_extract_v15f32_v_v:3714; GFX11: ; %bb.0: ; %entry3715; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3716; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v153717; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo3718; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v153719; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo3720; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v153721; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo3722; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v153723; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo3724; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v153725; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo3726; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v153727; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo3728; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v153729; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo3730; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 8, v153731; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc_lo3732; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 9, v153733; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc_lo3734; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 10, v153735; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo3736; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 11, v153737; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v11, vcc_lo3738; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 12, v153739; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc_lo3740; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 13, v153741; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v13, vcc_lo3742; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 14, v153743; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc_lo3744; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 15, v153745; GFX11-NEXT: v_cndmask_b32_e64 v0, v0, s0, vcc_lo3746; GFX11-NEXT: s_setpc_b64 s[30:31]3747entry:3748 %ext = extractelement <15 x float> %vec, i32 %sel3749 ret float %ext3750}3751 3752define amdgpu_ps float @dyn_extract_v15f32_v_s(<15 x float> %vec, i32 inreg %sel) {3753; GPRIDX-LABEL: dyn_extract_v15f32_v_s:3754; GPRIDX: ; %bb.0: ; %entry3755; GPRIDX-NEXT: s_set_gpr_idx_on s2, gpr_idx(SRC0)3756; GPRIDX-NEXT: v_mov_b32_e32 v0, v03757; GPRIDX-NEXT: s_set_gpr_idx_off3758; GPRIDX-NEXT: ; return to shader part epilog3759;3760; MOVREL-LABEL: dyn_extract_v15f32_v_s:3761; MOVREL: ; %bb.0: ; %entry3762; MOVREL-NEXT: s_mov_b32 m0, s23763; MOVREL-NEXT: v_movrels_b32_e32 v0, v03764; MOVREL-NEXT: ; return to shader part epilog3765;3766; GFX10PLUS-LABEL: dyn_extract_v15f32_v_s:3767; GFX10PLUS: ; %bb.0: ; %entry3768; GFX10PLUS-NEXT: s_mov_b32 m0, s23769; GFX10PLUS-NEXT: v_movrels_b32_e32 v0, v03770; GFX10PLUS-NEXT: ; return to shader part epilog3771entry:3772 %ext = extractelement <15 x float> %vec, i32 %sel3773 ret float %ext3774}3775 3776define amdgpu_ps float @dyn_extract_v15f32_s_s(<15 x float> inreg %vec, i32 inreg %sel) {3777; GCN-LABEL: dyn_extract_v15f32_s_s:3778; GCN: ; %bb.0: ; %entry3779; GCN-NEXT: s_mov_b32 s0, s23780; GCN-NEXT: s_mov_b32 m0, s173781; GCN-NEXT: s_mov_b32 s1, s33782; GCN-NEXT: s_mov_b32 s2, s43783; GCN-NEXT: s_mov_b32 s3, s53784; GCN-NEXT: s_mov_b32 s4, s63785; GCN-NEXT: s_mov_b32 s5, s73786; GCN-NEXT: s_mov_b32 s6, s83787; GCN-NEXT: s_mov_b32 s7, s93788; GCN-NEXT: s_mov_b32 s8, s103789; GCN-NEXT: s_mov_b32 s9, s113790; GCN-NEXT: s_mov_b32 s10, s123791; GCN-NEXT: s_mov_b32 s11, s133792; GCN-NEXT: s_mov_b32 s12, s143793; GCN-NEXT: s_mov_b32 s13, s153794; GCN-NEXT: s_mov_b32 s14, s163795; GCN-NEXT: s_movrels_b32 s0, s03796; GCN-NEXT: v_mov_b32_e32 v0, s03797; GCN-NEXT: ; return to shader part epilog3798;3799; GFX10PLUS-LABEL: dyn_extract_v15f32_s_s:3800; GFX10PLUS: ; %bb.0: ; %entry3801; GFX10PLUS-NEXT: s_mov_b32 s0, s23802; GFX10PLUS-NEXT: s_mov_b32 m0, s173803; GFX10PLUS-NEXT: s_mov_b32 s1, s33804; GFX10PLUS-NEXT: s_mov_b32 s2, s43805; GFX10PLUS-NEXT: s_mov_b32 s3, s53806; GFX10PLUS-NEXT: s_mov_b32 s4, s63807; GFX10PLUS-NEXT: s_mov_b32 s5, s73808; GFX10PLUS-NEXT: s_mov_b32 s6, s83809; GFX10PLUS-NEXT: s_mov_b32 s7, s93810; GFX10PLUS-NEXT: s_mov_b32 s8, s103811; GFX10PLUS-NEXT: s_mov_b32 s9, s113812; GFX10PLUS-NEXT: s_mov_b32 s10, s123813; GFX10PLUS-NEXT: s_mov_b32 s11, s133814; GFX10PLUS-NEXT: s_mov_b32 s12, s143815; GFX10PLUS-NEXT: s_mov_b32 s13, s153816; GFX10PLUS-NEXT: s_mov_b32 s14, s163817; GFX10PLUS-NEXT: s_movrels_b32 s0, s03818; GFX10PLUS-NEXT: v_mov_b32_e32 v0, s03819; GFX10PLUS-NEXT: ; return to shader part epilog3820entry:3821 %ext = extractelement <15 x float> %vec, i32 %sel3822 ret float %ext3823}3824 3825define amdgpu_ps float @dyn_extract_v15f32_s_s_offset3(<15 x float> inreg %vec, i32 inreg %sel) {3826; GCN-LABEL: dyn_extract_v15f32_s_s_offset3:3827; GCN: ; %bb.0: ; %entry3828; GCN-NEXT: s_mov_b32 s0, s23829; GCN-NEXT: s_mov_b32 s1, s33830; GCN-NEXT: s_mov_b32 s3, s53831; GCN-NEXT: s_mov_b32 m0, s173832; GCN-NEXT: s_mov_b32 s2, s43833; GCN-NEXT: s_mov_b32 s4, s63834; GCN-NEXT: s_mov_b32 s5, s73835; GCN-NEXT: s_mov_b32 s6, s83836; GCN-NEXT: s_mov_b32 s7, s93837; GCN-NEXT: s_mov_b32 s8, s103838; GCN-NEXT: s_mov_b32 s9, s113839; GCN-NEXT: s_mov_b32 s10, s123840; GCN-NEXT: s_mov_b32 s11, s133841; GCN-NEXT: s_mov_b32 s12, s143842; GCN-NEXT: s_mov_b32 s13, s153843; GCN-NEXT: s_mov_b32 s14, s163844; GCN-NEXT: s_movrels_b32 s0, s33845; GCN-NEXT: v_mov_b32_e32 v0, s03846; GCN-NEXT: ; return to shader part epilog3847;3848; GFX10PLUS-LABEL: dyn_extract_v15f32_s_s_offset3:3849; GFX10PLUS: ; %bb.0: ; %entry3850; GFX10PLUS-NEXT: s_mov_b32 s1, s33851; GFX10PLUS-NEXT: s_mov_b32 s3, s53852; GFX10PLUS-NEXT: s_mov_b32 m0, s173853; GFX10PLUS-NEXT: s_mov_b32 s0, s23854; GFX10PLUS-NEXT: s_mov_b32 s2, s43855; GFX10PLUS-NEXT: s_mov_b32 s4, s63856; GFX10PLUS-NEXT: s_mov_b32 s5, s73857; GFX10PLUS-NEXT: s_mov_b32 s6, s83858; GFX10PLUS-NEXT: s_mov_b32 s7, s93859; GFX10PLUS-NEXT: s_mov_b32 s8, s103860; GFX10PLUS-NEXT: s_mov_b32 s9, s113861; GFX10PLUS-NEXT: s_mov_b32 s10, s123862; GFX10PLUS-NEXT: s_mov_b32 s11, s133863; GFX10PLUS-NEXT: s_mov_b32 s12, s143864; GFX10PLUS-NEXT: s_mov_b32 s13, s153865; GFX10PLUS-NEXT: s_mov_b32 s14, s163866; GFX10PLUS-NEXT: s_movrels_b32 s0, s33867; GFX10PLUS-NEXT: v_mov_b32_e32 v0, s03868; GFX10PLUS-NEXT: ; return to shader part epilog3869entry:3870 %add = add i32 %sel, 33871 %ext = extractelement <15 x float> %vec, i32 %add3872 ret float %ext3873}3874 3875define float @dyn_extract_v15f32_v_v_offset3(<15 x float> %vec, i32 %sel) {3876; GPRIDX-LABEL: dyn_extract_v15f32_v_v_offset3:3877; GPRIDX: ; %bb.0: ; %entry3878; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3879; GPRIDX-NEXT: v_add_u32_e32 v15, 3, v153880; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v153881; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3882; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v153883; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3884; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v153885; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc3886; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v153887; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc3888; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v153889; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc3890; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v153891; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc3892; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v153893; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc3894; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 8, v153895; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc3896; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 9, v153897; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc3898; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 10, v153899; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc3900; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 11, v153901; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v11, vcc3902; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 12, v153903; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc3904; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 13, v153905; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v13, vcc3906; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 14, v153907; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc3908; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 15, v153909; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v0, v0, vcc3910; GPRIDX-NEXT: s_setpc_b64 s[30:31]3911;3912; MOVREL-LABEL: dyn_extract_v15f32_v_v_offset3:3913; MOVREL: ; %bb.0: ; %entry3914; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3915; MOVREL-NEXT: v_add_u32_e32 v15, vcc, 3, v153916; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 1, v153917; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3918; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 2, v153919; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3920; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 3, v153921; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc3922; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 4, v153923; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc3924; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 5, v153925; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc3926; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 6, v153927; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc3928; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 7, v153929; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc3930; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 8, v153931; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc3932; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 9, v153933; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc3934; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 10, v153935; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc3936; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 11, v153937; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v11, vcc3938; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 12, v153939; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc3940; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 13, v153941; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v13, vcc3942; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 14, v153943; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc3944; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 15, v153945; MOVREL-NEXT: v_cndmask_b32_e32 v0, v0, v0, vcc3946; MOVREL-NEXT: s_setpc_b64 s[30:31]3947;3948; GFX10-LABEL: dyn_extract_v15f32_v_v_offset3:3949; GFX10: ; %bb.0: ; %entry3950; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3951; GFX10-NEXT: v_add_nc_u32_e32 v15, 3, v153952; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v153953; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo3954; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v153955; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo3956; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v153957; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo3958; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v153959; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo3960; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v153961; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo3962; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v153963; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo3964; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v153965; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo3966; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 8, v153967; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc_lo3968; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 9, v153969; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc_lo3970; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 10, v153971; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo3972; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 11, v153973; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v11, vcc_lo3974; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 12, v153975; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc_lo3976; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 13, v153977; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v13, vcc_lo3978; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 14, v153979; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc_lo3980; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 15, v153981; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, s4, vcc_lo3982; GFX10-NEXT: s_setpc_b64 s[30:31]3983;3984; GFX11-LABEL: dyn_extract_v15f32_v_v_offset3:3985; GFX11: ; %bb.0: ; %entry3986; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3987; GFX11-NEXT: v_add_nc_u32_e32 v15, 3, v153988; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v153989; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo3990; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v153991; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo3992; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v153993; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo3994; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v153995; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo3996; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v153997; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo3998; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v153999; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo4000; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v154001; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo4002; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 8, v154003; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc_lo4004; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 9, v154005; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc_lo4006; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 10, v154007; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo4008; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 11, v154009; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v11, vcc_lo4010; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 12, v154011; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc_lo4012; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 13, v154013; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v13, vcc_lo4014; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 14, v154015; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v14, vcc_lo4016; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 15, v154017; GFX11-NEXT: v_cndmask_b32_e64 v0, v0, s0, vcc_lo4018; GFX11-NEXT: s_setpc_b64 s[30:31]4019entry:4020 %add = add i32 %sel, 34021 %ext = extractelement <15 x float> %vec, i32 %add4022 ret float %ext4023}4024 4025define amdgpu_kernel void @dyn_extract_v4f32_s_s_s(ptr addrspace(1) %out, i32 %sel) {4026; GPRIDX-LABEL: dyn_extract_v4f32_s_s_s:4027; GPRIDX: .amd_kernel_code_t4028; GPRIDX-NEXT: amd_code_version_major = 14029; GPRIDX-NEXT: amd_code_version_minor = 24030; GPRIDX-NEXT: amd_machine_kind = 14031; GPRIDX-NEXT: amd_machine_version_major = 94032; GPRIDX-NEXT: amd_machine_version_minor = 04033; GPRIDX-NEXT: amd_machine_version_stepping = 04034; GPRIDX-NEXT: kernel_code_entry_byte_offset = 2564035; GPRIDX-NEXT: kernel_code_prefetch_byte_size = 04036; GPRIDX-NEXT: granulated_workitem_vgpr_count = 04037; GPRIDX-NEXT: granulated_wavefront_sgpr_count = 14038; GPRIDX-NEXT: priority = 04039; GPRIDX-NEXT: float_mode = 2404040; GPRIDX-NEXT: priv = 04041; GPRIDX-NEXT: enable_dx10_clamp = 14042; GPRIDX-NEXT: debug_mode = 04043; GPRIDX-NEXT: enable_ieee_mode = 14044; GPRIDX-NEXT: enable_wgp_mode = 04045; GPRIDX-NEXT: enable_mem_ordered = 04046; GPRIDX-NEXT: enable_fwd_progress = 04047; GPRIDX-NEXT: enable_sgpr_private_segment_wave_byte_offset = 04048; GPRIDX-NEXT: user_sgpr_count = 144049; GPRIDX-NEXT: enable_trap_handler = 04050; GPRIDX-NEXT: enable_sgpr_workgroup_id_x = 14051; GPRIDX-NEXT: enable_sgpr_workgroup_id_y = 14052; GPRIDX-NEXT: enable_sgpr_workgroup_id_z = 14053; GPRIDX-NEXT: enable_sgpr_workgroup_info = 04054; GPRIDX-NEXT: enable_vgpr_workitem_id = 24055; GPRIDX-NEXT: enable_exception_msb = 04056; GPRIDX-NEXT: granulated_lds_size = 04057; GPRIDX-NEXT: enable_exception = 04058; GPRIDX-NEXT: enable_sgpr_private_segment_buffer = 14059; GPRIDX-NEXT: enable_sgpr_dispatch_ptr = 14060; GPRIDX-NEXT: enable_sgpr_queue_ptr = 14061; GPRIDX-NEXT: enable_sgpr_kernarg_segment_ptr = 14062; GPRIDX-NEXT: enable_sgpr_dispatch_id = 14063; GPRIDX-NEXT: enable_sgpr_flat_scratch_init = 14064; GPRIDX-NEXT: enable_sgpr_private_segment_size = 04065; GPRIDX-NEXT: enable_sgpr_grid_workgroup_count_x = 04066; GPRIDX-NEXT: enable_sgpr_grid_workgroup_count_y = 04067; GPRIDX-NEXT: enable_sgpr_grid_workgroup_count_z = 04068; GPRIDX-NEXT: enable_wavefront_size32 = 04069; GPRIDX-NEXT: enable_ordered_append_gds = 04070; GPRIDX-NEXT: private_element_size = 14071; GPRIDX-NEXT: is_ptr64 = 14072; GPRIDX-NEXT: is_dynamic_callstack = 04073; GPRIDX-NEXT: is_debug_enabled = 04074; GPRIDX-NEXT: is_xnack_enabled = 14075; GPRIDX-NEXT: workitem_private_segment_byte_size = 04076; GPRIDX-NEXT: workgroup_group_segment_byte_size = 04077; GPRIDX-NEXT: gds_segment_byte_size = 04078; GPRIDX-NEXT: kernarg_segment_byte_size = 284079; GPRIDX-NEXT: workgroup_fbarrier_count = 04080; GPRIDX-NEXT: wavefront_sgpr_count = 164081; GPRIDX-NEXT: workitem_vgpr_count = 24082; GPRIDX-NEXT: reserved_vgpr_first = 04083; GPRIDX-NEXT: reserved_vgpr_count = 04084; GPRIDX-NEXT: reserved_sgpr_first = 04085; GPRIDX-NEXT: reserved_sgpr_count = 04086; GPRIDX-NEXT: debug_wavefront_private_segment_offset_sgpr = 04087; GPRIDX-NEXT: debug_private_segment_buffer_sgpr = 04088; GPRIDX-NEXT: kernarg_segment_alignment = 44089; GPRIDX-NEXT: group_segment_alignment = 44090; GPRIDX-NEXT: private_segment_alignment = 44091; GPRIDX-NEXT: wavefront_size = 64092; GPRIDX-NEXT: call_convention = -14093; GPRIDX-NEXT: runtime_loader_kernel_symbol = 04094; GPRIDX-NEXT: .end_amd_kernel_code_t4095; GPRIDX-NEXT: ; %bb.0: ; %entry4096; GPRIDX-NEXT: s_load_dword s2, s[8:9], 0x84097; GPRIDX-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x04098; GPRIDX-NEXT: v_mov_b32_e32 v1, 04099; GPRIDX-NEXT: s_waitcnt lgkmcnt(0)4100; GPRIDX-NEXT: s_cmp_eq_u32 s2, 14101; GPRIDX-NEXT: s_cselect_b32 s3, 2.0, 1.04102; GPRIDX-NEXT: s_cmp_eq_u32 s2, 24103; GPRIDX-NEXT: s_cselect_b32 s3, 0x40400000, s34104; GPRIDX-NEXT: s_cmp_eq_u32 s2, 34105; GPRIDX-NEXT: s_cselect_b32 s2, 4.0, s34106; GPRIDX-NEXT: v_mov_b32_e32 v0, s24107; GPRIDX-NEXT: global_store_dword v1, v0, s[0:1]4108; GPRIDX-NEXT: s_endpgm4109;4110; MOVREL-LABEL: dyn_extract_v4f32_s_s_s:4111; MOVREL: .amd_kernel_code_t4112; MOVREL-NEXT: amd_code_version_major = 14113; MOVREL-NEXT: amd_code_version_minor = 24114; MOVREL-NEXT: amd_machine_kind = 14115; MOVREL-NEXT: amd_machine_version_major = 84116; MOVREL-NEXT: amd_machine_version_minor = 04117; MOVREL-NEXT: amd_machine_version_stepping = 34118; MOVREL-NEXT: kernel_code_entry_byte_offset = 2564119; MOVREL-NEXT: kernel_code_prefetch_byte_size = 04120; MOVREL-NEXT: granulated_workitem_vgpr_count = 04121; MOVREL-NEXT: granulated_wavefront_sgpr_count = 24122; MOVREL-NEXT: priority = 04123; MOVREL-NEXT: float_mode = 2404124; MOVREL-NEXT: priv = 04125; MOVREL-NEXT: enable_dx10_clamp = 14126; MOVREL-NEXT: debug_mode = 04127; MOVREL-NEXT: enable_ieee_mode = 14128; MOVREL-NEXT: enable_wgp_mode = 04129; MOVREL-NEXT: enable_mem_ordered = 04130; MOVREL-NEXT: enable_fwd_progress = 04131; MOVREL-NEXT: enable_sgpr_private_segment_wave_byte_offset = 04132; MOVREL-NEXT: user_sgpr_count = 144133; MOVREL-NEXT: enable_trap_handler = 04134; MOVREL-NEXT: enable_sgpr_workgroup_id_x = 14135; MOVREL-NEXT: enable_sgpr_workgroup_id_y = 14136; MOVREL-NEXT: enable_sgpr_workgroup_id_z = 14137; MOVREL-NEXT: enable_sgpr_workgroup_info = 04138; MOVREL-NEXT: enable_vgpr_workitem_id = 24139; MOVREL-NEXT: enable_exception_msb = 04140; MOVREL-NEXT: granulated_lds_size = 04141; MOVREL-NEXT: enable_exception = 04142; MOVREL-NEXT: enable_sgpr_private_segment_buffer = 14143; MOVREL-NEXT: enable_sgpr_dispatch_ptr = 14144; MOVREL-NEXT: enable_sgpr_queue_ptr = 14145; MOVREL-NEXT: enable_sgpr_kernarg_segment_ptr = 14146; MOVREL-NEXT: enable_sgpr_dispatch_id = 14147; MOVREL-NEXT: enable_sgpr_flat_scratch_init = 14148; MOVREL-NEXT: enable_sgpr_private_segment_size = 04149; MOVREL-NEXT: enable_sgpr_grid_workgroup_count_x = 04150; MOVREL-NEXT: enable_sgpr_grid_workgroup_count_y = 04151; MOVREL-NEXT: enable_sgpr_grid_workgroup_count_z = 04152; MOVREL-NEXT: enable_wavefront_size32 = 04153; MOVREL-NEXT: enable_ordered_append_gds = 04154; MOVREL-NEXT: private_element_size = 14155; MOVREL-NEXT: is_ptr64 = 14156; MOVREL-NEXT: is_dynamic_callstack = 04157; MOVREL-NEXT: is_debug_enabled = 04158; MOVREL-NEXT: is_xnack_enabled = 04159; MOVREL-NEXT: workitem_private_segment_byte_size = 04160; MOVREL-NEXT: workgroup_group_segment_byte_size = 04161; MOVREL-NEXT: gds_segment_byte_size = 04162; MOVREL-NEXT: kernarg_segment_byte_size = 284163; MOVREL-NEXT: workgroup_fbarrier_count = 04164; MOVREL-NEXT: wavefront_sgpr_count = 244165; MOVREL-NEXT: workitem_vgpr_count = 34166; MOVREL-NEXT: reserved_vgpr_first = 04167; MOVREL-NEXT: reserved_vgpr_count = 04168; MOVREL-NEXT: reserved_sgpr_first = 04169; MOVREL-NEXT: reserved_sgpr_count = 04170; MOVREL-NEXT: debug_wavefront_private_segment_offset_sgpr = 04171; MOVREL-NEXT: debug_private_segment_buffer_sgpr = 04172; MOVREL-NEXT: kernarg_segment_alignment = 44173; MOVREL-NEXT: group_segment_alignment = 44174; MOVREL-NEXT: private_segment_alignment = 44175; MOVREL-NEXT: wavefront_size = 64176; MOVREL-NEXT: call_convention = -14177; MOVREL-NEXT: runtime_loader_kernel_symbol = 04178; MOVREL-NEXT: .end_amd_kernel_code_t4179; MOVREL-NEXT: ; %bb.0: ; %entry4180; MOVREL-NEXT: s_load_dword s2, s[8:9], 0x84181; MOVREL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x04182; MOVREL-NEXT: s_add_i32 s12, s12, s174183; MOVREL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 84184; MOVREL-NEXT: s_mov_b32 flat_scratch_lo, s134185; MOVREL-NEXT: s_waitcnt lgkmcnt(0)4186; MOVREL-NEXT: s_cmp_eq_u32 s2, 14187; MOVREL-NEXT: s_cselect_b32 s3, 2.0, 1.04188; MOVREL-NEXT: s_cmp_eq_u32 s2, 24189; MOVREL-NEXT: s_cselect_b32 s3, 0x40400000, s34190; MOVREL-NEXT: s_cmp_eq_u32 s2, 34191; MOVREL-NEXT: s_cselect_b32 s2, 4.0, s34192; MOVREL-NEXT: v_mov_b32_e32 v0, s04193; MOVREL-NEXT: v_mov_b32_e32 v2, s24194; MOVREL-NEXT: v_mov_b32_e32 v1, s14195; MOVREL-NEXT: flat_store_dword v[0:1], v24196; MOVREL-NEXT: s_endpgm4197;4198; GFX10-LABEL: dyn_extract_v4f32_s_s_s:4199; GFX10: .amd_kernel_code_t4200; GFX10-NEXT: amd_code_version_major = 14201; GFX10-NEXT: amd_code_version_minor = 24202; GFX10-NEXT: amd_machine_kind = 14203; GFX10-NEXT: amd_machine_version_major = 104204; GFX10-NEXT: amd_machine_version_minor = 14205; GFX10-NEXT: amd_machine_version_stepping = 04206; GFX10-NEXT: kernel_code_entry_byte_offset = 2564207; GFX10-NEXT: kernel_code_prefetch_byte_size = 04208; GFX10-NEXT: granulated_workitem_vgpr_count = 04209; GFX10-NEXT: granulated_wavefront_sgpr_count = 04210; GFX10-NEXT: priority = 04211; GFX10-NEXT: float_mode = 2404212; GFX10-NEXT: priv = 04213; GFX10-NEXT: enable_dx10_clamp = 14214; GFX10-NEXT: debug_mode = 04215; GFX10-NEXT: enable_ieee_mode = 14216; GFX10-NEXT: enable_wgp_mode = 14217; GFX10-NEXT: enable_mem_ordered = 14218; GFX10-NEXT: enable_fwd_progress = 14219; GFX10-NEXT: enable_sgpr_private_segment_wave_byte_offset = 04220; GFX10-NEXT: user_sgpr_count = 144221; GFX10-NEXT: enable_trap_handler = 04222; GFX10-NEXT: enable_sgpr_workgroup_id_x = 14223; GFX10-NEXT: enable_sgpr_workgroup_id_y = 14224; GFX10-NEXT: enable_sgpr_workgroup_id_z = 14225; GFX10-NEXT: enable_sgpr_workgroup_info = 04226; GFX10-NEXT: enable_vgpr_workitem_id = 24227; GFX10-NEXT: enable_exception_msb = 04228; GFX10-NEXT: granulated_lds_size = 04229; GFX10-NEXT: enable_exception = 04230; GFX10-NEXT: enable_sgpr_private_segment_buffer = 14231; GFX10-NEXT: enable_sgpr_dispatch_ptr = 14232; GFX10-NEXT: enable_sgpr_queue_ptr = 14233; GFX10-NEXT: enable_sgpr_kernarg_segment_ptr = 14234; GFX10-NEXT: enable_sgpr_dispatch_id = 14235; GFX10-NEXT: enable_sgpr_flat_scratch_init = 14236; GFX10-NEXT: enable_sgpr_private_segment_size = 04237; GFX10-NEXT: enable_sgpr_grid_workgroup_count_x = 04238; GFX10-NEXT: enable_sgpr_grid_workgroup_count_y = 04239; GFX10-NEXT: enable_sgpr_grid_workgroup_count_z = 04240; GFX10-NEXT: enable_wavefront_size32 = 14241; GFX10-NEXT: enable_ordered_append_gds = 04242; GFX10-NEXT: private_element_size = 14243; GFX10-NEXT: is_ptr64 = 14244; GFX10-NEXT: is_dynamic_callstack = 04245; GFX10-NEXT: is_debug_enabled = 04246; GFX10-NEXT: is_xnack_enabled = 14247; GFX10-NEXT: workitem_private_segment_byte_size = 04248; GFX10-NEXT: workgroup_group_segment_byte_size = 04249; GFX10-NEXT: gds_segment_byte_size = 04250; GFX10-NEXT: kernarg_segment_byte_size = 284251; GFX10-NEXT: workgroup_fbarrier_count = 04252; GFX10-NEXT: wavefront_sgpr_count = 104253; GFX10-NEXT: workitem_vgpr_count = 24254; GFX10-NEXT: reserved_vgpr_first = 04255; GFX10-NEXT: reserved_vgpr_count = 04256; GFX10-NEXT: reserved_sgpr_first = 04257; GFX10-NEXT: reserved_sgpr_count = 04258; GFX10-NEXT: debug_wavefront_private_segment_offset_sgpr = 04259; GFX10-NEXT: debug_private_segment_buffer_sgpr = 04260; GFX10-NEXT: kernarg_segment_alignment = 44261; GFX10-NEXT: group_segment_alignment = 44262; GFX10-NEXT: private_segment_alignment = 44263; GFX10-NEXT: wavefront_size = 54264; GFX10-NEXT: call_convention = -14265; GFX10-NEXT: runtime_loader_kernel_symbol = 04266; GFX10-NEXT: .end_amd_kernel_code_t4267; GFX10-NEXT: ; %bb.0: ; %entry4268; GFX10-NEXT: s_clause 0x14269; GFX10-NEXT: s_load_dword s2, s[8:9], 0x84270; GFX10-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x04271; GFX10-NEXT: v_mov_b32_e32 v1, 04272; GFX10-NEXT: s_waitcnt lgkmcnt(0)4273; GFX10-NEXT: s_cmp_eq_u32 s2, 14274; GFX10-NEXT: s_cselect_b32 s3, 2.0, 1.04275; GFX10-NEXT: s_cmp_eq_u32 s2, 24276; GFX10-NEXT: s_cselect_b32 s3, 0x40400000, s34277; GFX10-NEXT: s_cmp_eq_u32 s2, 34278; GFX10-NEXT: s_cselect_b32 s2, 4.0, s34279; GFX10-NEXT: v_mov_b32_e32 v0, s24280; GFX10-NEXT: global_store_dword v1, v0, s[0:1]4281; GFX10-NEXT: s_endpgm4282;4283; GFX11-LABEL: dyn_extract_v4f32_s_s_s:4284; GFX11: .amd_kernel_code_t4285; GFX11-NEXT: amd_code_version_major = 14286; GFX11-NEXT: amd_code_version_minor = 24287; GFX11-NEXT: amd_machine_kind = 14288; GFX11-NEXT: amd_machine_version_major = 114289; GFX11-NEXT: amd_machine_version_minor = 04290; GFX11-NEXT: amd_machine_version_stepping = 04291; GFX11-NEXT: kernel_code_entry_byte_offset = 2564292; GFX11-NEXT: kernel_code_prefetch_byte_size = 04293; GFX11-NEXT: granulated_workitem_vgpr_count = 04294; GFX11-NEXT: granulated_wavefront_sgpr_count = 04295; GFX11-NEXT: priority = 04296; GFX11-NEXT: float_mode = 2404297; GFX11-NEXT: priv = 04298; GFX11-NEXT: enable_dx10_clamp = 14299; GFX11-NEXT: debug_mode = 04300; GFX11-NEXT: enable_ieee_mode = 14301; GFX11-NEXT: enable_wgp_mode = 14302; GFX11-NEXT: enable_mem_ordered = 14303; GFX11-NEXT: enable_fwd_progress = 14304; GFX11-NEXT: enable_sgpr_private_segment_wave_byte_offset = 04305; GFX11-NEXT: user_sgpr_count = 134306; GFX11-NEXT: enable_trap_handler = 04307; GFX11-NEXT: enable_sgpr_workgroup_id_x = 14308; GFX11-NEXT: enable_sgpr_workgroup_id_y = 14309; GFX11-NEXT: enable_sgpr_workgroup_id_z = 14310; GFX11-NEXT: enable_sgpr_workgroup_info = 04311; GFX11-NEXT: enable_vgpr_workitem_id = 24312; GFX11-NEXT: enable_exception_msb = 04313; GFX11-NEXT: granulated_lds_size = 04314; GFX11-NEXT: enable_exception = 04315; GFX11-NEXT: enable_sgpr_private_segment_buffer = 04316; GFX11-NEXT: enable_sgpr_dispatch_ptr = 14317; GFX11-NEXT: enable_sgpr_queue_ptr = 14318; GFX11-NEXT: enable_sgpr_kernarg_segment_ptr = 14319; GFX11-NEXT: enable_sgpr_dispatch_id = 14320; GFX11-NEXT: enable_sgpr_flat_scratch_init = 04321; GFX11-NEXT: enable_sgpr_private_segment_size = 04322; GFX11-NEXT: enable_sgpr_grid_workgroup_count_x = 04323; GFX11-NEXT: enable_sgpr_grid_workgroup_count_y = 04324; GFX11-NEXT: enable_sgpr_grid_workgroup_count_z = 04325; GFX11-NEXT: enable_wavefront_size32 = 14326; GFX11-NEXT: enable_ordered_append_gds = 04327; GFX11-NEXT: private_element_size = 14328; GFX11-NEXT: is_ptr64 = 14329; GFX11-NEXT: is_dynamic_callstack = 04330; GFX11-NEXT: is_debug_enabled = 04331; GFX11-NEXT: is_xnack_enabled = 04332; GFX11-NEXT: workitem_private_segment_byte_size = 04333; GFX11-NEXT: workgroup_group_segment_byte_size = 04334; GFX11-NEXT: gds_segment_byte_size = 04335; GFX11-NEXT: kernarg_segment_byte_size = 284336; GFX11-NEXT: workgroup_fbarrier_count = 04337; GFX11-NEXT: wavefront_sgpr_count = 64338; GFX11-NEXT: workitem_vgpr_count = 24339; GFX11-NEXT: reserved_vgpr_first = 04340; GFX11-NEXT: reserved_vgpr_count = 04341; GFX11-NEXT: reserved_sgpr_first = 04342; GFX11-NEXT: reserved_sgpr_count = 04343; GFX11-NEXT: debug_wavefront_private_segment_offset_sgpr = 04344; GFX11-NEXT: debug_private_segment_buffer_sgpr = 04345; GFX11-NEXT: kernarg_segment_alignment = 44346; GFX11-NEXT: group_segment_alignment = 44347; GFX11-NEXT: private_segment_alignment = 44348; GFX11-NEXT: wavefront_size = 54349; GFX11-NEXT: call_convention = -14350; GFX11-NEXT: runtime_loader_kernel_symbol = 04351; GFX11-NEXT: .end_amd_kernel_code_t4352; GFX11-NEXT: ; %bb.0: ; %entry4353; GFX11-NEXT: s_clause 0x14354; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x84355; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x04356; GFX11-NEXT: v_mov_b32_e32 v1, 04357; GFX11-NEXT: s_waitcnt lgkmcnt(0)4358; GFX11-NEXT: s_cmp_eq_u32 s2, 14359; GFX11-NEXT: s_cselect_b32 s3, 2.0, 1.04360; GFX11-NEXT: s_cmp_eq_u32 s2, 24361; GFX11-NEXT: s_cselect_b32 s3, 0x40400000, s34362; GFX11-NEXT: s_cmp_eq_u32 s2, 34363; GFX11-NEXT: s_cselect_b32 s2, 4.0, s34364; GFX11-NEXT: v_mov_b32_e32 v0, s24365; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]4366; GFX11-NEXT: s_endpgm4367entry:4368 %ext = extractelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, i32 %sel4369 store float %ext, ptr addrspace(1) %out4370 ret void4371}4372 4373define amdgpu_kernel void @dyn_extract_v4f64_s_s_s(ptr addrspace(1) %out, i32 %sel) {4374; GPRIDX-LABEL: dyn_extract_v4f64_s_s_s:4375; GPRIDX: .amd_kernel_code_t4376; GPRIDX-NEXT: amd_code_version_major = 14377; GPRIDX-NEXT: amd_code_version_minor = 24378; GPRIDX-NEXT: amd_machine_kind = 14379; GPRIDX-NEXT: amd_machine_version_major = 94380; GPRIDX-NEXT: amd_machine_version_minor = 04381; GPRIDX-NEXT: amd_machine_version_stepping = 04382; GPRIDX-NEXT: kernel_code_entry_byte_offset = 2564383; GPRIDX-NEXT: kernel_code_prefetch_byte_size = 04384; GPRIDX-NEXT: granulated_workitem_vgpr_count = 04385; GPRIDX-NEXT: granulated_wavefront_sgpr_count = 14386; GPRIDX-NEXT: priority = 04387; GPRIDX-NEXT: float_mode = 2404388; GPRIDX-NEXT: priv = 04389; GPRIDX-NEXT: enable_dx10_clamp = 14390; GPRIDX-NEXT: debug_mode = 04391; GPRIDX-NEXT: enable_ieee_mode = 14392; GPRIDX-NEXT: enable_wgp_mode = 04393; GPRIDX-NEXT: enable_mem_ordered = 04394; GPRIDX-NEXT: enable_fwd_progress = 04395; GPRIDX-NEXT: enable_sgpr_private_segment_wave_byte_offset = 04396; GPRIDX-NEXT: user_sgpr_count = 144397; GPRIDX-NEXT: enable_trap_handler = 04398; GPRIDX-NEXT: enable_sgpr_workgroup_id_x = 14399; GPRIDX-NEXT: enable_sgpr_workgroup_id_y = 14400; GPRIDX-NEXT: enable_sgpr_workgroup_id_z = 14401; GPRIDX-NEXT: enable_sgpr_workgroup_info = 04402; GPRIDX-NEXT: enable_vgpr_workitem_id = 24403; GPRIDX-NEXT: enable_exception_msb = 04404; GPRIDX-NEXT: granulated_lds_size = 04405; GPRIDX-NEXT: enable_exception = 04406; GPRIDX-NEXT: enable_sgpr_private_segment_buffer = 14407; GPRIDX-NEXT: enable_sgpr_dispatch_ptr = 14408; GPRIDX-NEXT: enable_sgpr_queue_ptr = 14409; GPRIDX-NEXT: enable_sgpr_kernarg_segment_ptr = 14410; GPRIDX-NEXT: enable_sgpr_dispatch_id = 14411; GPRIDX-NEXT: enable_sgpr_flat_scratch_init = 14412; GPRIDX-NEXT: enable_sgpr_private_segment_size = 04413; GPRIDX-NEXT: enable_sgpr_grid_workgroup_count_x = 04414; GPRIDX-NEXT: enable_sgpr_grid_workgroup_count_y = 04415; GPRIDX-NEXT: enable_sgpr_grid_workgroup_count_z = 04416; GPRIDX-NEXT: enable_wavefront_size32 = 04417; GPRIDX-NEXT: enable_ordered_append_gds = 04418; GPRIDX-NEXT: private_element_size = 14419; GPRIDX-NEXT: is_ptr64 = 14420; GPRIDX-NEXT: is_dynamic_callstack = 04421; GPRIDX-NEXT: is_debug_enabled = 04422; GPRIDX-NEXT: is_xnack_enabled = 14423; GPRIDX-NEXT: workitem_private_segment_byte_size = 04424; GPRIDX-NEXT: workgroup_group_segment_byte_size = 04425; GPRIDX-NEXT: gds_segment_byte_size = 04426; GPRIDX-NEXT: kernarg_segment_byte_size = 284427; GPRIDX-NEXT: workgroup_fbarrier_count = 04428; GPRIDX-NEXT: wavefront_sgpr_count = 164429; GPRIDX-NEXT: workitem_vgpr_count = 34430; GPRIDX-NEXT: reserved_vgpr_first = 04431; GPRIDX-NEXT: reserved_vgpr_count = 04432; GPRIDX-NEXT: reserved_sgpr_first = 04433; GPRIDX-NEXT: reserved_sgpr_count = 04434; GPRIDX-NEXT: debug_wavefront_private_segment_offset_sgpr = 04435; GPRIDX-NEXT: debug_private_segment_buffer_sgpr = 04436; GPRIDX-NEXT: kernarg_segment_alignment = 44437; GPRIDX-NEXT: group_segment_alignment = 44438; GPRIDX-NEXT: private_segment_alignment = 44439; GPRIDX-NEXT: wavefront_size = 64440; GPRIDX-NEXT: call_convention = -14441; GPRIDX-NEXT: runtime_loader_kernel_symbol = 04442; GPRIDX-NEXT: .end_amd_kernel_code_t4443; GPRIDX-NEXT: ; %bb.0: ; %entry4444; GPRIDX-NEXT: s_load_dword s6, s[8:9], 0x84445; GPRIDX-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x04446; GPRIDX-NEXT: s_mov_b32 s2, 04447; GPRIDX-NEXT: s_mov_b32 s3, 0x400800004448; GPRIDX-NEXT: v_mov_b32_e32 v2, 04449; GPRIDX-NEXT: s_waitcnt lgkmcnt(0)4450; GPRIDX-NEXT: s_cmp_eq_u32 s6, 14451; GPRIDX-NEXT: s_cselect_b64 s[4:5], 2.0, 1.04452; GPRIDX-NEXT: s_cmp_eq_u32 s6, 24453; GPRIDX-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5]4454; GPRIDX-NEXT: s_cmp_eq_u32 s6, 34455; GPRIDX-NEXT: s_cselect_b64 s[2:3], 4.0, s[2:3]4456; GPRIDX-NEXT: v_mov_b32_e32 v0, s24457; GPRIDX-NEXT: v_mov_b32_e32 v1, s34458; GPRIDX-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]4459; GPRIDX-NEXT: s_endpgm4460;4461; MOVREL-LABEL: dyn_extract_v4f64_s_s_s:4462; MOVREL: .amd_kernel_code_t4463; MOVREL-NEXT: amd_code_version_major = 14464; MOVREL-NEXT: amd_code_version_minor = 24465; MOVREL-NEXT: amd_machine_kind = 14466; MOVREL-NEXT: amd_machine_version_major = 84467; MOVREL-NEXT: amd_machine_version_minor = 04468; MOVREL-NEXT: amd_machine_version_stepping = 34469; MOVREL-NEXT: kernel_code_entry_byte_offset = 2564470; MOVREL-NEXT: kernel_code_prefetch_byte_size = 04471; MOVREL-NEXT: granulated_workitem_vgpr_count = 04472; MOVREL-NEXT: granulated_wavefront_sgpr_count = 24473; MOVREL-NEXT: priority = 04474; MOVREL-NEXT: float_mode = 2404475; MOVREL-NEXT: priv = 04476; MOVREL-NEXT: enable_dx10_clamp = 14477; MOVREL-NEXT: debug_mode = 04478; MOVREL-NEXT: enable_ieee_mode = 14479; MOVREL-NEXT: enable_wgp_mode = 04480; MOVREL-NEXT: enable_mem_ordered = 04481; MOVREL-NEXT: enable_fwd_progress = 04482; MOVREL-NEXT: enable_sgpr_private_segment_wave_byte_offset = 04483; MOVREL-NEXT: user_sgpr_count = 144484; MOVREL-NEXT: enable_trap_handler = 04485; MOVREL-NEXT: enable_sgpr_workgroup_id_x = 14486; MOVREL-NEXT: enable_sgpr_workgroup_id_y = 14487; MOVREL-NEXT: enable_sgpr_workgroup_id_z = 14488; MOVREL-NEXT: enable_sgpr_workgroup_info = 04489; MOVREL-NEXT: enable_vgpr_workitem_id = 24490; MOVREL-NEXT: enable_exception_msb = 04491; MOVREL-NEXT: granulated_lds_size = 04492; MOVREL-NEXT: enable_exception = 04493; MOVREL-NEXT: enable_sgpr_private_segment_buffer = 14494; MOVREL-NEXT: enable_sgpr_dispatch_ptr = 14495; MOVREL-NEXT: enable_sgpr_queue_ptr = 14496; MOVREL-NEXT: enable_sgpr_kernarg_segment_ptr = 14497; MOVREL-NEXT: enable_sgpr_dispatch_id = 14498; MOVREL-NEXT: enable_sgpr_flat_scratch_init = 14499; MOVREL-NEXT: enable_sgpr_private_segment_size = 04500; MOVREL-NEXT: enable_sgpr_grid_workgroup_count_x = 04501; MOVREL-NEXT: enable_sgpr_grid_workgroup_count_y = 04502; MOVREL-NEXT: enable_sgpr_grid_workgroup_count_z = 04503; MOVREL-NEXT: enable_wavefront_size32 = 04504; MOVREL-NEXT: enable_ordered_append_gds = 04505; MOVREL-NEXT: private_element_size = 14506; MOVREL-NEXT: is_ptr64 = 14507; MOVREL-NEXT: is_dynamic_callstack = 04508; MOVREL-NEXT: is_debug_enabled = 04509; MOVREL-NEXT: is_xnack_enabled = 04510; MOVREL-NEXT: workitem_private_segment_byte_size = 04511; MOVREL-NEXT: workgroup_group_segment_byte_size = 04512; MOVREL-NEXT: gds_segment_byte_size = 04513; MOVREL-NEXT: kernarg_segment_byte_size = 284514; MOVREL-NEXT: workgroup_fbarrier_count = 04515; MOVREL-NEXT: wavefront_sgpr_count = 244516; MOVREL-NEXT: workitem_vgpr_count = 44517; MOVREL-NEXT: reserved_vgpr_first = 04518; MOVREL-NEXT: reserved_vgpr_count = 04519; MOVREL-NEXT: reserved_sgpr_first = 04520; MOVREL-NEXT: reserved_sgpr_count = 04521; MOVREL-NEXT: debug_wavefront_private_segment_offset_sgpr = 04522; MOVREL-NEXT: debug_private_segment_buffer_sgpr = 04523; MOVREL-NEXT: kernarg_segment_alignment = 44524; MOVREL-NEXT: group_segment_alignment = 44525; MOVREL-NEXT: private_segment_alignment = 44526; MOVREL-NEXT: wavefront_size = 64527; MOVREL-NEXT: call_convention = -14528; MOVREL-NEXT: runtime_loader_kernel_symbol = 04529; MOVREL-NEXT: .end_amd_kernel_code_t4530; MOVREL-NEXT: ; %bb.0: ; %entry4531; MOVREL-NEXT: s_load_dword s6, s[8:9], 0x84532; MOVREL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x04533; MOVREL-NEXT: s_add_i32 s12, s12, s174534; MOVREL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 84535; MOVREL-NEXT: s_mov_b32 s2, 04536; MOVREL-NEXT: s_waitcnt lgkmcnt(0)4537; MOVREL-NEXT: s_cmp_eq_u32 s6, 14538; MOVREL-NEXT: s_mov_b32 s3, 0x400800004539; MOVREL-NEXT: s_cselect_b64 s[4:5], 2.0, 1.04540; MOVREL-NEXT: s_cmp_eq_u32 s6, 24541; MOVREL-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5]4542; MOVREL-NEXT: s_cmp_eq_u32 s6, 34543; MOVREL-NEXT: s_cselect_b64 s[2:3], 4.0, s[2:3]4544; MOVREL-NEXT: v_mov_b32_e32 v0, s24545; MOVREL-NEXT: v_mov_b32_e32 v3, s14546; MOVREL-NEXT: s_mov_b32 flat_scratch_lo, s134547; MOVREL-NEXT: v_mov_b32_e32 v1, s34548; MOVREL-NEXT: v_mov_b32_e32 v2, s04549; MOVREL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]4550; MOVREL-NEXT: s_endpgm4551;4552; GFX10-LABEL: dyn_extract_v4f64_s_s_s:4553; GFX10: .amd_kernel_code_t4554; GFX10-NEXT: amd_code_version_major = 14555; GFX10-NEXT: amd_code_version_minor = 24556; GFX10-NEXT: amd_machine_kind = 14557; GFX10-NEXT: amd_machine_version_major = 104558; GFX10-NEXT: amd_machine_version_minor = 14559; GFX10-NEXT: amd_machine_version_stepping = 04560; GFX10-NEXT: kernel_code_entry_byte_offset = 2564561; GFX10-NEXT: kernel_code_prefetch_byte_size = 04562; GFX10-NEXT: granulated_workitem_vgpr_count = 04563; GFX10-NEXT: granulated_wavefront_sgpr_count = 04564; GFX10-NEXT: priority = 04565; GFX10-NEXT: float_mode = 2404566; GFX10-NEXT: priv = 04567; GFX10-NEXT: enable_dx10_clamp = 14568; GFX10-NEXT: debug_mode = 04569; GFX10-NEXT: enable_ieee_mode = 14570; GFX10-NEXT: enable_wgp_mode = 14571; GFX10-NEXT: enable_mem_ordered = 14572; GFX10-NEXT: enable_fwd_progress = 14573; GFX10-NEXT: enable_sgpr_private_segment_wave_byte_offset = 04574; GFX10-NEXT: user_sgpr_count = 144575; GFX10-NEXT: enable_trap_handler = 04576; GFX10-NEXT: enable_sgpr_workgroup_id_x = 14577; GFX10-NEXT: enable_sgpr_workgroup_id_y = 14578; GFX10-NEXT: enable_sgpr_workgroup_id_z = 14579; GFX10-NEXT: enable_sgpr_workgroup_info = 04580; GFX10-NEXT: enable_vgpr_workitem_id = 24581; GFX10-NEXT: enable_exception_msb = 04582; GFX10-NEXT: granulated_lds_size = 04583; GFX10-NEXT: enable_exception = 04584; GFX10-NEXT: enable_sgpr_private_segment_buffer = 14585; GFX10-NEXT: enable_sgpr_dispatch_ptr = 14586; GFX10-NEXT: enable_sgpr_queue_ptr = 14587; GFX10-NEXT: enable_sgpr_kernarg_segment_ptr = 14588; GFX10-NEXT: enable_sgpr_dispatch_id = 14589; GFX10-NEXT: enable_sgpr_flat_scratch_init = 14590; GFX10-NEXT: enable_sgpr_private_segment_size = 04591; GFX10-NEXT: enable_sgpr_grid_workgroup_count_x = 04592; GFX10-NEXT: enable_sgpr_grid_workgroup_count_y = 04593; GFX10-NEXT: enable_sgpr_grid_workgroup_count_z = 04594; GFX10-NEXT: enable_wavefront_size32 = 14595; GFX10-NEXT: enable_ordered_append_gds = 04596; GFX10-NEXT: private_element_size = 14597; GFX10-NEXT: is_ptr64 = 14598; GFX10-NEXT: is_dynamic_callstack = 04599; GFX10-NEXT: is_debug_enabled = 04600; GFX10-NEXT: is_xnack_enabled = 14601; GFX10-NEXT: workitem_private_segment_byte_size = 04602; GFX10-NEXT: workgroup_group_segment_byte_size = 04603; GFX10-NEXT: gds_segment_byte_size = 04604; GFX10-NEXT: kernarg_segment_byte_size = 284605; GFX10-NEXT: workgroup_fbarrier_count = 04606; GFX10-NEXT: wavefront_sgpr_count = 104607; GFX10-NEXT: workitem_vgpr_count = 34608; GFX10-NEXT: reserved_vgpr_first = 04609; GFX10-NEXT: reserved_vgpr_count = 04610; GFX10-NEXT: reserved_sgpr_first = 04611; GFX10-NEXT: reserved_sgpr_count = 04612; GFX10-NEXT: debug_wavefront_private_segment_offset_sgpr = 04613; GFX10-NEXT: debug_private_segment_buffer_sgpr = 04614; GFX10-NEXT: kernarg_segment_alignment = 44615; GFX10-NEXT: group_segment_alignment = 44616; GFX10-NEXT: private_segment_alignment = 44617; GFX10-NEXT: wavefront_size = 54618; GFX10-NEXT: call_convention = -14619; GFX10-NEXT: runtime_loader_kernel_symbol = 04620; GFX10-NEXT: .end_amd_kernel_code_t4621; GFX10-NEXT: ; %bb.0: ; %entry4622; GFX10-NEXT: s_clause 0x14623; GFX10-NEXT: s_load_dword s6, s[8:9], 0x84624; GFX10-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x04625; GFX10-NEXT: s_mov_b32 s2, 04626; GFX10-NEXT: s_mov_b32 s3, 0x400800004627; GFX10-NEXT: v_mov_b32_e32 v2, 04628; GFX10-NEXT: s_waitcnt lgkmcnt(0)4629; GFX10-NEXT: s_cmp_eq_u32 s6, 14630; GFX10-NEXT: s_cselect_b64 s[4:5], 2.0, 1.04631; GFX10-NEXT: s_cmp_eq_u32 s6, 24632; GFX10-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5]4633; GFX10-NEXT: s_cmp_eq_u32 s6, 34634; GFX10-NEXT: s_cselect_b64 s[2:3], 4.0, s[2:3]4635; GFX10-NEXT: v_mov_b32_e32 v0, s24636; GFX10-NEXT: v_mov_b32_e32 v1, s34637; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]4638; GFX10-NEXT: s_endpgm4639;4640; GFX11-LABEL: dyn_extract_v4f64_s_s_s:4641; GFX11: .amd_kernel_code_t4642; GFX11-NEXT: amd_code_version_major = 14643; GFX11-NEXT: amd_code_version_minor = 24644; GFX11-NEXT: amd_machine_kind = 14645; GFX11-NEXT: amd_machine_version_major = 114646; GFX11-NEXT: amd_machine_version_minor = 04647; GFX11-NEXT: amd_machine_version_stepping = 04648; GFX11-NEXT: kernel_code_entry_byte_offset = 2564649; GFX11-NEXT: kernel_code_prefetch_byte_size = 04650; GFX11-NEXT: granulated_workitem_vgpr_count = 04651; GFX11-NEXT: granulated_wavefront_sgpr_count = 04652; GFX11-NEXT: priority = 04653; GFX11-NEXT: float_mode = 2404654; GFX11-NEXT: priv = 04655; GFX11-NEXT: enable_dx10_clamp = 14656; GFX11-NEXT: debug_mode = 04657; GFX11-NEXT: enable_ieee_mode = 14658; GFX11-NEXT: enable_wgp_mode = 14659; GFX11-NEXT: enable_mem_ordered = 14660; GFX11-NEXT: enable_fwd_progress = 14661; GFX11-NEXT: enable_sgpr_private_segment_wave_byte_offset = 04662; GFX11-NEXT: user_sgpr_count = 134663; GFX11-NEXT: enable_trap_handler = 04664; GFX11-NEXT: enable_sgpr_workgroup_id_x = 14665; GFX11-NEXT: enable_sgpr_workgroup_id_y = 14666; GFX11-NEXT: enable_sgpr_workgroup_id_z = 14667; GFX11-NEXT: enable_sgpr_workgroup_info = 04668; GFX11-NEXT: enable_vgpr_workitem_id = 24669; GFX11-NEXT: enable_exception_msb = 04670; GFX11-NEXT: granulated_lds_size = 04671; GFX11-NEXT: enable_exception = 04672; GFX11-NEXT: enable_sgpr_private_segment_buffer = 04673; GFX11-NEXT: enable_sgpr_dispatch_ptr = 14674; GFX11-NEXT: enable_sgpr_queue_ptr = 14675; GFX11-NEXT: enable_sgpr_kernarg_segment_ptr = 14676; GFX11-NEXT: enable_sgpr_dispatch_id = 14677; GFX11-NEXT: enable_sgpr_flat_scratch_init = 04678; GFX11-NEXT: enable_sgpr_private_segment_size = 04679; GFX11-NEXT: enable_sgpr_grid_workgroup_count_x = 04680; GFX11-NEXT: enable_sgpr_grid_workgroup_count_y = 04681; GFX11-NEXT: enable_sgpr_grid_workgroup_count_z = 04682; GFX11-NEXT: enable_wavefront_size32 = 14683; GFX11-NEXT: enable_ordered_append_gds = 04684; GFX11-NEXT: private_element_size = 14685; GFX11-NEXT: is_ptr64 = 14686; GFX11-NEXT: is_dynamic_callstack = 04687; GFX11-NEXT: is_debug_enabled = 04688; GFX11-NEXT: is_xnack_enabled = 04689; GFX11-NEXT: workitem_private_segment_byte_size = 04690; GFX11-NEXT: workgroup_group_segment_byte_size = 04691; GFX11-NEXT: gds_segment_byte_size = 04692; GFX11-NEXT: kernarg_segment_byte_size = 284693; GFX11-NEXT: workgroup_fbarrier_count = 04694; GFX11-NEXT: wavefront_sgpr_count = 74695; GFX11-NEXT: workitem_vgpr_count = 34696; GFX11-NEXT: reserved_vgpr_first = 04697; GFX11-NEXT: reserved_vgpr_count = 04698; GFX11-NEXT: reserved_sgpr_first = 04699; GFX11-NEXT: reserved_sgpr_count = 04700; GFX11-NEXT: debug_wavefront_private_segment_offset_sgpr = 04701; GFX11-NEXT: debug_private_segment_buffer_sgpr = 04702; GFX11-NEXT: kernarg_segment_alignment = 44703; GFX11-NEXT: group_segment_alignment = 44704; GFX11-NEXT: private_segment_alignment = 44705; GFX11-NEXT: wavefront_size = 54706; GFX11-NEXT: call_convention = -14707; GFX11-NEXT: runtime_loader_kernel_symbol = 04708; GFX11-NEXT: .end_amd_kernel_code_t4709; GFX11-NEXT: ; %bb.0: ; %entry4710; GFX11-NEXT: s_clause 0x14711; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x84712; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x04713; GFX11-NEXT: s_mov_b32 s2, 04714; GFX11-NEXT: s_mov_b32 s3, 0x400800004715; GFX11-NEXT: v_mov_b32_e32 v2, 04716; GFX11-NEXT: s_waitcnt lgkmcnt(0)4717; GFX11-NEXT: s_cmp_eq_u32 s6, 14718; GFX11-NEXT: s_cselect_b64 s[4:5], 2.0, 1.04719; GFX11-NEXT: s_cmp_eq_u32 s6, 24720; GFX11-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5]4721; GFX11-NEXT: s_cmp_eq_u32 s6, 34722; GFX11-NEXT: s_cselect_b64 s[2:3], 4.0, s[2:3]4723; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s34724; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]4725; GFX11-NEXT: s_endpgm4726entry:4727 %ext = extractelement <4 x double> <double 1.0, double 2.0, double 3.0, double 4.0>, i32 %sel4728 store double %ext, ptr addrspace(1) %out4729 ret void4730}4731 4732define i32 @v_extract_v64i32_7(ptr addrspace(1) %ptr) {4733; GPRIDX-LABEL: v_extract_v64i32_7:4734; GPRIDX: ; %bb.0:4735; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4736; GPRIDX-NEXT: global_load_dword v0, v[0:1], off offset:284737; GPRIDX-NEXT: s_waitcnt vmcnt(0)4738; GPRIDX-NEXT: s_setpc_b64 s[30:31]4739;4740; MOVREL-LABEL: v_extract_v64i32_7:4741; MOVREL: ; %bb.0:4742; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4743; MOVREL-NEXT: v_add_u32_e32 v0, vcc, 28, v04744; MOVREL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc4745; MOVREL-NEXT: flat_load_dword v0, v[0:1]4746; MOVREL-NEXT: s_waitcnt vmcnt(0)4747; MOVREL-NEXT: s_setpc_b64 s[30:31]4748;4749; GFX10-LABEL: v_extract_v64i32_7:4750; GFX10: ; %bb.0:4751; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4752; GFX10-NEXT: global_load_dword v0, v[0:1], off offset:284753; GFX10-NEXT: s_waitcnt vmcnt(0)4754; GFX10-NEXT: s_setpc_b64 s[30:31]4755;4756; GFX11-LABEL: v_extract_v64i32_7:4757; GFX11: ; %bb.0:4758; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4759; GFX11-NEXT: global_load_b32 v0, v[0:1], off offset:284760; GFX11-NEXT: s_waitcnt vmcnt(0)4761; GFX11-NEXT: s_setpc_b64 s[30:31]4762 %vec = load <64 x i32>, ptr addrspace(1) %ptr4763 %elt = extractelement <64 x i32> %vec, i32 74764 ret i32 %elt4765}4766 4767define i32 @v_extract_v64i32_32(ptr addrspace(1) %ptr) {4768; GPRIDX-LABEL: v_extract_v64i32_32:4769; GPRIDX: ; %bb.0:4770; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4771; GPRIDX-NEXT: global_load_dword v0, v[0:1], off offset:1284772; GPRIDX-NEXT: s_waitcnt vmcnt(0)4773; GPRIDX-NEXT: s_setpc_b64 s[30:31]4774;4775; MOVREL-LABEL: v_extract_v64i32_32:4776; MOVREL: ; %bb.0:4777; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4778; MOVREL-NEXT: v_add_u32_e32 v0, vcc, 0x80, v04779; MOVREL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc4780; MOVREL-NEXT: flat_load_dword v0, v[0:1]4781; MOVREL-NEXT: s_waitcnt vmcnt(0)4782; MOVREL-NEXT: s_setpc_b64 s[30:31]4783;4784; GFX10-LABEL: v_extract_v64i32_32:4785; GFX10: ; %bb.0:4786; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4787; GFX10-NEXT: global_load_dword v0, v[0:1], off offset:1284788; GFX10-NEXT: s_waitcnt vmcnt(0)4789; GFX10-NEXT: s_setpc_b64 s[30:31]4790;4791; GFX11-LABEL: v_extract_v64i32_32:4792; GFX11: ; %bb.0:4793; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4794; GFX11-NEXT: global_load_b32 v0, v[0:1], off offset:1284795; GFX11-NEXT: s_waitcnt vmcnt(0)4796; GFX11-NEXT: s_setpc_b64 s[30:31]4797 %vec = load <64 x i32>, ptr addrspace(1) %ptr4798 %elt = extractelement <64 x i32> %vec, i32 324799 ret i32 %elt4800}4801 4802define i32 @v_extract_v64i32_33(ptr addrspace(1) %ptr) {4803; GPRIDX-LABEL: v_extract_v64i32_33:4804; GPRIDX: ; %bb.0:4805; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4806; GPRIDX-NEXT: global_load_dword v0, v[0:1], off offset:1324807; GPRIDX-NEXT: s_waitcnt vmcnt(0)4808; GPRIDX-NEXT: s_setpc_b64 s[30:31]4809;4810; MOVREL-LABEL: v_extract_v64i32_33:4811; MOVREL: ; %bb.0:4812; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4813; MOVREL-NEXT: v_add_u32_e32 v0, vcc, 0x84, v04814; MOVREL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc4815; MOVREL-NEXT: flat_load_dword v0, v[0:1]4816; MOVREL-NEXT: s_waitcnt vmcnt(0)4817; MOVREL-NEXT: s_setpc_b64 s[30:31]4818;4819; GFX10-LABEL: v_extract_v64i32_33:4820; GFX10: ; %bb.0:4821; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4822; GFX10-NEXT: global_load_dword v0, v[0:1], off offset:1324823; GFX10-NEXT: s_waitcnt vmcnt(0)4824; GFX10-NEXT: s_setpc_b64 s[30:31]4825;4826; GFX11-LABEL: v_extract_v64i32_33:4827; GFX11: ; %bb.0:4828; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4829; GFX11-NEXT: global_load_b32 v0, v[0:1], off offset:1324830; GFX11-NEXT: s_waitcnt vmcnt(0)4831; GFX11-NEXT: s_setpc_b64 s[30:31]4832 %vec = load <64 x i32>, ptr addrspace(1) %ptr4833 %elt = extractelement <64 x i32> %vec, i32 334834 ret i32 %elt4835}4836 4837define i32 @v_extract_v64i32_37(ptr addrspace(1) %ptr) {4838; GPRIDX-LABEL: v_extract_v64i32_37:4839; GPRIDX: ; %bb.0:4840; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4841; GPRIDX-NEXT: global_load_dword v0, v[0:1], off offset:1484842; GPRIDX-NEXT: s_waitcnt vmcnt(0)4843; GPRIDX-NEXT: s_setpc_b64 s[30:31]4844;4845; MOVREL-LABEL: v_extract_v64i32_37:4846; MOVREL: ; %bb.0:4847; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4848; MOVREL-NEXT: v_add_u32_e32 v0, vcc, 0x94, v04849; MOVREL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc4850; MOVREL-NEXT: flat_load_dword v0, v[0:1]4851; MOVREL-NEXT: s_waitcnt vmcnt(0)4852; MOVREL-NEXT: s_setpc_b64 s[30:31]4853;4854; GFX10-LABEL: v_extract_v64i32_37:4855; GFX10: ; %bb.0:4856; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4857; GFX10-NEXT: global_load_dword v0, v[0:1], off offset:1484858; GFX10-NEXT: s_waitcnt vmcnt(0)4859; GFX10-NEXT: s_setpc_b64 s[30:31]4860;4861; GFX11-LABEL: v_extract_v64i32_37:4862; GFX11: ; %bb.0:4863; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4864; GFX11-NEXT: global_load_b32 v0, v[0:1], off offset:1484865; GFX11-NEXT: s_waitcnt vmcnt(0)4866; GFX11-NEXT: s_setpc_b64 s[30:31]4867 %vec = load <64 x i32>, ptr addrspace(1) %ptr4868 %elt = extractelement <64 x i32> %vec, i32 374869 ret i32 %elt4870}4871