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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mattr=-real-true16 -mcpu=gfx1100 -o - %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-FAKE16 %s3; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mattr=+real-true16 -mcpu=gfx1100 -o - %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-TRUE16 %s4; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mattr=-real-true16 -mcpu=gfx1200 -o - %s | FileCheck -check-prefixes=GCN,GFX12,GFX12-FAKE16 %s5; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mattr=+real-true16 -mcpu=gfx1200 -o - %s | FileCheck -check-prefixes=GCN,GFX12,GFX12-TRUE16 %s6 7define amdgpu_ps half @fadd_s16_uniform(half inreg %a, half inreg %b) {8; GFX11-FAKE16-LABEL: fadd_s16_uniform:9; GFX11-FAKE16: ; %bb.0:10; GFX11-FAKE16-NEXT: v_add_f16_e64 v0, s0, s111; GFX11-FAKE16-NEXT: ; return to shader part epilog12;13; GFX11-TRUE16-LABEL: fadd_s16_uniform:14; GFX11-TRUE16: ; %bb.0:15; GFX11-TRUE16-NEXT: v_add_f16_e64 v0.l, s0, s116; GFX11-TRUE16-NEXT: ; return to shader part epilog17;18; GFX12-LABEL: fadd_s16_uniform:19; GFX12: ; %bb.0:20; GFX12-NEXT: s_add_f16 s0, s0, s121; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)22; GFX12-NEXT: v_mov_b32_e32 v0, s023; GFX12-NEXT: ; return to shader part epilog24 %fadd = fadd half %a, %b25 ret half %fadd26}27 28define amdgpu_ps half @fadd_s16_div(half %a, half %b) {29; GFX11-FAKE16-LABEL: fadd_s16_div:30; GFX11-FAKE16: ; %bb.0:31; GFX11-FAKE16-NEXT: v_add_f16_e32 v0, v0, v132; GFX11-FAKE16-NEXT: ; return to shader part epilog33;34; GFX11-TRUE16-LABEL: fadd_s16_div:35; GFX11-TRUE16: ; %bb.0:36; GFX11-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v1.l37; GFX11-TRUE16-NEXT: ; return to shader part epilog38;39; GFX12-FAKE16-LABEL: fadd_s16_div:40; GFX12-FAKE16: ; %bb.0:41; GFX12-FAKE16-NEXT: v_add_f16_e32 v0, v0, v142; GFX12-FAKE16-NEXT: ; return to shader part epilog43;44; GFX12-TRUE16-LABEL: fadd_s16_div:45; GFX12-TRUE16: ; %bb.0:46; GFX12-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v1.l47; GFX12-TRUE16-NEXT: ; return to shader part epilog48 %fadd = fadd half %a, %b49 ret half %fadd50}51 52define amdgpu_ps float @fadd_s32_uniform(float inreg %a, float inreg %b) {53; GFX11-LABEL: fadd_s32_uniform:54; GFX11: ; %bb.0:55; GFX11-NEXT: v_add_f32_e64 v0, s0, s156; GFX11-NEXT: ; return to shader part epilog57;58; GFX12-LABEL: fadd_s32_uniform:59; GFX12: ; %bb.0:60; GFX12-NEXT: s_add_f32 s0, s0, s161; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)62; GFX12-NEXT: v_mov_b32_e32 v0, s063; GFX12-NEXT: ; return to shader part epilog64 %fadd = fadd float %a, %b65 ret float %fadd66}67 68define amdgpu_ps float @fadd_s32_div(float %a, float %b) {69; GCN-LABEL: fadd_s32_div:70; GCN: ; %bb.0:71; GCN-NEXT: v_add_f32_e32 v0, v0, v172; GCN-NEXT: ; return to shader part epilog73 %fadd = fadd float %a, %b74 ret float %fadd75}76 77define amdgpu_ps void @fadd_s64_uniform(double inreg %a, double inreg %b, ptr addrspace(1) %ptr) {78; GFX11-LABEL: fadd_s64_uniform:79; GFX11: ; %bb.0:80; GFX11-NEXT: v_add_f64 v[2:3], s[0:1], s[2:3]81; GFX11-NEXT: global_store_b64 v[0:1], v[2:3], off82; GFX11-NEXT: s_endpgm83;84; GFX12-LABEL: fadd_s64_uniform:85; GFX12: ; %bb.0:86; GFX12-NEXT: v_add_f64_e64 v[2:3], s[0:1], s[2:3]87; GFX12-NEXT: global_store_b64 v[0:1], v[2:3], off88; GFX12-NEXT: s_endpgm89 %fadd = fadd double %a, %b90 store double %fadd, ptr addrspace(1) %ptr91 ret void92}93 94define amdgpu_ps void @fadd_s64_div(double %a, double %b, ptr addrspace(1) %ptr) {95; GFX11-LABEL: fadd_s64_div:96; GFX11: ; %bb.0:97; GFX11-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]98; GFX11-NEXT: global_store_b64 v[4:5], v[0:1], off99; GFX11-NEXT: s_endpgm100;101; GFX12-LABEL: fadd_s64_div:102; GFX12: ; %bb.0:103; GFX12-NEXT: v_add_f64_e32 v[0:1], v[0:1], v[2:3]104; GFX12-NEXT: global_store_b64 v[4:5], v[0:1], off105; GFX12-NEXT: s_endpgm106 %fadd = fadd double %a, %b107 store double %fadd, ptr addrspace(1) %ptr108 ret void109}110 111define amdgpu_ps <2 x half> @fadd_v2s16_uniform(<2 x half> inreg %a, <2 x half> inreg %b) {112; GFX11-LABEL: fadd_v2s16_uniform:113; GFX11: ; %bb.0:114; GFX11-NEXT: v_pk_add_f16 v0, s0, s1115; GFX11-NEXT: ; return to shader part epilog116;117; GFX12-LABEL: fadd_v2s16_uniform:118; GFX12: ; %bb.0:119; GFX12-NEXT: s_lshr_b32 s2, s0, 16120; GFX12-NEXT: s_lshr_b32 s3, s1, 16121; GFX12-NEXT: s_add_f16 s0, s0, s1122; GFX12-NEXT: s_add_f16 s1, s2, s3123; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)124; GFX12-NEXT: s_pack_ll_b32_b16 s0, s0, s1125; GFX12-NEXT: v_mov_b32_e32 v0, s0126; GFX12-NEXT: ; return to shader part epilog127 %fadd = fadd <2 x half> %a, %b128 ret <2 x half> %fadd129}130 131define amdgpu_ps <2 x half> @fadd_v2s16_div(<2 x half> %a, <2 x half> %b) {132; GCN-LABEL: fadd_v2s16_div:133; GCN: ; %bb.0:134; GCN-NEXT: v_pk_add_f16 v0, v0, v1135; GCN-NEXT: ; return to shader part epilog136 %fadd = fadd <2 x half> %a, %b137 ret <2 x half> %fadd138}139 140define amdgpu_ps <2 x float> @fadd_v2s32_uniform(<2 x float> inreg %a, <2 x float> inreg %b) {141; GFX11-LABEL: fadd_v2s32_uniform:142; GFX11: ; %bb.0:143; GFX11-NEXT: v_add_f32_e64 v0, s0, s2144; GFX11-NEXT: v_add_f32_e64 v1, s1, s3145; GFX11-NEXT: ; return to shader part epilog146;147; GFX12-LABEL: fadd_v2s32_uniform:148; GFX12: ; %bb.0:149; GFX12-NEXT: s_add_f32 s0, s0, s2150; GFX12-NEXT: s_add_f32 s1, s1, s3151; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)152; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1153; GFX12-NEXT: ; return to shader part epilog154 %fadd = fadd <2 x float> %a, %b155 ret <2 x float> %fadd156}157 158define amdgpu_ps <2 x float> @fadd_v2s32_div(<2 x float> %a, <2 x float> %b) {159; GCN-LABEL: fadd_v2s32_div:160; GCN: ; %bb.0:161; GCN-NEXT: v_dual_add_f32 v0, v0, v2 :: v_dual_add_f32 v1, v1, v3162; GCN-NEXT: ; return to shader part epilog163 %fadd = fadd <2 x float> %a, %b164 ret <2 x float> %fadd165}166