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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefix=GFX6 %s3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii < %s | FileCheck -check-prefix=GFX6 %s4; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji < %s | FileCheck -check-prefix=GFX8 %s5 6; TODO: Merge with DAG test7 8define float @v_test_fmin_legacy_ole_f32(float %a, float %b) {9; GFX6-LABEL: v_test_fmin_legacy_ole_f32:10; GFX6: ; %bb.0:11; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12; GFX6-NEXT: v_min_legacy_f32_e32 v0, v0, v113; GFX6-NEXT: s_setpc_b64 s[30:31]14;15; GFX8-LABEL: v_test_fmin_legacy_ole_f32:16; GFX8: ; %bb.0:17; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)18; GFX8-NEXT: v_cmp_le_f32_e32 vcc, v0, v119; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc20; GFX8-NEXT: s_setpc_b64 s[30:31]21 %cmp = fcmp ole float %a, %b22 %val = select i1 %cmp, float %a, float %b23 ret float %val24}25 26define float @v_test_fmin_legacy_olt_f32(float %a, float %b) {27; GFX6-LABEL: v_test_fmin_legacy_olt_f32:28; GFX6: ; %bb.0:29; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)30; GFX6-NEXT: v_min_legacy_f32_e32 v0, v0, v131; GFX6-NEXT: s_setpc_b64 s[30:31]32;33; GFX8-LABEL: v_test_fmin_legacy_olt_f32:34; GFX8: ; %bb.0:35; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)36; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v137; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc38; GFX8-NEXT: s_setpc_b64 s[30:31]39 %cmp = fcmp olt float %a, %b40 %val = select i1 %cmp, float %a, float %b41 ret float %val42}43 44define float @v_test_fmin_legacy_ule_f32(float %a, float %b) {45; GFX6-LABEL: v_test_fmin_legacy_ule_f32:46; GFX6: ; %bb.0:47; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)48; GFX6-NEXT: v_min_legacy_f32_e32 v0, v1, v049; GFX6-NEXT: s_setpc_b64 s[30:31]50;51; GFX8-LABEL: v_test_fmin_legacy_ule_f32:52; GFX8: ; %bb.0:53; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)54; GFX8-NEXT: v_cmp_ngt_f32_e32 vcc, v0, v155; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc56; GFX8-NEXT: s_setpc_b64 s[30:31]57 %cmp = fcmp ule float %a, %b58 %val = select i1 %cmp, float %a, float %b59 ret float %val60}61 62define float @v_test_fmin_legacy_ult_f32(float %a, float %b) {63; GFX6-LABEL: v_test_fmin_legacy_ult_f32:64; GFX6: ; %bb.0:65; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)66; GFX6-NEXT: v_min_legacy_f32_e32 v0, v1, v067; GFX6-NEXT: s_setpc_b64 s[30:31]68;69; GFX8-LABEL: v_test_fmin_legacy_ult_f32:70; GFX8: ; %bb.0:71; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)72; GFX8-NEXT: v_cmp_nge_f32_e32 vcc, v0, v173; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc74; GFX8-NEXT: s_setpc_b64 s[30:31]75 %cmp = fcmp ult float %a, %b76 %val = select i1 %cmp, float %a, float %b77 ret float %val78}79 80define float @v_test_fmin_legacy_ogt_f32(float %a, float %b) {81; GFX6-LABEL: v_test_fmin_legacy_ogt_f32:82; GFX6: ; %bb.0:83; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)84; GFX6-NEXT: v_min_legacy_f32_e32 v0, v1, v085; GFX6-NEXT: s_setpc_b64 s[30:31]86;87; GFX8-LABEL: v_test_fmin_legacy_ogt_f32:88; GFX8: ; %bb.0:89; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)90; GFX8-NEXT: v_cmp_gt_f32_e32 vcc, v0, v191; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc92; GFX8-NEXT: s_setpc_b64 s[30:31]93 %cmp = fcmp ogt float %a, %b94 %val = select i1 %cmp, float %b, float %a95 ret float %val96}97 98define float @v_test_fmin_legacy_oge_f32(float %a, float %b) {99; GFX6-LABEL: v_test_fmin_legacy_oge_f32:100; GFX6: ; %bb.0:101; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)102; GFX6-NEXT: v_min_legacy_f32_e32 v0, v1, v0103; GFX6-NEXT: s_setpc_b64 s[30:31]104;105; GFX8-LABEL: v_test_fmin_legacy_oge_f32:106; GFX8: ; %bb.0:107; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)108; GFX8-NEXT: v_cmp_ge_f32_e32 vcc, v0, v1109; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc110; GFX8-NEXT: s_setpc_b64 s[30:31]111 %cmp = fcmp oge float %a, %b112 %val = select i1 %cmp, float %b, float %a113 ret float %val114}115 116define float @v_test_fmin_legacy_uge_f32(float %a, float %b) {117; GFX6-LABEL: v_test_fmin_legacy_uge_f32:118; GFX6: ; %bb.0:119; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)120; GFX6-NEXT: v_min_legacy_f32_e32 v0, v0, v1121; GFX6-NEXT: s_setpc_b64 s[30:31]122;123; GFX8-LABEL: v_test_fmin_legacy_uge_f32:124; GFX8: ; %bb.0:125; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)126; GFX8-NEXT: v_cmp_nlt_f32_e32 vcc, v0, v1127; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc128; GFX8-NEXT: s_setpc_b64 s[30:31]129 %cmp = fcmp uge float %a, %b130 %val = select i1 %cmp, float %b, float %a131 ret float %val132}133 134define float @v_test_fmin_legacy_ugt_f32(float %a, float %b) {135; GFX6-LABEL: v_test_fmin_legacy_ugt_f32:136; GFX6: ; %bb.0:137; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)138; GFX6-NEXT: v_min_legacy_f32_e32 v0, v0, v1139; GFX6-NEXT: s_setpc_b64 s[30:31]140;141; GFX8-LABEL: v_test_fmin_legacy_ugt_f32:142; GFX8: ; %bb.0:143; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)144; GFX8-NEXT: v_cmp_nle_f32_e32 vcc, v0, v1145; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc146; GFX8-NEXT: s_setpc_b64 s[30:31]147 %cmp = fcmp ugt float %a, %b148 %val = select i1 %cmp, float %b, float %a149 ret float %val150}151 152define float @v_test_fmin_legacy_ole_f32_fneg_lhs(float %a, float %b) {153; GFX6-LABEL: v_test_fmin_legacy_ole_f32_fneg_lhs:154; GFX6: ; %bb.0:155; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)156; GFX6-NEXT: v_min_legacy_f32_e64 v0, -v0, v1157; GFX6-NEXT: s_setpc_b64 s[30:31]158;159; GFX8-LABEL: v_test_fmin_legacy_ole_f32_fneg_lhs:160; GFX8: ; %bb.0:161; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)162; GFX8-NEXT: v_cmp_le_f32_e64 s[4:5], -v0, v1163; GFX8-NEXT: v_cndmask_b32_e64 v0, v1, -v0, s[4:5]164; GFX8-NEXT: s_setpc_b64 s[30:31]165 %a.neg = fneg float %a166 %cmp = fcmp ole float %a.neg, %b167 %val = select i1 %cmp, float %a.neg, float %b168 ret float %val169}170 171define float @v_test_fmin_legacy_ole_f32_fneg_rhs(float %a, float %b) {172; GFX6-LABEL: v_test_fmin_legacy_ole_f32_fneg_rhs:173; GFX6: ; %bb.0:174; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)175; GFX6-NEXT: v_min_legacy_f32_e64 v0, v0, -v1176; GFX6-NEXT: s_setpc_b64 s[30:31]177;178; GFX8-LABEL: v_test_fmin_legacy_ole_f32_fneg_rhs:179; GFX8: ; %bb.0:180; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)181; GFX8-NEXT: v_cmp_le_f32_e64 s[4:5], v0, -v1182; GFX8-NEXT: v_cndmask_b32_e64 v0, -v1, v0, s[4:5]183; GFX8-NEXT: s_setpc_b64 s[30:31]184 %b.neg = fneg float %b185 %cmp = fcmp ole float %a, %b.neg186 %val = select i1 %cmp, float %a, float %b.neg187 ret float %val188}189 190define float @v_test_fmin_legacy_ule_f32_multi_use(float %a, float %b) {191; GFX6-LABEL: v_test_fmin_legacy_ule_f32_multi_use:192; GFX6: ; %bb.0:193; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)194; GFX6-NEXT: v_cmp_ngt_f32_e32 vcc, v0, v1195; GFX6-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc196; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc197; GFX6-NEXT: s_mov_b32 m0, -1198; GFX6-NEXT: ds_write_b32 v0, v1199; GFX6-NEXT: s_waitcnt lgkmcnt(0)200; GFX6-NEXT: s_setpc_b64 s[30:31]201;202; GFX8-LABEL: v_test_fmin_legacy_ule_f32_multi_use:203; GFX8: ; %bb.0:204; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)205; GFX8-NEXT: v_cmp_ngt_f32_e32 vcc, v0, v1206; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc207; GFX8-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc208; GFX8-NEXT: s_mov_b32 m0, -1209; GFX8-NEXT: ds_write_b32 v0, v1210; GFX8-NEXT: s_waitcnt lgkmcnt(0)211; GFX8-NEXT: s_setpc_b64 s[30:31]212 %cmp = fcmp ule float %a, %b213 %val0 = select i1 %cmp, float %a, float %b214 %val1 = zext i1 %cmp to i32215 store i32 %val1, ptr addrspace(3) poison216 ret float %val0217}218 219define double @v_test_fmin_legacy_ole_f64(double %a, double %b) {220; GFX6-LABEL: v_test_fmin_legacy_ole_f64:221; GFX6: ; %bb.0:222; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)223; GFX6-NEXT: v_cmp_le_f64_e32 vcc, v[0:1], v[2:3]224; GFX6-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc225; GFX6-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc226; GFX6-NEXT: s_setpc_b64 s[30:31]227;228; GFX8-LABEL: v_test_fmin_legacy_ole_f64:229; GFX8: ; %bb.0:230; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)231; GFX8-NEXT: v_cmp_le_f64_e32 vcc, v[0:1], v[2:3]232; GFX8-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc233; GFX8-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc234; GFX8-NEXT: s_setpc_b64 s[30:31]235 %cmp = fcmp ole double %a, %b236 %val = select i1 %cmp, double %a, double %b237 ret double %val238}239 240define float @v_test_fcmp_select_oeq(float %a, float %b) {241; GFX6-LABEL: v_test_fcmp_select_oeq:242; GFX6: ; %bb.0:243; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)244; GFX6-NEXT: v_cmp_eq_f32_e32 vcc, v0, v1245; GFX6-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc246; GFX6-NEXT: s_setpc_b64 s[30:31]247;248; GFX8-LABEL: v_test_fcmp_select_oeq:249; GFX8: ; %bb.0:250; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)251; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, v0, v1252; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc253; GFX8-NEXT: s_setpc_b64 s[30:31]254 %cmp = fcmp oeq float %a, %b255 %val = select i1 %cmp, float %a, float %b256 ret float %val257}258 259define float @v_test_fcmp_select_one(float %a, float %b) {260; GFX6-LABEL: v_test_fcmp_select_one:261; GFX6: ; %bb.0:262; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)263; GFX6-NEXT: v_cmp_lg_f32_e32 vcc, v0, v1264; GFX6-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc265; GFX6-NEXT: s_setpc_b64 s[30:31]266;267; GFX8-LABEL: v_test_fcmp_select_one:268; GFX8: ; %bb.0:269; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)270; GFX8-NEXT: v_cmp_lg_f32_e32 vcc, v0, v1271; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc272; GFX8-NEXT: s_setpc_b64 s[30:31]273 %cmp = fcmp one float %a, %b274 %val = select i1 %cmp, float %a, float %b275 ret float %val276}277 278define float @v_test_fcmp_select_ord(float %a, float %b) {279; GFX6-LABEL: v_test_fcmp_select_ord:280; GFX6: ; %bb.0:281; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)282; GFX6-NEXT: v_cmp_o_f32_e32 vcc, v0, v1283; GFX6-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc284; GFX6-NEXT: s_setpc_b64 s[30:31]285;286; GFX8-LABEL: v_test_fcmp_select_ord:287; GFX8: ; %bb.0:288; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)289; GFX8-NEXT: v_cmp_o_f32_e32 vcc, v0, v1290; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc291; GFX8-NEXT: s_setpc_b64 s[30:31]292 %cmp = fcmp ord float %a, %b293 %val = select i1 %cmp, float %a, float %b294 ret float %val295}296 297define float @v_test_fcmp_select_uno(float %a, float %b) {298; GFX6-LABEL: v_test_fcmp_select_uno:299; GFX6: ; %bb.0:300; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)301; GFX6-NEXT: v_cmp_u_f32_e32 vcc, v0, v1302; GFX6-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc303; GFX6-NEXT: s_setpc_b64 s[30:31]304;305; GFX8-LABEL: v_test_fcmp_select_uno:306; GFX8: ; %bb.0:307; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)308; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v0, v1309; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc310; GFX8-NEXT: s_setpc_b64 s[30:31]311 %cmp = fcmp uno float %a, %b312 %val = select i1 %cmp, float %a, float %b313 ret float %val314}315 316define float @v_test_fcmp_select_ueq(float %a, float %b) {317; GFX6-LABEL: v_test_fcmp_select_ueq:318; GFX6: ; %bb.0:319; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)320; GFX6-NEXT: v_cmp_nlg_f32_e32 vcc, v0, v1321; GFX6-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc322; GFX6-NEXT: s_setpc_b64 s[30:31]323;324; GFX8-LABEL: v_test_fcmp_select_ueq:325; GFX8: ; %bb.0:326; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)327; GFX8-NEXT: v_cmp_nlg_f32_e32 vcc, v0, v1328; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc329; GFX8-NEXT: s_setpc_b64 s[30:31]330 %cmp = fcmp ueq float %a, %b331 %val = select i1 %cmp, float %a, float %b332 ret float %val333}334 335define float @v_test_fcmp_select_une(float %a, float %b) {336; GFX6-LABEL: v_test_fcmp_select_une:337; GFX6: ; %bb.0:338; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)339; GFX6-NEXT: v_cmp_neq_f32_e32 vcc, v0, v1340; GFX6-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc341; GFX6-NEXT: s_setpc_b64 s[30:31]342;343; GFX8-LABEL: v_test_fcmp_select_une:344; GFX8: ; %bb.0:345; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)346; GFX8-NEXT: v_cmp_neq_f32_e32 vcc, v0, v1347; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc348; GFX8-NEXT: s_setpc_b64 s[30:31]349 %cmp = fcmp une float %a, %b350 %val = select i1 %cmp, float %a, float %b351 ret float %val352}353 354define float @v_test_fcmp_select_true(float %a, float %b) {355; GFX6-LABEL: v_test_fcmp_select_true:356; GFX6: ; %bb.0:357; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)358; GFX6-NEXT: s_setpc_b64 s[30:31]359;360; GFX8-LABEL: v_test_fcmp_select_true:361; GFX8: ; %bb.0:362; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)363; GFX8-NEXT: s_setpc_b64 s[30:31]364 %cmp = fcmp true float %a, %b365 %val = select i1 %cmp, float %a, float %b366 ret float %val367}368 369define float @v_test_fcmp_select_false(float %a, float %b) {370; GFX6-LABEL: v_test_fcmp_select_false:371; GFX6: ; %bb.0:372; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)373; GFX6-NEXT: v_mov_b32_e32 v0, v1374; GFX6-NEXT: s_setpc_b64 s[30:31]375;376; GFX8-LABEL: v_test_fcmp_select_false:377; GFX8: ; %bb.0:378; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)379; GFX8-NEXT: v_mov_b32_e32 v0, v1380; GFX8-NEXT: s_setpc_b64 s[30:31]381 %cmp = fcmp false float %a, %b382 %val = select i1 %cmp, float %a, float %b383 ret float %val384}385 386define <2 x float> @v_test_fmin_legacy_ole_v2f32(<2 x float> %a, <2 x float> %b) {387; GFX6-LABEL: v_test_fmin_legacy_ole_v2f32:388; GFX6: ; %bb.0:389; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)390; GFX6-NEXT: v_min_legacy_f32_e32 v0, v0, v2391; GFX6-NEXT: v_min_legacy_f32_e32 v1, v1, v3392; GFX6-NEXT: s_setpc_b64 s[30:31]393;394; GFX8-LABEL: v_test_fmin_legacy_ole_v2f32:395; GFX8: ; %bb.0:396; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)397; GFX8-NEXT: v_cmp_le_f32_e32 vcc, v0, v2398; GFX8-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc399; GFX8-NEXT: v_cmp_le_f32_e32 vcc, v1, v3400; GFX8-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc401; GFX8-NEXT: s_setpc_b64 s[30:31]402 %cmp = fcmp ole <2 x float> %a, %b403 %val = select <2 x i1> %cmp, <2 x float> %a, <2 x float> %b404 ret <2 x float> %val405}406